mirror of
https://github.com/RIOT-OS/RIOT.git
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cpu/esp32/vendor/ld: migration to ESP-IDF v5.4
This commit is contained in:
Gunar Schorcht
parent
0d4575fc54
commit
01f830745c
@ -1,648 +0,0 @@
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||||
/* Automatically generated file; DO NOT EDIT */
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/* Espressif IoT Development Framework Linker Script */
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/* Generated from: esp-idf/components/esp_system/ld/esp32/sections.ld.in */
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Default entry point: */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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/* RTC fast memory holds RTC wake stub code,
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including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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. = ALIGN(4);
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_rtc_text_start = ABSOLUTE(.);
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*(.rtc.literal .rtc.text .rtc.text.*)
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*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
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_rtc_text_end = ABSOLUTE(.);
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} > rtc_iram_seg
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/*
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This section is required to skip rtc.text area because rtc_iram_seg and
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rtc_data_seg are reflect the same address space on different buses.
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*/
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.rtc.dummy :
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{
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_rtc_dummy_start = ABSOLUTE(.);
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_rtc_fast_start = ABSOLUTE(.);
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. = SIZEOF(.rtc.text);
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_rtc_dummy_end = ABSOLUTE(.);
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} > rtc_data_seg
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/* This section located in RTC FAST Memory area.
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It holds data marked with RTC_FAST_ATTR attribute.
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See the file "esp_attr.h" for more information.
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*/
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.rtc.force_fast :
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{
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. = ALIGN(4);
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_rtc_force_fast_start = ABSOLUTE(.);
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_coredump_rtc_fast_start = ABSOLUTE(.);
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*(.rtc.fast.coredump .rtc.fast.coredump.*)
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_coredump_rtc_fast_end = ABSOLUTE(.);
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*(.rtc.force_fast .rtc.force_fast.*)
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. = ALIGN(4) ;
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_rtc_force_fast_end = ABSOLUTE(.);
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} > rtc_data_seg
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/* RTC data section holds RTC wake stub
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data/rodata, including from any source file
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named rtc_wake_stub*.c and the data marked with
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RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
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The memory location of the data is dependent on
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CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
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*/
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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_coredump_rtc_start = ABSOLUTE(.);
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*(.rtc.coredump .rtc.coredump.*)
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_coredump_rtc_end = ABSOLUTE(.);
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*(.rtc.data .rtc.data.*)
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*(.rtc.rodata .rtc.rodata.*)
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*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_data_location
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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/* part that is initialized if not waking up from deep sleep */
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.*(.bss .bss.*)
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*rtc_wake_stub*.*(COMMON)
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_rtc_bss_end = ABSOLUTE(.);
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/* part that saves some data for rtc periph module, this part is
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only initialized at power on reset */
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_rtc_bss_rtc_start = ABSOLUTE(.);
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*(.rtc.bss .rtc.bss.*)
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_rtc_bss_rtc_end = ABSOLUTE(.);
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} > rtc_data_location
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/* This section holds data that should not be initialized at power up
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and will be retained during deep sleep.
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User data marked with RTC_NOINIT_ATTR will be placed
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into this section. See the file "esp_attr.h" for more information.
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The memory location of the data is dependent on
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CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
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*/
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.rtc_noinit (NOLOAD):
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{
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. = ALIGN(4);
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_rtc_noinit_start = ABSOLUTE(.);
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*(.rtc_noinit .rtc_noinit.*)
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. = ALIGN(4) ;
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_rtc_noinit_end = ABSOLUTE(.);
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} > rtc_data_location
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/* This section located in RTC SLOW Memory area.
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It holds data marked with RTC_SLOW_ATTR attribute.
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See the file "esp_attr.h" for more information.
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*/
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.rtc.force_slow :
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{
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. = ALIGN(4);
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_rtc_force_slow_start = ABSOLUTE(.);
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*(.rtc.force_slow .rtc.force_slow.*)
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. = ALIGN(4) ;
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_rtc_force_slow_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* Get size of rtc slow data based on rtc_data_location alias */
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_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
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? (_rtc_force_slow_end - _rtc_data_start)
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: (_rtc_force_slow_end - _rtc_force_slow_start);
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_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
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? (_rtc_force_fast_end - _rtc_fast_start)
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: (_rtc_noinit_end - _rtc_fast_start);
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ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
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"RTC_SLOW segment data does not fit.")
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ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
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"RTC_FAST segment data does not fit.")
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/* Send .iram0 code to iram */
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.iram0.vectors :
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{
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_iram_start = ABSOLUTE(.);
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/* Vectors go to IRAM */
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_vector_table = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP(*(.WindowVectors.text));
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. = 0x180;
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KEEP(*(.Level2InterruptVector.text));
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. = 0x1c0;
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KEEP(*(.Level3InterruptVector.text));
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. = 0x200;
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KEEP(*(.Level4InterruptVector.text));
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. = 0x240;
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KEEP(*(.Level5InterruptVector.text));
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. = 0x280;
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KEEP(*(.DebugExceptionVector.text));
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. = 0x2c0;
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KEEP(*(.NMIExceptionVector.text));
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. = 0x300;
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KEEP(*(.KernelExceptionVector.text));
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. = 0x340;
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KEEP(*(.UserExceptionVector.text));
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. = 0x3C0;
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KEEP(*(.DoubleExceptionVector.text));
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. = 0x400;
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_invalid_pc_placeholder = ABSOLUTE(.);
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*(.*Vector.literal)
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*(.UserEnter.literal);
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*(.UserEnter.text);
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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_init_end = ABSOLUTE(.);
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} > iram0_0_seg
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/* If Bluetooth is not used, this DRAM section can be used as heap */
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. = _data_start_btdm; /* 0x3ffae6e0 */
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. = ALIGN (4);
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_sheap1 = ABSOLUTE(.);
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. = 0x3ffb0000;
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_eheap1 = ABSOLUTE(.);
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.iram0.text :
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{
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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/* Xtensa basic functionality written in assembler should be placed in IRAM */
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*xtensa/*(.literal .text .literal.* .text.*)
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/* parts of RIOT that should run in IRAM */
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*core/*(.literal .text .literal.* .text.*)
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*syscalls.*(.literal .text .literal.* .text.*)
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*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
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*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
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*esp_freertos_common/*(.literal .text .literal.* .text.*)
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/* parts of ESP-IDF that should run in IRAM */
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/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
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/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
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*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
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*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
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*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
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*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
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*components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
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*components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*)
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*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
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*components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
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*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
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*components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
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*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
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*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
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*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
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*libgcc.a:save-restore.*(.literal .literal.* .text .text.*)
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*libgcov.a:(.literal .literal.* .text .text.*)
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*components/hal/cpu_hal.*(.literal .literal.* .text .text.*)
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*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/soc_hal.*(.literal .literal.* .text .text.*)
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*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
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*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
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*components/hal/twai_hal.*(.literal .literal.* .text .text.*)
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*components/hal/uart_hal.*(.literal .literal.* .text .text.*)
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*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
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*components/heap/heap_tlsf.*(.literal .literal.* .text .text.*)
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*components/heap/multi_heap.*(.literal .literal.* .text .text.*)
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*esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write)
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*libnet80211.a:(.wifi0iram .wifi0iram.*)
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*libnet80211.a:(.wifirxiram .wifirxiram.*)
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*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
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||||
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*components/newlib/abort.*(.literal .literal.* .text .text.*)
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||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
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||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
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*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
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||||
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||||
*libpp.a:(.wifi0iram .wifi0iram.*)
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*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
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||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
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*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
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||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libxt_hal.a:(.literal .literal.* .text .text.*)
|
||||
*libxtensa.a:eri.*(.literal .literal.* .text .text.*)
|
||||
*libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
|
||||
|
||||
} > iram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
||||
KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
*(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram1.coredump .dram1.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
*components/app_trace/app_trace.*(.rodata .rodata.*)
|
||||
*components/app_trace/app_trace_util.*(.rodata .rodata.*)
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*components/bt/*(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
_btdm_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_btdm_data_end = ABSOLUTE(.);
|
||||
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
*components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.*)
|
||||
*libgcc.a:save-restore.*(.rodata .rodata.*)
|
||||
*libgcov.a:(.rodata .rodata.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.rodata .rodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/soc_hal.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.*)
|
||||
*components/hal/twai_hal.*(.rodata .rodata.*)
|
||||
*components/hal/uart_hal.*(.rodata .rodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/heap/heap_tlsf.*(.rodata .rodata.*)
|
||||
*components/heap/multi_heap.*(.rodata .rodata.*)
|
||||
|
||||
*components/newlib/abort.*(.rodata .rodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that won't be initialised when startup.
|
||||
* This section locates in External RAM region.
|
||||
*/
|
||||
.ext_ram_noinit (NOLOAD) :
|
||||
{
|
||||
_ext_ram_noinit_start = ABSOLUTE(.);
|
||||
*(.ext_ram_noinit*)
|
||||
. = ALIGN(4);
|
||||
_ext_ram_noinit_end = ABSOLUTE(.);
|
||||
} > extern_ram_seg
|
||||
|
||||
/*This section holds data that should not be initialized at power up.
|
||||
The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
can be used as attribute to place data into this section.
|
||||
See the esp_attr.h file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_noinit_start = ABSOLUTE(.);
|
||||
*(.noinit .noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_noinit_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/* external memory bss, from any global variable with EXT_RAM_ATTR attribute*/
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
_ext_ram_bss_start = ABSOLUTE(.);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
_ext_ram_bss_end = ABSOLUTE(.);
|
||||
} > extern_ram_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
|
||||
*(.bss .bss.*)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(COMMON)
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*components/bt/*(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
_btdm_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_btdm_bss_end = ABSOLUTE(.);
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN (8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
/* Reserved ROM/ETS data start at 0x3ffe000. */
|
||||
. = 0x3ffe0000;
|
||||
_heap_top = ABSOLUTE(.);
|
||||
_eheap = ABSOLUTE(.);
|
||||
|
||||
/* Reserved ROM/ETS data region for PRO CPU: 0x3ffe0000 ... 0x3ffe440 */
|
||||
. = 0x3ffe0440;
|
||||
_sheap2 = ABSOLUTE(.);
|
||||
. = 0x3ffe4000;
|
||||
_eheap2 = ABSOLUTE(.);
|
||||
|
||||
/* Reserved ROM/ETS data region for APP CPU: 0x3ffe4000 ... 0x3ffe4350 */
|
||||
. = 0x3ffe4350;
|
||||
_sheap3 = ABSOLUTE(.);
|
||||
. = 0x40000000;
|
||||
_eheap3 = ABSOLUTE(.);
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
|
||||
/* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image. */
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} >default_rodata_seg
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
*(.gnu.version_r)
|
||||
. = (. + 3) & ~ 3;
|
||||
__eh_frame = ABSOLUTE(.);
|
||||
KEEP(*(.eh_frame))
|
||||
. = (. + 7) & ~ 3;
|
||||
/* C++ constructor and destructor tables
|
||||
|
||||
Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt
|
||||
*/
|
||||
__init_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
|
||||
KEEP (*crtbegin.*(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
/* C++ exception handlers table: */
|
||||
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
*(.dynamic)
|
||||
*(.gnu.version_d)
|
||||
/* Addresses of memory regions reserved via
|
||||
SOC_RESERVE_MEMORY_REGION() */
|
||||
soc_reserved_memory_region_start = ABSOLUTE(.);
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_thread_local_start = ABSOLUTE(.);
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} >default_rodata_seg
|
||||
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (4);
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
/** CPU will try to prefetch up to 16 bytes of
|
||||
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/* Similar to _iram_start, this symbol goes here so it is
|
||||
resolved by addr2line in preference to the first symbol in
|
||||
the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} >default_code_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (4);
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_iram_data_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram.data .iram.data.*)
|
||||
_coredump_iram_start = ABSOLUTE(.);
|
||||
*(.iram.data.coredump .iram.data.coredump.*)
|
||||
_coredump_iram_end = ABSOLUTE(.);
|
||||
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_iram_bss_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram.bss .iram.bss.*)
|
||||
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_heap_start = ABSOLUTE(.);
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
.flash_writable (NOLOAD) : ALIGN(65536)
|
||||
{
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
} > drom0_1_seg
|
||||
#endif
|
||||
}
|
||||
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
. = ORIGIN(dram0_0_seg);
|
||||
_cpu_ram_start = ABSOLUTE(.);
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_cpu_ram_end = ABSOLUTE(.);
|
||||
|
||||
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
|
||||
* match the parameters used in linker script */
|
||||
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
|
||||
"RAM_START_ADDR does not match DRAM start address")
|
||||
ASSERT(((LENGTH(dram0_0_seg) - 0x200) == CPU_RAM_SIZE),
|
||||
"RAM_LEN does not match DRAM size")
|
||||
@ -1,630 +0,0 @@
|
||||
/* Automatically generated file; DO NOT EDIT */
|
||||
/* Espressif IoT Development Framework Linker Script */
|
||||
/* Generated from: esp-idf/components/esp_system/ld/esp32c3/sections.ld.in */
|
||||
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
*(.rtc_text_end_test)
|
||||
|
||||
/* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(4);
|
||||
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_fast_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_fast_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
/* part that is initialized if not waking up from deep sleep */
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*)
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_noinit_start = ABSOLUTE(.);
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_noinit_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_slow_start = ABSOLUTE(.);
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_slow_end = ABSOLUTE(.);
|
||||
} > rtc_slow_seg
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to start of IRAM */
|
||||
ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
|
||||
KEEP(*(.exception_vectors.text));
|
||||
. = ALIGN(4);
|
||||
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:save-restore.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/soc_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/twai_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/uart_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/heap_tlsf.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/multi_heap.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/riscv/interrupt.*(.literal .literal.* .text .text.*)
|
||||
*components/riscv/vectors.*(.literal .literal.* .text .text.*)
|
||||
|
||||
} > iram0_0_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip .iram0.text area because iram0_0_seg and
|
||||
* dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
|
||||
} > dram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
__global_pointer$ = . + 0x800;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
||||
KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
*(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram1.coredump .dram1.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
*components/app_trace/app_trace.*(.rodata .rodata.*)
|
||||
*components/app_trace/app_trace_util.*(.rodata .rodata.*)
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*components/bt/*(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
_btdm_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_btdm_data_end = ABSOLUTE(.);
|
||||
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
*components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.*)
|
||||
*libgcc.a:save-restore.*(.rodata .rodata.*)
|
||||
*libgcov.a:(.rodata .rodata.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.rodata .rodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/soc_hal.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.*)
|
||||
*components/hal/twai_hal.*(.rodata .rodata.*)
|
||||
*components/hal/uart_hal.*(.rodata .rodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/heap/heap_tlsf.*(.rodata .rodata.*)
|
||||
*components/heap/multi_heap.*(.rodata .rodata.*)
|
||||
|
||||
*components/newlib/abort.*(.rodata .rodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_noinit_start = ABSOLUTE(.);
|
||||
*(.noinit .noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_noinit_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
|
||||
*(.bss .bss.*)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(COMMON)
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*components/bt/*(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
_btdm_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_btdm_bss_end = ABSOLUTE(.);
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
*(.dynsbss)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
*(.dynbss)
|
||||
*(.share.mem)
|
||||
*(.gnu.linkonce.b.*)
|
||||
|
||||
. = ALIGN (8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
/** CPU will try to prefetch up to 16 bytes of
|
||||
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
|
||||
/**
|
||||
* This dummy section represents the .flash.text section but in default_rodata_seg.
|
||||
* Thus, it must have its alignement and (at least) its size.
|
||||
*/
|
||||
.flash_rodata_dummy (NOLOAD):
|
||||
{
|
||||
_flash_rodata_dummy_start = .;
|
||||
/* Start at the same alignement constraint than .flash.text */
|
||||
. = ALIGN(ALIGNOF(.flash.text));
|
||||
/* Create an empty gap as big as .flash.text section */
|
||||
. = . + SIZEOF(.flash.text);
|
||||
/* Prepare the alignement of the section above. Few bytes (0x20) must be
|
||||
* added for the mapping header. */
|
||||
. = ALIGN(0x10000) + 0x20;
|
||||
_rodata_reserved_start = .;
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
|
||||
/* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flash.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image. */
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} >default_rodata_seg
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
*(.gnu.version_r)
|
||||
. = (. + 7) & ~ 3;
|
||||
/*
|
||||
* C++ constructor and destructor tables
|
||||
* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt.
|
||||
*
|
||||
* RISC-V gcc is configured with --enable-initfini-array so it emits an .init_array section instead.
|
||||
* But the init_priority sections will be sorted for iteration in ascending order during startup.
|
||||
* The rest of the init_array sections is sorted for iteration in descending order during startup, however.
|
||||
* Hence a different section is generated for the init_priority functions which is iterated in
|
||||
* ascending order during startup. The corresponding code can be found in startup.c.
|
||||
*/
|
||||
__init_priority_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
|
||||
__init_priority_array_end = ABSOLUTE(.);
|
||||
__init_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
KEEP (*crtbegin.*(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
/* C++ exception handlers table: */
|
||||
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
*(.dynamic)
|
||||
*(.gnu.version_d)
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
soc_reserved_memory_region_start = ABSOLUTE(.);
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_thread_local_start = ABSOLUTE(.);
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
*(.srodata)
|
||||
*(.srodata.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
. = ALIGN(ALIGNOF(.eh_frame));
|
||||
} > default_rodata_seg
|
||||
|
||||
/* Keep this section shall be at least aligned on 4 */
|
||||
.eh_frame : ALIGN(8)
|
||||
{
|
||||
__eh_frame = ABSOLUTE(.);
|
||||
KEEP (*(.eh_frame))
|
||||
__eh_frame_end = ABSOLUTE(.);
|
||||
/* Guarantee that this section and the next one will be merged by making
|
||||
* them adjacent. */
|
||||
. = ALIGN(ALIGNOF(.eh_frame_hdr));
|
||||
} > default_rodata_seg
|
||||
|
||||
/* To avoid any exception in C++ exception frame unwinding code, this section
|
||||
* shall be aligned on 8. */
|
||||
.eh_frame_hdr : ALIGN(8)
|
||||
{
|
||||
__eh_frame_hdr = ABSOLUTE(.);
|
||||
KEEP (*(.eh_frame_hdr))
|
||||
__eh_frame_hdr_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (4);
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* iram_end_test section exists for use by Memprot unit tests only */
|
||||
*(.iram_end_test)
|
||||
/* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
. = ALIGN(16);
|
||||
_iram_data_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram.data .iram.data.*)
|
||||
_coredump_iram_start = ABSOLUTE(.);
|
||||
*(.iram.data.coredump .iram.data.coredump.*)
|
||||
_coredump_iram_end = ABSOLUTE(.);
|
||||
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(16);
|
||||
_iram_bss_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram.bss .iram.bss.*)
|
||||
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(16);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (16);
|
||||
_heap_start = ABSOLUTE(.);
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
_eheap = phy_param_rom;
|
||||
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
.flash_writable (NOLOAD) : ALIGN(65536)
|
||||
{
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
} > drom0_1_seg
|
||||
#endif
|
||||
}
|
||||
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
. = ORIGIN(dram0_0_seg);
|
||||
_cpu_ram_start = ABSOLUTE(.);
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_cpu_ram_end = ABSOLUTE(.);
|
||||
|
||||
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
|
||||
* match the parameters used in linker script */
|
||||
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
|
||||
"RAM_START_ADDR does not match DRAM start address")
|
||||
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
|
||||
"RAM_LEN does not match DRAM size")
|
||||
@ -1,626 +0,0 @@
|
||||
/* Automatically generated file; DO NOT EDIT */
|
||||
/* Espressif IoT Development Framework Linker Script */
|
||||
/* Generated from: /home/gs/tmp/esp-idf-v4.4.1/components/esp_system/ld/esp32s2/sections.ld.in */
|
||||
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/* Default entry point: */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* RTC fast memory holds RTC wake stub code,
|
||||
including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
_rtc_text_start = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
|
||||
_rtc_code_start = .;
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
_rtc_code_end = .;
|
||||
|
||||
/* possibly align + add 16B for CPU dummy speculative instr. fetch */
|
||||
. = ((_rtc_code_end - _rtc_code_start) == 0) ? ALIGN(0) : ALIGN(4) + 16;
|
||||
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/*
|
||||
This section is required to skip rtc.text area because rtc_iram_seg and
|
||||
rtc_data_seg are reflect the same address space on different buses.
|
||||
*/
|
||||
.rtc.dummy :
|
||||
{
|
||||
_rtc_dummy_start = ABSOLUTE(.);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
. = SIZEOF(.rtc.text);
|
||||
_rtc_dummy_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/* This section located in RTC FAST Memory area.
|
||||
It holds data marked with RTC_FAST_ATTR attribute.
|
||||
See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_fast_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_fast_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/* RTC data section holds RTC wake stub
|
||||
data/rodata, including from any source file
|
||||
named rtc_wake_stub*.c and the data marked with
|
||||
RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
The memory location of the data is dependent on
|
||||
CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
/* part that is initialized if not waking up from deep sleep */
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*)
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* This section holds data that should not be initialized at power up
|
||||
and will be retained during deep sleep.
|
||||
User data marked with RTC_NOINIT_ATTR will be placed
|
||||
into this section. See the file "esp_attr.h" for more information.
|
||||
The memory location of the data is dependent on
|
||||
CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_noinit_start = ABSOLUTE(.);
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_noinit_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* This section located in RTC SLOW Memory area.
|
||||
It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_slow_start = ABSOLUTE(.);
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_slow_end = ABSOLUTE(.);
|
||||
} > rtc_slow_seg
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
/* Send .iram0 code to iram */
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to IRAM */
|
||||
_vector_table = ABSOLUTE(.);
|
||||
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
|
||||
. = 0x0;
|
||||
KEEP(*(.WindowVectors.text));
|
||||
. = 0x180;
|
||||
KEEP(*(.Level2InterruptVector.text));
|
||||
. = 0x1c0;
|
||||
KEEP(*(.Level3InterruptVector.text));
|
||||
. = 0x200;
|
||||
KEEP(*(.Level4InterruptVector.text));
|
||||
. = 0x240;
|
||||
KEEP(*(.Level5InterruptVector.text));
|
||||
. = 0x280;
|
||||
KEEP(*(.DebugExceptionVector.text));
|
||||
. = 0x2c0;
|
||||
KEEP(*(.NMIExceptionVector.text));
|
||||
. = 0x300;
|
||||
KEEP(*(.KernelExceptionVector.text));
|
||||
. = 0x340;
|
||||
KEEP(*(.UserExceptionVector.text));
|
||||
. = 0x3C0;
|
||||
KEEP(*(.DoubleExceptionVector.text));
|
||||
. = 0x400;
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
*(.*Vector.literal)
|
||||
|
||||
*(.UserEnter.literal);
|
||||
*(.UserEnter.text);
|
||||
. = ALIGN (16);
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
_init_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
/* Code marked as runnning out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* Xtensa basic functionality written in assembler should be placed in IRAM */
|
||||
*xtensa/*(.literal .text .literal.* .text.*)
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*regi2c_ctrl.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:save-restore.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/soc_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/twai_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/uart_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/heap_tlsf.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/multi_heap.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libxt_hal.a:(.literal .literal.* .text .text.*)
|
||||
*libxtensa.a:eri.*(.literal .literal.* .text .text.*)
|
||||
*libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
|
||||
|
||||
/* Added to maintain compability, there are no iram0 data section to put
|
||||
* sections:iram_coredump entry defined in espcoredump's linker.lf file */
|
||||
_coredump_iram_start = 0;
|
||||
_coredump_iram_end = 0;
|
||||
|
||||
/* align + add 16B for CPU dummy speculative instr. fetch */
|
||||
. = ALIGN(_esp_memprot_align_size) + _esp_memprot_prefetch_pad_size;
|
||||
/* iram_end_test section exists for use by memprot unit tests only */
|
||||
*(.iram_end_test)
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.dram0_reserved_for_iram (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
|
||||
} > dram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
||||
KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram2.coredump .dram2.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
*libapp_trace.a:app_trace.*(.rodata .rodata.*)
|
||||
*libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*libbt.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
_btdm_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_btdm_data_end = ABSOLUTE(.);
|
||||
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
*components/esp_hw_support/*regi2c_ctrl.*(.rodata .rodata.*)
|
||||
*components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.*)
|
||||
*libgcc.a:save-restore.*(.rodata .rodata.*)
|
||||
*libgcov.a:(.rodata .rodata.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.rodata .rodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/soc_hal.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.*)
|
||||
*components/hal/twai_hal.*(.rodata .rodata.*)
|
||||
*components/hal/uart_hal.*(.rodata .rodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/heap/heap_tlsf.*(.rodata .rodata.*)
|
||||
*components/heap/multi_heap.*(.rodata .rodata.*)
|
||||
|
||||
*components/newlib/abort.*(.rodata .rodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} > dram0_0_seg
|
||||
|
||||
/*This section holds data that should not be initialized at power up.
|
||||
The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
can be used as attribute to place data into this section.
|
||||
See the esp_attr.h file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_noinit_start = ABSOLUTE(.);
|
||||
*(.noinit .noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_noinit_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/* external memory bss, from any global variable with EXT_RAM_ATTR attribute*/
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
_ext_ram_bss_start = ABSOLUTE(.);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
_ext_ram_bss_end = ABSOLUTE(.);
|
||||
} > extern_ram_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
*(.ext_ram.bss*)
|
||||
|
||||
*(.bss .bss.*)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(COMMON)
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*libbt.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
_btdm_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_btdm_bss_end = ABSOLUTE(.);
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
*(.dynsbss)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
*(.dynbss)
|
||||
*(.share.mem)
|
||||
*(.gnu.linkonce.b.*)
|
||||
|
||||
. = ALIGN (8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
|
||||
/* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image. */
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} >default_rodata_seg
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
*(.gnu.version_r)
|
||||
. = (. + 3) & ~ 3;
|
||||
__eh_frame = ABSOLUTE(.);
|
||||
KEEP(*(.eh_frame))
|
||||
. = (. + 7) & ~ 3;
|
||||
/* C++ constructor and destructor tables
|
||||
|
||||
Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt
|
||||
*/
|
||||
__init_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
KEEP (*crtbegin.*(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
/* C++ exception handlers table: */
|
||||
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
*(.dynamic)
|
||||
*(.gnu.version_d)
|
||||
/* Addresses of memory regions reserved via
|
||||
SOC_RESERVE_MEMORY_REGION() */
|
||||
soc_reserved_memory_region_start = ABSOLUTE(.);
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_thread_local_start = ABSOLUTE(.);
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} >default_rodata_seg
|
||||
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (4);
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
/** CPU will try to prefetch up to 16 bytes of
|
||||
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/* Similar to _iram_start, this symbol goes here so it is
|
||||
resolved by addr2line in preference to the first symbol in
|
||||
the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} >default_code_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (4);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_heap_start = ABSOLUTE(.);
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_eheap = ABSOLUTE(.);
|
||||
|
||||
. = _heap_end;
|
||||
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
.flash_writable (NOLOAD) : ALIGN(65536)
|
||||
{
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
} > drom0_1_seg
|
||||
#endif
|
||||
}
|
||||
|
||||
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_start - _data_start) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
. = ORIGIN(dram0_0_seg);
|
||||
_cpu_ram_start = ABSOLUTE(.);
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_cpu_ram_end = ABSOLUTE(.);
|
||||
|
||||
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
|
||||
* match the parameters used in linker script */
|
||||
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
|
||||
"RAM_START_ADDR does not match DRAM start address")
|
||||
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
|
||||
"RAM_LEN does not match DRAM size")
|
||||
@ -1,655 +0,0 @@
|
||||
/* Automatically generated file; DO NOT EDIT */
|
||||
/* Espressif IoT Development Framework Linker Script */
|
||||
/* Generated from: esp-idf/components/esp_system/ld/esp32s3/sections.ld.in */
|
||||
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
_diram_i_start = 0x40378000;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_text_start = ABSOLUTE(.);
|
||||
*(.rtc.entry.text)
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip rtc.text area because rtc_iram_seg and
|
||||
* rtc_data_seg are reflect the same address space on different buses.
|
||||
*/
|
||||
.rtc.dummy :
|
||||
{
|
||||
_rtc_dummy_start = ABSOLUTE(.);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
. = SIZEOF(.rtc.text);
|
||||
_rtc_dummy_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_fast_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_fast_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
/* part that is initialized if not waking up from deep sleep */
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*)
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
* The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_noinit_start = ABSOLUTE(.);
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_noinit_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_slow_start = ABSOLUTE(.);
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_slow_end = ABSOLUTE(.);
|
||||
} > rtc_slow_seg
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
/* Send .iram0 code to iram */
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to IRAM */
|
||||
_vector_table = ABSOLUTE(.);
|
||||
. = 0x0;
|
||||
KEEP(*(.WindowVectors.text));
|
||||
. = 0x180;
|
||||
KEEP(*(.Level2InterruptVector.text));
|
||||
. = 0x1c0;
|
||||
KEEP(*(.Level3InterruptVector.text));
|
||||
. = 0x200;
|
||||
KEEP(*(.Level4InterruptVector.text));
|
||||
. = 0x240;
|
||||
KEEP(*(.Level5InterruptVector.text));
|
||||
. = 0x280;
|
||||
KEEP(*(.DebugExceptionVector.text));
|
||||
. = 0x2c0;
|
||||
KEEP(*(.NMIExceptionVector.text));
|
||||
. = 0x300;
|
||||
KEEP(*(.KernelExceptionVector.text));
|
||||
. = 0x340;
|
||||
KEEP(*(.UserExceptionVector.text));
|
||||
. = 0x3C0;
|
||||
KEEP(*(.DoubleExceptionVector.text));
|
||||
. = 0x400;
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
*(.*Vector.literal)
|
||||
|
||||
*(.UserEnter.literal);
|
||||
*(.UserEnter.text);
|
||||
. = ALIGN (16);
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
_init_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* Xtensa basic functionality written in assembler should be placed in IRAM */
|
||||
*xtensa/*(.literal .text .literal.* .text.*)
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/spiram_psram.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/opiram_psram.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:save-restore.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/soc_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/twai_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/uart_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/heap_tlsf.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/multi_heap.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libxt_hal.a:(.literal .literal.* .text .text.*)
|
||||
*libxtensa.a:eri.*(.literal .literal.* .text .text.*)
|
||||
*libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
|
||||
|
||||
} > iram0_0_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip .iram0.text area because iram0_0_seg and
|
||||
* dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
|
||||
} > dram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
||||
KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
*(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram1.coredump .dram1.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
*libapp_trace.a:app_trace.*(.rodata .rodata.*)
|
||||
*libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*components/bt/*(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
_btdm_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_btdm_data_end = ABSOLUTE(.);
|
||||
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
*components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*)
|
||||
*components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.*)
|
||||
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.*)
|
||||
*libgcc.a:save-restore.*(.rodata .rodata.*)
|
||||
*libgcov.a:(.rodata .rodata.*)
|
||||
|
||||
*components/hal/cpu_hal.*(.rodata .rodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/soc_hal.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.*)
|
||||
*components/hal/twai_hal.*(.rodata .rodata.*)
|
||||
*components/hal/uart_hal.*(.rodata .rodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.*)
|
||||
*components/heap/heap_tlsf.*(.rodata .rodata.*)
|
||||
*components/heap/multi_heap.*(.rodata .rodata.*)
|
||||
|
||||
*components/newlib/abort.*(.rodata .rodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*)
|
||||
*components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*)
|
||||
*components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_noinit_start = ABSOLUTE(.);
|
||||
*(.noinit .noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_noinit_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
*(.ext_ram.bss*)
|
||||
|
||||
*(.bss .bss.*)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(COMMON)
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*components/bt/*(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
_btdm_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_btdm_bss_end = ABSOLUTE(.);
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
*(.dynsbss)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
*(.dynbss)
|
||||
*(.share.mem)
|
||||
*(.gnu.linkonce.b.*)
|
||||
|
||||
. = ALIGN (8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
/** CPU will try to prefetch up to 16 bytes of
|
||||
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
|
||||
/**
|
||||
* This dummy section represents the .flash.text section but in default_rodata_seg.
|
||||
* Thus, it must have its alignement and (at least) its size.
|
||||
*/
|
||||
.flash_rodata_dummy (NOLOAD):
|
||||
{
|
||||
_flash_rodata_dummy_start = .;
|
||||
/* Start at the same alignement constraint than .flash.text */
|
||||
. = ALIGN(ALIGNOF(.flash.text));
|
||||
/* Create an empty gap as big as .flash.text section */
|
||||
. = . + SIZEOF(.flash.text);
|
||||
/* Prepare the alignement of the section above. Few bytes (0x20) must be
|
||||
* added for the mapping header. */
|
||||
. = ALIGN(0x10000) + 0x20;
|
||||
_rodata_reserved_start = .;
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
||||
|
||||
/* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image. */
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} >default_rodata_seg
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
*(.gnu.version_r)
|
||||
. = (. + 3) & ~ 3;
|
||||
__eh_frame = ABSOLUTE(.);
|
||||
KEEP(*(.eh_frame))
|
||||
. = (. + 7) & ~ 3;
|
||||
/* C++ constructor and destructor tables */
|
||||
/* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */
|
||||
__init_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
KEEP (*crtbegin.*(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
/* C++ exception handlers table: */
|
||||
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
*(.dynamic)
|
||||
*(.gnu.version_d)
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
soc_reserved_memory_region_start = ABSOLUTE(.);
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_thread_local_start = ABSOLUTE(.);
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
} > default_rodata_seg
|
||||
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (4);
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
/* iram_end_test section exists for use by memprot unit tests only */
|
||||
*(.iram_end_test)
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_iram_data_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram.data .iram.data.*)
|
||||
_coredump_iram_start = ABSOLUTE(.);
|
||||
*(.iram.data.coredump .iram.data.coredump.*)
|
||||
_coredump_iram_end = ABSOLUTE(.);
|
||||
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_iram_bss_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram.bss .iram.bss.*)
|
||||
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_heap_start = ABSOLUTE(.);
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_eheap = ABSOLUTE(.);
|
||||
|
||||
. = _heap_end;
|
||||
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
.flash_writable (NOLOAD) : ALIGN(65536)
|
||||
{
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
} > drom0_1_seg
|
||||
#endif
|
||||
}
|
||||
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
. = ORIGIN(dram0_0_seg);
|
||||
_cpu_ram_start = ABSOLUTE(.);
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_cpu_ram_end = ABSOLUTE(.);
|
||||
|
||||
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
|
||||
* match the parameters used in linker script */
|
||||
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
|
||||
"RAM_START_ADDR does not match DRAM start address")
|
||||
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
|
||||
"RAM_LEN does not match DRAM size")
|
||||
@ -1,24 +0,0 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "sdkconfig.h"
|
||||
|
||||
/* CPU instruction prefetch padding size for flash mmap scenario */
|
||||
_esp_flash_mmap_prefetch_pad_size = 16;
|
||||
|
||||
/* CPU instruction prefetch padding size for memory protection scenario */
|
||||
#ifdef CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE
|
||||
_esp_memprot_prefetch_pad_size = CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE;
|
||||
#else
|
||||
_esp_memprot_prefetch_pad_size = 0;
|
||||
#endif
|
||||
|
||||
/* Memory alignment size for PMS */
|
||||
#ifdef CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE
|
||||
_esp_memprot_align_size = CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE;
|
||||
#else
|
||||
_esp_memprot_align_size = 0;
|
||||
#endif
|
||||
88
cpu/esp32/vendor/ld/elf_misc.ld.in
vendored
Normal file
88
cpu/esp32/vendor/ld/elf_misc.ld.in
vendored
Normal file
@ -0,0 +1,88 @@
|
||||
#include "sdkconfig.h"
|
||||
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
/* DWARF 3 */
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* GNU DWARF 2 extensions */
|
||||
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
|
||||
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
|
||||
/* DWARF 4 */
|
||||
.debug_types 0 : { *(.debug_types) }
|
||||
/* DWARF 5 */
|
||||
.debug_addr 0 : { *(.debug_addr) }
|
||||
.debug_line_str 0 : { *(.debug_line_str) }
|
||||
.debug_loclists 0 : { *(.debug_loclists) }
|
||||
.debug_macro 0 : { *(.debug_macro) }
|
||||
.debug_names 0 : { *(.debug_names) }
|
||||
.debug_rnglists 0 : { *(.debug_rnglists) }
|
||||
.debug_str_offsets 0 : { *(.debug_str_offsets) }
|
||||
|
||||
.comment 0 : { *(.comment) }
|
||||
.note.GNU-stack 0: { *(.note.GNU-stack) }
|
||||
|
||||
#if CONFIG_IDF_TARGET_ARCH_RISCV
|
||||
.riscv.attributes 0: { *(.riscv.attributes) }
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
/**
|
||||
* Discarding .rela.* sections results in the following mapping:
|
||||
* .rela.text.* -> .text.*
|
||||
* .rela.data.* -> .data.*
|
||||
* And so forth...
|
||||
*/
|
||||
*(.rela.*)
|
||||
*(.got .got.plt) /* TODO: GCC-382 */
|
||||
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
|
||||
}
|
||||
#elif CONFIG_IDF_TARGET_ARCH_XTENSA
|
||||
/**
|
||||
* .xt.prop and .xt.lit sections will be used by the debugger and disassembler
|
||||
* to get more information about raw data present in the code.
|
||||
* Indeed, it may be required to add some padding at some points in the code
|
||||
* in order to align a branch/jump destination on a particular bound.
|
||||
* Padding these instructions will generate null bytes that shall be
|
||||
* interpreted as data, and not code by the debugger or disassembler.
|
||||
* This section will only be present in the ELF file, not in the final binary
|
||||
* For more details, check GCC-212
|
||||
*/
|
||||
.xtensa.info 0: { *(.xtensa.info) }
|
||||
.xt.prop 0 : { *(.xt.prop .xt.prop.* .gnu.linkonce.prop.*) }
|
||||
.xt.lit 0 : { *(.xt.lit .xt.lit.* .gnu.linkonce.p.*) }
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
*(.fini)
|
||||
*(.eh_frame_hdr)
|
||||
#if !CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
*(.eh_frame)
|
||||
#endif // !CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
}
|
||||
#else
|
||||
#error "Target architecture is not supported!"
|
||||
#endif
|
||||
@ -27,14 +27,6 @@
|
||||
#define CONFIG_BTDM_RESERVE_DRAM 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
|
||||
#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
|
||||
#else
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE)
|
||||
|
||||
ASSERT((CONFIG_ESP32_FIXED_STATIC_RAM_SIZE <= 0x2c200),
|
||||
@ -46,6 +38,13 @@ ASSERT((CONFIG_ESP32_FIXED_STATIC_RAM_SIZE <= 0x2c200),
|
||||
#define DRAM0_0_SEG_LEN 0x2c200
|
||||
#endif
|
||||
|
||||
#if CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM
|
||||
#define SRAM1_IRAM_LEN 0xA000
|
||||
#else
|
||||
#define SRAM1_IRAM_LEN 0x0
|
||||
#endif
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
|
||||
@ -53,7 +52,7 @@ MEMORY
|
||||
are connected to the data port of the CPU and eg allow bytewise access. */
|
||||
|
||||
/* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
|
||||
iram0_0_seg (RX) : org = 0x40080000, len = 0x20000
|
||||
iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + SRAM1_IRAM_LEN
|
||||
|
||||
#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
/* Even though the segment name is iram, it is actually mapped to flash
|
||||
@ -84,31 +83,43 @@ MEMORY
|
||||
|
||||
#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
/* Flash mapped constant data */
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
drom0_0_seg (R) : org = 0x3F400020,
|
||||
len = 0x400000 - 0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg),
|
||||
len = CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
#else
|
||||
drom0_0_seg (R) : org = 0x3F400020, len = 0x400000-0x20
|
||||
|
||||
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
|
||||
#endif /* MODULE_PERIPH_FLASHPAGE */
|
||||
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
|
||||
/* RTC fast memory (executable). Persists over deep sleep.
|
||||
*/
|
||||
rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000
|
||||
/* RTC fast memory (executable). Persists over deep sleep. */
|
||||
rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
|
||||
|
||||
/* RTC fast memory (same block as above), viewed from data bus */
|
||||
/* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */
|
||||
rtc_data_seg(RW) : org = 0x3ff80000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
|
||||
|
||||
/* We reduced the size of rtc_iram_seg and rtc_data_seg by ESP_BOOTLOADER_RESERVE_RTC value.
|
||||
It reserves the amount of RTC fast memory that we use for this memory segment.
|
||||
This segment is intended for keeping bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
org = 0x3ff80000 + 0x2000 - ESP_BOOTLOADER_RESERVE_RTC == SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t)
|
||||
*/
|
||||
rtc_fast_reserved_seg(RW) : org = 0x3ff80000 + 0x2000 - ESP_BOOTLOADER_RESERVE_RTC, len = ESP_BOOTLOADER_RESERVE_RTC
|
||||
|
||||
/* RTC slow memory (data accessible). Persists over deep sleep.
|
||||
|
||||
Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
|
||||
*/
|
||||
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM,
|
||||
len = 0x2000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
|
||||
#if CONFIG_ULP_COPROC_ENABLED
|
||||
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM,
|
||||
len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM - RESERVE_RTC_MEM
|
||||
#else
|
||||
rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000 - RESERVE_RTC_MEM
|
||||
#endif // CONFIG_ULP_COPROC_ENABLED
|
||||
|
||||
/* We reduced the size of rtc_slow_seg by RESERVE_RTC_MEM value.
|
||||
It reserves the amount of RTC slow memory that we use for this memory segment.
|
||||
This segment is intended for keeping rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM
|
||||
*/
|
||||
rtc_slow_reserved_seg(RW) : org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
|
||||
|
||||
/* external memory */
|
||||
extern_ram_seg(RWX) : org = 0x3F800000,
|
||||
@ -117,13 +128,19 @@ MEMORY
|
||||
|
||||
#if defined(CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE)
|
||||
/* static data ends at defined address */
|
||||
_static_data_end = 0x3FFB0000 + DRAM0_0_SEG_LEN;
|
||||
_heap_start = 0x3FFB0000 + DRAM0_0_SEG_LEN;
|
||||
#else
|
||||
_static_data_end = _bss_end;
|
||||
_heap_start = _heap_low_start;
|
||||
#endif
|
||||
|
||||
/* Heap ends at top of dram0_0_seg */
|
||||
_sram1_iram_start = 0x400A0000;
|
||||
_sram1_iram_len = ( _iram_end > _sram1_iram_start) ? (_iram_end - _sram1_iram_start) : 0;
|
||||
_heap_end = ALIGN(0x40000000 - _sram1_iram_len - 3, 4);
|
||||
|
||||
#if CONFIG_ESP32_TRACEMEM_RESERVE_DRAM != 0
|
||||
_heap_end = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
|
||||
#endif
|
||||
|
||||
|
||||
_data_seg_org = ORIGIN(rtc_data_seg);
|
||||
|
||||
793
cpu/esp32/vendor/ld/esp32/sections.ld.in
vendored
Normal file
793
cpu/esp32/vendor/ld/esp32/sections.ld.in
vendored
Normal file
@ -0,0 +1,793 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ld.common"
|
||||
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_text_start)
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip rtc.text area because rtc_iram_seg and
|
||||
* rtc_data_seg are reflect the same address space on different buses.
|
||||
*/
|
||||
.rtc.dummy :
|
||||
{
|
||||
_rtc_dummy_start = ABSOLUTE(.);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
|
||||
. = SIZEOF(.rtc.text);
|
||||
|
||||
_rtc_dummy_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_start)
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_end)
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
|
||||
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*)
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_start)
|
||||
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_end)
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_start)
|
||||
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_end)
|
||||
} > rtc_slow_seg
|
||||
|
||||
/**
|
||||
* This section holds RTC FAST data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_fast_reserved (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_fast_reserved_start)
|
||||
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
|
||||
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
||||
|
||||
_rtc_fast_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_fast_reserved_seg
|
||||
|
||||
_rtc_fast_reserved_length = _rtc_fast_reserved_end - _rtc_fast_reserved_start;
|
||||
ASSERT((_rtc_fast_reserved_length <= LENGTH(rtc_fast_reserved_seg)),
|
||||
"RTC FAST reserved segment data does not fit.")
|
||||
|
||||
/**
|
||||
* This section holds RTC SLOW data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_slow_reserved (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_slow_reserved_start)
|
||||
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
|
||||
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
||||
|
||||
_rtc_slow_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_slow_reserved_seg
|
||||
|
||||
_rtc_slow_reserved_length = _rtc_slow_reserved_end - _rtc_slow_reserved_start;
|
||||
_rtc_reserved_length = _rtc_slow_reserved_length;
|
||||
ASSERT((_rtc_slow_reserved_length <= LENGTH(rtc_slow_reserved_seg)),
|
||||
"RTC SLOW reserved segment data does not fit.")
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
/* Send .iram0 code to iram */
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to IRAM */
|
||||
_vector_table = ABSOLUTE(.);
|
||||
. = 0x0;
|
||||
KEEP(*(.WindowVectors.text));
|
||||
. = 0x180;
|
||||
KEEP(*(.Level2InterruptVector.text));
|
||||
. = 0x1c0;
|
||||
KEEP(*(.Level3InterruptVector.text));
|
||||
. = 0x200;
|
||||
KEEP(*(.Level4InterruptVector.text));
|
||||
. = 0x240;
|
||||
KEEP(*(.Level5InterruptVector.text));
|
||||
. = 0x280;
|
||||
KEEP(*(.DebugExceptionVector.text));
|
||||
. = 0x2c0;
|
||||
KEEP(*(.NMIExceptionVector.text));
|
||||
. = 0x300;
|
||||
KEEP(*(.KernelExceptionVector.text));
|
||||
. = 0x340;
|
||||
KEEP(*(.UserExceptionVector.text));
|
||||
. = 0x3C0;
|
||||
KEEP(*(.DoubleExceptionVector.text));
|
||||
. = 0x400;
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
*(.*Vector.literal)
|
||||
|
||||
*(.UserEnter.literal);
|
||||
*(.UserEnter.text);
|
||||
. = ALIGN (16);
|
||||
*(.entry.literal)
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
|
||||
_init_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
/* If Bluetooth is not used, this DRAM section can be used as heap */
|
||||
. = _data_start_btdm; /* 0x3ffae6e0 */
|
||||
. = ALIGN (4);
|
||||
_sheap1 = ABSOLUTE(.);
|
||||
. = 0x3ffb0000;
|
||||
_eheap1 = ABSOLUTE(.);
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* Xtensa basic functionality written in assembler should be placed in IRAM */
|
||||
*xtensa/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*core_lib/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
*isrpipe/*(.literal .text .literal.* .text.*)
|
||||
*stdio/stdio.*(.literal .text .literal.* .text.*)
|
||||
*stdio_*/stdio*(.literal .text .literal.* .text.*)
|
||||
*syscalls.*(.literal .text .literal.* .text.*)
|
||||
*tsrb/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr)
|
||||
*components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_reset .text.spi_dma_reset)
|
||||
*components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_start .text.spi_dma_start)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr)
|
||||
*components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.pedwriph_module_reset)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/rtc_wdt.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable)
|
||||
*components/esp_mm/cache_esp32.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_psram/*/esp_psram_impl_*(.literal .literal.* .text .text.*)
|
||||
*components/esp_psram/mmu_psram_flash*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/port/image_process.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap)
|
||||
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
*libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/esp32/cache_hal_esp32.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/mmu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value)
|
||||
*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock)
|
||||
*tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead)
|
||||
*tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size)
|
||||
*tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free)
|
||||
*tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool)
|
||||
*tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs)
|
||||
*tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size)
|
||||
*components/log/*/log_lock.*(.literal .literal.* .text .text.*)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
|
||||
*components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libxt_hal.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/xtensa/*(.literal .literal.* .text .text.*)
|
||||
|
||||
} > iram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
*(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*)
|
||||
*(.data .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram2.coredump .dram2.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
|
||||
*components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*libbt.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_end = ABSOLUTE(.);
|
||||
|
||||
*components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_mm/cache_esp32.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_psram/*/esp_psram_impl_*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_psram/mmu_psram_flash*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/hal/esp32/cache_hal_esp32.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/log/*/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
*libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that won't be initialised when startup.
|
||||
* This section locates in External RAM region.
|
||||
*/
|
||||
.ext_ram_noinit (NOLOAD) :
|
||||
{
|
||||
_ext_ram_noinit_start = ABSOLUTE(.);
|
||||
|
||||
*(.ext_ram_noinit*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _ext_ram_noinit_end)
|
||||
} > extern_ram_seg
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _noinit_start)
|
||||
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _noinit_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
/* External Memory BSS. (Variables with EXT_RAM_BSS_ATTR attribute). */
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _ext_ram_bss_start)
|
||||
|
||||
ALIGNED_SYMBOL(4, _ext_ram_bss_end)
|
||||
} > extern_ram_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(8, _bss_start)
|
||||
|
||||
/**
|
||||
* ldgen places all bss-related data to mapping[dram0_bss]
|
||||
* (See components/esp_system/app.lf).
|
||||
*/
|
||||
*(.bss .bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*libbt.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_common_start = ABSOLUTE(.);
|
||||
*libbt.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_common_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_end = ABSOLUTE(.);
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
ALIGNED_SYMBOL(8, _bss_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
/* Reserved ROM/ETS data start at 0x3ffe000. */
|
||||
. = 0x3ffe0000;
|
||||
_heap_top = ABSOLUTE(.);
|
||||
_eheap = ABSOLUTE(.);
|
||||
|
||||
/* Reserved ROM/ETS data region for PRO CPU: 0x3ffe0000 ... 0x3ffe440 */
|
||||
. = 0x3ffe0440;
|
||||
_sheap2 = ABSOLUTE(.);
|
||||
. = 0x3ffe4000;
|
||||
_eheap2 = ABSOLUTE(.);
|
||||
|
||||
/* Reserved ROM/ETS data region for APP CPU: 0x3ffe4000 ... 0x3ffe4350 */
|
||||
. = 0x3ffe4350;
|
||||
_sheap3 = ABSOLUTE(.);
|
||||
. = 0x40000000;
|
||||
_eheap3 = ABSOLUTE(.);
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
/**
|
||||
* Mark flash.rodata start.
|
||||
* This can be used for mmu driver to maintain virtual address
|
||||
*/
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
/* !DO NOT PUT ANYTHING BEFORE THIS! */
|
||||
|
||||
/* Should be the first. App version info. */
|
||||
*(.rodata_desc .rodata_desc.*)
|
||||
/* Should be the second. Custom app version info. */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*)
|
||||
|
||||
/**
|
||||
* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image.
|
||||
*/
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata)
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
|
||||
/* C++ exception handlers table. */
|
||||
ALIGNED_SYMBOL(4, __XT_EXCEPTION_TABLE_)
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, __XT_EXCEPTION_DESCS_)
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
|
||||
#if CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
ALIGNED_SYMBOL(4, __eh_frame)
|
||||
KEEP(*(.eh_frame))
|
||||
/**
|
||||
* As we are not linking with crtend.o, which includes the CIE terminator
|
||||
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
|
||||
*/
|
||||
LONG(0);
|
||||
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
|
||||
/**
|
||||
* C++ constructor tables.
|
||||
*
|
||||
* Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
|
||||
*/
|
||||
ALIGNED_SYMBOL(4, __init_array_start)
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
ALIGNED_SYMBOL(4, soc_reserved_memory_region_start)
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
|
||||
/* System init functions registered via ESP_SYSTEM_INIT_FN */
|
||||
ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start)
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
|
||||
/* TLS data. */
|
||||
ALIGNED_SYMBOL(4, _thread_local_start)
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
|
||||
/**
|
||||
* This section contains all the rodata that is not used
|
||||
* at runtime, helping to avoid an increase in binary size.
|
||||
*/
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
/**
|
||||
* This symbol marks the end of flash.rodata. It can be utilized by the MMU
|
||||
* driver to maintain the virtual address.
|
||||
* NOLOAD rodata may not be included in this section.
|
||||
*/
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(CONFIG_MMU_PAGE_SIZE);
|
||||
_fp_mmu_start = .;
|
||||
_fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY;
|
||||
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
/**
|
||||
* Mark the start of flash.text.
|
||||
* This can be used by the MMU driver to maintain the virtual address.
|
||||
*/
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub)
|
||||
*(.gnu.warning)
|
||||
*(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
|
||||
/**
|
||||
* CPU will try to prefetch up to 16 bytes of of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction,
|
||||
* add dummy bytes to ensure this.
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
/**
|
||||
* Mark the flash.text end.
|
||||
* This can be used for MMU driver to maintain virtual address.
|
||||
*/
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _iram_text_end)
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _iram_data_start)
|
||||
|
||||
*(.iram.data .iram.data.*)
|
||||
_coredump_iram_start = ABSOLUTE(.);
|
||||
*(.iram2.coredump .iram2.coredump.*)
|
||||
_coredump_iram_end = ABSOLUTE(.);
|
||||
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _iram_bss_start)
|
||||
|
||||
*(.iram.bss .iram.bss.*)
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
ALIGNED_SYMBOL(4, _iram_end)
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
/* Lowest possible start address for the heap */
|
||||
ALIGNED_SYMBOL(8, _heap_low_start)
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
#include "elf_misc.ld.in"
|
||||
}
|
||||
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_low_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
@ -15,31 +15,23 @@
|
||||
#include "sdkconfig.h"
|
||||
#include "ld.common"
|
||||
|
||||
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
|
||||
#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
|
||||
#else
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* physical memory is mapped twice to the vritual address (IRAM and DRAM).
|
||||
* `I_D_SRAM_OFFSET` is the offset between the two locations of the same physical memory
|
||||
*/
|
||||
#define SRAM_IRAM_START 0x4037C000
|
||||
#define SRAM_DRAM_START 0x3FC7C000
|
||||
#define ICACHE_SIZE 0x4000 /* ICache size is fixed to 16KB on ESP32-C3 */
|
||||
#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
|
||||
#define SRAM_DRAM_END 0x403D0000 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
|
||||
#define SRAM_DRAM_END 0x403CE710 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
|
||||
|
||||
#define SRAM_IRAM_ORG (SRAM_IRAM_START + ICACHE_SIZE)
|
||||
#define SRAM_DRAM_ORG (SRAM_DRAM_START + ICACHE_SIZE)
|
||||
|
||||
#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG
|
||||
|
||||
#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
|
||||
ASSERT((CONFIG_ESP32C3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
|
||||
#define DRAM0_0_SEG_LEN CONFIG_ESP3C3_FIXED_STATIC_RAM_SIZE
|
||||
#else
|
||||
#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
|
||||
#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/**
|
||||
@ -72,30 +64,25 @@ MEMORY
|
||||
|
||||
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
/* Flash mapped constant data */
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
drom0_0_seg (R) : org = 0x3C000020,
|
||||
len = 0x800000 - 0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg),
|
||||
len = CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
#else
|
||||
drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
|
||||
|
||||
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
|
||||
#endif /* MODULE_PERIPH_FLASHPAGE */
|
||||
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
|
||||
/**
|
||||
* RTC fast memory (executable). Persists over deep sleep.
|
||||
*/
|
||||
rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
|
||||
}
|
||||
rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - RESERVE_RTC_MEM
|
||||
|
||||
#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
|
||||
/* static data ends at defined address */
|
||||
_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN;
|
||||
#else
|
||||
_static_data_end = _bss_end;
|
||||
#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
|
||||
/* We reduced the size of rtc_iram_seg by RESERVE_RTC_MEM value.
|
||||
It reserves the amount of RTC fast memory that we use for this memory segment.
|
||||
This segment is intended for keeping:
|
||||
- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
|
||||
- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
*/
|
||||
rtc_reserved_seg(RW) : org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
|
||||
}
|
||||
|
||||
/* Heap ends at top of dram0_0_seg */
|
||||
_heap_end = 0x40000000;
|
||||
760
cpu/esp32/vendor/ld/esp32c3/sections.ld.in
vendored
Normal file
760
cpu/esp32/vendor/ld/esp32c3/sections.ld.in
vendored
Normal file
@ -0,0 +1,760 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ld.common"
|
||||
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_fast_start)
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.text .text.*)
|
||||
*(.rtc_text_end_test)
|
||||
|
||||
/* Padding for possible CPU prefetch + alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_start)
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_end)
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .srodata.*)
|
||||
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
/* part that is initialized if not waking up from deep sleep */
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
|
||||
*rtc_wake_stub*.*(.bss .bss.* .sbss .sbss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*)
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_start)
|
||||
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_end)
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_start)
|
||||
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_end)
|
||||
} > rtc_slow_seg
|
||||
|
||||
/**
|
||||
* This section holds RTC data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_reserved (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_reserved_start)
|
||||
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
|
||||
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
||||
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
||||
|
||||
_rtc_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_reserved_seg
|
||||
|
||||
_rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
|
||||
ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
|
||||
"RTC reserved segment data does not fit.")
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to start of IRAM */
|
||||
ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
|
||||
KEEP(*(.exception_vectors_table.text));
|
||||
KEEP(*(.exception_vectors.text));
|
||||
|
||||
ALIGNED_SYMBOL(4, _invalid_pc_placeholder)
|
||||
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*core_lib/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
*isrpipe/*(.literal .text .literal.* .text.*)
|
||||
*stdio/stdio.*(.literal .text .literal.* .text.*)
|
||||
*stdio_*/stdio*(.literal .text .literal.* .text.*)
|
||||
*syscalls.*(.literal .text .literal.* .text.*)
|
||||
*tsrb/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr)
|
||||
*components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_append .text.gdma_append)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_default_rx_isr .text.gdma_default_rx_isr)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_default_tx_isr .text.gdma_default_tx_isr)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_reset .text.gdma_reset)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_start .text.gdma_start)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_stop .text.gdma_stop)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable)
|
||||
*components/esp_hw_support/sleep_console.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/systimer.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_systimer.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/port/image_process.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap)
|
||||
|
||||
*libclang_rt.builtins.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libclang_rt.builtins.a:restore.*(.literal .literal.* .text .text.*)
|
||||
*libclang_rt.builtins.a:save.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:save-restore.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cache_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_append .text.gdma_ahb_hal_append)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_clear_intr .text.gdma_ahb_hal_clear_intr)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_get_eof_desc_addr .text.gdma_ahb_hal_get_eof_desc_addr)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_read_intr_status .text.gdma_ahb_hal_read_intr_status)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_reset .text.gdma_ahb_hal_reset)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_start_with_desc .text.gdma_ahb_hal_start_with_desc)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_stop .text.gdma_ahb_hal_stop)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_append .text.gdma_hal_append)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_clear_intr .text.gdma_hal_clear_intr)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_get_eof_desc_addr .text.gdma_hal_get_eof_desc_addr)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_read_intr_status .text.gdma_hal_read_intr_status)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_reset .text.gdma_hal_reset)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_start_with_desc .text.gdma_hal_start_with_desc)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_stop .text.gdma_hal_stop)
|
||||
*components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/mmu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value)
|
||||
*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock)
|
||||
*tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead)
|
||||
*tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size)
|
||||
*tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free)
|
||||
*tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool)
|
||||
*tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs)
|
||||
*tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size)
|
||||
*components/log/*/log_lock.*(.literal .literal.* .text .text.*)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
|
||||
*components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/riscv/interrupt.*(.text .text._global_interrupt_handler .text.intr_get_item .text.intr_handler_get_arg)
|
||||
*components/riscv/vectors.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*)
|
||||
} > iram0_0_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip .iram0.text area because iram0_0_seg and
|
||||
* dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
|
||||
} > dram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
__global_pointer$ = . + 0x800;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram2.coredump .dram2.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
*components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*libbt.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_end = ABSOLUTE(.);
|
||||
|
||||
*components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/sleep_console.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*libclang_rt.builtins.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libclang_rt.builtins.a:restore.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libclang_rt.builtins.a:save.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcc.a:save-restore.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cache_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/log/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
|
||||
*libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _noinit_start)
|
||||
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _noinit_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(8, _bss_start)
|
||||
|
||||
/**
|
||||
* ldgen places all bss-related data to mapping[dram0_bss]
|
||||
* (See components/esp_system/app.lf).
|
||||
*/
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*libbt.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_common_start = ABSOLUTE(.);
|
||||
*libbt.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_common_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_end = ABSOLUTE(.);
|
||||
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
ALIGNED_SYMBOL(8, _bss_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
/**
|
||||
* Mark the start of flash.text.
|
||||
* This can be used by the MMU driver to maintain the virtual address.
|
||||
*/
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
|
||||
/**
|
||||
* CPU will try to prefetch up to 16 bytes of of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
/**
|
||||
* Mark the flash.text end.
|
||||
* This can be used for MMU driver to maintain virtual address.
|
||||
*/
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
|
||||
/**
|
||||
* Dummy section represents the .flash.text section but in default_rodata_seg.
|
||||
* Thus, it must have its alignment and (at least) its size.
|
||||
*/
|
||||
.flash_rodata_dummy (NOLOAD):
|
||||
{
|
||||
_flash_rodata_dummy_start = .;
|
||||
|
||||
. = ALIGN(ALIGNOF(.flash.text)) + SIZEOF(.flash.text);
|
||||
|
||||
/* Add alignment of MMU page size + 0x20 bytes for the mapping header. */
|
||||
. = ALIGN(_esp_mmu_page_size) + 0x20;
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
/**
|
||||
* Mark flash.rodata start.
|
||||
* This can be used for mmu driver to maintain virtual address
|
||||
*/
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
/* !DO NOT PUT ANYTHING BEFORE THIS! */
|
||||
|
||||
/* Should be the first. App version info. */
|
||||
*(.rodata_desc .rodata_desc.*)
|
||||
/* Should be the second. Custom app version info. */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*)
|
||||
|
||||
/**
|
||||
* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flash.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image.
|
||||
*/
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata)
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
/**
|
||||
* C++ constructor tables.
|
||||
*
|
||||
* Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
|
||||
*
|
||||
* RISC-V gcc is configured with --enable-initfini-array so it emits
|
||||
* .init_array section instead. But the init_priority sections will be
|
||||
* sorted for iteration in ascending order during startup.
|
||||
* The rest of the init_array sections is sorted for iteration in descending
|
||||
* order during startup, however. Hence a different section is generated for
|
||||
* the init_priority functions which is iterated in ascending order during
|
||||
* startup. The corresponding code can be found in startup.c.
|
||||
*/
|
||||
ALIGNED_SYMBOL(4, __init_priority_array_start)
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
|
||||
__init_priority_array_end = ABSOLUTE(.);
|
||||
|
||||
ALIGNED_SYMBOL(4, __init_array_start)
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
ALIGNED_SYMBOL(4, soc_reserved_memory_region_start)
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
|
||||
/* System init functions registered via ESP_SYSTEM_INIT_FN */
|
||||
ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start)
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
. = ALIGN(ALIGNOF(.eh_frame_hdr));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.flash.rodata, .eh_frame_hdr)
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
|
||||
ALIGNED_SYMBOL(4, __eh_frame_hdr)
|
||||
|
||||
KEEP (*(.eh_frame_hdr))
|
||||
|
||||
__eh_frame_hdr_end = ABSOLUTE(.);
|
||||
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
|
||||
|
||||
. = ALIGN(ALIGNOF(.eh_frame));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
|
||||
|
||||
.eh_frame :
|
||||
{
|
||||
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
|
||||
ALIGNED_SYMBOL(4, __eh_frame)
|
||||
|
||||
KEEP (*(.eh_frame))
|
||||
/**
|
||||
* As we are not linking with crtend.o, which includes the CIE terminator
|
||||
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
|
||||
*/
|
||||
LONG(0);
|
||||
|
||||
__eh_frame_end = ABSOLUTE(.);
|
||||
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
|
||||
|
||||
. = ALIGN(ALIGNOF(.flash.tdata));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
|
||||
|
||||
.flash.tdata :
|
||||
{
|
||||
_thread_local_data_start = ABSOLUTE(.);
|
||||
|
||||
*(.tdata .tdata.* .gnu.linkonce.td.*)
|
||||
|
||||
. = ALIGN(ALIGNOF(.flash.tbss));
|
||||
_thread_local_data_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.flash.tdata, .flash.tbss)
|
||||
|
||||
.flash.tbss (NOLOAD) :
|
||||
{
|
||||
_thread_local_bss_start = ABSOLUTE(.);
|
||||
|
||||
*(.tbss .tbss.* .gnu.linkonce.tb.*)
|
||||
*(.tcommon .tcommon.*)
|
||||
|
||||
_thread_local_bss_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
|
||||
/**
|
||||
* This section contains all the rodata that is not used
|
||||
* at runtime, helping to avoid an increase in binary size.
|
||||
*/
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
/**
|
||||
* This symbol marks the end of flash.rodata. It can be utilized by the MMU
|
||||
* driver to maintain the virtual address.
|
||||
* NOLOAD rodata may not be included in this section.
|
||||
*/
|
||||
_rodata_reserved_end = ADDR(.flash.tbss);
|
||||
|
||||
. = ALIGN(CONFIG_MMU_PAGE_SIZE);
|
||||
_fp_mmu_start = .;
|
||||
_fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY;
|
||||
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* Padding for possible CPU prefetch + alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
|
||||
/* iram_end_test section exists for use by memprot unit tests only */
|
||||
*(.iram_end_test)
|
||||
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
ALIGNED_SYMBOL(16, _iram_data_start)
|
||||
|
||||
*(.iram.data .iram.data.*)
|
||||
_coredump_iram_start = ABSOLUTE(.);
|
||||
*(.iram2.coredump .iram2.coredump.*)
|
||||
_coredump_iram_end = ABSOLUTE(.);
|
||||
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(16, _iram_bss_start)
|
||||
|
||||
*(.iram.bss .iram.bss.*)
|
||||
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
ALIGNED_SYMBOL(16, _iram_end)
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(16, _heap_start)
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
_eheap = phy_param_rom;
|
||||
|
||||
#include "elf_misc.ld.in"
|
||||
}
|
||||
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
@ -15,32 +15,10 @@
|
||||
#include "sdkconfig.h"
|
||||
#include "ld.common"
|
||||
|
||||
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
|
||||
#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
|
||||
#else
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB
|
||||
#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x2000
|
||||
#else
|
||||
#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S2_DATA_CACHE_0KB
|
||||
#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0
|
||||
#elif defined CONFIG_ESP32S2_DATA_CACHE_8KB
|
||||
#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x2000
|
||||
#else
|
||||
#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
#define RAM_IRAM_START 0x40020000
|
||||
#define RAM_DRAM_START 0x3FFB0000
|
||||
|
||||
#define DATA_RAM_END 0x3FFE0000 /* 2nd stage bootloader iram_loader_seg starts at SRAM block 14 (reclaimed after app boots) */
|
||||
#define DATA_RAM_END 0x3FFDE000 /* 2nd stage bootloader iram_loader_seg starts at end of block 13 (reclaimed after app boots) */
|
||||
|
||||
#define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
|
||||
+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
|
||||
@ -50,17 +28,12 @@
|
||||
|
||||
#define I_D_RAM_SIZE DATA_RAM_END - DRAM_ORG
|
||||
|
||||
#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
|
||||
|
||||
ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE),
|
||||
"Fixed static ram data does not fit.")
|
||||
|
||||
#define STATIC_RAM_SIZE CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE
|
||||
|
||||
#if CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE
|
||||
ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE), "Fixed static ram data does not fit.")
|
||||
#define DRAM0_0_SEG_LEN CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE
|
||||
#else
|
||||
#define STATIC_RAM_SIZE 0
|
||||
#endif
|
||||
|
||||
#define DRAM0_0_SEG_LEN I_D_RAM_SIZE
|
||||
#endif // CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE
|
||||
MEMORY
|
||||
{
|
||||
/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
|
||||
@ -86,46 +59,52 @@ MEMORY
|
||||
|
||||
|
||||
/* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */
|
||||
dram0_0_seg (RW) : org = DRAM_ORG, len = I_D_RAM_SIZE - STATIC_RAM_SIZE
|
||||
dram0_0_seg (RW) : org = DRAM_ORG, len = DRAM0_0_SEG_LEN
|
||||
|
||||
#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
/* Flash mapped constant data */
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
drom0_0_seg (R) : org = 0x3F000020,
|
||||
len = 0x3f0000-0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg),
|
||||
len = CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
#else
|
||||
drom0_0_seg (R) : org = 0x3F000020, len = 0x3f0000-0x20
|
||||
|
||||
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
|
||||
#endif /* MODULE_PERIPH_FLASHPAGE */
|
||||
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
|
||||
/* RTC fast memory (executable). Persists over deep sleep.
|
||||
*/
|
||||
rtc_iram_seg(RWX) : org = 0x40070000, len = 0x2000
|
||||
rtc_iram_seg(RWX) : org = 0x40070000, len = 0x2000 - RESERVE_RTC_MEM
|
||||
|
||||
/* RTC slow memory (data accessible). Persists over deep sleep.
|
||||
|
||||
Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
|
||||
*/
|
||||
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM,
|
||||
len = 0x2000 - CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM
|
||||
#if CONFIG_ULP_COPROC_ENABLED
|
||||
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM,
|
||||
len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM
|
||||
#else
|
||||
rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000
|
||||
#endif // CONFIG_ULP_COPROC_ENABLED
|
||||
|
||||
/* RTC fast memory (same block as above), viewed from data bus */
|
||||
rtc_data_seg(RW) : org = 0x3ff9e000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
|
||||
/* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */
|
||||
rtc_data_seg(RW) : org = 0x3ff9e000, len = 0x2000 - RESERVE_RTC_MEM
|
||||
|
||||
/* We reduced the size of rtc_data_seg and rtc_iram_seg by RESERVE_RTC_MEM value.
|
||||
It reserves the amount of RTC fast memory that we use for this memory segment.
|
||||
This segment is intended for keeping:
|
||||
- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
|
||||
- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
*/
|
||||
rtc_reserved_seg(RW) : org = 0x3ff9e000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
|
||||
|
||||
/* external memory, covers the dport, dram0, dram1 cacheable address space */
|
||||
extern_ram_seg(RWX) : org = 0x3F500000,
|
||||
len = 0xA80000
|
||||
extern_ram_seg(RWX) : org = 0x3F800000,
|
||||
len = 0x780000
|
||||
}
|
||||
|
||||
#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
|
||||
/* static data ends at defined address */
|
||||
_static_data_end = DRAM_ORG + STATIC_RAM_SIZE;
|
||||
_heap_start = DRAM_ORG + DRAM0_0_SEG_LEN;
|
||||
#else
|
||||
_static_data_end = _bss_end;
|
||||
_heap_start = _heap_low_start;
|
||||
#endif
|
||||
|
||||
_heap_end = 0x40000000;
|
||||
@ -134,8 +113,7 @@ _data_seg_org = ORIGIN(rtc_data_seg);
|
||||
|
||||
/* The lines below define location alias for .rtc.data section based on Kconfig option.
|
||||
When the option is not defined then use slow memory segment
|
||||
else the data will be placed in fast memory segment
|
||||
TODO: check whether the rtc_data_location is correct for esp32s2 - IDF-761 */
|
||||
else the data will be placed in fast memory segment */
|
||||
#ifndef CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM
|
||||
REGION_ALIAS("rtc_data_location", rtc_slow_seg );
|
||||
#else
|
||||
767
cpu/esp32/vendor/ld/esp32s2/sections.ld.in
vendored
Normal file
767
cpu/esp32/vendor/ld/esp32s2/sections.ld.in
vendored
Normal file
@ -0,0 +1,767 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ld.common"
|
||||
|
||||
/**
|
||||
* Added to maintain compatibility: there is no iram0 data section to place
|
||||
* _coredump_iram_XXX symbols that are defined in espcoredump's linker.lf
|
||||
*/
|
||||
_coredump_iram_start = 0;
|
||||
_coredump_iram_end = 0;
|
||||
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_text_start)
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* Padding for possible CPU prefetch + alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip rtc.text area because rtc_iram_seg and
|
||||
* rtc_data_seg are reflect the same address space on different buses.
|
||||
*/
|
||||
.rtc.dummy :
|
||||
{
|
||||
_rtc_dummy_start = ABSOLUTE(.);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
|
||||
. = SIZEOF(.rtc.text);
|
||||
|
||||
_rtc_dummy_end = ABSOLUTE(.);
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_start)
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_end)
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
|
||||
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*)
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_start)
|
||||
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_end)
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_start)
|
||||
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_end)
|
||||
} > rtc_slow_seg
|
||||
|
||||
/**
|
||||
* This section holds RTC data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_reserved (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_reserved_start)
|
||||
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
|
||||
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
||||
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
||||
|
||||
_rtc_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_reserved_seg
|
||||
|
||||
_rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
|
||||
ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
|
||||
"RTC reserved segment data does not fit.")
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
/* Send .iram0 code to iram */
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to IRAM */
|
||||
_vector_table = ABSOLUTE(.);
|
||||
. = 0x0;
|
||||
KEEP(*(.WindowVectors.text));
|
||||
. = 0x180;
|
||||
KEEP(*(.Level2InterruptVector.text));
|
||||
. = 0x1c0;
|
||||
KEEP(*(.Level3InterruptVector.text));
|
||||
. = 0x200;
|
||||
KEEP(*(.Level4InterruptVector.text));
|
||||
. = 0x240;
|
||||
KEEP(*(.Level5InterruptVector.text));
|
||||
. = 0x280;
|
||||
KEEP(*(.DebugExceptionVector.text));
|
||||
. = 0x2c0;
|
||||
KEEP(*(.NMIExceptionVector.text));
|
||||
. = 0x300;
|
||||
KEEP(*(.KernelExceptionVector.text));
|
||||
. = 0x340;
|
||||
KEEP(*(.UserExceptionVector.text));
|
||||
. = 0x3C0;
|
||||
KEEP(*(.DoubleExceptionVector.text));
|
||||
. = 0x400;
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
*(.*Vector.literal)
|
||||
|
||||
*(.UserEnter.literal);
|
||||
*(.UserEnter.text);
|
||||
. = ALIGN (16);
|
||||
*(.entry.literal)
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
|
||||
_init_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* Xtensa basic functionality written in assembler should be placed in IRAM */
|
||||
*xtensa/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*core_lib/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
*isrpipe/*(.literal .text .literal.* .text.*)
|
||||
*stdio/stdio.*(.literal .text .literal.* .text.*)
|
||||
*stdio_*/stdio*(.literal .text .literal.* .text.*)
|
||||
*syscalls.*(.literal .text .literal.* .text.*)
|
||||
*tsrb/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr)
|
||||
*components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_get_eof_desc .text.spi_dma_get_eof_desc)
|
||||
*components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_reset .text.spi_dma_reset)
|
||||
*components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_start .text.spi_dma_start)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr)
|
||||
*components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/rtc_wdt.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable)
|
||||
*components/esp_hw_support/*/systimer.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_psram/*/esp_psram_impl_*(.literal .literal.* .text .text.*)
|
||||
*components/esp_psram/mmu_psram_flash*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_systimer.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/port/image_process.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap)
|
||||
|
||||
*libclang_rt.builtins.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
*libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cache_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/mmu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value)
|
||||
*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock)
|
||||
*tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead)
|
||||
*tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size)
|
||||
*tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free)
|
||||
*tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool)
|
||||
*tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs)
|
||||
*tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size)
|
||||
*components/log/*/log_lock.*(.literal .literal.* .text .text.*)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
|
||||
*components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libxt_hal.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/xtensa/*(.literal .literal.* .text .text.*)
|
||||
|
||||
/* Padding for possible CPU prefetch + alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
|
||||
/* iram_end_test section exists for use by memprot unit tests only */
|
||||
*(.iram_end_test)
|
||||
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.dram0_reserved_for_iram (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
|
||||
} > dram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
|
||||
*(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*)
|
||||
*(.data .data.*)
|
||||
*(.dram1 .dram1.*)
|
||||
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram2.coredump .dram2.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
|
||||
*components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*libbt.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_end = ABSOLUTE(.);
|
||||
|
||||
|
||||
*components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_psram/*/esp_psram_impl_*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_psram/mmu_psram_flash*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*libclang_rt.builtins.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/hal/cache_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/wdt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/log/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
*libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_data_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _noinit_start)
|
||||
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _noinit_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
|
||||
/* External Memory BSS. (Variables with EXT_RAM_BSS_ATTR attribute). */
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _ext_ram_bss_start)
|
||||
|
||||
mapping[extern_ram]
|
||||
|
||||
ALIGNED_SYMBOL(4, _ext_ram_bss_end)
|
||||
} > extern_ram_seg
|
||||
#endif //CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
|
||||
|
||||
#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
|
||||
/**
|
||||
* This section holds data that won't be initialised when startup.
|
||||
* This section locates in External RAM region.
|
||||
*/
|
||||
.ext_ram_noinit (NOLOAD) :
|
||||
{
|
||||
_ext_ram_noinit_start = ABSOLUTE(.);
|
||||
|
||||
*(.ext_ram_noinit*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _ext_ram_noinit_end)
|
||||
} > extern_ram_seg
|
||||
#endif //CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(8, _bss_start)
|
||||
|
||||
/**
|
||||
* ldgen places all bss-related data to mapping[dram0_bss]
|
||||
* (See components/esp_system/app.lf).
|
||||
*/
|
||||
*(.bss .bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*libbt.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_common_start = ABSOLUTE(.);
|
||||
*libbt.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_common_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_end = ABSOLUTE(.);
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
ALIGNED_SYMBOL(8, _bss_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
/**
|
||||
* Mark flash.rodata start.
|
||||
* This can be used for mmu driver to maintain virtual address
|
||||
*/
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
/* !DO NOT PUT ANYTHING BEFORE THIS! */
|
||||
|
||||
/* Should be the first. App version info. */
|
||||
*(.rodata_desc .rodata_desc.*)
|
||||
/* Should be the second. Custom app version info. */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*)
|
||||
|
||||
/**
|
||||
* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image.
|
||||
*/
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata)
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
|
||||
/* C++ exception handlers table. */
|
||||
ALIGNED_SYMBOL(4, __XT_EXCEPTION_TABLE_)
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, __XT_EXCEPTION_DESCS_)
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
|
||||
#if CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
ALIGNED_SYMBOL(4, __eh_frame)
|
||||
KEEP(*(.eh_frame))
|
||||
/**
|
||||
* As we are not linking with crtend.o, which includes the CIE terminator
|
||||
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
|
||||
*/
|
||||
LONG(0);
|
||||
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
|
||||
/**
|
||||
* C++ constructor tables.
|
||||
*
|
||||
* Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
|
||||
*/
|
||||
ALIGNED_SYMBOL(4, __init_array_start)
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
ALIGNED_SYMBOL(4, soc_reserved_memory_region_start)
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
|
||||
/* System init functions registered via ESP_SYSTEM_INIT_FN */
|
||||
ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start)
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
|
||||
/* TLS data. */
|
||||
ALIGNED_SYMBOL(4, _thread_local_start)
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
|
||||
/**
|
||||
* This section contains all the rodata that is not used
|
||||
* at runtime, helping to avoid an increase in binary size.
|
||||
*/
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
/**
|
||||
* This symbol marks the end of flash.rodata. It can be utilized by the MMU
|
||||
* driver to maintain the virtual address.
|
||||
* NOLOAD rodata may not be included in this section.
|
||||
*/
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(CONFIG_MMU_PAGE_SIZE);
|
||||
_fp_mmu_start = .;
|
||||
_fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY;
|
||||
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
/**
|
||||
* Mark the start of flash.text.
|
||||
* This can be used by the MMU driver to maintain the virtual address.
|
||||
*/
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .literal.* .text .text.*)
|
||||
*(.wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub)
|
||||
*(.gnu.warning)
|
||||
*(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
|
||||
/**
|
||||
* CPU will try to prefetch up to 16 bytes of of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction,
|
||||
* add dummy bytes to ensure this.
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
/**
|
||||
* Mark the flash.text end.
|
||||
* This can be used for MMU driver to maintain virtual address.
|
||||
*/
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _iram_end)
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
/* Lowest possible start address for the heap */
|
||||
ALIGNED_SYMBOL(8, _heap_low_start)
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_eheap = ABSOLUTE(.);
|
||||
|
||||
. = _heap_end;
|
||||
|
||||
#include "elf_misc.ld.in"
|
||||
}
|
||||
|
||||
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_low_start - _data_start) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
@ -14,19 +14,11 @@
|
||||
#include "sdkconfig.h"
|
||||
#include "ld.common"
|
||||
|
||||
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
|
||||
#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
|
||||
#else
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000
|
||||
* 3FC88000 <- D/IRAM (D) -> 3FCF0000 <- DRAM/DCache -> 3FD00000
|
||||
*
|
||||
* Startup code uses the IRAM from 0x403BA000 to 0x403E0000, which is not available for static
|
||||
* Startup code uses the IRAM from 0x403B9000 to 0x403E0000, which is not available for static
|
||||
* memory, but can only be used after app starts.
|
||||
*
|
||||
* D cache use the memory from high address, so when it's configured to 16K/32K, the region
|
||||
@ -36,7 +28,7 @@
|
||||
|
||||
#define SRAM_IRAM_START 0x40370000
|
||||
#define SRAM_DIRAM_I_START 0x40378000
|
||||
#define SRAM_IRAM_END 0x403BA000
|
||||
#define SRAM_IRAM_END 0x403CB700 /* Please refer to ESP32-S3 bootloader.ld for more information on this */
|
||||
#define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START)
|
||||
|
||||
#define SRAM_DRAM_START 0x3FC88000
|
||||
@ -90,41 +82,49 @@ MEMORY
|
||||
|
||||
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
/* Flash mapped constant data */
|
||||
#ifdef MODULE_PERIPH_FLASHPAGE
|
||||
drom0_0_seg (R) : org = 0x3C000020,
|
||||
len = 0x800000-0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg),
|
||||
len = CONFIG_ESP_FLASHPAGE_CAPACITY
|
||||
#else
|
||||
drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
|
||||
drom0_0_seg (R) : org = 0x3C000020, len = 0x2000000-0x20
|
||||
|
||||
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
|
||||
#endif /* MODULE_PERIPH_FLASHPAGE */
|
||||
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
|
||||
|
||||
/**
|
||||
* RTC fast memory (executable). Persists over deep sleep.
|
||||
*/
|
||||
rtc_iram_seg(RWX) : org = 0x600fe000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
|
||||
rtc_iram_seg(RWX) : org = 0x600fe000, len = 0x2000 - RESERVE_RTC_MEM
|
||||
|
||||
/**
|
||||
* RTC fast memory (same block as above), viewed from data bus
|
||||
*/
|
||||
rtc_data_seg(RW) : org = 0x600fe000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
|
||||
/* We reduced the size of rtc_iram_seg by RESERVE_RTC_MEM value.
|
||||
It reserves the amount of RTC fast memory that we use for this memory segment.
|
||||
This segment is intended for keeping:
|
||||
- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
|
||||
- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
|
||||
The aim of this is to keep data that will not be moved around and have a fixed address.
|
||||
*/
|
||||
rtc_reserved_seg(RW) : org = 0x600fe000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
|
||||
|
||||
/**
|
||||
* RTC slow memory (data accessible). Persists over deep sleep.
|
||||
* Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
|
||||
*/
|
||||
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM,
|
||||
len = 0x2000 - CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM
|
||||
#if CONFIG_ULP_COPROC_ENABLED
|
||||
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM,
|
||||
len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM
|
||||
#else
|
||||
rtc_slow_seg(RW) : org = 0x50000000 , len = 0x2000
|
||||
#endif // CONFIG_ULP_COPROC_ENABLED
|
||||
/**
|
||||
* `extern_ram_seg` and `drom0_0_seg` share the same bus and the address region.
|
||||
* A dummy section is used to avoid overlap. See `.ext_ram.dummy` in `sections.ld.in`
|
||||
*/
|
||||
extern_ram_seg(RWX) : org = 0x3c000020 , len = 0x2000000-0x20
|
||||
}
|
||||
|
||||
_diram_i_start = SRAM_DIRAM_I_START;
|
||||
|
||||
#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
|
||||
/* static data ends at defined address */
|
||||
_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN;
|
||||
_heap_start = SRAM_DRAM_ORG + DRAM0_0_SEG_LEN;
|
||||
#else
|
||||
_static_data_end = _bss_end;
|
||||
_heap_start = _heap_low_start;
|
||||
#endif // CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
|
||||
|
||||
/* Heap ends at top of dram0_0_seg */
|
||||
@ -132,6 +132,10 @@ _heap_end = 0x40000000;
|
||||
|
||||
_data_seg_org = ORIGIN(rtc_data_seg);
|
||||
|
||||
|
||||
/* RTC fast memory shares the same range for both data and instructions */
|
||||
REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
|
||||
|
||||
#if CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM
|
||||
REGION_ALIAS("rtc_data_location", rtc_data_seg );
|
||||
#else
|
||||
832
cpu/esp32/vendor/ld/esp32s3/sections.ld.in
vendored
Normal file
832
cpu/esp32/vendor/ld/esp32s3/sections.ld.in
vendored
Normal file
@ -0,0 +1,832 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "ld.common"
|
||||
|
||||
/* Default entry point */
|
||||
ENTRY(call_start_cpu0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/**
|
||||
* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
*/
|
||||
.rtc.text :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_fast_start)
|
||||
ALIGNED_SYMBOL(4, _rtc_text_start)
|
||||
|
||||
*(.rtc.entry.literal .rtc.entry.text)
|
||||
|
||||
*(.rtc.literal .rtc.text .rtc.text.*)
|
||||
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
*(.rtc_text_end_test)
|
||||
|
||||
/* Padding for possible CPU prefetch + alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} > rtc_iram_seg
|
||||
|
||||
/**
|
||||
* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_start)
|
||||
|
||||
_coredump_rtc_fast_start = ABSOLUTE(.);
|
||||
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
||||
_coredump_rtc_fast_end = ABSOLUTE(.);
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_fast_end)
|
||||
} > rtc_data_seg
|
||||
|
||||
/**
|
||||
* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
|
||||
_coredump_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.coredump .rtc.coredump.*)
|
||||
_coredump_rtc_end = ABSOLUTE(.);
|
||||
*(.rtc.data .rtc.data.*)
|
||||
*(.rtc.rodata .rtc.rodata.*)
|
||||
|
||||
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
|
||||
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
/* part that is initialized if not waking up from deep sleep */
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
/* part that saves some data for rtc periph module, this part is
|
||||
only initialized at power on reset */
|
||||
_rtc_bss_rtc_start = ABSOLUTE(.);
|
||||
*(.rtc.bss .rtc.bss.*) */
|
||||
_rtc_bss_rtc_end = ABSOLUTE(.);
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
* The memory location of the data is dependent on
|
||||
* CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_start)
|
||||
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_noinit_end)
|
||||
} > rtc_data_location
|
||||
|
||||
/**
|
||||
* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_start)
|
||||
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _rtc_force_slow_end)
|
||||
} > rtc_slow_seg
|
||||
|
||||
/**
|
||||
* This section holds RTC data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
||||
.rtc_reserved (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _rtc_reserved_start)
|
||||
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
|
||||
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
||||
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
||||
|
||||
_rtc_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_reserved_seg
|
||||
|
||||
_rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
|
||||
ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
|
||||
"RTC reserved segment data does not fit.")
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
|
||||
/* Send .iram0 code to iram */
|
||||
.iram0.vectors :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to IRAM */
|
||||
_vector_table = ABSOLUTE(.);
|
||||
. = 0x0;
|
||||
KEEP(*(.WindowVectors.text));
|
||||
. = 0x180;
|
||||
KEEP(*(.Level2InterruptVector.text));
|
||||
. = 0x1c0;
|
||||
KEEP(*(.Level3InterruptVector.text));
|
||||
. = 0x200;
|
||||
KEEP(*(.Level4InterruptVector.text));
|
||||
. = 0x240;
|
||||
KEEP(*(.Level5InterruptVector.text));
|
||||
. = 0x280;
|
||||
KEEP(*(.DebugExceptionVector.text));
|
||||
. = 0x2c0;
|
||||
KEEP(*(.NMIExceptionVector.text));
|
||||
. = 0x300;
|
||||
KEEP(*(.KernelExceptionVector.text));
|
||||
. = 0x340;
|
||||
KEEP(*(.UserExceptionVector.text));
|
||||
. = 0x3C0;
|
||||
KEEP(*(.DoubleExceptionVector.text));
|
||||
. = 0x400;
|
||||
_invalid_pc_placeholder = ABSOLUTE(.);
|
||||
*(.*Vector.literal)
|
||||
|
||||
*(.UserEnter.literal);
|
||||
*(.UserEnter.text);
|
||||
. = ALIGN (16);
|
||||
*(.entry.literal)
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
|
||||
_init_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.text :
|
||||
{
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
/* Xtensa basic functionality written in assembler should be placed in IRAM */
|
||||
*xtensa/*(.literal .text .literal.* .text.*)
|
||||
/* parts of RIOT that should run in IRAM */
|
||||
|
||||
*core/*(.literal .text .literal.* .text.*)
|
||||
*core_lib/*(.literal .text .literal.* .text.*)
|
||||
*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
|
||||
*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
|
||||
*esp_freertos_common/*(.literal .text .literal.* .text.*)
|
||||
*isrpipe/*(.literal .text .literal.* .text.*)
|
||||
*stdio/stdio.*(.literal .text .literal.* .text.*)
|
||||
*stdio_*/stdio*(.literal .text .literal.* .text.*)
|
||||
*syscalls.*(.literal .text .literal.* .text.*)
|
||||
*tsrb/*(.literal .text .literal.* .text.*)
|
||||
|
||||
/* parts of ESP-IDF that should run in IRAM */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
|
||||
/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
|
||||
*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
|
||||
*components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr)
|
||||
*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
||||
*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall)
|
||||
*components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr)
|
||||
*components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_append .text.gdma_append)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_default_rx_isr .text.gdma_default_rx_isr)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_default_tx_isr .text.gdma_default_tx_isr)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_reset .text.gdma_reset)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_start .text.gdma_start)
|
||||
*components/esp_hw_support/gdma.*(.literal.gdma_stop .text.gdma_stop)
|
||||
*components/esp_hw_support/mspi_timing_by_mspi_delay.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/mspi_timing_config.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable)
|
||||
*components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config)
|
||||
*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable)
|
||||
*components/esp_hw_support/sleep_console.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_hw_support/*/systimer.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_psram/*/esp_psram_impl_*(.literal .literal.* .text .text.*)
|
||||
*components/esp_psram/mmu_psram_flash*(.literal .literal.* .text .text.*)
|
||||
*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_cache_writeback_esp32s3.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_systimer.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_rom/patches/esp_rom_wdt.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort)
|
||||
*components/esp_system/port/image_process.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
|
||||
*components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive)
|
||||
*components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap)
|
||||
|
||||
*libclang_rt.builtins.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
|
||||
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
||||
*libgcov.a:(.literal .literal.* .text .text.*)
|
||||
*libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/hal/cache_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_append .text.gdma_ahb_hal_append)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_clear_intr .text.gdma_ahb_hal_clear_intr)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_get_eof_desc_addr .text.gdma_ahb_hal_get_eof_desc_addr)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_read_intr_status .text.gdma_ahb_hal_read_intr_status)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_reset .text.gdma_ahb_hal_reset)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_start_with_desc .text.gdma_ahb_hal_start_with_desc)
|
||||
*components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_stop .text.gdma_ahb_hal_stop)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_append .text.gdma_hal_append)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_clear_intr .text.gdma_hal_clear_intr)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_get_eof_desc_addr .text.gdma_hal_get_eof_desc_addr)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_read_intr_status .text.gdma_hal_read_intr_status)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_reset .text.gdma_hal_reset)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_start_with_desc .text.gdma_hal_start_with_desc)
|
||||
*components/hal/gdma_hal_top.*(.literal.gdma_hal_stop .text.gdma_hal_stop)
|
||||
*components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep)
|
||||
*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/mmu_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
|
||||
*components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value)
|
||||
*components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl)
|
||||
*components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock)
|
||||
*tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead)
|
||||
*tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size)
|
||||
*tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free)
|
||||
*tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool)
|
||||
*tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign)
|
||||
*tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs)
|
||||
*tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc)
|
||||
*tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size)
|
||||
*components/log/*/log_lock.*(.literal .literal.* .text .text.*)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
|
||||
*components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
|
||||
*components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write)
|
||||
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.*)
|
||||
*libnet80211.a:(.wifirxiram .wifirxiram.*)
|
||||
*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*components/newlib/abort.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/assert.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/heap.*(.literal .literal.* .text .text.*)
|
||||
*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libpp.a:(.wifi0iram .wifi0iram.*)
|
||||
*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
|
||||
*libpp.a:(.wifirxiram .wifirxiram.*)
|
||||
*libpp.a:(.wifislprxiram .wifislprxiram.*)
|
||||
*librtc.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/soc/lldesc.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_hpm_enable.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/*/spi_flash_oct_flash_init.*(.literal .literal.* .text .text.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*)
|
||||
|
||||
*libxt_hal.a:(.literal .literal.* .text .text.*)
|
||||
|
||||
*components/xtensa/*(.literal .literal.* .text .text.*)
|
||||
} > iram0_0_seg
|
||||
|
||||
/**
|
||||
* This section is required to skip .iram0.text area because iram0_0_seg and
|
||||
* dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
|
||||
} > dram0_0_seg
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
KEEP (*(SORT(.xfa.*)))
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data.*)
|
||||
|
||||
*(.dram1 .dram1.*)
|
||||
_coredump_dram_start = ABSOLUTE(.);
|
||||
*(.dram2.coredump .dram2.coredump.*)
|
||||
_coredump_dram_end = ABSOLUTE(.);
|
||||
|
||||
*components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_bt_data_start = ABSOLUTE(.);
|
||||
*libbt.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_data_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_data_end = ABSOLUTE(.);
|
||||
|
||||
*components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/mspi_timing_by_mspi_delay.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/mspi_timing_config.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/sleep_console.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_hw_support/*/systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_psram/*/esp_psram_impl_*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_psram/mmu_psram_flash*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_cache_writeback_esp32s3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_rom/patches/esp_rom_wdt.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*libclang_rt.builtins.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcc.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/hal/cache_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/hal/systimer_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/log/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
_nimble_data_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
_nimble_data_end = ABSOLUTE(.);
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
|
||||
*components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
|
||||
*components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_hpm_enable.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_oct_flash_init.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
_data_end = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _noinit_start)
|
||||
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _noinit_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(8, _bss_start)
|
||||
|
||||
/**
|
||||
* ldgen places all bss-related data to mapping[dram0_bss]
|
||||
* (See components/esp_system/app.lf).
|
||||
*/
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss.*)
|
||||
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
||||
*(.ext_ram.bss .ext_ram.bss.*)
|
||||
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_start = ABSOLUTE(.);
|
||||
*libbt.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_common_start = ABSOLUTE(.);
|
||||
*libbt.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_common_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.*)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bt_controller_common_end = ABSOLUTE(.);
|
||||
|
||||
_nimble_bss_start = ABSOLUTE(.);
|
||||
*libnimble.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN(4);
|
||||
_nimble_bss_end = ABSOLUTE(.);
|
||||
|
||||
ALIGNED_SYMBOL(8, _bss_end)
|
||||
} > dram0_0_seg
|
||||
|
||||
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
/**
|
||||
* Mark the start of flash.text.
|
||||
* This can be used by the MMU driver to maintain the virtual address.
|
||||
*/
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
*(.literal .literal.* .text .text.*)
|
||||
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.stub)
|
||||
*(.gnu.warning)
|
||||
*(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
|
||||
/**
|
||||
* CPU will try to prefetch up to 16 bytes of of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
/**
|
||||
* Mark the flash.text end.
|
||||
* This can be used for MMU driver to maintain virtual address.
|
||||
*/
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
|
||||
/**
|
||||
* Dummy section represents the .flash.text section but in default_rodata_seg.
|
||||
* Thus, it must have its alignment and (at least) its size.
|
||||
*/
|
||||
.flash_rodata_dummy (NOLOAD):
|
||||
{
|
||||
_flash_rodata_dummy_start = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(ALIGNOF(.flash.text)) + SIZEOF(.flash.text);
|
||||
|
||||
/* Add alignment of MMU page size + 0x20 bytes for the mapping header. */
|
||||
. = ALIGN(_esp_mmu_page_size) + 0x20;
|
||||
} > default_rodata_seg
|
||||
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
/**
|
||||
* Mark flash.rodata start.
|
||||
* This can be used for mmu driver to maintain virtual address
|
||||
*/
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
|
||||
/* !DO NOT PUT ANYTHING BEFORE THIS! */
|
||||
|
||||
/* Should be the first. App version info. */
|
||||
*(.rodata_desc .rodata_desc.*)
|
||||
/* Should be the second. Custom app version info. */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*)
|
||||
|
||||
/**
|
||||
* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flah.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image.
|
||||
*/
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} > default_rodata_seg
|
||||
ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata)
|
||||
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
|
||||
*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*(.rodata_wlog_error .rodata_wlog_error.*)
|
||||
*(.rodata_wlog_info .rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
||||
|
||||
KEEP (*(SORT(.roxfa.*)))
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
|
||||
/* C++ exception handlers table. */
|
||||
ALIGNED_SYMBOL(4, __XT_EXCEPTION_TABLE_)
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
|
||||
ALIGNED_SYMBOL(4, __XT_EXCEPTION_DESCS_)
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
|
||||
#if CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
ALIGNED_SYMBOL(4, __eh_frame)
|
||||
KEEP(*(.eh_frame))
|
||||
/**
|
||||
* As we are not linking with crtend.o, which includes the CIE terminator
|
||||
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
|
||||
*/
|
||||
LONG(0);
|
||||
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
|
||||
|
||||
/**
|
||||
* C++ constructor tables.
|
||||
*
|
||||
* Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
|
||||
*/
|
||||
ALIGNED_SYMBOL(4, __init_array_start)
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
ALIGNED_SYMBOL(4, soc_reserved_memory_region_start)
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
|
||||
/* System init functions registered via ESP_SYSTEM_INIT_FN */
|
||||
ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start)
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
|
||||
/* TLS data. */
|
||||
ALIGNED_SYMBOL(4, _thread_local_start)
|
||||
*(.tdata)
|
||||
*(.tdata.*)
|
||||
*(.tbss)
|
||||
*(.tbss.*)
|
||||
_thread_local_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
|
||||
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
||||
|
||||
/**
|
||||
* This section contains all the rodata that is not used
|
||||
* at runtime, helping to avoid an increase in binary size.
|
||||
*/
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
/**
|
||||
* This symbol marks the end of flash.rodata. It can be utilized by the MMU
|
||||
* driver to maintain the virtual address.
|
||||
* NOLOAD rodata may not be included in this section.
|
||||
*/
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(CONFIG_MMU_PAGE_SIZE);
|
||||
_fp_mmu_start = .;
|
||||
_fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY;
|
||||
|
||||
_fp_mem_start = . ;
|
||||
KEEP(*(SORT(.flash_writable.*)))
|
||||
_fp_mem_end = . ;
|
||||
. = ALIGN(4096);
|
||||
_end_fw = . ;
|
||||
|
||||
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
||||
} > default_rodata_seg
|
||||
|
||||
/**
|
||||
* Dummy section to skip flash rodata sections.
|
||||
* Because to `extern_ram_seg` and `drom0_0_seg` are on the same bus
|
||||
*/
|
||||
.ext_ram.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(extern_ram_seg);
|
||||
. = . + (_rodata_reserved_end - _flash_rodata_dummy_start);
|
||||
. = ALIGN (_esp_mmu_page_size);
|
||||
} > extern_ram_seg
|
||||
|
||||
#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
|
||||
/* This section holds .ext_ram.bss data, and will be put in PSRAM */
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
_ext_ram_bss_start = ABSOLUTE(.);
|
||||
|
||||
mapping[extern_ram]
|
||||
|
||||
ALIGNED_SYMBOL(4, _ext_ram_bss_end)
|
||||
} > extern_ram_seg
|
||||
#endif //CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
|
||||
|
||||
#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
|
||||
/**
|
||||
* This section holds data that won't be initialised when startup.
|
||||
* This section locates in External RAM region.
|
||||
*/
|
||||
.ext_ram_noinit (NOLOAD) :
|
||||
{
|
||||
_ext_ram_noinit_start = ABSOLUTE(.);
|
||||
|
||||
*(.ext_ram_noinit*)
|
||||
|
||||
ALIGNED_SYMBOL(4, _ext_ram_noinit_end)
|
||||
} > extern_ram_seg
|
||||
#endif //CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* Padding for possible CPU prefetch + alignment for PMS split lines */
|
||||
. += _esp_memprot_prefetch_pad_size;
|
||||
. = ALIGN(_esp_memprot_align_size);
|
||||
|
||||
/* iram_end_test section exists for use by memprot unit tests only */
|
||||
*(.iram_end_test)
|
||||
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _iram_data_start)
|
||||
|
||||
*(.iram.data .iram.data.*)
|
||||
_coredump_iram_start = ABSOLUTE(.);
|
||||
*(.iram2.coredump .iram2.coredump.*)
|
||||
_coredump_iram_end = ABSOLUTE(.);
|
||||
|
||||
ALIGNED_SYMBOL(4, _iram_data_end)
|
||||
} > iram0_0_seg
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
ALIGNED_SYMBOL(4, _iram_bss_start)
|
||||
|
||||
*(.iram.bss .iram.bss.*)
|
||||
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
ALIGNED_SYMBOL(4, _iram_end)
|
||||
} > iram0_0_seg
|
||||
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
/* Lowest possible start address for the heap */
|
||||
ALIGNED_SYMBOL(8, _heap_low_start)
|
||||
_sheap = ABSOLUTE(.);
|
||||
} > dram0_0_seg
|
||||
|
||||
|
||||
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
||||
_eheap = ABSOLUTE(.);
|
||||
|
||||
. = _heap_end;
|
||||
|
||||
#include "elf_misc.ld.in"
|
||||
}
|
||||
|
||||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_low_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
80
cpu/esp32/vendor/ld/ld.common
vendored
Normal file
80
cpu/esp32/vendor/ld/ld.common
vendored
Normal file
@ -0,0 +1,80 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "sdkconfig.h"
|
||||
|
||||
/* CPU instruction prefetch padding size for flash mmap scenario */
|
||||
#define _esp_flash_mmap_prefetch_pad_size 16
|
||||
|
||||
/*
|
||||
* PMP region granularity size
|
||||
* Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
|
||||
* to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
|
||||
* the PMP granularity is 2^G+2 bytes.
|
||||
*/
|
||||
#ifdef CONFIG_SOC_CPU_PMP_REGION_GRANULARITY
|
||||
#define _esp_pmp_align_size CONFIG_SOC_CPU_PMP_REGION_GRANULARITY
|
||||
#else
|
||||
#define _esp_pmp_align_size 0
|
||||
#endif
|
||||
|
||||
/* CPU instruction prefetch padding size for memory protection scenario */
|
||||
#ifdef CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE
|
||||
#define _esp_memprot_prefetch_pad_size CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE
|
||||
#else
|
||||
#define _esp_memprot_prefetch_pad_size 0
|
||||
#endif
|
||||
|
||||
/* Memory alignment size for PMS */
|
||||
#ifdef CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE
|
||||
#define _esp_memprot_align_size CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE
|
||||
#else
|
||||
#define _esp_memprot_align_size 0
|
||||
#endif
|
||||
|
||||
#if CONFIG_APP_BUILD_TYPE_RAM
|
||||
#define _esp_mmu_page_size 0
|
||||
#else
|
||||
#define _esp_mmu_page_size CONFIG_MMU_PAGE_SIZE
|
||||
#endif
|
||||
|
||||
#define ALIGN_UP(SIZE, AL) (((SIZE) + (AL - 1)) & ~(AL - 1))
|
||||
|
||||
#if CONFIG_SOC_RTC_MEM_SUPPORTED
|
||||
#if CONFIG_BOOTLOADER_RESERVE_RTC_MEM
|
||||
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
|
||||
#else
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
|
||||
#endif // not CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
|
||||
#else
|
||||
#define ESP_BOOTLOADER_RESERVE_RTC 0
|
||||
#endif // not CONFIG_BOOTLOADER_RESERVE_RTC_MEM
|
||||
|
||||
/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
|
||||
#define RTC_TIMER_RESERVE_RTC (24)
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#define RESERVE_RTC_MEM (RTC_TIMER_RESERVE_RTC)
|
||||
#elif CONFIG_ESP_ROM_HAS_LP_ROM && CONFIG_ULP_COPROC_ENABLED
|
||||
/* RTC Reserved is placed before ULP memory, expand it to make sure the ULP start address
|
||||
has the required alignment */
|
||||
#define ULP_ALIGNMENT_REQ_BYTES 256
|
||||
#define RESERVE_RTC_MEM ALIGN_UP(ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC, ULP_ALIGNMENT_REQ_BYTES)
|
||||
#else
|
||||
#define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC)
|
||||
#endif
|
||||
|
||||
#endif // SOC_RTC_MEM_SUPPORTED
|
||||
|
||||
#define QUOTED_STRING(STRING) #STRING
|
||||
#define ASSERT_SECTIONS_GAP(PREV_SECTION, NEXT_SECTION) \
|
||||
ASSERT((ADDR(NEXT_SECTION) == ADDR(PREV_SECTION) + SIZEOF(PREV_SECTION)), \
|
||||
QUOTED_STRING(The gap between PREV_SECTION and NEXT_SECTION must not exist to produce the final bin image.))
|
||||
|
||||
#define ALIGNED_SYMBOL(X, SYMBOL) \
|
||||
. = ALIGN(X); \
|
||||
SYMBOL = ABSOLUTE(.);
|
||||
Loading…
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Reference in New Issue
Block a user