diff --git a/.murdock b/.murdock index 4f07b4f999..8cbd4858e2 100755 --- a/.murdock +++ b/.murdock @@ -110,17 +110,9 @@ tests/ieee802154_hal # modules or packages. # Eventually this list will be removed... # -# msbiot and pyboard are on the list as kconfig tunes the pll due to different -# HSE values from the standard, this is not the case in makefile. : ${TEST_KCONFIG_BOARD_BLOCKLIST:=" 6lowpan-clicker pic32-wifire - -esp32-wrover-kit -esp8266-olimex-mod - -msbiot -pyboard "} # This list will force all boards that are not in the TEST_KCONFIG_BOARD_BLOCKLIST diff --git a/boards/f4vi1/Kconfig b/boards/f4vi1/Kconfig index 57d055ab9e..0fd48939ff 100644 --- a/boards/f4vi1/Kconfig +++ b/boards/f4vi1/Kconfig @@ -21,4 +21,11 @@ config BOARD_F4VI1 select BOARD_HAS_HSE select BOARD_HAS_LSE +config CLOCK_PLL_M + default 16 + +config CLOCK_PLL_N + default 336 if MODULE_PERIPH_USBDEV && TEST_KCONFIG + default 360 + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/f4vi1/Makefile.features b/boards/f4vi1/Makefile.features index 941f156e30..3ba2fc3e8f 100644 --- a/boards/f4vi1/Makefile.features +++ b/boards/f4vi1/Makefile.features @@ -5,6 +5,3 @@ CPU_MODEL = stm32f415rg # Put defined MCU peripherals here (in alphabetical order) FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_uart - -# f4vi1 provides a custom default Kconfig clock configuration -KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/f4vi1/clock.config diff --git a/boards/f4vi1/clock.config b/boards/f4vi1/clock.config deleted file mode 100644 index 5ce6d857d5..0000000000 --- a/boards/f4vi1/clock.config +++ /dev/null @@ -1,4 +0,0 @@ -# f4vi1 provides a 16MHz HSE so they need a custom PLL config -# to remain in 180MHz max clock. -CONFIG_CUSTOM_PLL_PARAMS=y -CONFIG_CLOCK_PLL_N=90 diff --git a/boards/msbiot/Kconfig b/boards/msbiot/Kconfig index 7a94c4e974..4eba4726cd 100644 --- a/boards/msbiot/Kconfig +++ b/boards/msbiot/Kconfig @@ -30,4 +30,12 @@ config BOARD_MSBIOT select HAVE_MPU9150 select HAVE_SAUL_GPIO +config CLOCK_PLL_M + default 16 + +config CLOCK_PLL_N + default 336 if MODULE_PERIPH_USBDEV && TEST_KCONFIG + default 360 + + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/msbiot/Makefile.features b/boards/msbiot/Makefile.features index 55ac53bdfc..aaefd4fcad 100644 --- a/boards/msbiot/Makefile.features +++ b/boards/msbiot/Makefile.features @@ -10,6 +10,3 @@ FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_uart - -# msbiot provides a custom default Kconfig clock configuration -KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/msbiot/clock.config diff --git a/boards/msbiot/clock.config b/boards/msbiot/clock.config deleted file mode 100644 index dbd3b7b887..0000000000 --- a/boards/msbiot/clock.config +++ /dev/null @@ -1,5 +0,0 @@ -# msbiot provides a 16MHz HSE so its needs a custom PLL config to output a -# 180MHz clock. -CONFIG_CUSTOM_PLL_PARAMS=y -CONFIG_CLOCK_PLL_M=16 -CONFIG_CLOCK_PLL_N=360 diff --git a/boards/pyboard/Kconfig b/boards/pyboard/Kconfig index 51fe668d66..4f18e33e8b 100644 --- a/boards/pyboard/Kconfig +++ b/boards/pyboard/Kconfig @@ -28,4 +28,12 @@ config BOARD_PYBOARD select HAVE_SAUL_GPIO +config CLOCK_PLL_M + default 12 + +config CLOCK_PLL_N + default 336 if MODULE_PERIPH_USBDEV && TEST_KCONFIG + default 360 + + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/pyboard/Makefile.features b/boards/pyboard/Makefile.features index 841e68ca3b..1237c2661e 100644 --- a/boards/pyboard/Makefile.features +++ b/boards/pyboard/Makefile.features @@ -9,6 +9,3 @@ FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_uart FEATURES_PROVIDED += periph_usbdev - -# pyboard provides a custom default Kconfig clock configuration -KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/pyboard/clock.config diff --git a/boards/pyboard/clock.config b/boards/pyboard/clock.config deleted file mode 100644 index 1cd4429bc5..0000000000 --- a/boards/pyboard/clock.config +++ /dev/null @@ -1,5 +0,0 @@ -# pyboard provides a 12MHz HSE so its needs a custom PLL config to output a -# 48MHz clock for USB. -CONFIG_CUSTOM_PLL_PARAMS=y -CONFIG_CLOCK_PLL_M=12 -CONFIG_CLOCK_PLL_N=336 diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h index f9efcaff36..f9cf35c7fb 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h @@ -39,6 +39,8 @@ extern "C" { #ifndef CONFIG_CLOCK_PLL_M #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12)) #define CONFIG_CLOCK_PLL_M (12) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(16)) +#define CONFIG_CLOCK_PLL_M (16) #else #define CONFIG_CLOCK_PLL_M (4) #endif @@ -51,7 +53,8 @@ extern "C" { defined(CPU_LINE_STM32F437xx) || defined(CPU_LINE_STM32F439xx)) #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (168) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12) || \ + (CLOCK_HSE == MHZ(16))) #define CONFIG_CLOCK_PLL_N (336) #else #define CONFIG_CLOCK_PLL_N (84) @@ -59,7 +62,8 @@ extern "C" { #else #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (180) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12) || \ + (CLOCK_HSE == MHZ(16))) #define CONFIG_CLOCK_PLL_N (360) #else #define CONFIG_CLOCK_PLL_N (90)