kaspar/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-12-15 09:33:50 +01:00
Code Releases Activity

boards: fixed timer conf for stm32f1 based boards

Browse Source
This commit is contained in:
Hauke Petersen 2016-03-16 12:19:33 +01:00
parent 61f8d45e03
commit 083204c899
4 changed files with 32 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
boards/fox/include/periph_conf.h
View File

@ -56,16 +56,16 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.rcc_bit = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
.dev = TIM2,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.rcc_bit = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};

16
boards/iotlab-m3/include/periph_conf.h
View File

@ -62,16 +62,16 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.rcc_bit = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
.dev = TIM2,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.rcc_bit = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};

16
boards/nucleo-f103/include/periph_conf.h
View File

@ -58,16 +58,16 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.rcc_bit = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
.dev = TIM2,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.rcc_bit = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};

16
boards/spark-core/include/periph_conf.h
View File

@ -56,16 +56,16 @@
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.rcc_bit = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
.dev = TIM2,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.rcc_bit = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};