From 085cdae3feb11e6a22ccf0e491fee76d08260a86 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 2 Mar 2025 12:06:45 +0100
Subject: [PATCH] cpu/esp32/periph/sdmmc: migration to ESP-IDF v5.4

---
 cpu/esp32/periph/sdmmc.c | 54 +++++++++++++++++++++++++++++++++++-----
 1 file changed, 48 insertions(+), 6 deletions(-)

diff --git a/cpu/esp32/periph/sdmmc.c b/cpu/esp32/periph/sdmmc.c
index e740100308..79759dd4fa 100644
--- a/cpu/esp32/periph/sdmmc.c
+++ b/cpu/esp32/periph/sdmmc.c
@@ -122,6 +122,8 @@ static void _isr_cd_pin(void *arg);
 
 static void _init(sdmmc_dev_t *sdmmc_dev)
 {
+    DEBUG("[sdmmc] %s", __func__);
+
     esp32_sdmmc_dev_t *dev = container_of(sdmmc_dev, esp32_sdmmc_dev_t, sdmmc_dev);
     assert(dev);
 
@@ -243,7 +245,7 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg,
         .data = 0,
         .datalen = 0,
         .blklen = 0,
-        .timeout_ms = 100,
+        .timeout_ms = 1000,
     };
 
     switch (resp_type) {
@@ -266,7 +268,7 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg,
         cmd.flags |= SCF_RSP_R5;
         break;
     case SDMMC_R6:
-        cmd.flags |= SCF_RSP_R7;
+        cmd.flags |= SCF_RSP_R6;
         break;
     case SDMMC_R7:
         cmd.flags |= SCF_RSP_R7;
@@ -275,13 +277,13 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg,
         break;
     }
 
+    DEBUG("[sdmmc] %s dev=%p slot=%d op=%" PRIu32 " arg=%" PRIx32 " flags=%x\n",
+          __func__, dev, dev->config->slot, cmd.opcode, cmd.arg, cmd.flags);
+
     esp_err_t res = sdmmc_host_do_transaction(dev->config->slot, &cmd);
     if (res) {
         return _esp_err_to_sdmmc_err_code(res);
     }
-    else if (cmd.error) {
-        return _esp_err_to_sdmmc_err_code(cmd.error);
-    }
 
     if ((resp_type == SDMMC_R1) || (resp_type == SDMMC_R1B)) {
         sdmmc_dev->status = cmd.response[0];
@@ -299,6 +301,28 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg,
         }
     }
 
+    if (cmd.error) {
+#if CPU_FAM_ESP32S3
+        /*
+         * FIXME:
+         * The host controller triggers an invalid response error on ESP32-S3,
+         * although the response from the card is completely correct and is
+         * received completely by the host controller. The reason for this is
+         * not yet clear. The sequence of commands including all parameters
+         * sent to the host controller as well as the timing are exactly the
+         * same as in the IDF code. The initialization of the host controller
+         * is also exactly the same as in the IDF code. The problem only
+         * occurs with the ESP32-S3, but not with the ESP32. As a workaround,
+         * we ignore invalid response errors on ESP32-S3.
+         */
+        if (cmd.error != ESP_ERR_INVALID_RESPONSE) {
+            return _esp_err_to_sdmmc_err_code(cmd.error);
+        }
+#else
+        return _esp_err_to_sdmmc_err_code(cmd.error);
+#endif
+    }
+
     return 0;
 }
 
@@ -385,7 +409,7 @@ static int _xfer_execute(sdmmc_dev_t *sdmmc_dev, sdmmc_xfer_desc_t *xfer,
         .data = xfer->write ? (void *)data_wr : data_rd,
         .datalen = xfer->block_num * xfer->block_size,
         .blklen = xfer->block_size,
-        .timeout_ms = xfer->write ? 2500 : 1000, // TODO
+        .timeout_ms = xfer->write ? 2500 : 1000, /* TODO */
     };
 
     if (done) {
@@ -397,7 +421,25 @@ static int _xfer_execute(sdmmc_dev_t *sdmmc_dev, sdmmc_xfer_desc_t *xfer,
         return _esp_err_to_sdmmc_err_code(res);
     }
     else if (cmd.error) {
+#ifdef CPU_FAM_ESP32S3
+        /*
+         * FIXME:
+         * The host controller triggers an invalid response error on ESP32-S3,
+         * although the response from the card is completely correct and is
+         * received completely by the host controller. The reason for this is
+         * not yet clear. The sequence of commands including all parameters
+         * sent to the host controller as well as the timing are exactly the
+         * same as in the IDF code. The initialization of the host controller
+         * is also exactly the same as in the IDF code. The problem only
+         * occurs with the ESP32-S3, but not with the ESP32. As a workaround,
+         * we ignore invalid response errors on ESP32-S3.
+         */
+        if (cmd.error != ESP_ERR_INVALID_RESPONSE) {
+            return _esp_err_to_sdmmc_err_code(cmd.error);
+        }
+#else
         return _esp_err_to_sdmmc_err_code(cmd.error);
+#endif
     }
 
     if (done) {