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mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-12-24 14:03:55 +01:00

boards/nucle-f0xx: fixed timer configuration

This commit is contained in:
Hauke Petersen 2017-01-27 10:29:34 +01:00
parent 6a6cbb8d88
commit 1171db8c5f
4 changed files with 17 additions and 65 deletions

View File

@ -49,31 +49,15 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM14,
.dev = TIM1,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM14EN,
.bus = APB1,
.irqn = TIM14_IRQn
},
{
.dev = TIM16,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM16EN,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.bus = APB2,
.irqn = TIM16_IRQn
},
{
.dev = TIM17,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM17EN,
.bus = APB2,
.irqn = TIM17_IRQn
.irqn = TIM1_CC_IRQn
}
};
#define TIMER_0_ISR (isr_tim14)
#define TIMER_1_ISR (isr_tim16)
#define TIMER_2_ISR (isr_tim17)
#define TIMER_0_ISR (isr_tim1_cc)
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */

View File

@ -49,31 +49,15 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM14,
.dev = TIM1,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM14EN,
.bus = APB1,
.irqn = TIM14_IRQn
},
{
.dev = TIM16,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM16EN,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.bus = APB2,
.irqn = TIM16_IRQn
},
{
.dev = TIM17,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM17EN,
.bus = APB2,
.irqn = TIM17_IRQn
.irqn = TIM1_CC_IRQn
}
};
#define TIMER_0_ISR isr_tim14
#define TIMER_1_ISR isr_tim16
#define TIMER_2_ISR isr_tim17
#define TIMER_0_ISR isr_tim1_cc
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))

View File

@ -48,31 +48,15 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM14,
.dev = TIM1,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM14EN,
.bus = APB1,
.irqn = TIM14_IRQn
},
{
.dev = TIM16,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM16EN,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.bus = APB2,
.irqn = TIM16_IRQn
},
{
.dev = TIM17,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM17EN,
.bus = APB2,
.irqn = TIM17_IRQn
.irqn = TIM1_CC_IRQn
}
};
#define TIMER_0_ISR isr_tim14
#define TIMER_1_ISR isr_tim16
#define TIMER_2_ISR isr_tim17
#define TIMER_0_ISR isr_tim1_cc
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */

View File

@ -47,15 +47,15 @@ extern "C" {
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM14,
.dev = TIM1,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM14_IRQn
.rcc_mask = RCC_APB2ENR_TIM1EN,
.bus = APB2,
.irqn = TIM1_CC_IRQn
}
};
#define TIMER_0_ISR isr_tim14
#define TIMER_0_ISR isr_tim1_cc
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */