From 178b46c8779042ab2c7d2751d2e70e40aa737151 Mon Sep 17 00:00:00 2001 From: Hauke Petersen Date: Fri, 28 Aug 2015 19:07:13 +0200 Subject: [PATCH] boards/telosb: now using periph UART driver --- boards/telosb/board.c | 10 +-- boards/telosb/include/board.h | 9 ++ boards/telosb/include/periph_conf.h | 31 +++++++ boards/telosb/uart.c | 126 ---------------------------- 4 files changed, 45 insertions(+), 131 deletions(-) delete mode 100644 boards/telosb/uart.c diff --git a/boards/telosb/board.c b/boards/telosb/board.c index 0fc1304ce0..ebb505d82a 100644 --- a/boards/telosb/board.c +++ b/boards/telosb/board.c @@ -9,6 +9,7 @@ #include "cpu.h" #include "board.h" +#include "msp430_stdio.h" void uart_init(void); @@ -25,9 +26,9 @@ static void telosb_ports_init(void) P2DIR = 0xFF; /* Port2 Direction: 11111111 = 0xFF */ /* Port 3: UART and SPI */ - P3SEL = 0xCE; /* Port3 Select: 11001110 = 0xCE */ + P3SEL = 0x0E; /* Port3 Select: 11001110 = 0xCE */ P3OUT = 0x00; /* Port3 Output: 00000000 = 0x00 */ - P3DIR = 0x4E; /* Port3 Direction: 01001110 = 0x4E */ + P3DIR = 0xFE; /* Port3 Direction: 01001110 = 0x4E */ /* Port 4: CS */ P4SEL = 0x02; /* Port4 Select: 00000010 = 0x02 */ @@ -119,11 +120,10 @@ void board_init(void) WDTCTL = WDTPW + WDTHOLD; telosb_ports_init(); - msp430_init_dco(); - /* initialize bsp modules */ - uart_init(); + /* initialize the STDIO */ + msp430_stdio_init(); /* enable interrupts */ __bis_SR_register(GIE); diff --git a/boards/telosb/include/board.h b/boards/telosb/include/board.h index 98441a7646..716f74640b 100644 --- a/boards/telosb/include/board.h +++ b/boards/telosb/include/board.h @@ -52,6 +52,15 @@ extern "C" { */ #define HW_TIMER (0) +/** + * @brief Standard input/output device configuration + * @{ + */ +#define STDIO (0) +#define STDIO_BAUDRATE (115200U) +#define STDIO_RX_BUFSIZE (64U) +/** @} */ + /* TelosB core */ #define MSP430_INITIAL_CPU_SPEED 2457600uL #define F_CPU MSP430_INITIAL_CPU_SPEED diff --git a/boards/telosb/include/periph_conf.h b/boards/telosb/include/periph_conf.h index e7d1a578ad..202f48e0e4 100644 --- a/boards/telosb/include/periph_conf.h +++ b/boards/telosb/include/periph_conf.h @@ -25,6 +25,16 @@ extern "C" { #endif +/** + * @brief Clock configuration + * + * @todo Move all clock configuration code here from the board.h + */ +#define CLOCK_CORECLOCK (2457600U) + +#define CLOCK_CMCLK CLOCK_CORECLOCK /* no divider programmed */ +/** @} */ + /** * @brief Timer configuration * @{ @@ -35,6 +45,27 @@ extern "C" { #define TIMER_ISR_CCX (TIMERA1_VECTOR) /** @} */ +/** + * @brief UART configuration + * @{ + */ +#define UART_NUMOF (1U) +#define UART_0_EN (1U) + +#define UART_DEV (USART_1) +#define UART_IE (SFR->IE2) +#define UART_IF (SFR->IFG2) +#define UART_IE_RX_BIT (1 << 4) +#define UART_IE_TX_BIT (1 << 5) +#define UART_ME (SFR->ME2) +#define UART_ME_BITS (0x30) +#define UART_PORT (PORT_3) +#define UART_RX_PIN (1 << 6) +#define UART_TX_PIN (1 << 7) +#define UART_RX_ISR (USART1RX_VECTOR) +#define UART_TX_ISR (USART1TX_VECTOR) +/** @} */ + #ifdef __cplusplus } #endif diff --git a/boards/telosb/uart.c b/boards/telosb/uart.c deleted file mode 100644 index f73dab3602..0000000000 --- a/boards/telosb/uart.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * uart.c - Implementation for the TelosB UART - * Copyright (C) 2013 Oliver Hahm - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#include -#include -#include "cpu.h" -#include "board.h" -#include "kernel.h" -#include "board_uart0.h" - -#define UART1_TX U1TXBUF -#define UART1_WAIT_TXDONE() while ( (U1TCTL & TXEPT) == 0 ) { _NOP(); } - -#define BAUDRATE (115200ul) - -static uint8_t calc_umctl(uint16_t br) -{ - /* from TI slaa049 */ - register uint8_t CMOD = 256 * br - 256 * (br + 1) / 2; - register uint8_t c = 0; - register int i = 0; - register uint8_t a = CMOD; - a <<= 1; - - do { - if (a & 0x80) { /* Overflow to integer? */ - a = a - 128 + CMOD; /* Yes, subtract 1.000000 */ - c |= 0x80; - } - else { - a += CMOD; /* No, add fraction */ - } - - if (i == 7) { - return c; - } - - i++; - c >>= 1; - } - while (1); -} - -void uart_init(void) -{ - UCTL1 = SWRST; /* hold UART1 module in reset */ - UCTL1 |= CHAR; /* 8-bit character */ - - /* 115200 baud, clocked from 4.8MHz SMCLK */ - UTCTL1 |= SSEL1; /* UCLK = SCLK */ - UBR01 = F_CPU / BAUDRATE; - UBR11 = (F_CPU / BAUDRATE) >> 8; - UMCTL1 = calc_umctl(F_CPU / BAUDRATE); /* set modulation */ - - ME2 |= UTXE1 + URXE1; /* enable UART1 TX/RX */ - UCTL1 &= ~SWRST; /* clear UART1 reset bit */ - - IE2 |= URXIE1; /* enable rx interrupt */ - IFG1 &= ~UTXIFG1; -} - -int putchar(int c) -{ - UART1_TX = c; - UART1_WAIT_TXDONE(); - return c; -} - -int getchar(void) -{ -#ifdef MODULE_UART0 - return uart0_readc(); -#else - return U1RXBUF; -#endif -} - -uint8_t uart_readByte(void) -{ - return U1RXBUF; -} - -void usart1irq(void); -/** - * \brief the interrupt function - */ -void __attribute__((interrupt(USART1RX_VECTOR))) usart1irq(void) -{ - /* Check status register for receive errors. */ - if (U1RCTL & RXERR) { - if (U1RCTL & FE) { - puts("rx framing error"); - } - - if (U1RCTL & OE) { - puts("rx overrun error"); - } - - if (U1RCTL & PE) { - puts("rx parity error"); - } - - if (U1RCTL & BRK) { - puts("rx break error"); - } - - /* Clear error flags by forcing a dummy read. */ - volatile int c = U1RXBUF; - (void) c; - } - -#ifdef MODULE_UART0 - else if (uart0_handler_pid != KERNEL_PID_UNDEF) { - volatile int c = U1RXBUF; - uart0_handle_incoming(c); - uart0_notify_thread(); - } - -#endif -}