From 17cce015d4a067faf22e7c258316bbdb63f9dbf5 Mon Sep 17 00:00:00 2001 From: MrKevinWeiss Date: Wed, 26 Oct 2022 11:43:40 +0200 Subject: [PATCH] treewide/stm32: Make CLOCK_HS* configurable --- boards/common/iotlab/Kconfig | 4 ++ .../iotlab/include/periph_conf_common.h | 5 ++- boards/common/weact-f4x1cx/Kconfig | 4 ++ .../common/weact-f4x1cx/include/periph_conf.h | 4 +- boards/f4vi1/Kconfig | 4 ++ boards/f4vi1/include/periph_conf.h | 4 +- boards/im880b/Kconfig | 5 +++ boards/im880b/include/periph_conf.h | 4 +- boards/lora-e5-dev/Kconfig | 4 ++ boards/lora-e5-dev/include/periph_conf.h | 4 +- boards/msbiot/Kconfig | 4 ++ boards/msbiot/include/periph_conf.h | 4 +- boards/nucleo-wl55jc/Kconfig | 4 ++ boards/nucleo-wl55jc/include/periph_conf.h | 4 +- boards/p-nucleo-wb55/Kconfig | 4 ++ boards/p-nucleo-wb55/include/periph_conf.h | 4 +- boards/pyboard/Kconfig | 4 ++ boards/pyboard/include/periph_conf.h | 4 +- boards/stm32f469i-disco/Kconfig | 4 ++ boards/stm32f469i-disco/include/periph_conf.h | 4 +- boards/stm32f723e-disco/Kconfig | 4 ++ boards/stm32f723e-disco/include/periph_conf.h | 4 +- boards/stm32f746g-disco/Kconfig | 6 +++ boards/stm32f746g-disco/include/periph_conf.h | 4 +- boards/stm32f7508-dk/Kconfig | 4 ++ boards/stm32f769i-disco/Kconfig | 6 +++ boards/stm32f769i-disco/include/periph_conf.h | 4 +- boards/ublox-c030-u201/Kconfig | 4 ++ boards/ublox-c030-u201/include/periph_conf.h | 4 +- cpu/stm32/dist/clk_conf/clk_conf.c | 4 +- cpu/stm32/doc.txt | 2 +- .../include/clk/cfg_clock_common_fx_gx_mp1.h | 14 ++++--- .../include/clk/cfg_clock_common_lx_u5_wx.h | 10 +++-- .../include/clk/f0f1f3/cfg_clock_default.h | 14 +++---- .../include/clk/f2f4f7/cfg_clock_default.h | 10 ++--- .../clk/f2f4f7/cfg_clock_default_100.h | 10 ++--- .../clk/f2f4f7/cfg_clock_default_120.h | 2 +- .../clk/f2f4f7/cfg_clock_default_180.h | 16 ++++---- .../clk/f2f4f7/cfg_clock_default_216.h | 6 +-- .../include/clk/f2f4f7/cfg_clock_default_84.h | 6 +-- .../include/clk/g0g4/cfg_clock_default.h | 14 +++---- .../include/clk/l0l1/cfg_clock_default.h | 14 +++---- .../include/clk/l4l5wx/cfg_clock_default.h | 18 ++++----- cpu/stm32/include/clk/mp1/cfg_clock_default.h | 12 +++--- cpu/stm32/include/clk/u5/cfg_clock_default.h | 10 ++--- cpu/stm32/include/tinyusb_hw_defaults.h | 2 +- cpu/stm32/periph/uart.c | 4 +- cpu/stm32/stmclk/stmclk_gx.c | 4 +- dist/tools/doccheck/exclude_patterns | 38 +++++++++---------- .../usbdev_synopsys_dwc2.c | 2 +- 50 files changed, 217 insertions(+), 117 deletions(-) diff --git a/boards/common/iotlab/Kconfig b/boards/common/iotlab/Kconfig index 6a5831c092..36a8810791 100644 --- a/boards/common/iotlab/Kconfig +++ b/boards/common/iotlab/Kconfig @@ -27,6 +27,10 @@ config BOARD_COMMON_IOTLAB select HAVE_L3G4200D select HAVE_LSM303DLHC +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_16MHZ +endchoice + config MODULE_BOARDS_COMMON_IOTLAB bool depends on TEST_KCONFIG diff --git a/boards/common/iotlab/include/periph_conf_common.h b/boards/common/iotlab/include/periph_conf_common.h index 7cce184d36..a4bd239775 100644 --- a/boards/common/iotlab/include/periph_conf_common.h +++ b/boards/common/iotlab/include/periph_conf_common.h @@ -29,7 +29,10 @@ #ifndef CONFIG_BOARD_HAS_HSE #define CONFIG_BOARD_HAS_HSE 1 #endif -#define CLOCK_HSE MHZ(16) + +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(16) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/common/weact-f4x1cx/Kconfig b/boards/common/weact-f4x1cx/Kconfig index 77fd5fca62..5e400e67ef 100644 --- a/boards/common/weact-f4x1cx/Kconfig +++ b/boards/common/weact-f4x1cx/Kconfig @@ -28,6 +28,10 @@ config BOARD_COMMON_WEACT_F4X1CX select HAVE_SAUL_GPIO select HAVE_MTD_SPI_NOR +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_25MHZ +endchoice + config MODULE_BOARDS_COMMON_WEACT-F4X1CX bool depends on TEST_KCONFIG diff --git a/boards/common/weact-f4x1cx/include/periph_conf.h b/boards/common/weact-f4x1cx/include/periph_conf.h index 7f10229e36..78ab979554 100644 --- a/boards/common/weact-f4x1cx/include/periph_conf.h +++ b/boards/common/weact-f4x1cx/include/periph_conf.h @@ -33,7 +33,9 @@ #endif /* The HSE provides a 25MHz clock */ -#define CLOCK_HSE MHZ(25) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(25) +#endif #include "clk_conf.h" #include "cfg_i2c1_pb8_pb9.h" diff --git a/boards/f4vi1/Kconfig b/boards/f4vi1/Kconfig index 0fd48939ff..c5e35f6031 100644 --- a/boards/f4vi1/Kconfig +++ b/boards/f4vi1/Kconfig @@ -21,6 +21,10 @@ config BOARD_F4VI1 select BOARD_HAS_HSE select BOARD_HAS_LSE +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_16MHZ +endchoice + config CLOCK_PLL_M default 16 diff --git a/boards/f4vi1/include/periph_conf.h b/boards/f4vi1/include/periph_conf.h index 4c30e43ed2..5b1dcc3a0d 100644 --- a/boards/f4vi1/include/periph_conf.h +++ b/boards/f4vi1/include/periph_conf.h @@ -27,7 +27,9 @@ #endif /* The HSE provides a 16MHz clock */ -#define CLOCK_HSE MHZ(16) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(16) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/im880b/Kconfig b/boards/im880b/Kconfig index e67d535aae..6d526e1a94 100644 --- a/boards/im880b/Kconfig +++ b/boards/im880b/Kconfig @@ -22,6 +22,11 @@ config BOARD_IM880B select HAS_PERIPH_UART # Clock configuration + select BOARD_HAS_HSE select BOARD_HAS_LSE +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_16MHZ +endchoice + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/im880b/include/periph_conf.h b/boards/im880b/include/periph_conf.h index 69bbcb99b3..31fddb1f14 100644 --- a/boards/im880b/include/periph_conf.h +++ b/boards/im880b/include/periph_conf.h @@ -36,7 +36,9 @@ /** * @brief Speed of the HSE clock in Hz */ -#define CLOCK_HSE MHZ(16) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(16) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/lora-e5-dev/Kconfig b/boards/lora-e5-dev/Kconfig index 95e962b90e..082f7bfd82 100644 --- a/boards/lora-e5-dev/Kconfig +++ b/boards/lora-e5-dev/Kconfig @@ -33,6 +33,10 @@ config BOARD_LORA_E5_DEV select HAVE_SAUL_GPIO select HAVE_LM75A +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_32MHZ +endchoice + config LORA_E5_DEV_ENABLE_3P3V bool "LoRa-E5 Development Kit - Enable 3.3V output" default y diff --git a/boards/lora-e5-dev/include/periph_conf.h b/boards/lora-e5-dev/include/periph_conf.h index e123e92d9c..599b02ffe2 100644 --- a/boards/lora-e5-dev/include/periph_conf.h +++ b/boards/lora-e5-dev/include/periph_conf.h @@ -30,7 +30,9 @@ #define CONFIG_BOARD_HAS_HSE 1 #endif -#define CLOCK_HSE MHZ(32) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(32) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/msbiot/Kconfig b/boards/msbiot/Kconfig index 4eba4726cd..36e709120a 100644 --- a/boards/msbiot/Kconfig +++ b/boards/msbiot/Kconfig @@ -30,6 +30,10 @@ config BOARD_MSBIOT select HAVE_MPU9150 select HAVE_SAUL_GPIO +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_16MHZ +endchoice + config CLOCK_PLL_M default 16 diff --git a/boards/msbiot/include/periph_conf.h b/boards/msbiot/include/periph_conf.h index 5f3f016323..ddce99602f 100644 --- a/boards/msbiot/include/periph_conf.h +++ b/boards/msbiot/include/periph_conf.h @@ -25,7 +25,9 @@ #endif /* The HSE provides a 16MHz clock */ -#define CLOCK_HSE MHZ(16) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(16) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/nucleo-wl55jc/Kconfig b/boards/nucleo-wl55jc/Kconfig index 63e9438de4..520579906c 100644 --- a/boards/nucleo-wl55jc/Kconfig +++ b/boards/nucleo-wl55jc/Kconfig @@ -28,4 +28,8 @@ config BOARD_NUCLEO_WL55JC select MODULE_PERIPH_LPUART if MODULE_STDIO_UART && HAS_PERIPH_LPUART +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_32MHZ +endchoice + source "$(RIOTBOARD)/common/nucleo64/Kconfig" diff --git a/boards/nucleo-wl55jc/include/periph_conf.h b/boards/nucleo-wl55jc/include/periph_conf.h index d8f7dbbca0..37a2e709e7 100644 --- a/boards/nucleo-wl55jc/include/periph_conf.h +++ b/boards/nucleo-wl55jc/include/periph_conf.h @@ -31,7 +31,9 @@ #define CONFIG_BOARD_HAS_HSE 1 #endif -#define CLOCK_HSE MHZ(32) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(32) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/p-nucleo-wb55/Kconfig b/boards/p-nucleo-wb55/Kconfig index 84381aec9d..b0975d5e51 100644 --- a/boards/p-nucleo-wb55/Kconfig +++ b/boards/p-nucleo-wb55/Kconfig @@ -33,4 +33,8 @@ config BOARD_P_NUCLEO_WB55 select BOARD_HAS_HSE select BOARD_HAS_LSE +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_32MHZ +endchoice + source "$(RIOTBOARD)/common/nucleo/Kconfig" diff --git a/boards/p-nucleo-wb55/include/periph_conf.h b/boards/p-nucleo-wb55/include/periph_conf.h index f181852795..80e201ea21 100644 --- a/boards/p-nucleo-wb55/include/periph_conf.h +++ b/boards/p-nucleo-wb55/include/periph_conf.h @@ -28,7 +28,9 @@ #define CONFIG_BOARD_HAS_HSE 1 #endif -#define CLOCK_HSE MHZ(32) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(32) +#endif /* EXTAHB (HCLK2) max freq 32 Mhz*/ #define CLOCK_EXTAHB_DIV RCC_EXTCFGR_C2HPRE_3 diff --git a/boards/pyboard/Kconfig b/boards/pyboard/Kconfig index a2b900d1bb..9d2f49a075 100644 --- a/boards/pyboard/Kconfig +++ b/boards/pyboard/Kconfig @@ -31,6 +31,10 @@ config BOARD_PYBOARD select HAVE_SAUL_GPIO +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_12MHZ +endchoice + config CLOCK_PLL_M default 12 diff --git a/boards/pyboard/include/periph_conf.h b/boards/pyboard/include/periph_conf.h index ec4cbc447f..16c3a37bf7 100644 --- a/boards/pyboard/include/periph_conf.h +++ b/boards/pyboard/include/periph_conf.h @@ -32,7 +32,9 @@ #endif /* The HSE provides a 12MHz clock */ -#define CLOCK_HSE MHZ(12) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(12) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/stm32f469i-disco/Kconfig b/boards/stm32f469i-disco/Kconfig index 0f1197435e..d60cb3ab82 100644 --- a/boards/stm32f469i-disco/Kconfig +++ b/boards/stm32f469i-disco/Kconfig @@ -27,4 +27,8 @@ config BOARD_STM32F469I_DISCO select HAVE_SAUL_GPIO +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_8MHZ +endchoice + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/stm32f469i-disco/include/periph_conf.h b/boards/stm32f469i-disco/include/periph_conf.h index cda8c0e319..4ba53d5aef 100644 --- a/boards/stm32f469i-disco/include/periph_conf.h +++ b/boards/stm32f469i-disco/include/periph_conf.h @@ -28,7 +28,9 @@ #endif /* The HSE provides a 8MHz clock */ -#define CLOCK_HSE MHZ(8) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(8) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/stm32f723e-disco/Kconfig b/boards/stm32f723e-disco/Kconfig index b987eff9de..5f949522c1 100644 --- a/boards/stm32f723e-disco/Kconfig +++ b/boards/stm32f723e-disco/Kconfig @@ -37,6 +37,10 @@ config BOARD_STM32F723E_DISCO # Workaround due to stdout only working with stdin enabled select MODULE_STDIN if TEST_KCONFIG +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_25MHZ +endchoice + config MODULE_PERIPH_INIT_LED0 default n if MODULE_PERIPH_SPI diff --git a/boards/stm32f723e-disco/include/periph_conf.h b/boards/stm32f723e-disco/include/periph_conf.h index 7a2213b8c1..5081f8b732 100644 --- a/boards/stm32f723e-disco/include/periph_conf.h +++ b/boards/stm32f723e-disco/include/periph_conf.h @@ -30,7 +30,9 @@ #endif /* The HSE provides a 25MHz clock */ -#define CLOCK_HSE MHZ(25) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(25) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/stm32f746g-disco/Kconfig b/boards/stm32f746g-disco/Kconfig index d0f3356462..a426ab3741 100644 --- a/boards/stm32f746g-disco/Kconfig +++ b/boards/stm32f746g-disco/Kconfig @@ -34,4 +34,10 @@ config BOARD_STM32F746G_DISCO select HAVE_STM32_ETH select HAVE_FT5X06 + +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_25MHZ +endchoice + + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/stm32f746g-disco/include/periph_conf.h b/boards/stm32f746g-disco/include/periph_conf.h index 4cfded7637..9ad0453e91 100644 --- a/boards/stm32f746g-disco/include/periph_conf.h +++ b/boards/stm32f746g-disco/include/periph_conf.h @@ -30,7 +30,9 @@ #endif /* The HSE provides a 25MHz clock */ -#define CLOCK_HSE MHZ(25) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(25) +#endif #include diff --git a/boards/stm32f7508-dk/Kconfig b/boards/stm32f7508-dk/Kconfig index e37295848b..dd18ab4c80 100644 --- a/boards/stm32f7508-dk/Kconfig +++ b/boards/stm32f7508-dk/Kconfig @@ -33,4 +33,8 @@ config BOARD_STM32F7508_DK select HAVE_SAUL_GPIO select HAVE_FT5X06 +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_25MHZ +endchoice + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/stm32f769i-disco/Kconfig b/boards/stm32f769i-disco/Kconfig index 94671967f5..3807f8fc45 100644 --- a/boards/stm32f769i-disco/Kconfig +++ b/boards/stm32f769i-disco/Kconfig @@ -29,4 +29,10 @@ config BOARD_STM32F769I_DISCO select HAVE_SAUL_GPIO + +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_25MHZ +endchoice + + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/stm32f769i-disco/include/periph_conf.h b/boards/stm32f769i-disco/include/periph_conf.h index dc77edb2db..0e504e84c6 100644 --- a/boards/stm32f769i-disco/include/periph_conf.h +++ b/boards/stm32f769i-disco/include/periph_conf.h @@ -30,7 +30,9 @@ #endif /* The HSE provides a 25MHz clock */ -#define CLOCK_HSE MHZ(25) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(25) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/boards/ublox-c030-u201/Kconfig b/boards/ublox-c030-u201/Kconfig index d35cd38e1c..18c5206469 100644 --- a/boards/ublox-c030-u201/Kconfig +++ b/boards/ublox-c030-u201/Kconfig @@ -30,4 +30,8 @@ config BOARD_UBLOX_C030_U201 select HAVE_SAUL_GPIO select MODULE_PERIPH_UART_HW_FC if TEST_KCONFIG && HAS_PERIPH_UART_HW_FC +choice CHOICE_CLOCK_HSE + default CLOCK_HSE_12MHZ +endchoice + source "$(RIOTBOARD)/common/stm32/Kconfig" diff --git a/boards/ublox-c030-u201/include/periph_conf.h b/boards/ublox-c030-u201/include/periph_conf.h index be59574078..1f98b1a4af 100644 --- a/boards/ublox-c030-u201/include/periph_conf.h +++ b/boards/ublox-c030-u201/include/periph_conf.h @@ -30,7 +30,9 @@ #endif /* The HSE provides a 12MHz clock */ -#define CLOCK_HSE MHZ(12) +#ifndef CONFIG_CLOCK_HSE +#define CONFIG_CLOCK_HSE MHZ(12) +#endif #include "periph_cpu.h" #include "clk_conf.h" diff --git a/cpu/stm32/dist/clk_conf/clk_conf.c b/cpu/stm32/dist/clk_conf/clk_conf.c index d6ba46fb61..14911c10b0 100644 --- a/cpu/stm32/dist/clk_conf/clk_conf.c +++ b/cpu/stm32/dist/clk_conf/clk_conf.c @@ -454,7 +454,9 @@ int main(int argc, char **argv) printf("#define CLOCK_CORECLOCK (%uU)\n", coreclock); printf("/* 0: no external high speed crystal available\n" " * else: actual crystal frequency [in Hz] */\n" - "#define CLOCK_HSE (%uU)\n", pll_src ? pll_in : 0); + "#ifndef CONFIG_CLOCK_HSE\n" + "#define CONFIG_CLOCK_HSE (%uU)\n", pll_src ? pll_in : 0); + printf("#endif\n"); printf("/* 0: no external low speed crystal available,\n" " * 1: external crystal available (always 32.768kHz) */\n" "#define CLOCK_LSE (%uU)\n", is_lse); diff --git a/cpu/stm32/doc.txt b/cpu/stm32/doc.txt index cfd065f3e1..88f5fee815 100644 --- a/cpu/stm32/doc.txt +++ b/cpu/stm32/doc.txt @@ -21,7 +21,7 @@ system clock (but only one can be used at a time): - HSE (High Speed External): HSE depends on the board configuration and its presence is specified by the `CONFIG_BOARD_HAS_HSE` constant at board level. - The `CLOCK_HSE` constant specifies the frequency of the external oscillator + The `CONFIG_CLOCK_HSE` constant specifies the frequency of the external oscillator in Hz. To use HSE as system clock (SYSCLK), set `CONFIG_USE_CLOCK_HSE` constant to 1; diff --git a/cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1.h b/cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1.h index 119b46b6fc..f6b2aaf4f2 100644 --- a/cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1.h +++ b/cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1.h @@ -55,22 +55,24 @@ extern "C" { #error "Cannot use HSI as clock source with other clock configurations" #endif -#ifndef CLOCK_HSE +#ifndef CONFIG_CLOCK_HSE #if defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4) || \ defined(CPU_FAM_STM32MP1) -#define CLOCK_HSE MHZ(24) +#define CONFIG_CLOCK_HSE MHZ(24) #else -#define CLOCK_HSE MHZ(8) +#define CONFIG_CLOCK_HSE MHZ(8) #endif #endif +#ifndef CONFIG_CLOCK_HSI #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \ defined(CPU_FAM_STM32F3) -#define CLOCK_HSI MHZ(8) +#define CONFIG_CLOCK_HSI MHZ(8) #elif defined(CPU_FAM_STM32MP1) -#define CLOCK_HSI MHZ(64) +#define CONFIG_CLOCK_HSI MHZ(64) #else -#define CLOCK_HSI MHZ(16) +#define CONFIG_CLOCK_HSI MHZ(16) +#endif #endif /** @} */ diff --git a/cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx.h b/cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx.h index 9a7a6ae9df..0703081a22 100644 --- a/cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx.h +++ b/cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx.h @@ -66,15 +66,17 @@ extern "C" { #error "Cannot use HSI as clock source with other clock configurations" #endif -#ifndef CLOCK_HSE +#ifndef CONFIG_CLOCK_HSE #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) -#define CLOCK_HSE MHZ(24) +#define CONFIG_CLOCK_HSE MHZ(24) #else -#define CLOCK_HSE MHZ(8) +#define CONFIG_CLOCK_HSE MHZ(8) #endif #endif -#define CLOCK_HSI MHZ(16) +#ifndef CONFIG_CLOCK_HSI +#define CONFIG_CLOCK_HSI MHZ(16) +#endif #ifndef CONFIG_CLOCK_MSI #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) diff --git a/cpu/stm32/include/clk/f0f1f3/cfg_clock_default.h b/cpu/stm32/include/clk/f0f1f3/cfg_clock_default.h index 072cecd73f..4f27d93feb 100644 --- a/cpu/stm32/include/clk/f0f1f3/cfg_clock_default.h +++ b/cpu/stm32/include/clk/f0f1f3/cfg_clock_default.h @@ -34,7 +34,7 @@ extern "C" { * @name F0/F1/F3 clock settings * @{ */ -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE < MHZ(4) || CLOCK_HSE > MHZ(32)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE < MHZ(4) || CONFIG_CLOCK_HSE > MHZ(32)) #error "HSE clock frequency must be between 4MHz and 32MHz" #endif @@ -50,7 +50,7 @@ extern "C" { PLL_MUL to 16, so system clock = (HSI8 / 2) * 16 = 64MHz */ #ifndef CONFIG_CLOCK_PLL_PREDIV -#if (IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(16))) || \ +#if (IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(16))) || \ defined(CPU_LINE_STM32F303x6) || defined(CPU_LINE_STM32F303x8) || \ defined(CPU_LINE_STM32F303xB) || defined(CPU_LINE_STM32F303xC) || \ defined(CPU_LINE_STM32F328x8) || defined(CPU_LINE_STM32F358xC) || \ @@ -77,19 +77,19 @@ extern "C" { #endif /* CONFIG_CLOCK_PLL_MUL */ #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) #if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE) #error "The board doesn't provide an HSE oscillator" #endif -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL) #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) -#define CLOCK_PLL_SRC (CLOCK_HSE) -#else /* CLOCK_HSI */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) +#else /* CONFIG_CLOCK_HSI */ +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif /* PLL configuration: make sure your values are legit! * diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default.h index ae87d7f527..46d6c81fef 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default.h @@ -51,19 +51,19 @@ * @{ */ #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) -#define CLOCK_PLL_SRC (CLOCK_HSE) -#else /* CLOCK_HSI */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) +#else /* CONFIG_CLOCK_HSI */ +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) #if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE) #error "The board doesn't provide an HSE oscillator" #endif -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL) #define CLOCK_CORECLOCK (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_P) diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_100.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_100.h index 6187b671e7..400b37fa29 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_100.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_100.h @@ -37,7 +37,7 @@ extern "C" { decreased to 96MHZ so the PLLQ can output 48MHz. */ #ifndef CONFIG_CLOCK_PLL_M -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_M (25) #else #define CONFIG_CLOCK_PLL_M (4) @@ -45,17 +45,17 @@ extern "C" { #endif #ifndef CONFIG_CLOCK_PLL_N #if IS_USED(MODULE_PERIPH_USBDEV_CLK) && defined(CPU_LINE_STM32F411xE) -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (96) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_N (192) #else #define CONFIG_CLOCK_PLL_N (48) #endif #else -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (100) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_N (200) #else #define CONFIG_CLOCK_PLL_N (50) diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_120.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_120.h index 74b96a87cc..6e5a0a8e82 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_120.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_120.h @@ -37,7 +37,7 @@ extern "C" { #define CONFIG_CLOCK_PLL_M (4) #endif #ifndef CONFIG_CLOCK_PLL_N -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (120) #else #define CONFIG_CLOCK_PLL_N (60) diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h index cc6f137245..de4bec1e19 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_180.h @@ -37,9 +37,9 @@ extern "C" { decreased to 168MHZ so the PLLQ can output 48MHz. */ #ifndef CONFIG_CLOCK_PLL_M -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(12)) #define CONFIG_CLOCK_PLL_M (12) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(16)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(16)) #define CONFIG_CLOCK_PLL_M (16) #else #define CONFIG_CLOCK_PLL_M (4) @@ -51,19 +51,19 @@ extern "C" { defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F417xx) || \ defined(CPU_LINE_STM32F427xx) || defined(CPU_LINE_STM32F429xx) || \ defined(CPU_LINE_STM32F437xx) || defined(CPU_LINE_STM32F439xx)) -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (168) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12) || \ - (CLOCK_HSE == MHZ(16))) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(12) || \ + (CONFIG_CLOCK_HSE == MHZ(16))) #define CONFIG_CLOCK_PLL_N (336) #else #define CONFIG_CLOCK_PLL_N (84) #endif #else -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (180) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(12) || \ - (CLOCK_HSE == MHZ(16))) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(12) || \ + (CONFIG_CLOCK_HSE == MHZ(16))) #define CONFIG_CLOCK_PLL_N (360) #else #define CONFIG_CLOCK_PLL_N (90) diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_216.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_216.h index 55e3bf338e..022ed32fab 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_216.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_216.h @@ -34,16 +34,16 @@ extern "C" { /* The following parameters configure a 216MHz system clock with HSE (8MHz, 16MHz or 25MHz) or HSI (16MHz) as PLL input clock */ #ifndef CONFIG_CLOCK_PLL_M -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_M (25) #else #define CONFIG_CLOCK_PLL_M (4) #endif #endif #ifndef CONFIG_CLOCK_PLL_N -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_N (432) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (216) #else #define CONFIG_CLOCK_PLL_N (108) diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h index 66137a3bcd..eb03e49e7e 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h @@ -34,16 +34,16 @@ extern "C" { /* The following parameters configure a 84MHz system clock with HSE (8MHz, 16MHz or 25MHz) or HSI (16MHz) as PLL input clock */ #ifndef CONFIG_CLOCK_PLL_M -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_M (25) #else #define CONFIG_CLOCK_PLL_M (4) #endif #endif #ifndef CONFIG_CLOCK_PLL_N -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (168) -#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(25)) #define CONFIG_CLOCK_PLL_N (336) #else #define CONFIG_CLOCK_PLL_N (84) diff --git a/cpu/stm32/include/clk/g0g4/cfg_clock_default.h b/cpu/stm32/include/clk/g0g4/cfg_clock_default.h index 07c22fcf05..7facc82ebb 100644 --- a/cpu/stm32/include/clk/g0g4/cfg_clock_default.h +++ b/cpu/stm32/include/clk/g0g4/cfg_clock_default.h @@ -32,7 +32,7 @@ extern "C" { * * @{ */ -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE < MHZ(4) || CLOCK_HSE > MHZ(48)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE < MHZ(4) || CONFIG_CLOCK_HSE > MHZ(48)) #error "HSE clock frequency must be between 4MHz and 48MHz" #endif @@ -43,9 +43,9 @@ extern "C" { #endif #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) -#define CLOCK_PLL_SRC (CLOCK_HSE) -#else /* CLOCK_HSI */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) +#else /* CONFIG_CLOCK_HSI */ +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif /* The following parameters configure a 64MHz system clock with HSI as input clock */ @@ -73,16 +73,16 @@ extern "C" { #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) #ifdef CPU_FAM_STM32G0 -#define CLOCK_CORECLOCK (CLOCK_HSI / CONFIG_CLOCK_HSISYS_DIV) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI / CONFIG_CLOCK_HSISYS_DIV) #else -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #endif #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) #if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE) #error "The board doesn't provide an HSE oscillator" #endif -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL) #define CLOCK_CORECLOCK \ diff --git a/cpu/stm32/include/clk/l0l1/cfg_clock_default.h b/cpu/stm32/include/clk/l0l1/cfg_clock_default.h index f60062972b..bdb0c092c8 100644 --- a/cpu/stm32/include/clk/l0l1/cfg_clock_default.h +++ b/cpu/stm32/include/clk/l0l1/cfg_clock_default.h @@ -29,7 +29,7 @@ extern "C" { * @name L0/L1 clock system configuration * @{ */ -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE < MHZ(1) || CLOCK_HSE > MHZ(24)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE < MHZ(1) || CONFIG_CLOCK_HSE > MHZ(24)) #error "HSE clock frequency must be between 1MHz and 24MHz" #endif @@ -42,25 +42,25 @@ extern "C" { #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) #if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE) #error "The board doesn't provide an HSE oscillator" #endif -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_MSI) #define CLOCK_CORECLOCK (CONFIG_CLOCK_MSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL) #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) -#if CLOCK_HSE < MHZ(2) +#if CONFIG_CLOCK_HSE < MHZ(2) #error "HSE must be greater than 2MHz when used as PLL input clock" #endif -#define CLOCK_PLL_SRC (CLOCK_HSE) -#else /* CLOCK_HSI */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) +#else /* CONFIG_CLOCK_HSI */ +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif /* CONFIG_BOARD_HAS_HSE */ /* PLL configuration: make sure your values are legit! * diff --git a/cpu/stm32/include/clk/l4l5wx/cfg_clock_default.h b/cpu/stm32/include/clk/l4l5wx/cfg_clock_default.h index 658d7d9394..89eb43735e 100644 --- a/cpu/stm32/include/clk/l4l5wx/cfg_clock_default.h +++ b/cpu/stm32/include/clk/l4l5wx/cfg_clock_default.h @@ -29,7 +29,7 @@ extern "C" { * @name L4/L5/WB clock system configuration * @{ */ -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE < MHZ(4) || CLOCK_HSE > MHZ(48)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE < MHZ(4) || CONFIG_CLOCK_HSE > MHZ(48)) #error "HSE clock frequency must be between 4MHz and 48MHz" #endif @@ -56,23 +56,23 @@ extern "C" { #if IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_MSI) #define CLOCK_PLL_SRC (CONFIG_CLOCK_MSI) #elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) -#define CLOCK_PLL_SRC (CLOCK_HSE) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) #else /* CONFIG_CLOCK_PLL_SRC_ */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif #ifndef CONFIG_CLOCK_PLL_M #if IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_MSI) #define CONFIG_CLOCK_PLL_M (6) /* MSI at 48MHz */ -#elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CLOCK_HSE == MHZ(8)) +#elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CONFIG_CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_M (1) /* HSE at 8MHz */ -#elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CLOCK_HSE == MHZ(32)) +#elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CONFIG_CLOCK_HSE == MHZ(32)) #define CONFIG_CLOCK_PLL_M (4) /* HSE at 32MHz */ #else #define CONFIG_CLOCK_PLL_M (2) /* HSI at 16MHz */ #endif #endif #ifndef CONFIG_CLOCK_PLL_N -#if IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CLOCK_HSE == MHZ(32)) +#if IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CONFIG_CLOCK_HSE == MHZ(32)) /* For STM32WL, VCO output frequency ((PLL input clock frequency / PLLM ) x PLLN ) must be between 96 and 344 MHz. PLLN can have values <=127 & >=6 */ #if IS_ACTIVE(CPU_FAM_STM32WL) @@ -81,7 +81,7 @@ extern "C" { #define CONFIG_CLOCK_PLL_N (16) #endif /* CPU_FAM_STM32WL */ #elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSI) || \ - (IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CLOCK_HSE == MHZ(16))) + (IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) && (CONFIG_CLOCK_HSE == MHZ(16))) #define CONFIG_CLOCK_PLL_N (32) #else #if defined(CPU_LINE_STM32L4A6xx) || defined(CPU_LINE_STM32L4P5xx) || \ @@ -105,10 +105,10 @@ extern "C" { #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_MSI) #define CLOCK_CORECLOCK (CONFIG_CLOCK_MSI) diff --git a/cpu/stm32/include/clk/mp1/cfg_clock_default.h b/cpu/stm32/include/clk/mp1/cfg_clock_default.h index 8dd698cb1f..8d6ba8f93e 100644 --- a/cpu/stm32/include/clk/mp1/cfg_clock_default.h +++ b/cpu/stm32/include/clk/mp1/cfg_clock_default.h @@ -28,7 +28,7 @@ #ifndef CONFIG_CLOCK_PLL_M #define CONFIG_CLOCK_PLL_M (2) #endif -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(24)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(24)) #ifndef CONFIG_CLOCK_PLL_N #define CONFIG_CLOCK_PLL_N (52) #endif @@ -75,19 +75,19 @@ * @{ */ #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) -#define CLOCK_PLL_SRC (CLOCK_HSE) -#else /* CLOCK_HSI */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) +#else /* CONFIG_CLOCK_HSI */ +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) #if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE) #error "The board doesn't provide an HSE oscillator" #endif -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL) #define CLOCK_CORECLOCK (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) \ diff --git a/cpu/stm32/include/clk/u5/cfg_clock_default.h b/cpu/stm32/include/clk/u5/cfg_clock_default.h index 87494ae205..6f29345a83 100644 --- a/cpu/stm32/include/clk/u5/cfg_clock_default.h +++ b/cpu/stm32/include/clk/u5/cfg_clock_default.h @@ -27,7 +27,7 @@ extern "C" { * @name U5 clock system configuration * @{ */ -#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE < MHZ(4) || CLOCK_HSE > MHZ(48)) +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE < MHZ(4) || CONFIG_CLOCK_HSE > MHZ(48)) #error "HSE clock frequency must be between 4MHz and 48MHz" #endif @@ -54,9 +54,9 @@ extern "C" { #if IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_MSI) #define CLOCK_PLL_SRC (CONFIG_CLOCK_MSI) #elif IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE) -#define CLOCK_PLL_SRC (CLOCK_HSE) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE) #else /* CONFIG_CLOCK_PLL_SRC_ */ -#define CLOCK_PLL_SRC (CLOCK_HSI) +#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) #endif #ifndef CONFIG_CLOCK_PLL_M #if IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_MSI) @@ -76,10 +76,10 @@ extern "C" { #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) -#define CLOCK_CORECLOCK (CLOCK_HSI) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI) #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE) -#define CLOCK_CORECLOCK (CLOCK_HSE) +#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE) #elif IS_ACTIVE(CONFIG_USE_CLOCK_MSI) #define CLOCK_CORECLOCK (CONFIG_CLOCK_MSI) diff --git a/cpu/stm32/include/tinyusb_hw_defaults.h b/cpu/stm32/include/tinyusb_hw_defaults.h index 02b20095e8..4128227552 100644 --- a/cpu/stm32/include/tinyusb_hw_defaults.h +++ b/cpu/stm32/include/tinyusb_hw_defaults.h @@ -117,7 +117,7 @@ extern "C" { * If the CMSIS defines that the internal UTMI HS PHY is used, the Synopsys DWC2 * driver needs the definition of the HSE clock value. */ -#define HSE_VALUE CLOCK_HSE +#define HSE_VALUE CONFIG_CLOCK_HSE #endif #ifdef __cplusplus diff --git a/cpu/stm32/periph/uart.c b/cpu/stm32/periph/uart.c index b18c8c3921..09484842b8 100644 --- a/cpu/stm32/periph/uart.c +++ b/cpu/stm32/periph/uart.c @@ -306,10 +306,10 @@ static inline void uart_init_usart(uart_t uart, uint32_t baudrate) switch (uart_config[uart].clk_src) { case RCC_UART35CKSELR_UART35SRC_2: /* HSI */ - clk = CLOCK_HSI; + clk = CONFIG_CLOCK_HSI; break; case RCC_UART35CKSELR_UART35SRC_4: /* HSE */ - clk = CLOCK_HSE; + clk = CONFIG_CLOCK_HSE; break; default: /* return */ return; diff --git a/cpu/stm32/stmclk/stmclk_gx.c b/cpu/stm32/stmclk/stmclk_gx.c index ded9a44a0f..9bbd6f803f 100644 --- a/cpu/stm32/stmclk/stmclk_gx.c +++ b/cpu/stm32/stmclk/stmclk_gx.c @@ -59,10 +59,10 @@ #endif #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) -#define PLL_IN CLOCK_HSE +#define PLL_IN CONFIG_CLOCK_HSE #define PLL_SRC RCC_PLLCFGR_PLLSRC_HSE #else -#define PLL_IN CLOCK_HSI +#define PLL_IN CONFIG_CLOCK_HSI #define PLL_SRC RCC_PLLCFGR_PLLSRC_HSI #endif diff --git a/dist/tools/doccheck/exclude_patterns b/dist/tools/doccheck/exclude_patterns index d2846b94fc..2e80927eab 100644 --- a/dist/tools/doccheck/exclude_patterns +++ b/dist/tools/doccheck/exclude_patterns @@ -795,7 +795,7 @@ boards/common/iotlab/include/openwsn_defs\.h:[0-9]+: warning: Member PORT_maxRxD boards/common/iotlab/include/openwsn_defs\.h:[0-9]+: warning: Member PORT_maxTxAckPrepare \(macro definition\) of file openwsn_defs\.h is not documented\. boards/common/iotlab/include/openwsn_defs\.h:[0-9]+: warning: Member PORT_maxTxDataPrepare \(macro definition\) of file openwsn_defs\.h is not documented\. boards/common/iotlab/include/periph_conf_common\.h:[0-9]+: warning: Member ADC_NUMOF \(macro definition\) of file periph_conf_common\.h is not documented\. -boards/common/iotlab/include/periph_conf_common\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf_common\.h is not documented\. +boards/common/iotlab/include/periph_conf_common\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf_common\.h is not documented\. boards/common/iotlab/include/periph_conf_common\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf_common\.h is not documented\. boards/common/iotlab/include/periph_conf_common\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf_common\.h is not documented\. boards/common/iotlab/include/periph_conf_common\.h:[0-9]+: warning: Member DMA_0_ISR \(macro definition\) of file periph_conf_common\.h is not documented\. @@ -1263,7 +1263,7 @@ boards/common/weact\-f4x1cx/include/board\.h:[0-9]+: warning: Member XTIMER_BACK boards/common/weact\-f4x1cx/include/board\.h:[0-9]+: warning: Member XTIMER_OVERHEAD \(macro definition\) of file board\.h is not documented\. boards/common/weact\-f4x1cx/include/board\.h:[0-9]+: warning: Member mtd0 \(variable\) of file board\.h is not documented\. boards/common/weact\-f4x1cx/include/periph_conf\.h:[0-9]+: warning: Member ADC_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. -boards/common/weact\-f4x1cx/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/common/weact\-f4x1cx/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/common/weact\-f4x1cx/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/common/weact\-f4x1cx/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/common/weact\-f4x1cx/include/periph_conf\.h:[0-9]+: warning: Member PWM_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. @@ -1389,7 +1389,7 @@ boards/esp32\-wrover\-kit/include/board\.h:[0-9]+: warning: Member LCD_CS \(macr boards/esp32\-wrover\-kit/include/board\.h:[0-9]+: warning: Member LCD_DC \(macro definition\) of file board\.h is not documented\. boards/esp32\-wrover\-kit/include/board\.h:[0-9]+: warning: Member LCD_RST \(macro definition\) of file board\.h is not documented\. boards/f4vi1/include/board\.h:[0-9]+: warning: Member LED_PORT \(macro definition\) of file board\.h is not documented\. -boards/f4vi1/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/f4vi1/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/f4vi1/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/f4vi1/include/periph_conf\.h:[0-9]+: warning: Member TIMER_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. boards/f4vi1/include/periph_conf\.h:[0-9]+: warning: Member TIMER_1_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -1797,7 +1797,7 @@ boards/lobaro\-lorabox/include/periph_conf\.h:[0-9]+: warning: Member uart_confi boards/lora\-e5\-dev/include/board\.h:[0-9]+: warning: Member FE_CTRL1 \(macro definition\) of file board\.h is not documented\. boards/lora\-e5\-dev/include/board\.h:[0-9]+: warning: Member FE_CTRL2 \(macro definition\) of file board\.h is not documented\. boards/lora\-e5\-dev/include/board\.h:[0-9]+: warning: Member SX126X_PARAM_SPI \(macro definition\) of file board\.h is not documented\. -boards/lora\-e5\-dev/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/lora\-e5\-dev/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/lora\-e5\-dev/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/lora\-e5\-dev/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/lora\-e5\-dev/include/periph_conf\.h:[0-9]+: warning: Member I2C_1_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -2068,7 +2068,7 @@ boards/msba2/include/periph_conf\.h:[0-9]+: warning: Member i2c_config\[\] \(var boards/msba2/include/periph_conf\.h:[0-9]+: warning: Member spi_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/msba2/include/periph_conf\.h:[0-9]+: warning: Member uart_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/msbiot/include/periph_conf\.h:[0-9]+: warning: Member ADC_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. -boards/msbiot/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/msbiot/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/msbiot/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/msbiot/include/periph_conf\.h:[0-9]+: warning: Member DAC_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. boards/msbiot/include/periph_conf\.h:[0-9]+: warning: Member DMA_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -2887,7 +2887,7 @@ boards/nucleo\-wl55jc/include/board\.h:[0-9]+: warning: Member FE_CTRL1 \(macro boards/nucleo\-wl55jc/include/board\.h:[0-9]+: warning: Member FE_CTRL2 \(macro definition\) of file board\.h is not documented\. boards/nucleo\-wl55jc/include/board\.h:[0-9]+: warning: Member FE_CTRL3 \(macro definition\) of file board\.h is not documented\. boards/nucleo\-wl55jc/include/board\.h:[0-9]+: warning: Member SX126X_PARAM_SPI \(macro definition\) of file board\.h is not documented\. -boards/nucleo\-wl55jc/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/nucleo\-wl55jc/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/nucleo\-wl55jc/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/nucleo\-wl55jc/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/nucleo\-wl55jc/include/periph_conf\.h:[0-9]+: warning: Member I2C_1_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -3125,7 +3125,7 @@ boards/p\-nucleo\-wb55/include/arduino_pinmap\.h:[0-9]+: warning: Member ARDUINO boards/p\-nucleo\-wb55/include/arduino_pinmap\.h:[0-9]+: warning: Member ARDUINO_PIN_A5 \(macro definition\) of file arduino_pinmap\.h is not documented\. boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_EXTAHB \(macro definition\) of file periph_conf\.h is not documented\. boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_EXTAHB_DIV \(macro definition\) of file periph_conf\.h is not documented\. -boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/p\-nucleo\-wb55/include/periph_conf\.h:[0-9]+: warning: Member SPI_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. @@ -3253,7 +3253,7 @@ boards/pinetime/include/periph_conf\.h:[0-9]+: warning: Member I2C_NUMOF \(macro boards/pinetime/include/periph_conf\.h:[0-9]+: warning: Member SPI_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. boards/pinetime/include/periph_conf\.h:[0-9]+: warning: Member i2c_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/pinetime/include/periph_conf\.h:[0-9]+: warning: Member spi_config\[\] \(variable\) of file periph_conf\.h is not documented\. -boards/pyboard/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/pyboard/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/pyboard/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/pyboard/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/pyboard/include/periph_conf\.h:[0-9]+: warning: Member DMA_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -4513,7 +4513,7 @@ boards/stm32f4discovery/include/periph_conf\.h:[0-9]+: warning: Member pwm_confi boards/stm32f4discovery/include/periph_conf\.h:[0-9]+: warning: Member spi_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/stm32f4discovery/include/periph_conf\.h:[0-9]+: warning: Member timer_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/stm32f4discovery/include/periph_conf\.h:[0-9]+: warning: Member uart_config\[\] \(variable\) of file periph_conf\.h is not documented\. -boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member I2C_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -4531,7 +4531,7 @@ boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member i2c_conf boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member spi_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member timer_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/stm32f723e\-disco/include/periph_conf\.h:[0-9]+: warning: Member uart_config\[\] \(variable\) of file periph_conf\.h is not documented\. -boards/stm32f769i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/stm32f769i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f769i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f769i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f769i\-disco/include/periph_conf\.h:[0-9]+: warning: Member UART_0_DMA_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -4678,7 +4678,7 @@ boards/ublox\-c030\-u201/include/board\.h:[0-9]+: warning: Member SI70XX_SAUL_IN boards/ublox\-c030\-u201/include/board\.h:[0-9]+: warning: Member UB_M_RST_PIN \(macro definition\) of group boards_ublox\-c030\-u201 is not documented\. boards/ublox\-c030\-u201/include/board\.h:[0-9]+: warning: Member UB_PWRON_PIN \(macro definition\) of group boards_ublox\-c030\-u201 is not documented\. boards/ublox\-c030\-u201/include/periph_conf\.h:[0-9]+: warning: Member ADC_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. -boards/ublox\-c030\-u201/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/ublox\-c030\-u201/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/ublox\-c030\-u201/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/ublox\-c030\-u201/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/ublox\-c030\-u201/include/periph_conf\.h:[0-9]+: warning: Member DMA_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -6343,11 +6343,11 @@ cpu/stm32/include/candev_stm32\.h:[0-9]+: warning: Member ISR_CAN3_RX0 \(macro d cpu/stm32/include/candev_stm32\.h:[0-9]+: warning: Member ISR_CAN3_RX1 \(macro definition\) of file candev_stm32\.h is not documented\. cpu/stm32/include/candev_stm32\.h:[0-9]+: warning: Member ISR_CAN3_SCE \(macro definition\) of file candev_stm32\.h is not documented\. cpu/stm32/include/candev_stm32\.h:[0-9]+: warning: Member ISR_CAN3_TX \(macro definition\) of file candev_stm32\.h is not documented\. -cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file cfg_clock_common_fx_gx_mp1\.h is not documented\. -cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1\.h:[0-9]+: warning: Member CLOCK_HSI \(macro definition\) of file cfg_clock_common_fx_gx_mp1\.h is not documented\. +cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file cfg_clock_common_fx_gx_mp1\.h is not documented\. +cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSI \(macro definition\) of file cfg_clock_common_fx_gx_mp1\.h is not documented\. cpu/stm32/include/clk/cfg_clock_common_fx_gx_mp1\.h:[0-9]+: warning: Member CONFIG_USE_CLOCK_PLL \(macro definition\) of file cfg_clock_common_fx_gx_mp1\.h is not documented\. -cpu/stm32/include/clk/cfg_clock_common_lx_wx\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file cfg_clock_common_lx_wx\.h is not documented\. -cpu/stm32/include/clk/cfg_clock_common_lx_wx\.h:[0-9]+: warning: Member CLOCK_HSI \(macro definition\) of file cfg_clock_common_lx_wx\.h is not documented\. +cpu/stm32/include/clk/cfg_clock_common_lx_wx\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file cfg_clock_common_lx_wx\.h is not documented\. +cpu/stm32/include/clk/cfg_clock_common_lx_wx\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSI \(macro definition\) of file cfg_clock_common_lx_wx\.h is not documented\. cpu/stm32/include/clk/cfg_clock_common_lx_wx\.h:[0-9]+: warning: Member CONFIG_CLOCK_MSI \(macro definition\) of file cfg_clock_common_lx_wx\.h is not documented\. cpu/stm32/include/clk/cfg_clock_common_lx_wx\.h:[0-9]+: warning: Member CONFIG_USE_CLOCK_PLL \(macro definition\) of file cfg_clock_common_lx_wx\.h is not documented\. cpu/stm32/include/clk/f0f1f3/cfg_clock_default\.h:[0-9]+: warning: Member CLOCK_AHB \(macro definition\) of file cfg_clock_default\.h is not documented\. @@ -12530,7 +12530,7 @@ boards/nucleo\-g431rb/include/periph_conf\.h:[0-9]+: warning: Member PWM_NUMOF \ boards/nucleo\-g431rb/include/periph_conf\.h:[0-9]+: warning: Member pwm_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. -boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member DMA_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member DMA_1_ISR \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member DMA_NUMOF \(macro definition\) of file periph_conf\.h is not documented\. @@ -12551,7 +12551,7 @@ boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member ADC_NUMO boards/stm32f469i\-disco/include/periph_conf\.h:[0-9]+: warning: Member adc_config\[\] \(variable\) of file periph_conf\.h is not documented\. boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_LSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_BOARD_HAS_HSE \(macro definition\) of file periph_conf\.h is not documented\. -boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. +boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member DMA_0_ISR \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member DMA_1_ISR \(macro definition\) of file periph_conf\.h is not documented\. boards/stm32f746g\-disco/include/periph_conf\.h:[0-9]+: warning: Member DMA_2_ISR \(macro definition\) of file periph_conf\.h is not documented\. @@ -12617,8 +12617,8 @@ cpu/stm32/include/clk/u5/cfg_clock_default\.h:[0-9]+: warning: Member CONFIG_CLO cpu/stm32/include/clk/u5/cfg_clock_default\.h:[0-9]+: warning: Member CLOCK_APB1 \(macro definition\) of file cfg_clock_default\.h is not documented\. cpu/stm32/include/clk/u5/cfg_clock_default\.h:[0-9]+: warning: Member CONFIG_CLOCK_APB2_DIV \(macro definition\) of file cfg_clock_default\.h is not documented\. cpu/stm32/include/clk/u5/cfg_clock_default\.h:[0-9]+: warning: Member CLOCK_APB2 \(macro definition\) of file cfg_clock_default\.h is not documented\. -cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx\.h:[0-9]+: warning: Member CLOCK_HSE \(macro definition\) of file cfg_clock_common_lx_u5_wx\.h is not documented\. -cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx\.h:[0-9]+: warning: Member CLOCK_HSI \(macro definition\) of file cfg_clock_common_lx_u5_wx\.h is not documented\. +cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSE \(macro definition\) of file cfg_clock_common_lx_u5_wx\.h is not documented\. +cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx\.h:[0-9]+: warning: Member CONFIG_CLOCK_HSI \(macro definition\) of file cfg_clock_common_lx_u5_wx\.h is not documented\. cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx\.h:[0-9]+: warning: Member CONFIG_CLOCK_MSI \(macro definition\) of file cfg_clock_common_lx_u5_wx\.h is not documented\. cpu/stm32/include/clk/cfg_clock_common_lx_u5_wx\.h:[0-9]+: warning: Member CONFIG_USE_CLOCK_PLL \(macro definition\) of file cfg_clock_common_lx_u5_wx\.h is not documented\. drivers/ft5x06/include/ft5x06_params\.h:[0-9]+: warning: Member FT5X06_PARAM_I2C_DEV \(macro definition\) of file ft5x06_params\.h is not documented\. diff --git a/drivers/usbdev_synopsys_dwc2/usbdev_synopsys_dwc2.c b/drivers/usbdev_synopsys_dwc2/usbdev_synopsys_dwc2.c index 92a8220708..cc54be2881 100644 --- a/drivers/usbdev_synopsys_dwc2/usbdev_synopsys_dwc2.c +++ b/drivers/usbdev_synopsys_dwc2/usbdev_synopsys_dwc2.c @@ -768,7 +768,7 @@ static void _usbdev_init(usbdev_t *dev) _global_regs(usbdev->config)->GCCFG |= USB_OTG_GCCFG_PHYHSEN; /* determine the PLL input clock of the USB HS PHY from HSE clock */ - switch (CLOCK_HSE) { + switch (CONFIG_CLOCK_HSE) { case 12000000: USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL1_PLLSEL_12MHZ; break;