mirror of
https://github.com/RIOT-OS/RIOT.git
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initial commit for TelosB support
This commit is contained in:
Oleg Hahm
parent
eeb8c60e7e
commit
1ada39d7fd
33
telosb/Makefile
Normal file
33
telosb/Makefile
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@ -0,0 +1,33 @@
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SRC = $(wildcard *.c)
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BINDIR = bin/
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OBJ = $(SRC:%.c=$(BINDIR)%.o)## defines
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export ARCH = telosb_base.a
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DEP = $(SRC:%.c=$(BINDIR)%.d)
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INCLUDES += -I${RIOTBASE}/core/include/
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INCLUDES += -I$(RIOTBASE)/cpu/msp430-common/include/ -I$(RIOTBASE)/cpu/msp430x16x/include/
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INCLUDES += -I$(RIOTBASE)/drivers/cc2420/include/ -I$(RIOTBASE)/sys/include
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INCLUDES += -I$(RIOTBASE)/sys/net/
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all: $(BINDIR)$(ARCH)
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$(BINDIR)$(ARCH): $(OBJ)
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$(AR) rcs $(BINDIR)$(ARCH) $(OBJ)
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# pull in dependency info for *existing* .o files
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-include $(OBJ:.o=.d)
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# compile and generate dependency info
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$(BINDIR)%.o: %.c
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mkdir -p $(BINDIR)
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$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o
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$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d
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@printf "$(BINDIR)"|cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d
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# remove compilation products
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clean:
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rm -f $(BINDIR)$(ARCH) $(OBJ) $(DEP)
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@if [ -d $(BINDIR) ] ; \
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then rmdir $(BINDIR) ; \
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fi
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2
telosb/Makefile.dep
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2
telosb/Makefile.dep
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@ -0,0 +1,2 @@
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USEMODULE += msp430_common
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25
telosb/Makefile.include
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25
telosb/Makefile.include
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include $(RIOTBOARD)/$(BOARD)/Makefile.dep
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## the cpu to build for
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export CPU = msp430x16x
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export MCU = msp430f1611
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# toolchain config
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export PREFIX = @msp430-
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export CC = @$(PREFIX)gcc
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export AR = @$(PREFIX)ar
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export CFLAGS += -std=gnu99 -Wstrict-prototypes -gdwarf-2 -Os -Wall -mmcu=$(MCU)
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export ASFLAGS += -mmcu=$(MCU) --defsym $(MCU)=1 --gdwarf-2
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export AS = $(PREFIX)as
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export LINK = $(PREFIX)gcc
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export SIZE = $(PREFIX)size
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export OBJCOPY = $(PREFIX)objcopy
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export LINKFLAGS = -mmcu=$(MCU) -lgcc $(RIOTBASE)/bin/startup.o
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export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm.py
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export FLASHER = goodfet.bsl
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ifeq ($(strip $(PORT)),)
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export PORT = /dev/ttyUSB0
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endif
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export HEXFILE = bin/$(PROJECT).hex
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export FFLAGS = --telosb -c $(PORT) -r -e -I -p $(HEXFILE)
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export INCLUDES += -I $(RIOTCPU)/msp430-common/include/
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127
telosb/board.c
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127
telosb/board.c
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/*
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* board.c - Board initiazilation for the TelosB
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* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
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*
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* This file subject to the terms and conditions of the GLGPLv2 License. See the file LICENSE in the
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* top level directory for more details.
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*/
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#include "cpu.h"
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#include "board.h"
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void uart_init(void);
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static void telosb_ports_init(void)
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{
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/* Port 1: GDO, Flash, BSL TX */
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P1SEL = 0x02; /* Port1 Select: 00000010 = 0x02 */
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P1OUT = 0x00; /* Port1 Output: 00000000 = 0x00 */
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P1DIR = 0x87; /* Port1 Direction: 10000111 = 0x87 */
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/* Port 2: GPIO, BSL RX, 1wire */
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P2SEL = 0x04; /* Port2 Select: 00000100 = 0x04 */
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P2OUT = 0x00; /* Port2 Output: 00000000 = 0x00 */
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P2DIR = 0xFF; /* Port2 Direction: 11111111 = 0xFF */
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/* Port 3: UART and SPI */
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P3SEL = 0xCE; /* Port3 Select: 11001110 = 0xCE */
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P3OUT = 0x00; /* Port3 Output: 00000000 = 0x00 */
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P3DIR = 0x4E; /* Port3 Direction: 01001110 = 0x4E */
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/* Port 4: CS */
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P4SEL = 0x02; /* Port4 Select: 00000010 = 0x02 */
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P4OUT = 0x04; /* Port4 Output: 00000100 = 0x04 */
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P4DIR = 0x64; /* Port4 Direction: 01100100 = 0x64 */
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/* Port 5: SPI, LED */
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P5SEL = 0x00; /* Port5 Select: 00000000 = 0x00 */
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P5OUT = 0x70; /* Port5 Output: 01110000 = 0x70 */
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P5DIR = 0x70; /* Port5 Direction: 01110000 = 0x70 */
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P6SEL = 0xFF; /* Port6 Select: 11111111 = 0xFF */
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P6OUT = 0x00; /* Port6 Output: 00000000 = 0x00 */
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P6DIR = 0xFF; /* Port6 Direction: 11111000 = 0xFF */
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}
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/*---------------------------------------------------------------------------*/
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/* taken from Contiki code */
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void msp430_init_dco(void)
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{
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/* This code taken from the FU Berlin sources and reformatted. */
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#define DELTA (F_CPU / (F_RC_OSCILLATOR / 8))
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unsigned int compare, oldcapture = 0;
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unsigned int i;
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/* 10100100 = XT2 is off, ACLK divided by 4, RSELx=4 */
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BCSCTL1 = XT2OFF | DIVA_2 | RSEL2;
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/* Init undivided DCO with internal resistor for MCLK and SMCLK
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* DCO = 32762Hz -> FLL = 2,4576 MHz */
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BCSCTL2 = 0x00;
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BCSCTL1 |= DIVA1 + DIVA0; /* ACLK = LFXT1CLK/8 */
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for (i = 0xFFFF; i > 0; i--) { /* Delay for XTAL to settle */
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asm("nop");
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}
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CCTL2 = CCIS0 + CM0 + CAP; /* Define CCR2, CAP, ACLK */
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TACTL = TASSEL1 + TACLR + MC1; /* SMCLK, continous mode */
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while (1) {
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while ((CCTL2 & CCIFG) != CCIFG); /* Wait until capture occured!*/
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CCTL2 &= ~CCIFG; /* Capture occured, clear flag */
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compare = CCR2; /* Get current captured SMCLK */
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compare = compare - oldcapture; /* SMCLK difference */
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oldcapture = CCR2; /* Save current captured SMCLK */
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if (DELTA == compare) {
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break; /* if equal, leave "while (1)" */
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}
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else if (DELTA < compare) { /* DCO is too fast, slow it down */
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DCOCTL--;
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if (DCOCTL == 0xFF) { /* Did DCO role under? */
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BCSCTL1--;
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}
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}
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else { /* -> Select next lower RSEL */
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DCOCTL++;
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if (DCOCTL == 0x00) { /* Did DCO role over? */
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BCSCTL1++;
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}
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/* -> Select next higher RSEL */
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}
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}
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CCTL2 = 0; /* Stop CCR2 function */
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TACTL = 0; /* Stop Timer_A */
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BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
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}
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//=========================== public ==========================================
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void board_init(void)
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{
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msp430_cpu_init();
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/* disable watchdog timer */
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WDTCTL = WDTPW + WDTHOLD;
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telosb_ports_init();
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msp430_init_dco();
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/* initialize bsp modules */
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uart_init();
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/* enable interrupts */
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__bis_SR_register(GIE);
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}
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13
telosb/include/board-conf.h
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13
telosb/include/board-conf.h
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/**
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* board-conf.h.
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*
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* This source code is licensed under the GNU Lesser General Public License,
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* Version 2. See the file LICENSE for more details.
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*/
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#ifndef BOARD_CONF_H
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#define BOARD_CONF_H
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#define INFOMEM (0x1000)
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#endif /* BOARD-CONF_H */
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58
telosb/include/board.h
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58
telosb/include/board.h
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/**
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* board.h - TelosB Board.
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* Copyright (C) 2013 INRIA
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*
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* This source code is licensed under the GNU Lesser General Public License,
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* Version 2. See the file LICENSE for more details.
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*/
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#ifndef _TELOSB_BOARD_H
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#define _TELOSB_BOARD_H
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/**
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* @defgroup TelosB
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* @ingroup TelosB
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*
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<h2>Compontents</h2>
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\li MSP430
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\li CC2420
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* @{
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*/
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/**
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* @file
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* @brief TelosB Board
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*
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* @author Oliver Hahm <oliver.hahm@inria.fr>
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*
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*/
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//MSB430 core
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#define MSP430_INITIAL_CPU_SPEED 800000uL
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#define MSP430_HAS_DCOR 0
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#define MSP430_HAS_EXTERNAL_CRYSTAL 1
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/* LEDs ports MSB430 */
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#define LEDS_PxDIR P5DIR
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#define LEDS_PxOUT P5OUT
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#define LEDS_CONF_RED 0x10
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#define LEDS_CONF_GREEN 0x20
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#define LEDS_CONF_BLUE 0x40
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#define LED_RED_ON LEDS_PxOUT &=~LEDS_CONF_RED
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#define LED_RED_OFF LEDS_PxOUT |= LEDS_CONF_RED
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#define LED_RED_TOGGLE LEDS_PxOUT ^= LEDS_CONF_RED
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#define LED_GREEN_ON LEDS_PxOUT &=~LEDS_CONF_GREEN
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#define LED_GREEN_OFF LEDS_PxOUT |= LEDS_CONF_GREEN
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#define LED_GREEN_TOGGLE LEDS_PxOUT ^= LEDS_CONF_GREEN
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#define LED_BLUE_ON LEDS_PxOUT &=~LEDS_CONF_BLUE
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#define LED_BLUE_OFF LEDS_PxOUT |= LEDS_CONF_BLUE
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#define LED_BLUE_TOGGLE LEDS_PxOUT ^= LEDS_CONF_BLUE
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#include <msp430x16x.h>
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/** @} */
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#endif // _TELOSB_BOARD_H
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45
telosb/uart.c
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45
telosb/uart.c
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/*
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* uart.c - Implementation for the TelosB UART
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* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
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*
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* This file subject to the terms and conditions of the GLGPLv2 License. See the file LICENSE in the
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* top level directory for more details.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include "cpu.h"
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#include "board.h"
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#include "kernel.h"
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#define UART1_TX U1TXBUF
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#define UART1_WAIT_TXDONE() while ( (U1TCTL & TXEPT) == 0 ) { _NOP(); }
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#define BAUDRATE (115200ul)
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void uart_init(void)
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{
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UCTL1 = SWRST; /* hold UART1 module in reset */
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UCTL1 |= CHAR; /* 8-bit character */
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/* 115200 baud, clocked from 4.8MHz SMCLK */
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UTCTL1 |= SSEL1; /* UCLK = SCLK */
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UBR01 = F_CPU / BAUDRATE;
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UBR11 = (F_CPU / BAUDRATE) >> 8;
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UMCTL1 = 0x4A; /* modulation */
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ME2 |= UTXE1 + URXE1; /* enable UART1 TX/RX */
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UCTL1 &= ~SWRST; /* clear UART1 reset bit */
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}
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int putchar(int c)
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{
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UART1_TX = c;
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UART1_WAIT_TXDONE();
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return c;
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}
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uint8_t uart_readByte(void)
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{
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return U1RXBUF;
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}
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