diff --git a/cpu/nrf51/periph/uart.c b/cpu/nrf51/periph/uart.c deleted file mode 100644 index f5f8432bee..0000000000 --- a/cpu/nrf51/periph/uart.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Copyright (C) 2014-2015 Freie Universität Berlin - * - * This file is subject to the terms and conditions of the GNU Lesser General - * Public License v2.1. See the file LICENSE in the top level directory for more - * details. - */ - -/** - * @ingroup cpu_nrf51822 - * @{ - * - * @file - * @brief Low-level UART driver implementation - * - * @author Christian Kühling - * @author Timo Ziegler - * @author Hauke Petersen - * - * @} - */ - -#include - -#include "cpu.h" -#include "thread.h" -#include "sched.h" -#include "periph/uart.h" - -/** - * @brief Data structure holding the callbacks and argument for each UART device - */ -static uart_isr_ctx_t uart_config; - -/** - * @brief Allocate memory to store the callback functions. - */ -int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) -{ - if (uart != 0) { - return -1; - } - - /* remember callback addresses and argument */ - uart_config.rx_cb = rx_cb; - uart_config.arg = arg; - - /* power on the UART device */ - NRF_UART0->POWER = 1; - /* reset configuration registers */ - NRF_UART0->CONFIG = 0; - /* configure RX/TX pin modes */ - NRF_GPIO->DIRSET = (1 << UART_PIN_TX); - NRF_GPIO->DIRCLR = (1 << UART_PIN_RX); - /* configure UART pins to use */ - NRF_UART0->PSELTXD = UART_PIN_TX; - NRF_UART0->PSELRXD = UART_PIN_RX; - /* enable HW-flow control if defined */ -#if UART_HWFLOWCTRL - /* set pin mode for RTS and CTS pins */ - NRF_GPIO->DIRSET = (1 << UART_PIN_RTS); - NRF_GPIO->DIRSET = (1 << UART_PIN_CTS); - /* configure RTS and CTS pins to use */ - NRF_UART0->PSELRTS = UART_PIN_RTS; - NRF_UART0->PSELCTS = UART_PIN_CTS; - NRF_UART0->CONFIG |= UART_CONFIG_HWFC_Msk; /* enable HW flow control */ -#else - NRF_UART0->PSELRTS = 0xffffffff; /* pin disconnected */ - NRF_UART0->PSELCTS = 0xffffffff; /* pin disconnected */ -#endif - - /* select baudrate */ - switch (baudrate) { - case 1200: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1200; - break; - case 2400: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud2400; - break; - case 4800: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud4800; - break; - case 9600: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud9600; - break; - case 14400: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud14400; - break; - case 19200: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud19200; - break; - case 28800: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud28800; - break; - case 38400: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud38400; - break; - case 57600: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud57600; - break; - case 76800: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud76800; - break; - case 115200: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud115200; - break; - case 230400: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud230400; - break; - case 250000: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud250000; - break; - case 460800: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud460800; - break; - case 921600: - NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud921600; - break; - default: - return -2; - } - - /* enable the UART device */ - NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Enabled; - /* enable TX and RX */ - NRF_UART0->TASKS_STARTTX = 1; - NRF_UART0->TASKS_STARTRX = 1; - /* enable global and receiving interrupt */ - NVIC_EnableIRQ(UART0_IRQn); - NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk; - return 0; -} - -void uart_write(uart_t uart, const uint8_t *data, size_t len) -{ - if (uart == 0) { - for (size_t i = 0; i < len; i++) { - /* write data into transmit register */ - NRF_UART0->TXD = data[i]; - /* wait for any transmission to be done */ - while (NRF_UART0->EVENTS_TXDRDY == 0); - /* reset ready flag */ - NRF_UART0->EVENTS_TXDRDY = 0; - } - } -} - -void uart_poweron(uart_t uart) -{ - if (uart == 0) { - NRF_UART0->POWER = 1; - } -} - -void uart_poweroff(uart_t uart) -{ - if (uart == 0) { - NRF_UART0->POWER = 0; - } -} - -void isr_uart0(void) -{ - if (NRF_UART0->EVENTS_RXDRDY == 1) { - NRF_UART0->EVENTS_RXDRDY = 0; - char byte = (char)(NRF_UART0->RXD & 0xff); - uart_config.rx_cb(uart_config.arg, byte); - } - if (sched_context_switch_request) { - thread_yield(); - } -} diff --git a/cpu/nrf5x_common/include/periph_cpu.h b/cpu/nrf5x_common/include/periph_cpu.h index 304307f860..58a745c025 100644 --- a/cpu/nrf5x_common/include/periph_cpu.h +++ b/cpu/nrf5x_common/include/periph_cpu.h @@ -26,15 +26,20 @@ extern "C" { #endif /** - * @brief Use base register as defined by the CPU family + * @brief Iron out some differences in register and IRQ channel naming between + * the different nRFx family members + * @{ */ #if defined(CPU_FAM_NRF51) #define GPIO_BASE (NRF_GPIO) +#define UART_IRQN (UART0_IRQn) #elif defined(CPU_FAM_NRF52) #define GPIO_BASE (NRF_P0) +#define UART_IRQN (UARTE0_UART0_IRQn) #else -#error "nrf5x_common/periph/gpio: no valid CPU_FAM defined" +#error "nrf5x_common: no valid value for CPU_FAM_XX defined" #endif +/** @} */ /** * @brief Length of the CPU_ID in octets diff --git a/cpu/nrf52/periph/uart.c b/cpu/nrf5x_common/periph/uart.c similarity index 87% rename from cpu/nrf52/periph/uart.c rename to cpu/nrf5x_common/periph/uart.c index 8a27ec6434..42aaf6c309 100644 --- a/cpu/nrf52/periph/uart.c +++ b/cpu/nrf5x_common/periph/uart.c @@ -1,6 +1,7 @@ /* - * Copyright (C) 2015 Jan Wagner - * 2016 Freie Universität Berlin + * Copyright (C) 2014-2016 Freie Universität Berlin + * 2015 Jan Wagner + * * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level @@ -8,12 +9,14 @@ */ /** - * @ingroup cpu_nrf52 + * @ingroup cpu_nrf5x_common * @{ * * @file * @brief Implementation of the peripheral UART interface * + * @author Christian Kühling + * @author Timo Ziegler * @author Hauke Petersen * @author Jan Wagner * @@ -23,14 +26,15 @@ #include #include "cpu.h" -#include "thread.h" #include "sched.h" -#include "periph_conf.h" +#include "thread.h" #include "periph/uart.h" -#include "board.h" +#include "periph_cpu.h" +#include "periph_conf.h" + /** - * @brief Allocate memory to store the callback functions. + * @brief Allocate memory for the interrupt context */ static uart_isr_ctx_t uart_config; @@ -44,19 +48,23 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) uart_config.rx_cb = rx_cb; uart_config.arg = arg; +#ifdef CPU_FAM_NRF51 + /* power on the UART device */ + NRF_UART0->POWER = 1; +#endif /* reset configuration registers */ NRF_UART0->CONFIG = 0; /* configure RX/TX pin modes */ - NRF_P0->DIRSET = (1 << UART_PIN_TX); - NRF_P0->DIRCLR = (1 << UART_PIN_RX); + GPIO_BASE->DIRSET = (1 << UART_PIN_TX); + GPIO_BASE->DIRCLR = (1 << UART_PIN_RX); /* configure UART pins to use */ NRF_UART0->PSELTXD = UART_PIN_TX; NRF_UART0->PSELRXD = UART_PIN_RX; /* enable HW-flow control if defined */ #if UART_HWFLOWCTRL /* set pin mode for RTS and CTS pins */ - NRF_P0->DIRSET = (1 << UART_PIN_RTS); - NRF_P0->DIRCLR = (1 << UART_PIN_CTS); + GPIO_BASE->DIRSET = (1 << UART_PIN_RTS); + GPIO_BASE->DIRCLR = (1 << UART_PIN_CTS); /* configure RTS and CTS pins to use */ NRF_UART0->PSELRTS = UART_PIN_RTS; NRF_UART0->PSELCTS = UART_PIN_CTS; @@ -123,7 +131,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) NRF_UART0->TASKS_STARTTX = 1; NRF_UART0->TASKS_STARTRX = 1; /* enable global and receiving interrupt */ - NVIC_EnableIRQ(UARTE0_UART0_IRQn); + NVIC_EnableIRQ(UART_IRQN); NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk; return 0; } @@ -142,7 +150,6 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len) } } - void uart_poweron(uart_t uart) { (void)uart;