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periph/spi: hotfix for power regression

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This commit is contained in:
Michael Andersen 2017-02-24 12:10:42 -08:00
parent c520a76ecd
commit 20ee531486
1 changed files with 6 additions and 5 deletions
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11
cpu/sam0_common/periph/spi.c
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@ -102,7 +102,8 @@ void spi_init(spi_t bus)
void spi_init_pins(spi_t bus)
{
gpio_init(spi_config[bus].miso_pin, GPIO_IN);
/* MISO must always have PD/PU, see #5968. This is a ~65uA difference */
gpio_init(spi_config[bus].miso_pin, GPIO_IN_PD);
gpio_init(spi_config[bus].mosi_pin, GPIO_OUT);
gpio_init(spi_config[bus].clk_pin, GPIO_OUT);
gpio_init_mux(spi_config[bus].miso_pin, spi_config[bus].miso_mux);
@ -117,6 +118,10 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
/* power on the device */
poweron(bus);
/* disable the device */
dev(bus)->CTRLA.reg &= ~(SERCOM_SPI_CTRLA_ENABLE);
while (dev(bus)->SYNCBUSY.reg & SERCOM_SPI_SYNCBUSY_ENABLE) {}
/* configure bus clock, in synchronous mode its calculated from
* BAUD.reg = (f_ref / (2 * f_bus) - 1)
* with f_ref := CLOCK_CORECLOCK as defined by the board */
@ -142,10 +147,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
void spi_release(spi_t bus)
{
/* disable device and put it back to sleep */
dev(bus)->CTRLA.reg &= ~(SERCOM_SPI_CTRLA_ENABLE);
while (dev(bus)->SYNCBUSY.reg & SERCOM_SPI_SYNCBUSY_ENABLE) {}
poweroff(bus);
/* release access to the device */
mutex_unlock(&locks[bus]);
}