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Merge pull request #21346 from crasbe/pr/stm32f2_adc
cpu/stm32f2: Fix Sampling Time for VBat
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22531e6314
@ -96,6 +96,13 @@ int adc_init(adc_t line)
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assume((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX);
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ADC->CCR = ((clk_div / 2) - 1) << 16;
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if (IS_USED(MODULE_PERIPH_VBAT)) {
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/* Set the sampling rate for the VBat channel to 112 cycles. It reads
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* correct with 84 cycles already, so this adds some margin. */
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ADC1->SMPR1 = (ADC1->SMPR1 & ~ADC_SMPR1_SMP18) | \
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(ADC_SMPR1_SMP18_2 | ADC_SMPR1_SMP18_0);
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}
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/* enable the ADC module */
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dev(line)->CR2 = ADC_CR2_ADON;
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