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drivers/at86rf2xx: adapted to SPI API changes
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610e671aac
commit
236f1edddd
@ -46,8 +46,6 @@ void at86rf2xx_setup(at86rf2xx_t *dev, const at86rf2xx_params_t *params)
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dev->idle_state = AT86RF2XX_STATE_TRX_OFF;
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dev->state = AT86RF2XX_STATE_SLEEP;
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dev->pending_tx = 0;
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/* initialise SPI */
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spi_init_master(dev->params.spi, SPI_CONF_FIRST_RISING, params->spi_speed);
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}
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void at86rf2xx_reset(at86rf2xx_t *dev)
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@ -28,32 +28,35 @@
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#include "at86rf2xx_internal.h"
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#include "at86rf2xx_registers.h"
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#define SPIDEV (dev->params.spi)
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#define CSPIN (dev->params.cs_pin)
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static inline void getbus(const at86rf2xx_t *dev)
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{
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spi_acquire(SPIDEV, CSPIN, SPI_MODE_0, dev->params.spi_clk);
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}
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void at86rf2xx_reg_write(const at86rf2xx_t *dev,
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const uint8_t addr,
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const uint8_t value)
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{
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.cs_pin);
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spi_transfer_reg(dev->params.spi,
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AT86RF2XX_ACCESS_REG | AT86RF2XX_ACCESS_WRITE | addr,
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value, 0);
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gpio_set(dev->params.cs_pin);
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spi_release(dev->params.spi);
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uint8_t reg = (AT86RF2XX_ACCESS_REG | AT86RF2XX_ACCESS_WRITE | addr);
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getbus(dev);
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spi_transfer_reg(SPIDEV, CSPIN, reg, value);
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spi_release(SPIDEV);
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}
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uint8_t at86rf2xx_reg_read(const at86rf2xx_t *dev, const uint8_t addr)
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{
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char value;
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uint8_t reg = (AT86RF2XX_ACCESS_REG | AT86RF2XX_ACCESS_READ | addr);
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uint8_t value;
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.cs_pin);
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spi_transfer_reg(dev->params.spi,
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AT86RF2XX_ACCESS_REG | AT86RF2XX_ACCESS_READ | addr,
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0, &value);
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gpio_set(dev->params.cs_pin);
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spi_release(dev->params.spi);
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getbus(dev);
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value = spi_transfer_reg(SPIDEV, CSPIN, reg, 0);
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spi_release(SPIDEV);
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return (uint8_t)value;
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return value;
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}
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void at86rf2xx_sram_read(const at86rf2xx_t *dev,
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@ -61,14 +64,13 @@ void at86rf2xx_sram_read(const at86rf2xx_t *dev,
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uint8_t *data,
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const size_t len)
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{
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.cs_pin);
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spi_transfer_reg(dev->params.spi,
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AT86RF2XX_ACCESS_SRAM | AT86RF2XX_ACCESS_READ,
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(char)offset, NULL);
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spi_transfer_bytes(dev->params.spi, NULL, (char *)data, len);
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gpio_set(dev->params.cs_pin);
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spi_release(dev->params.spi);
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uint8_t reg = (AT86RF2XX_ACCESS_SRAM | AT86RF2XX_ACCESS_READ);
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getbus(dev);
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spi_transfer_byte(SPIDEV, CSPIN, true, reg);
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spi_transfer_byte(SPIDEV, CSPIN, true, offset);
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spi_transfer_bytes(SPIDEV, CSPIN, false, NULL, data, len);
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spi_release(SPIDEV);
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}
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void at86rf2xx_sram_write(const at86rf2xx_t *dev,
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@ -76,36 +78,35 @@ void at86rf2xx_sram_write(const at86rf2xx_t *dev,
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const uint8_t *data,
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const size_t len)
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{
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.cs_pin);
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spi_transfer_reg(dev->params.spi,
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AT86RF2XX_ACCESS_SRAM | AT86RF2XX_ACCESS_WRITE,
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(char)offset, NULL);
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spi_transfer_bytes(dev->params.spi, (char *)data, NULL, len);
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gpio_set(dev->params.cs_pin);
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spi_release(dev->params.spi);
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uint8_t reg = (AT86RF2XX_ACCESS_SRAM | AT86RF2XX_ACCESS_WRITE);
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getbus(dev);
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spi_transfer_byte(SPIDEV, CSPIN, true, reg);
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spi_transfer_byte(SPIDEV, CSPIN, true, offset);
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spi_transfer_bytes(SPIDEV, CSPIN, false, data, NULL, len);
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spi_release(SPIDEV);
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}
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void at86rf2xx_fb_start(const at86rf2xx_t *dev)
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{
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.cs_pin);
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spi_transfer_byte(dev->params.spi,
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AT86RF2XX_ACCESS_FB | AT86RF2XX_ACCESS_READ,
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NULL);
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uint8_t reg = AT86RF2XX_ACCESS_FB | AT86RF2XX_ACCESS_READ;
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getbus(dev);
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spi_transfer_byte(SPIDEV, CSPIN, true, reg);
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}
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void at86rf2xx_fb_read(const at86rf2xx_t *dev,
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uint8_t *data,
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const size_t len)
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{
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spi_transfer_bytes(dev->params.spi, NULL, (char *)data, len);
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spi_transfer_bytes(SPIDEV, CSPIN, true, NULL, data, len);
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}
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void at86rf2xx_fb_stop(const at86rf2xx_t *dev)
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{
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gpio_set(dev->params.cs_pin);
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spi_release(dev->params.spi);
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/* transfer one byte (which we ignore) to release the chip select */
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spi_transfer_byte(SPIDEV, CSPIN, false, 1);
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spi_release(SPIDEV);
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}
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uint8_t at86rf2xx_get_status(const at86rf2xx_t *dev)
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@ -70,8 +70,7 @@ static int _init(netdev2_t *netdev)
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at86rf2xx_t *dev = (at86rf2xx_t *)netdev;
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/* initialise GPIOs */
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gpio_init(dev->params.cs_pin, GPIO_OUT);
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gpio_set(dev->params.cs_pin);
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spi_init_cs(dev->params.spi, dev->params.cs_pin);
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gpio_init(dev->params.sleep_pin, GPIO_OUT);
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gpio_clear(dev->params.sleep_pin);
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gpio_init(dev->params.reset_pin, GPIO_OUT);
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@ -32,10 +32,10 @@ extern "C" {
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* @{
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*/
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#ifndef AT86RF2XX_PARAM_SPI
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#define AT86RF2XX_PARAM_SPI (SPI_0)
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#define AT86RF2XX_PARAM_SPI (SPI_DEV(0))
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#endif
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#ifndef AT86RF2XX_PARAM_SPI_SPEED
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#define AT86RF2XX_PARAM_SPI_SPEED (SPI_SPEED_5MHZ)
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#ifndef AT86RF2XX_PARAM_SPI_CLK
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#define AT86RF2XX_PARAM_SPI_CLK (SPI_CLK_5MHZ)
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#endif
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#ifndef AT86RF2XX_PARAM_CS
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#define AT86RF2XX_PARAM_CS (GPIO_PIN(0, 0))
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@ -51,7 +51,7 @@ extern "C" {
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#endif
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#define AT86RF2XX_PARAMS_DEFAULT {.spi = AT86RF2XX_PARAM_SPI, \
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.spi_speed = AT86RF2XX_PARAM_SPI_SPEED, \
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.spi_clk = AT86RF2XX_PARAM_SPI_CLK, \
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.cs_pin = AT86RF2XX_PARAM_CS, \
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.int_pin = AT86RF2XX_PARAM_INT, \
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.sleep_pin = AT86RF2XX_PARAM_SLEEP, \
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@ -137,8 +137,8 @@ extern "C" {
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*/
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typedef struct at86rf2xx_params {
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spi_t spi; /**< SPI bus the device is connected to */
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spi_speed_t spi_speed; /**< SPI speed to use */
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gpio_t cs_pin; /**< GPIO pin connected to chip select */
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spi_clk_t spi_clk; /**< SPI clock speed to use */
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spi_cs_t cs_pin; /**< GPIO pin connected to chip select */
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gpio_t int_pin; /**< GPIO pin connected to the interrupt pin */
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gpio_t sleep_pin; /**< GPIO pin connected to the sleep pin */
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gpio_t reset_pin; /**< GPIO pin connected to the reset pin */
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