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cpu/nrf53: setup XL1/XL2 pins for using external 32K osc if needed

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Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
This commit is contained in:
Dylan Laduranty 2023-07-06 16:13:04 +02:00
parent 1f5414b3cd
commit 263e99384a
1 changed files with 7 additions and 0 deletions
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7
cpu/nrf53/cpu.c
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@ -61,6 +61,13 @@ static_assert((CLOCK_CORECLOCK == MHZ(128)) || CLOCK_CORECLOCK == MHZ(64));
/* For now, disable the unused network core */
NRF_RESET_S->NETWORK.FORCEOFF = 1;
#if defined(MODULE_PERIPH_RTT) && (CLOCK_LFCLK==CLOCK_LFCLKSRC_SRC_LFXO)
/* Enable P0.00 and P0.01 as XL1/XL2 if LXFO is selected */
NRF_P0_S->PIN_CNF[0] &= ~GPIO_PIN_CNF_MCUSEL_Msk;
NRF_P0_S->PIN_CNF[0] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
NRF_P0_S->PIN_CNF[1] &= ~GPIO_PIN_CNF_MCUSEL_Msk;
NRF_P0_S->PIN_CNF[1] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
#endif
/* call cortexm default initialization */
cortexm_init();