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cpu/sam3x8e: use core_panic for fault ISRs

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This commit is contained in:
haukepetersen 2015-02-15 11:20:59 +01:00
parent 4b814c79f1
commit 28655049a5
2 changed files with 15 additions and 12 deletions
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10
cpu/sam3x8e/include/cpu-conf.h
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@ -50,6 +50,16 @@ extern "C" {
#endif
/** @} */
/**
* @brief Definition of different panic modes
*/
typedef enum {
HARD_FAULT,
BUS_FAULT,
USAGE_FAULT,
DUMMY_HANDLER
} panic_t;
#ifdef __cplusplus
}
#endif

17
cpu/sam3x8e/startup.c
View File

@ -18,10 +18,9 @@
* @}
*/
#include <stdio.h>
#include <stdint.h>
#include "board.h"
#include "crash.h"
/**
* memory markers as defined in the linker script
@ -81,7 +80,7 @@ void reset_handler(void)
*/
void dummy_handler(void)
{
while (1) {asm ("nop");}
core_panic(DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
@ -101,23 +100,17 @@ void isr_debug_mon(void)
void isr_hard_fault(void)
{
puts("\n### HARD FAULT ###\n");
while (1) {
LED_RED_TOGGLE;
for (int i = 0; i < 2000000; i++) {
asm ("nop");
}
}
core_panic(HARD_FAULT, "HARD FAULT");
}
void isr_bus_fault(void)
{
while (1) {asm ("nop");}
core_panic(BUS_FAULT, "BUS FAULT");
}
void isr_usage_fault(void)
{
while (1) {asm ("nop");}
core_panic(USAGE_FAULT, "USAGE FAULT");
}
/* Cortex-M specific interrupt vectors */