From 2f8b23a596f8424b68006b9c83094c8f8a76088f Mon Sep 17 00:00:00 2001 From: crasbe Date: Mon, 18 Nov 2024 20:54:53 +0100 Subject: [PATCH] cpu/stm32l0: fix ADC initialization order --- cpu/stm32/periph/adc_l0.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/stm32/periph/adc_l0.c b/cpu/stm32/periph/adc_l0.c index e56d953f87..99fad3c70d 100644 --- a/cpu/stm32/periph/adc_l0.c +++ b/cpu/stm32/periph/adc_l0.c @@ -128,9 +128,6 @@ int32_t adc_sample(adc_t line, adc_res_t res) /* lock and power on the ADC device */ prep(); - /* Enable ADC */ - _enable_adc(); - /* Reactivate VREFINT and temperature sensor if necessary */ if (adc_config[line].chan == 17) { ADC->CCR |= ADC_CCR_VREFEN; @@ -145,6 +142,9 @@ int32_t adc_sample(adc_t line, adc_res_t res) ADC1->CFGR1 |= res & ADC_CFGR1_RES; ADC1->CHSELR = (1 << adc_config[line].chan); + /* Enable ADC */ + _enable_adc(); + /* clear flag */ ADC1->ISR |= ADC_ISR_EOC;