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Merge #19706
19706: boards/olimex-msp430-h2618: add new board r=maribu a=maribu ### Contribution description This adds support of the Olimex MSP430-H2618 board. This board has plenty of RAM and ROM for an MSP430 board (even more than the z1), but still is easily obtainable. Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de> Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
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35d3896d47
@ -28,11 +28,6 @@
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extern "C" {
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#endif
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/**
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* @brief Address of the info memory
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*/
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#define INFOMEM (0x1000)
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/**
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* @name Xtimer configuration
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* @{
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@ -1,22 +0,0 @@
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/*
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* Copyright (C) 2014 INRIA
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef BOARD_CONF_H
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#define BOARD_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define INFOMEM (0x1000)
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_CONF_H */
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18
boards/olimex-msp430-h2618/Kconfig
Normal file
18
boards/olimex-msp430-h2618/Kconfig
Normal file
@ -0,0 +1,18 @@
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# Copyright (c) 2020 HAW Hamburg
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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config BOARD
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default "olimex-msp430-h2618" if BOARD_OLIMEX_MSP430_H2618
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config BOARD_OLIMEX_MSP430_H2618
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bool
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default y
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select CPU_MODEL_MSP430F2618
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select HAS_PERIPH_GPIO
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select HAS_PERIPH_GPIO_IRQ
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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3
boards/olimex-msp430-h2618/Makefile
Normal file
3
boards/olimex-msp430-h2618/Makefile
Normal file
@ -0,0 +1,3 @@
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MODULE = board
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include $(RIOTBASE)/Makefile.base
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10
boards/olimex-msp430-h2618/Makefile.features
Normal file
10
boards/olimex-msp430-h2618/Makefile.features
Normal file
@ -0,0 +1,10 @@
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CPU = msp430fxyz
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CPU_MODEL = msp430f2618
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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26
boards/olimex-msp430-h2618/Makefile.include
Normal file
26
boards/olimex-msp430-h2618/Makefile.include
Normal file
@ -0,0 +1,26 @@
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# set default port depending on operating system
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PORT_LINUX ?= /dev/ttyUSB0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbserial-MXV*)))
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# flash tool configuration
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PROGRAMMER ?= mspdebug
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MSPDEBUG_PROGRAMMER ?= olimex
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PROGRAMMERS_SUPPORTED += mspdebug
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# When freshly plugged in the Olimex MSP430-JTAG-Tiny debugger provides a
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# ttyACM interface, which is only available until the first flashing. A
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# `make term` or even a `make flash term` may pick the JTAG debugger instead
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# of the correct USB TTL adapter when the JTAG programmer is plugged in after
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# the TTL adapter and `MOST_RECENT_PORT=1` is used.
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#
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# To fix that, we filter first by the most common USB TTL adapter drivers and
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# fall back to all TTY when no such TTL adapter is found.
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TTY_BOARD_FILTER := --driver 'cp210x|ch341|ftdi_sio'
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TTY_SELECT_CMD := $(RIOTTOOLS)/usb-serial/ttys.py \
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--most-recent \
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--format path serial \
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$(TTY_BOARD_FILTER) || \
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$(RIOTTOOLS)/usb-serial/ttys.py \
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--most-recent \
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--format path serial
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111
boards/olimex-msp430-h2618/doc.txt
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111
boards/olimex-msp430-h2618/doc.txt
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@ -0,0 +1,111 @@
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/**
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@defgroup boards_olimex_msp430_h2618 Olimex MSP430-H2618
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@ingroup boards
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@brief Support for the Olimex MSP430-H2618 board
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<img src="https://github.com/maribu/images/raw/master/Olimex%20MSP430-H2618.jpeg" alt="Photo of Olimex MSP430-H2618 Board" style="width: 512px; max-width: 100%;">
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## MCU
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| MCU | TI MSP430F2618 |
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|:----------------- |:------------------------------------------------------------- |
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| Family | MSP430 |
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| Vendor | Texas Instruments |
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| Package | 64 QFN |
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| RAM | 8 KiB |
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| Flash | 116 KiB |
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| Frequency | 16 MHz |
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| FPU | no |
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| Timers | 2 (2x 16bit) |
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| ADCs | 1x 8 channel 12-bit |
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| UARTs | 2 |
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| SPIs | 2 |
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| I2Cs | 1 |
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| Vcc | 1.8 V - 3.6 V |
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| Datasheet MCU | [Datasheet MSP430F2618] |
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| User Guide MCU | [User Guide MSP430F2xx] |
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| Datasheet Board | [Datasheet Olimex MSP430-H2618] |
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| Website | [Website Olimex MSP430-H2618] |
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[Datasheet MSP430F2618]: https://www.ti.com/lit/gpn/msp430f2618
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[User Guide MSP430F2xx]: https://www.ti.com/lit/pdf/slau144
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[Datasheet Olimex MSP430-H2618]: https://www.olimex.com/Products/MSP430/Header/MSP430-H2618/resources/MSP430-H2618.pdf
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[Website Olimex MSP430-H2618]: https://www.olimex.com/Products/MSP430/Header/MSP430-H2618/
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@warning While erasing or writing to the flash, the MCU must be powered by
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at least 2.2 V
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## Schematics
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<img src="https://raw.githubusercontent.com/maribu/images/master/Olimex%20MSP430-H2618%20Schematic.svg" alt="Schematics of the Olimex MSP430-H2618 Board" style="width: 800px; max-width: 100%;">
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## Pinout
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The 64 pins on the edges of the PCB are connected to the corresponding MCU pins.
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Hence, the following pinout of the naked MSP430-F2618 MCU chip matches the
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pinout of the header board:
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<img src="https://github.com/maribu/images/raw/master/MSP430F2618%20Pinout.svg" alt="Pinout of the naked MSP430-F2618 MCU" style="width: 800px; max-width: 100%;">
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## Flashing RIOT
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<img src="https://github.com/maribu/images/raw/master/Olimex%20MSP430-H2618%20with%20Debugger.jpeg" alt="Photo of Olimex MSP430-H2618 Board connected to a JTAG Debugger" style="width: 512px; max-width: 100%;">
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Connect the board to a JTAG debugger supported by
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[mspdebug](https://dlbeer.co.nz/mspdebug/); by default the
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Olimex MSP430-JTAG-Tiny (as shown in the picture above) is assumed, which is
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among the less expensive options.
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@note If you are not using the Olimex MSP430-JTAG-Tiny (or a compatible
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programmer), set `MSPDEBUG_PROGRAMMER` to the correct value via
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an environment variable or as parameter to make. E.g. use
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`make BOARD=olimex-msp430-h2618 MSPDEBUG_PROGRAMMER=bus-pirate` to
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flash using the bus pirate.
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@warning You can power the board via the JTAG programmer by placing a
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jumper at `P_IN`. However, the JTAG programmer will only be able
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to provide a limited current. You may want to disconnect the
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header board from devices consuming a lot of power prior to
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flashing.
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@warning If the board is powered externally, make sure to place the jumper
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in `P_OUT` position, not in `P_IN` position.
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@warning A jumper in `P_OUT` is mutually exclusive to a jumper in `P_IN`.
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Never connect both at the same time.
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@note Pin 1 on the JTAG connector has a small white triangle next to it
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and square pad, compared to the round pad used by all other JTAG
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pins.
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@warning The Olimex MSP430-JTAG-Tiny will fail to flash or debug the board
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until the latest firmware is installed. For that, install the
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Windows-only programmer software and update the DLLs files to
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contain the latest firmware as described in the website. The
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software will update the programmer upon launch.
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Once the jumper is correctly placed in either `P_IN` or in `P_OUT` and the
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JTAG cable is connected just run
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```
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make BOARD=olimex-msp430-h2618 flash
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```
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## Using the shell
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stdio is available via the UART interface with `TXD = P3.4`
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(pin 35 on the header) and `RXD = P3.5` (pin 34 on the header) at 115,200 Baud.
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The easiest way is to connect an USB TTL adapter (such as the cheap `cp210x`
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or `ch341` based adapters) as follows:
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```
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TTL adapter Olimex MSP430-H2618
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----------- -------------------
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GND --- 63 (DV_SS)
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TXD --- 33 (P3.5)
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RXD --- 32 (P3.4)
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```
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*/
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50
boards/olimex-msp430-h2618/include/board.h
Normal file
50
boards/olimex-msp430-h2618/include/board.h
Normal file
@ -0,0 +1,50 @@
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/*
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* Copyright (C) 2013, 2014 INRIA
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* 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_olimex_msp430_h2618
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*
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* @{
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*
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* @file
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* @brief Basic definitions for the Olimex MSP430-H2618 board
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*
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* @author Marian Buschsieweke <marian.buschsieweke@posteo.net>
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Define the CPU model for the <msp430.h>
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*/
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#ifndef __MSP430F2618__
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#define __MSP430F2618__
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#endif
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/**
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* @name Xtimer configuration
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* @{
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*/
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#define XTIMER_WIDTH (16)
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#define XTIMER_BACKOFF (40)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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#endif /* BOARD_H */
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99
boards/olimex-msp430-h2618/include/periph_conf.h
Normal file
99
boards/olimex-msp430-h2618/include/periph_conf.h
Normal file
@ -0,0 +1,99 @@
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/*
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* Copyright (C) 2014 INRIA
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* 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_olimex_msp430_h2618
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* @{
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*
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* @file
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* @brief Olimex-MSP430-H2618 peripheral configuration
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*
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* @author Marian Buschsieweke <marian.buschsieweke@posteo.net>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "macros/units.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CLOCK_CORECLOCK msp430_fxyz_dco_freq
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/**
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* @brief Clock configuration
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*/
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static const msp430_fxyz_clock_params_t clock_params = {
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.target_dco_frequency = MHZ(16),
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.lfxt1_frequency = 32768,
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.main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
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.submain_clock_source = SUBMAIN_CLOCK_SOURCE_DCOCLK,
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.main_clock_divier = MAIN_CLOCK_DIVIDE_BY_1,
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.submain_clock_divier = SUBMAIN_CLOCK_DIVIDE_BY_1,
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.auxiliary_clock_divier = AUXILIARY_CLOCK_DIVIDE_BY_1,
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};
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (1U)
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#define TIMER_BASE (TIMER_A)
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#define TIMER_CHAN (3)
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#define TIMER_ISR_CC0 (TIMERA0_VECTOR)
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#define TIMER_ISR_CCX (TIMERA1_VECTOR)
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/** @} */
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|
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/**
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* @name UART configuration
|
||||
* @{
|
||||
*/
|
||||
#define UART_NUMOF (1U)
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||||
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#define UART_USE_USCI
|
||||
#define UART_BASE (USCI_0)
|
||||
#define UART_IE (SFR->IE2)
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#define UART_IF (SFR->IFG2)
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#define UART_IE_RX_BIT (1 << 0)
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#define UART_IE_TX_BIT (1 << 1)
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||||
#define UART_RX_PORT ((msp_port_t *)PORT_3)
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#define UART_RX_PIN (1 << 5)
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#define UART_TX_PORT ((msp_port_t *)PORT_3)
|
||||
#define UART_TX_PIN (1 << 4)
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#define UART_RX_ISR (USCIAB0RX_VECTOR)
|
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#define UART_TX_ISR (USCIAB0TX_VECTOR)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name SPI configuration
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NUMOF (1U)
|
||||
|
||||
/* SPI configuration */
|
||||
#define SPI_USE_USCI
|
||||
#define SPI_BASE (USCI_0_B_SPI)
|
||||
#define SPI_IE (SFR->IE2)
|
||||
#define SPI_IF (SFR->IFG2)
|
||||
#define SPI_IE_RX_BIT (1 << 2)
|
||||
#define SPI_IE_TX_BIT (1 << 3)
|
||||
#define SPI_PIN_MISO GPIO_PIN(P3, 2)
|
||||
#define SPI_PIN_MOSI GPIO_PIN(P3, 1)
|
||||
#define SPI_PIN_CLK GPIO_PIN(P3, 3)
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PERIPH_CONF_H */
|
||||
/** @} */
|
||||
@ -1,22 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014 INRIA
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_CONF_H
|
||||
#define BOARD_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define INFOMEM (0x1000)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_CONF_H */
|
||||
@ -1,37 +0,0 @@
|
||||
/*
|
||||
* board-conf.h.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_CONF_H
|
||||
#define BOARD_CONF_H
|
||||
|
||||
/**
|
||||
* @ingroup boards_z1
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Zolertia Z1 board configuration macros
|
||||
*
|
||||
* @author Kévin Roussel <Kevin.Roussel@inria.fr>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define INFOMEM (0x1000)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
#endif /* BOARD_CONF_H */
|
||||
@ -42,6 +42,9 @@ extern "C" {
|
||||
#elif defined (CPU_MODEL_MSP430F2617)
|
||||
#define CPU_FLASH_BASE (0x3200) /* first sector is only 256 byte, skip it*/
|
||||
#define FLASHPAGE_NUMOF (103U) /* we can currently only access 51.5K */
|
||||
#elif defined (CPU_MODEL_MSP430F2618)
|
||||
#define CPU_FLASH_BASE (0x3200) /* first sector is only 256 byte, skip it*/
|
||||
#define FLASHPAGE_NUMOF (103U) /* we can currently only access 51.5K */
|
||||
#elif defined (CPU_MODEL_CC430F6137)
|
||||
#define CPU_FLASH_BASE (0x8000)
|
||||
#define FLASHPAGE_NUMOF (64U) /* 32K */
|
||||
|
||||
3
cpu/msp430_common/ldscripts/riot-msp430f2618.ld
Normal file
3
cpu/msp430_common/ldscripts/riot-msp430f2618.ld
Normal file
@ -0,0 +1,3 @@
|
||||
INCLUDE msp430f2618.ld
|
||||
INCLUDE msp430_common.ld
|
||||
INCLUDE xfa.ld
|
||||
@ -1,6 +1,42 @@
|
||||
Build 1.212 (GCC)
|
||||
=================
|
||||
07/19/2021
|
||||
|
||||
New device support:
|
||||
------------------
|
||||
- None
|
||||
|
||||
New features / changes:
|
||||
-----------------------
|
||||
- None
|
||||
|
||||
Bug fixes:
|
||||
----------
|
||||
- Fix missing lowtext section for GCC linker files
|
||||
|
||||
Build 1.211 (GCC)
|
||||
=================
|
||||
11/16/2020
|
||||
|
||||
New device support:
|
||||
------------------
|
||||
- None
|
||||
|
||||
New features / changes:
|
||||
-----------------------
|
||||
- Aligned GCC linker command file template for MSP430FR and other MSP430 devices
|
||||
to allow for easier diffs
|
||||
|
||||
Bug fixes:
|
||||
----------
|
||||
- Fixed faulty PORT register definition and references for several FR2xx, FR5xx
|
||||
and FR6xx devices
|
||||
- Fixed typo in MSP430G2 family device header files
|
||||
|
||||
|
||||
Build 1.210 (GCC)
|
||||
=================
|
||||
05/14/2020
|
||||
05/05/2020
|
||||
|
||||
New device support:
|
||||
------------------
|
||||
|
||||
@ -30,29 +30,29 @@
|
||||
# /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
Version:,1.21,,,,Date:,5/14/2020,14:14:02,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
Version:,1.212,,,,Date:,07/19/21,10:14:55,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 0 STD MSP430 CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 1 MSP430X CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 2 MSP430XV2 CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 0 STD MSP430 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 1 MSP430X CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 2 MSP430XV2 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# HWMPY,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 0 No Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 1 16 Bit Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices)",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 0 No Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 1 16 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 4 32 Bit Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 8 32 Bit Hardware Multiplier (5xx)",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 4 32 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 8 32 Bit Hardware Multiplier (5xx),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# SPI2Wire,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 0 JTAG only - no scan",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 1 SBW (default) - scan allowed",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 2 JTAG (Default) - scan allowed",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 3 SBW only - no scan",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 0 JTAG only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 1 SBW (default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 2 JTAG (Default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 3 SBW only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
@ -74,10 +74,10 @@ msp430c336,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
msp430c337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c412,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c413,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430cg4616,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF
|
||||
msp430cg4617,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF
|
||||
msp430cg4618,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430cg4619,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430cg4616,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF
|
||||
msp430cg4617,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF
|
||||
msp430cg4618,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430cg4619,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430e112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430e313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430e315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
@ -133,26 +133,26 @@ msp430f2272,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,
|
||||
msp430f2234,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2254,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2274,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2330,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2350,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2370,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f233,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f235,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2330,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2350,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2370,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f233,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f235,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f247,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f248,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f249,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2410,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2471,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2481,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2491,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2416,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2417,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2418,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2419,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2616,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2617,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2618,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2619,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2471,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2481,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2491,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2416,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2417,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2418,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2419,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2616,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2617,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2618,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2619,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f412,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFBD,0,0,,,FFE0,FFFF
|
||||
msp430f413,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f415,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
@ -186,24 +186,24 @@ msp430fe4232,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
msp430fe4242,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,D000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430fe4252,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430fe4272,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4783,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4793,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4783,0,0,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4793,0,0,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4784,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4794,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f47126,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
|
||||
msp430f47126,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
|
||||
msp430f47127,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
|
||||
msp430f47163,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47173,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47183,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47193,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47166,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47176,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47186,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47196,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47167,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47177,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47187,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47197,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47163,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47173,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47183,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47193,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47166,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47176,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47186,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47196,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47167,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47177,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47187,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47197,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4250,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4260,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4270,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
|
||||
@ -230,14 +230,14 @@ msp430f46161,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,20
|
||||
msp430f46171,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f46181,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f46191,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4616,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4617,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4618,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4619,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4616,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4617,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4618,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4619,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f5418,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF
|
||||
msp430f5419,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF
|
||||
msp430f5435,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF
|
||||
@ -270,10 +270,10 @@ msp430f5242,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,
|
||||
msp430f5244,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430f5247,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
|
||||
msp430f5249,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430f5304,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5308,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5309,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5310,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5304,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5308,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5309,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5310,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5340,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
|
||||
msp430f5341,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
|
||||
msp430f5342,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
@ -367,14 +367,14 @@ msp430fg6425,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF
|
||||
msp430fg6426,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430fg6625,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
|
||||
msp430fg6626,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430l092,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F
|
||||
msp430c091,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c092,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430xgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430f5xx_6xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr5xx_6xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr2xx_4xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr57xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430l092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F
|
||||
msp430c091,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430xgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430f5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr2xx_4xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr57xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430i2xxgeneric,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FF80,FFFF
|
||||
msp430f5131,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5151,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
@ -550,7 +550,7 @@ msp430g2855,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,
|
||||
msp430g2955,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430g2230,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430g2210,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430bt5190,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430bt5190,2,CPU21; CPU22; CPU23; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430fr5857,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr5858,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr5859,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
@ -579,12 +579,12 @@ msp430i2030,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
msp430i2031,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
|
||||
msp430i2040,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF
|
||||
msp430i2041,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
|
||||
rf430frl152h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl152h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl152h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl152h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430f5175,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
|
||||
rf430f5155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
rf430f5144,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
@ -634,7 +634,7 @@ msp430fr68221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23F
|
||||
msp430fr69221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
msp430fr68721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
msp430fr69721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
msp430sl5438a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430sl5438a,2,CPU21; CPU22; CPU23; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430fr4131,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,F000,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr4132,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr4133,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
|
||||
|
@ -33,7 +33,7 @@
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* 1.210 */
|
||||
/* 1.212 */
|
||||
|
||||
#ifndef __IN430_H__
|
||||
#define __IN430_H__
|
||||
|
||||
@ -33,7 +33,7 @@
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* 1.210 */
|
||||
/* 1.212 */
|
||||
|
||||
#if !defined(_IOMACROS_H_)
|
||||
#define _IOMACROS_H_
|
||||
|
||||
@ -57,7 +57,7 @@
|
||||
#ifndef __msp430x16x
|
||||
#define __msp430x16x
|
||||
|
||||
#define __MSP430_HEADER_VERSION__ 1210
|
||||
#define __MSP430_HEADER_VERSION__ 1212
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1611 devices. */
|
||||
/* Version: 1.210 */
|
||||
/* Version: 1.212 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
@ -128,10 +128,10 @@ SECTIONS
|
||||
directory crtbegin.o is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
|
||||
/* We don't want to include the .ctor section from from the
|
||||
crtend.o file until after the sorted ctors. The .ctor section
|
||||
from the crtend file contains the end of ctors marker and it
|
||||
must be last */
|
||||
/* We don't want to include the .ctor section from the crtend.o
|
||||
file until after the sorted ctors. The .ctor section from
|
||||
the crtend file contains the end of ctors marker and it must
|
||||
be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
@ -250,6 +250,8 @@ SECTIONS
|
||||
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
|
||||
.infoB : {} > INFOB
|
||||
|
||||
/* The rest are all not normally part of the runtime image. */
|
||||
|
||||
.MSP430.attributes 0 :
|
||||
{
|
||||
KEEP (*(.MSP430.attributes))
|
||||
@ -257,8 +259,6 @@ SECTIONS
|
||||
KEEP (*(__TI_build_attributes))
|
||||
}
|
||||
|
||||
/* The rest are all not normally part of the runtime image. */
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
@ -270,16 +270,16 @@ SECTIONS
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
/* DWARF 1. */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions. */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2. */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2. */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
|
||||
@ -287,11 +287,17 @@ SECTIONS
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions. */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* DWARF 3 */
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* DWARF Extension. */
|
||||
.debug_macro 0 : { *(.debug_macro) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1611 devices. */
|
||||
/* Version: 1.210 */
|
||||
/* Version: 1.212 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
|
||||
@ -57,7 +57,7 @@
|
||||
#ifndef __msp430x16x
|
||||
#define __msp430x16x
|
||||
|
||||
#define __MSP430_HEADER_VERSION__ 1210
|
||||
#define __MSP430_HEADER_VERSION__ 1212
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1612 devices. */
|
||||
/* Version: 1.210 */
|
||||
/* Version: 1.212 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
@ -128,10 +128,10 @@ SECTIONS
|
||||
directory crtbegin.o is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
|
||||
/* We don't want to include the .ctor section from from the
|
||||
crtend.o file until after the sorted ctors. The .ctor section
|
||||
from the crtend file contains the end of ctors marker and it
|
||||
must be last */
|
||||
/* We don't want to include the .ctor section from the crtend.o
|
||||
file until after the sorted ctors. The .ctor section from
|
||||
the crtend file contains the end of ctors marker and it must
|
||||
be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
@ -250,6 +250,8 @@ SECTIONS
|
||||
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
|
||||
.infoB : {} > INFOB
|
||||
|
||||
/* The rest are all not normally part of the runtime image. */
|
||||
|
||||
.MSP430.attributes 0 :
|
||||
{
|
||||
KEEP (*(.MSP430.attributes))
|
||||
@ -257,8 +259,6 @@ SECTIONS
|
||||
KEEP (*(__TI_build_attributes))
|
||||
}
|
||||
|
||||
/* The rest are all not normally part of the runtime image. */
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
@ -270,16 +270,16 @@ SECTIONS
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
/* DWARF 1. */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions. */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2. */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2. */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
|
||||
@ -287,11 +287,17 @@ SECTIONS
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions. */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* DWARF 3 */
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* DWARF Extension. */
|
||||
.debug_macro 0 : { *(.debug_macro) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1612 devices. */
|
||||
/* Version: 1.210 */
|
||||
/* Version: 1.212 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
|
||||
@ -54,7 +54,7 @@
|
||||
|
||||
#define __MSP430_HAS_MSP430X_CPU__ /* Definition to show that it has MSP430X CPU */
|
||||
|
||||
#define __MSP430_HEADER_VERSION__ 1210
|
||||
#define __MSP430_HEADER_VERSION__ 1212
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F2617 devices. */
|
||||
/* Version: 1.210 */
|
||||
/* Version: 1.212 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
@ -172,10 +172,10 @@ SECTIONS
|
||||
directory crtbegin.o is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
|
||||
/* We don't want to include the .ctor section from from the
|
||||
crtend.o file until after the sorted ctors. The .ctor section
|
||||
from the crtend file contains the end of ctors marker and it
|
||||
must be last */
|
||||
/* We don't want to include the .ctor section from the crtend.o
|
||||
file until after the sorted ctors. The .ctor section from
|
||||
the crtend file contains the end of ctors marker and it must
|
||||
be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F2617 devices. */
|
||||
/* Version: 1.210 */
|
||||
/* Version: 1.212 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
|
||||
1520
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.h
vendored
Normal file
1520
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
397
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.ld
vendored
Normal file
397
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.ld
vendored
Normal file
@ -0,0 +1,397 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
/* modification, are permitted provided that the following conditions */
|
||||
/* are met: */
|
||||
/* */
|
||||
/* * Redistributions of source code must retain the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer. */
|
||||
/* */
|
||||
/* * Redistributions in binary form must reproduce the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer in the */
|
||||
/* documentation and/or other materials provided with the distribution. */
|
||||
/* */
|
||||
/* * Neither the name of Texas Instruments Incorporated nor the names of */
|
||||
/* its contributors may be used to endorse or promote products derived */
|
||||
/* from this software without specific prior written permission. */
|
||||
/* */
|
||||
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
|
||||
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
|
||||
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
|
||||
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
|
||||
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
|
||||
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
|
||||
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
|
||||
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
|
||||
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F2618 devices. */
|
||||
/* Version: 1.212 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
ENTRY(_start)
|
||||
|
||||
MEMORY {
|
||||
SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
|
||||
RAM : ORIGIN = 0x1100, LENGTH = 0x2000 /* END=0x30FF, size 8192 */
|
||||
RAM_MIRROR : ORIGIN = 0x0200, LENGTH = 0x0800
|
||||
INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 4 64-byte segments */
|
||||
INFOA : ORIGIN = 0x10C0, LENGTH = 0x0040 /* END=0x10FF, size 64 */
|
||||
INFOB : ORIGIN = 0x1080, LENGTH = 0x0040 /* END=0x10BF, size 64 */
|
||||
INFOC : ORIGIN = 0x1040, LENGTH = 0x0040 /* END=0x107F, size 64 */
|
||||
INFOD : ORIGIN = 0x1000, LENGTH = 0x0040 /* END=0x103F, size 64 */
|
||||
ROM (rx) : ORIGIN = 0x3100, LENGTH = 0xCEBE /* END=0xFFBD, size 52926 */
|
||||
HIROM (rx) : ORIGIN = 0x00010000, LENGTH = 0x0000FFFF
|
||||
BSLSIGNATURE : ORIGIN = 0xFFBE, LENGTH = 0x0002
|
||||
VECT1 : ORIGIN = 0xFFC0, LENGTH = 0x0002
|
||||
VECT2 : ORIGIN = 0xFFC2, LENGTH = 0x0002
|
||||
VECT3 : ORIGIN = 0xFFC4, LENGTH = 0x0002
|
||||
VECT4 : ORIGIN = 0xFFC6, LENGTH = 0x0002
|
||||
VECT5 : ORIGIN = 0xFFC8, LENGTH = 0x0002
|
||||
VECT6 : ORIGIN = 0xFFCA, LENGTH = 0x0002
|
||||
VECT7 : ORIGIN = 0xFFCC, LENGTH = 0x0002
|
||||
VECT8 : ORIGIN = 0xFFCE, LENGTH = 0x0002
|
||||
VECT9 : ORIGIN = 0xFFD0, LENGTH = 0x0002
|
||||
VECT10 : ORIGIN = 0xFFD2, LENGTH = 0x0002
|
||||
VECT11 : ORIGIN = 0xFFD4, LENGTH = 0x0002
|
||||
VECT12 : ORIGIN = 0xFFD6, LENGTH = 0x0002
|
||||
VECT13 : ORIGIN = 0xFFD8, LENGTH = 0x0002
|
||||
VECT14 : ORIGIN = 0xFFDA, LENGTH = 0x0002
|
||||
VECT15 : ORIGIN = 0xFFDC, LENGTH = 0x0002
|
||||
VECT16 : ORIGIN = 0xFFDE, LENGTH = 0x0002
|
||||
VECT17 : ORIGIN = 0xFFE0, LENGTH = 0x0002
|
||||
VECT18 : ORIGIN = 0xFFE2, LENGTH = 0x0002
|
||||
VECT19 : ORIGIN = 0xFFE4, LENGTH = 0x0002
|
||||
VECT20 : ORIGIN = 0xFFE6, LENGTH = 0x0002
|
||||
VECT21 : ORIGIN = 0xFFE8, LENGTH = 0x0002
|
||||
VECT22 : ORIGIN = 0xFFEA, LENGTH = 0x0002
|
||||
VECT23 : ORIGIN = 0xFFEC, LENGTH = 0x0002
|
||||
VECT24 : ORIGIN = 0xFFEE, LENGTH = 0x0002
|
||||
VECT25 : ORIGIN = 0xFFF0, LENGTH = 0x0002
|
||||
VECT26 : ORIGIN = 0xFFF2, LENGTH = 0x0002
|
||||
VECT27 : ORIGIN = 0xFFF4, LENGTH = 0x0002
|
||||
VECT28 : ORIGIN = 0xFFF6, LENGTH = 0x0002
|
||||
VECT29 : ORIGIN = 0xFFF8, LENGTH = 0x0002
|
||||
VECT30 : ORIGIN = 0xFFFA, LENGTH = 0x0002
|
||||
VECT31 : ORIGIN = 0xFFFC, LENGTH = 0x0002
|
||||
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.bslsignature : {} > BSLSIGNATURE
|
||||
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_reserved0)) } > VECT1
|
||||
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) KEEP (*(__interrupt_vector_reserved1)) } > VECT2
|
||||
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_reserved2)) } > VECT3
|
||||
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_reserved3)) } > VECT4
|
||||
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) KEEP (*(__interrupt_vector_reserved4)) } > VECT5
|
||||
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_reserved5)) } > VECT6
|
||||
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_reserved6)) } > VECT7
|
||||
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_reserved7)) } > VECT8
|
||||
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_reserved8)) } > VECT9
|
||||
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_reserved9)) } > VECT10
|
||||
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_reserved10)) } > VECT11
|
||||
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_reserved11)) } > VECT12
|
||||
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_reserved12)) } > VECT13
|
||||
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_reserved13)) } > VECT14
|
||||
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_dac12)) } > VECT15
|
||||
__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) KEEP (*(__interrupt_vector_dma)) } > VECT16
|
||||
__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) KEEP (*(__interrupt_vector_usciab1tx)) } > VECT17
|
||||
__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) KEEP (*(__interrupt_vector_usciab1rx)) } > VECT18
|
||||
__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_port1)) } > VECT19
|
||||
__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_port2)) } > VECT20
|
||||
__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_reserved20)) } > VECT21
|
||||
__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_adc12)) } > VECT22
|
||||
__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_usciab0tx)) } > VECT23
|
||||
__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_usciab0rx)) } > VECT24
|
||||
__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_timera1)) } > VECT25
|
||||
__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_timera0)) } > VECT26
|
||||
__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_wdt)) } > VECT27
|
||||
__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_comparatora)) } > VECT28
|
||||
__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_timerb1)) } > VECT29
|
||||
__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_timerb0)) } > VECT30
|
||||
__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_nmi)) } > VECT31
|
||||
__reset_vector :
|
||||
{
|
||||
KEEP (*(__interrupt_vector_32))
|
||||
KEEP (*(__interrupt_vector_reset))
|
||||
KEEP (*(.resetvec))
|
||||
} > RESETVEC
|
||||
|
||||
.lower.rodata :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.lower.rodata.* .lower.rodata)
|
||||
} > ROM
|
||||
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.plt)
|
||||
. = ALIGN(2);
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
|
||||
*(.rodata1)
|
||||
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
|
||||
} > ROM
|
||||
|
||||
/* Note: This is a separate .rodata section for sections which are
|
||||
read only but which older linkers treat as read-write.
|
||||
This prevents older linkers from marking the entire .rodata
|
||||
section as read-write. */
|
||||
.rodata2 :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE (__preinit_array_end = .);
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE (__init_array_end = .);
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE (__fini_array_end = .);
|
||||
. = ALIGN(2);
|
||||
*(.eh_frame_hdr)
|
||||
KEEP (*(.eh_frame))
|
||||
|
||||
/* gcc uses crtbegin.o to find the start of the constructors, so
|
||||
we make sure it is first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not actually link against
|
||||
crtbegin.o; the linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it doesn't matter which
|
||||
directory crtbegin.o is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
|
||||
/* We don't want to include the .ctor section from the crtend.o
|
||||
file until after the sorted ctors. The .ctor section from
|
||||
the crtend file contains the end of ctors marker and it must
|
||||
be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} > ROM
|
||||
|
||||
.upper.rodata :
|
||||
{
|
||||
*(.upper.rodata.* .upper.rodata)
|
||||
} > HIROM
|
||||
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datastart = .);
|
||||
*(.lower.data.* .lower.data)
|
||||
|
||||
. = ALIGN(2);
|
||||
*(.either.data.* .either.data)
|
||||
|
||||
. = ALIGN(2);
|
||||
KEEP (*(.jcr))
|
||||
*(.data.rel.ro.local) *(.data.rel.ro*)
|
||||
*(.dynamic)
|
||||
|
||||
. = ALIGN(2);
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
SORT(CONSTRUCTORS)
|
||||
*(.data1)
|
||||
*(.got.plt) *(.got)
|
||||
|
||||
/* We want the small data sections together, so single-instruction offsets
|
||||
can access them all, and initialized data all before uninitialized, so
|
||||
we can shorten the on-disk segment size. */
|
||||
. = ALIGN(2);
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
|
||||
|
||||
. = ALIGN(2);
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
PROVIDE (__dataend = .);
|
||||
} > RAM AT> ROM
|
||||
|
||||
/* Note that crt0 assumes this is a multiple of two; all the
|
||||
start/stop symbols are also assumed word-aligned. */
|
||||
PROVIDE(__romdatastart = LOADADDR(.data));
|
||||
PROVIDE (__romdatacopysize = SIZEOF(.data));
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__bssstart = .);
|
||||
*(.lower.bss.* .lower.bss)
|
||||
. = ALIGN(2);
|
||||
*(.either.bss.* .either.bss)
|
||||
*(.dynbss)
|
||||
*(.sbss .sbss.*)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
. = ALIGN(2);
|
||||
*(COMMON)
|
||||
PROVIDE (__bssend = .);
|
||||
} > RAM
|
||||
PROVIDE (__bsssize = SIZEOF(.bss));
|
||||
|
||||
/* This section contains data that is not initialised during load
|
||||
or application reset. */
|
||||
.noinit (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__noinit_start = .);
|
||||
*(.noinit)
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__noinit_end = .);
|
||||
} > RAM
|
||||
|
||||
/* We create this section so that "end" will always be in the
|
||||
RAM region (matching .stack below), even if the .bss
|
||||
section is empty. */
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
__heap_start__ = .;
|
||||
_end = __heap_start__;
|
||||
PROVIDE (end = .);
|
||||
KEEP (*(.heap))
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
/* This word is here so that the section is not empty, and thus
|
||||
not discarded by the linker. The actual value does not matter
|
||||
and is ignored. */
|
||||
LONG(0);
|
||||
__heap_end__ = .;
|
||||
__HeapLimit = __heap_end__;
|
||||
} > RAM
|
||||
/* WARNING: Do not place anything in RAM here.
|
||||
The heap section must be the last section in RAM and the stack
|
||||
section must be placed at the very end of the RAM region. */
|
||||
|
||||
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
|
||||
{
|
||||
PROVIDE (__stack = .);
|
||||
*(.stack)
|
||||
}
|
||||
|
||||
/* This is just for crt0.S and interrupt handlers. */
|
||||
.lowtext :
|
||||
{
|
||||
PROVIDE (_start = .);
|
||||
. = ALIGN(2);
|
||||
KEEP (*(SORT(.crt_*)))
|
||||
KEEP (*(.lowtext))
|
||||
} > ROM
|
||||
|
||||
.lower.text :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.lower.text.* .lower.text)
|
||||
} > ROM
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
|
||||
|
||||
KEEP (*(.text.*personality*))
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
*(.gnu.warning)
|
||||
*(.interp .hash .dynsym .dynstr .gnu.version*)
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
. = ALIGN(2);
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
KEEP (*(.tm_clone_table))
|
||||
} > ROM
|
||||
|
||||
.upper.text :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.upper.text.* .upper.text)
|
||||
} > HIROM
|
||||
|
||||
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
|
||||
.infoB : {} > INFOB
|
||||
.infoC : {} > INFOC
|
||||
.infoD : {} > INFOD
|
||||
|
||||
/* Make sure that upper data sections are not used. */
|
||||
.upper :
|
||||
{
|
||||
*(.upper.bss.* .upper.bss)
|
||||
*(.upper.data.* .upper.data)
|
||||
ASSERT (SIZEOF(.upper) == 0, "This MCU does not support placing read/write data into high memory");
|
||||
} > HIROM
|
||||
|
||||
/* The rest are all not normally part of the runtime image. */
|
||||
|
||||
.MSP430.attributes 0 :
|
||||
{
|
||||
KEEP (*(.MSP430.attributes))
|
||||
KEEP (*(.gnu.attributes))
|
||||
KEEP (*(__TI_build_attributes))
|
||||
}
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1. */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions. */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2. */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2. */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions. */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* DWARF 3 */
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* DWARF Extension. */
|
||||
.debug_macro 0 : { *(.debug_macro) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Include peripherals memory map */
|
||||
/****************************************************************************/
|
||||
|
||||
INCLUDE msp430f2618_symbols.ld
|
||||
|
||||
328
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618_symbols.ld
vendored
Normal file
328
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618_symbols.ld
vendored
Normal file
@ -0,0 +1,328 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2021, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
/* modification, are permitted provided that the following conditions */
|
||||
/* are met: */
|
||||
/* */
|
||||
/* * Redistributions of source code must retain the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer. */
|
||||
/* */
|
||||
/* * Redistributions in binary form must reproduce the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer in the */
|
||||
/* documentation and/or other materials provided with the distribution. */
|
||||
/* */
|
||||
/* * Neither the name of Texas Instruments Incorporated nor the names of */
|
||||
/* its contributors may be used to endorse or promote products derived */
|
||||
/* from this software without specific prior written permission. */
|
||||
/* */
|
||||
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
|
||||
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
|
||||
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
|
||||
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
|
||||
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
|
||||
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
|
||||
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
|
||||
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
|
||||
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F2618 devices. */
|
||||
/* Version: 1.212 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* STATUS REGISTER BITS
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* PERIPHERAL FILE MAP
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
|
||||
************************************************************/
|
||||
PROVIDE(IE1 = 0x0000);
|
||||
PROVIDE(IFG1 = 0x0002);
|
||||
PROVIDE(IE2 = 0x0001);
|
||||
PROVIDE(IFG2 = 0x0003);
|
||||
PROVIDE(UC1IE = 0x0006);
|
||||
PROVIDE(UC1IFG = 0x0007);
|
||||
/************************************************************
|
||||
* ADC12
|
||||
************************************************************/
|
||||
PROVIDE(ADC12CTL0 = 0x01A0);
|
||||
PROVIDE(ADC12CTL1 = 0x01A2);
|
||||
PROVIDE(ADC12IFG = 0x01A4);
|
||||
PROVIDE(ADC12IE = 0x01A6);
|
||||
PROVIDE(ADC12IV = 0x01A8);
|
||||
PROVIDE(ADC12MEM0 = 0x0140);
|
||||
PROVIDE(ADC12MEM1 = 0x0142);
|
||||
PROVIDE(ADC12MEM2 = 0x0144);
|
||||
PROVIDE(ADC12MEM3 = 0x0146);
|
||||
PROVIDE(ADC12MEM4 = 0x0148);
|
||||
PROVIDE(ADC12MEM5 = 0x014A);
|
||||
PROVIDE(ADC12MEM6 = 0x014C);
|
||||
PROVIDE(ADC12MEM7 = 0x014E);
|
||||
PROVIDE(ADC12MEM8 = 0x0150);
|
||||
PROVIDE(ADC12MEM9 = 0x0152);
|
||||
PROVIDE(ADC12MEM10 = 0x0154);
|
||||
PROVIDE(ADC12MEM11 = 0x0156);
|
||||
PROVIDE(ADC12MEM12 = 0x0158);
|
||||
PROVIDE(ADC12MEM13 = 0x015A);
|
||||
PROVIDE(ADC12MEM14 = 0x015C);
|
||||
PROVIDE(ADC12MEM15 = 0x015E);
|
||||
PROVIDE(ADC12MCTL0 = 0x0080);
|
||||
PROVIDE(ADC12MCTL1 = 0x0081);
|
||||
PROVIDE(ADC12MCTL2 = 0x0082);
|
||||
PROVIDE(ADC12MCTL3 = 0x0083);
|
||||
PROVIDE(ADC12MCTL4 = 0x0084);
|
||||
PROVIDE(ADC12MCTL5 = 0x0085);
|
||||
PROVIDE(ADC12MCTL6 = 0x0086);
|
||||
PROVIDE(ADC12MCTL7 = 0x0087);
|
||||
PROVIDE(ADC12MCTL8 = 0x0088);
|
||||
PROVIDE(ADC12MCTL9 = 0x0089);
|
||||
PROVIDE(ADC12MCTL10 = 0x008A);
|
||||
PROVIDE(ADC12MCTL11 = 0x008B);
|
||||
PROVIDE(ADC12MCTL12 = 0x008C);
|
||||
PROVIDE(ADC12MCTL13 = 0x008D);
|
||||
PROVIDE(ADC12MCTL14 = 0x008E);
|
||||
PROVIDE(ADC12MCTL15 = 0x008F);
|
||||
/************************************************************
|
||||
* Basic Clock Module
|
||||
************************************************************/
|
||||
PROVIDE(DCOCTL = 0x0056);
|
||||
PROVIDE(BCSCTL1 = 0x0057);
|
||||
PROVIDE(BCSCTL2 = 0x0058);
|
||||
PROVIDE(BCSCTL3 = 0x0053);
|
||||
/************************************************************
|
||||
* Comparator A
|
||||
************************************************************/
|
||||
PROVIDE(CACTL1 = 0x0059);
|
||||
PROVIDE(CACTL2 = 0x005A);
|
||||
PROVIDE(CAPD = 0x005B);
|
||||
/************************************************************
|
||||
* DAC12
|
||||
************************************************************/
|
||||
PROVIDE(DAC12_0CTL = 0x01C0);
|
||||
PROVIDE(DAC12_1CTL = 0x01C2);
|
||||
PROVIDE(DAC12_0DAT = 0x01C8);
|
||||
PROVIDE(DAC12_1DAT = 0x01CA);
|
||||
/************************************************************
|
||||
* DMA_X
|
||||
************************************************************/
|
||||
PROVIDE(DMACTL0 = 0x0122);
|
||||
PROVIDE(DMACTL1 = 0x0124);
|
||||
PROVIDE(DMAIV = 0x0126);
|
||||
PROVIDE(DMA0CTL = 0x01D0);
|
||||
PROVIDE(DMA1CTL = 0x01DC);
|
||||
PROVIDE(DMA2CTL = 0x01E8);
|
||||
PROVIDE(DMA0SA = 0x01D2);
|
||||
PROVIDE(DMA0SAL = 0x01D2);
|
||||
PROVIDE(DMA0DA = 0x01D6);
|
||||
PROVIDE(DMA0DAL = 0x01D6);
|
||||
PROVIDE(DMA0SZ = 0x01DA);
|
||||
PROVIDE(DMA1SA = 0x01DE);
|
||||
PROVIDE(DMA1SAL = 0x01DE);
|
||||
PROVIDE(DMA1DA = 0x01E2);
|
||||
PROVIDE(DMA1DAL = 0x01E2);
|
||||
PROVIDE(DMA1SZ = 0x01E6);
|
||||
PROVIDE(DMA2SA = 0x01EA);
|
||||
PROVIDE(DMA2SAL = 0x01EA);
|
||||
PROVIDE(DMA2DA = 0x01EE);
|
||||
PROVIDE(DMA2DAL = 0x01EE);
|
||||
PROVIDE(DMA2SZ = 0x01F2);
|
||||
/*************************************************************
|
||||
* Flash Memory
|
||||
*************************************************************/
|
||||
PROVIDE(FCTL1 = 0x0128);
|
||||
PROVIDE(FCTL2 = 0x012A);
|
||||
PROVIDE(FCTL3 = 0x012C);
|
||||
PROVIDE(FCTL4 = 0x01BE);
|
||||
/************************************************************
|
||||
* HARDWARE MULTIPLIER
|
||||
************************************************************/
|
||||
PROVIDE(MPY = 0x0130);
|
||||
PROVIDE(MPYS = 0x0132);
|
||||
PROVIDE(MAC = 0x0134);
|
||||
PROVIDE(MACS = 0x0136);
|
||||
PROVIDE(OP2 = 0x0138);
|
||||
PROVIDE(RESLO = 0x013A);
|
||||
PROVIDE(RESHI = 0x013C);
|
||||
PROVIDE(SUMEXT = 0x013E);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(P1IN = 0x0020);
|
||||
PROVIDE(P1OUT = 0x0021);
|
||||
PROVIDE(P1DIR = 0x0022);
|
||||
PROVIDE(P1IFG = 0x0023);
|
||||
PROVIDE(P1IES = 0x0024);
|
||||
PROVIDE(P1IE = 0x0025);
|
||||
PROVIDE(P1SEL = 0x0026);
|
||||
PROVIDE(P1REN = 0x0027);
|
||||
PROVIDE(P2IN = 0x0028);
|
||||
PROVIDE(P2OUT = 0x0029);
|
||||
PROVIDE(P2DIR = 0x002A);
|
||||
PROVIDE(P2IFG = 0x002B);
|
||||
PROVIDE(P2IES = 0x002C);
|
||||
PROVIDE(P2IE = 0x002D);
|
||||
PROVIDE(P2SEL = 0x002E);
|
||||
PROVIDE(P2REN = 0x002F);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(P3IN = 0x0018);
|
||||
PROVIDE(P3OUT = 0x0019);
|
||||
PROVIDE(P3DIR = 0x001A);
|
||||
PROVIDE(P3SEL = 0x001B);
|
||||
PROVIDE(P3REN = 0x0010);
|
||||
PROVIDE(P4IN = 0x001C);
|
||||
PROVIDE(P4OUT = 0x001D);
|
||||
PROVIDE(P4DIR = 0x001E);
|
||||
PROVIDE(P4SEL = 0x001F);
|
||||
PROVIDE(P4REN = 0x0011);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port5/6 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(P5IN = 0x0030);
|
||||
PROVIDE(P5OUT = 0x0031);
|
||||
PROVIDE(P5DIR = 0x0032);
|
||||
PROVIDE(P5SEL = 0x0033);
|
||||
PROVIDE(P5REN = 0x0012);
|
||||
PROVIDE(P6IN = 0x0034);
|
||||
PROVIDE(P6OUT = 0x0035);
|
||||
PROVIDE(P6DIR = 0x0036);
|
||||
PROVIDE(P6SEL = 0x0037);
|
||||
PROVIDE(P6REN = 0x0013);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port7/8 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(P7IN = 0x0038);
|
||||
PROVIDE(P7OUT = 0x003A);
|
||||
PROVIDE(P7DIR = 0x003C);
|
||||
PROVIDE(P7SEL = 0x003E);
|
||||
PROVIDE(P7REN = 0x0014);
|
||||
PROVIDE(P8IN = 0x0039);
|
||||
PROVIDE(P8OUT = 0x003B);
|
||||
PROVIDE(P8DIR = 0x003D);
|
||||
PROVIDE(P8SEL = 0x003F);
|
||||
PROVIDE(P8REN = 0x0015);
|
||||
PROVIDE(PAIN = 0x0038);
|
||||
PROVIDE(PAOUT = 0x003A);
|
||||
PROVIDE(PADIR = 0x003C);
|
||||
PROVIDE(PASEL = 0x003E);
|
||||
PROVIDE(PAREN = 0x0014);
|
||||
/************************************************************
|
||||
* Brown-Out, Supply Voltage Supervision (SVS)
|
||||
************************************************************/
|
||||
PROVIDE(SVSCTL = 0x0055);
|
||||
/************************************************************
|
||||
* Timer A3
|
||||
************************************************************/
|
||||
PROVIDE(TAIV = 0x012E);
|
||||
PROVIDE(TACTL = 0x0160);
|
||||
PROVIDE(TACCTL0 = 0x0162);
|
||||
PROVIDE(TACCTL1 = 0x0164);
|
||||
PROVIDE(TACCTL2 = 0x0166);
|
||||
PROVIDE(TAR = 0x0170);
|
||||
PROVIDE(TACCR0 = 0x0172);
|
||||
PROVIDE(TACCR1 = 0x0174);
|
||||
PROVIDE(TACCR2 = 0x0176);
|
||||
/************************************************************
|
||||
* Timer B7
|
||||
************************************************************/
|
||||
PROVIDE(TBIV = 0x011E);
|
||||
PROVIDE(TBCTL = 0x0180);
|
||||
PROVIDE(TBCCTL0 = 0x0182);
|
||||
PROVIDE(TBCCTL1 = 0x0184);
|
||||
PROVIDE(TBCCTL2 = 0x0186);
|
||||
PROVIDE(TBCCTL3 = 0x0188);
|
||||
PROVIDE(TBCCTL4 = 0x018A);
|
||||
PROVIDE(TBCCTL5 = 0x018C);
|
||||
PROVIDE(TBCCTL6 = 0x018E);
|
||||
PROVIDE(TBR = 0x0190);
|
||||
PROVIDE(TBCCR0 = 0x0192);
|
||||
PROVIDE(TBCCR1 = 0x0194);
|
||||
PROVIDE(TBCCR2 = 0x0196);
|
||||
PROVIDE(TBCCR3 = 0x0198);
|
||||
PROVIDE(TBCCR4 = 0x019A);
|
||||
PROVIDE(TBCCR5 = 0x019C);
|
||||
PROVIDE(TBCCR6 = 0x019E);
|
||||
/************************************************************
|
||||
* USCI
|
||||
************************************************************/
|
||||
PROVIDE(UCA0CTL0 = 0x0060);
|
||||
PROVIDE(UCA0CTL1 = 0x0061);
|
||||
PROVIDE(UCA0BR0 = 0x0062);
|
||||
PROVIDE(UCA0BR1 = 0x0063);
|
||||
PROVIDE(UCA0MCTL = 0x0064);
|
||||
PROVIDE(UCA0STAT = 0x0065);
|
||||
PROVIDE(UCA0RXBUF = 0x0066);
|
||||
PROVIDE(UCA0TXBUF = 0x0067);
|
||||
PROVIDE(UCA0ABCTL = 0x005D);
|
||||
PROVIDE(UCA0IRTCTL = 0x005E);
|
||||
PROVIDE(UCA0IRRCTL = 0x005F);
|
||||
PROVIDE(UCB0CTL0 = 0x0068);
|
||||
PROVIDE(UCB0CTL1 = 0x0069);
|
||||
PROVIDE(UCB0BR0 = 0x006A);
|
||||
PROVIDE(UCB0BR1 = 0x006B);
|
||||
PROVIDE(UCB0I2CIE = 0x006C);
|
||||
PROVIDE(UCB0STAT = 0x006D);
|
||||
PROVIDE(UCB0RXBUF = 0x006E);
|
||||
PROVIDE(UCB0TXBUF = 0x006F);
|
||||
PROVIDE(UCB0I2COA = 0x0118);
|
||||
PROVIDE(UCB0I2CSA = 0x011A);
|
||||
PROVIDE(UCA1CTL0 = 0x00D0);
|
||||
PROVIDE(UCA1CTL1 = 0x00D1);
|
||||
PROVIDE(UCA1BR0 = 0x00D2);
|
||||
PROVIDE(UCA1BR1 = 0x00D3);
|
||||
PROVIDE(UCA1MCTL = 0x00D4);
|
||||
PROVIDE(UCA1STAT = 0x00D5);
|
||||
PROVIDE(UCA1RXBUF = 0x00D6);
|
||||
PROVIDE(UCA1TXBUF = 0x00D7);
|
||||
PROVIDE(UCA1ABCTL = 0x00CD);
|
||||
PROVIDE(UCA1IRTCTL = 0x00CE);
|
||||
PROVIDE(UCA1IRRCTL = 0x00CF);
|
||||
PROVIDE(UCB1CTL0 = 0x00D8);
|
||||
PROVIDE(UCB1CTL1 = 0x00D9);
|
||||
PROVIDE(UCB1BR0 = 0x00DA);
|
||||
PROVIDE(UCB1BR1 = 0x00DB);
|
||||
PROVIDE(UCB1I2CIE = 0x00DC);
|
||||
PROVIDE(UCB1STAT = 0x00DD);
|
||||
PROVIDE(UCB1RXBUF = 0x00DE);
|
||||
PROVIDE(UCB1TXBUF = 0x00DF);
|
||||
PROVIDE(UCB1I2COA = 0x017C);
|
||||
PROVIDE(UCB1I2CSA = 0x017E);
|
||||
/************************************************************
|
||||
* WATCHDOG TIMER
|
||||
************************************************************/
|
||||
PROVIDE(WDTCTL = 0x0120);
|
||||
/************************************************************
|
||||
* Calibration Data in Info Mem
|
||||
************************************************************/
|
||||
PROVIDE(TLV_CHECKSUM = 0x10C0);
|
||||
PROVIDE(TLV_DCO_30_TAG = 0x10F6);
|
||||
PROVIDE(TLV_DCO_30_LEN = 0x10F7);
|
||||
PROVIDE(TLV_ADC12_1_TAG = 0x10DA);
|
||||
PROVIDE(TLV_ADC12_1_LEN = 0x10DB);
|
||||
/************************************************************
|
||||
* Calibration Data in Info Mem
|
||||
************************************************************/
|
||||
PROVIDE(CALDCO_16MHZ = 0x10F8);
|
||||
PROVIDE(CALBC1_16MHZ = 0x10F9);
|
||||
PROVIDE(CALDCO_12MHZ = 0x10FA);
|
||||
PROVIDE(CALBC1_12MHZ = 0x10FB);
|
||||
PROVIDE(CALDCO_8MHZ = 0x10FC);
|
||||
PROVIDE(CALBC1_8MHZ = 0x10FD);
|
||||
PROVIDE(CALDCO_1MHZ = 0x10FE);
|
||||
PROVIDE(CALBC1_1MHZ = 0x10FF);
|
||||
/************************************************************
|
||||
* Interrupt Vectors (offset from 0xFFC0)
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* End of Modules
|
||||
************************************************************/
|
||||
4
cpu/msp430_common/vendor/update.sh
vendored
4
cpu/msp430_common/vendor/update.sh
vendored
@ -5,7 +5,7 @@
|
||||
|
||||
set -e
|
||||
|
||||
URL="https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-support-files-1.210.zip"
|
||||
URL="https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-LlCjWuAbzH/9.3.1.2/msp430-gcc-support-files-1.212.zip"
|
||||
rm -Rf msp430-gcc-support-files
|
||||
|
||||
_CPUS="$(git -C ../../.. grep -o '^CPU_MODEL.=.*430.*$' | cut -d' ' -f 3 | sort -u)"
|
||||
@ -17,3 +17,5 @@ unzip $(basename $URL)
|
||||
rm $(ls | grep -v -E '(msp430\.h|in430\.h|legacy\.h|iomacros\.h|devices.csv)' | \
|
||||
grep -v -F "${_CPUS}" )
|
||||
)
|
||||
|
||||
find msp430-gcc-support-files -type f -exec dos2unix "{}" \;
|
||||
|
||||
@ -24,6 +24,10 @@ config CPU_MODEL_MSP430F2617
|
||||
bool
|
||||
select CPU_FAM_MSP430F
|
||||
|
||||
config CPU_MODEL_MSP430F2618
|
||||
bool
|
||||
select CPU_FAM_MSP430F
|
||||
|
||||
## Definition of specific features
|
||||
config HAS_CPU_MSP430FXYZ
|
||||
bool
|
||||
@ -38,6 +42,7 @@ config CPU_MODEL
|
||||
default "msp430f1611" if CPU_MODEL_MSP430F1611
|
||||
default "msp430f1612" if CPU_MODEL_MSP430F1612
|
||||
default "msp430f2617" if CPU_MODEL_MSP430F2617
|
||||
default "msp430f2618" if CPU_MODEL_MSP430F2618
|
||||
|
||||
config CPU
|
||||
default "msp430fxyz" if CPU_FAM_MSP430F
|
||||
|
||||
@ -35,6 +35,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -26,6 +26,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -39,6 +39,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -28,6 +28,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -22,6 +22,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -23,6 +23,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -43,6 +43,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -48,6 +48,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l053r8 \
|
||||
nucleo-l073rz \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
opencm904 \
|
||||
samd10-xmini \
|
||||
|
||||
@ -24,6 +24,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -24,6 +24,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -39,6 +39,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -29,6 +29,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -22,6 +22,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -3,6 +3,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
im880b \
|
||||
nucleo-l011k4 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
|
||||
@ -3,6 +3,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
im880b \
|
||||
nucleo-l011k4 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
|
||||
@ -30,6 +30,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -45,6 +45,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l053r8 \
|
||||
nucleo-l073rz \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
opencm904 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
|
||||
@ -35,6 +35,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -31,6 +31,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -27,6 +27,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -49,6 +49,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l053r8 \
|
||||
nucleo-l073rz \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
opencm904 \
|
||||
samd10-xmini \
|
||||
|
||||
@ -36,6 +36,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -20,6 +20,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -13,6 +13,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l011k4 \
|
||||
nucleo-l031k6 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
stk3200 \
|
||||
stm32f030f4-demo \
|
||||
|
||||
@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -19,6 +19,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -50,6 +50,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l053r8 \
|
||||
nucleo-l073rz \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
opencm904 \
|
||||
samd10-xmini \
|
||||
|
||||
@ -26,6 +26,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -29,6 +29,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -24,6 +24,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -34,6 +34,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -34,6 +34,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -39,6 +39,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -21,6 +21,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -30,6 +30,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -29,6 +29,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -38,6 +38,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
saml10-xpro \
|
||||
saml11-xpro \
|
||||
|
||||
@ -23,6 +23,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
seeedstudio-gd32 \
|
||||
slstk3400a \
|
||||
|
||||
@ -19,6 +19,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -22,6 +22,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -6,6 +6,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l011k4 \
|
||||
nucleo-l031k6 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
stk3200 \
|
||||
stm32f030f4-demo \
|
||||
|
||||
@ -7,6 +7,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l011k4 \
|
||||
nucleo-l031k6 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
stk3200 \
|
||||
stm32f030f4-demo \
|
||||
|
||||
@ -10,6 +10,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -16,6 +16,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l031k6 \
|
||||
nucleo-l053r8 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
slstk3400a \
|
||||
stk3200 \
|
||||
|
||||
@ -49,6 +49,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l053r8 \
|
||||
nucleo-l073rz \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
opencm904 \
|
||||
samd10-xmini \
|
||||
|
||||
@ -18,6 +18,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l011k4 \
|
||||
nucleo-l031k6 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
stk3200 \
|
||||
stm32f030f4-demo \
|
||||
|
||||
@ -18,6 +18,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-l011k4 \
|
||||
nucleo-l031k6 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
samd10-xmini \
|
||||
stk3200 \
|
||||
stm32f030f4-demo \
|
||||
|
||||
@ -72,6 +72,7 @@ BOARD_INSUFFICIENT_MEMORY := \
|
||||
nucleo-wl55jc \
|
||||
nz32-sc151 \
|
||||
olimex-msp430-h1611 \
|
||||
olimex-msp430-h2618 \
|
||||
olimexino-stm32 \
|
||||
opencm904 \
|
||||
openlabs-kw41z-mini-256kib \
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user