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cpu/nrf5x_common: fix pin support for nrf52833xxaa model

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This commit is contained in:
Alexandre Abadie 2021-02-08 19:19:51 +01:00
parent 13ca17ff24
commit 36ca3845c2
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GPG Key ID: 1C919A403CAE1405
3 changed files with 5 additions and 5 deletions
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2
cpu/nrf5x_common/include/periph_cpu_common.h
View File

@ -46,7 +46,7 @@ extern "C" {
*
* The port definition is used (and zeroed) to suppress compiler warnings
*/
#ifdef CPU_MODEL_NRF52840XXAA
#if !defined(CPU_MODEL_NRF52832XXAA) && !defined(CPU_FAM_NRF51)
#define GPIO_PIN(x,y) ((x << 5) | y)
#else
#define GPIO_PIN(x,y) ((x & 0) | y)

4
cpu/nrf5x_common/periph/gpio.c
View File

@ -86,7 +86,7 @@ static inline NRF_GPIO_Type *port(gpio_t pin)
*/
static inline int pin_num(gpio_t pin)
{
#ifdef CPU_MODEL_NRF52840XXAA
#if !defined(CPU_MODEL_NRF52832XXAA) && !defined(CPU_FAM_NRF51)
return (pin & PIN_MASK);
#else
return (int)pin;
@ -184,7 +184,7 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
/* configure the GPIOTE channel: set even mode, pin and active flank */
NRF_GPIOTE->CONFIG[_pin_index] = (GPIOTE_CONFIG_MODE_Event |
(pin_num(pin) << GPIOTE_CONFIG_PSEL_Pos) |
#ifdef CPU_MODEL_NRF52840XXAA
#if !defined(CPU_MODEL_NRF52832XXAA) && !defined(CPU_FAM_NRF51)
((pin & PORT_BIT) << 8) |
#endif
(flank << GPIOTE_CONFIG_POLARITY_Pos));

4
cpu/nrf5x_common/periph/uart.c
View File

@ -85,7 +85,7 @@ static inline NRF_UARTE_Type *dev(uart_t uart)
*/
static uart_isr_ctx_t isr_ctx;
#endif /* CPU_MODEL_NRF52840XXAA || CPU_MODEL_NRF52811XXAA */
#endif /* !CPU_MODEL_NRF52832XXAA && !CPU_FAM_NRF51 */
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
@ -415,7 +415,7 @@ static inline void irq_handler(uart_t uart)
cortexm_isr_end();
}
#endif /* CPU_MODEL_NRF52840XXAA || CPU_MODEL_NRF5211XXAA */
#endif /* !CPU_MODEL_NRF52832XXAA && !CPU_FAM_NRF51 */
#ifdef UART_0_ISR
void UART_0_ISR(void)