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Merge pull request #14919 from bergzand/pr/fe310/unify_ld

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fe310: Unify linker scripts
This commit is contained in:
Koen Zandberg 2020-09-01 18:03:46 +02:00 committed by GitHub
commit 36ecb40dd9
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 60 additions and 32 deletions
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31
cpu/fe310/Makefile.include
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@ -1,3 +1,34 @@
CFLAGS += -Wno-pedantic
RAM_START_ADDR ?= 0x80000000
RAM_LEN ?= 16K
ifeq ($(CPU_MODEL), fe310_g000)
ROM_START_ADDR ?= 0x20400000
ROM_LEN ?= 0x1fc00000
else ifeq ($(CPU_MODEL), fe310_g002)
ROM_START_ADDR ?= 0x20010000
ROM_LEN ?= 0x0006a120
endif
# All variables must be defined in the CPU configuration when using the common
# `ldscripts/fe310.ld`
ifneq (,$(ROM_START_ADDR)$(RAM_START_ADDR)$(ROM_LEN)$(RAM_LEN))
$(if $(ROM_START_ADDR),,$(error ROM_START_ADDR is not defined))
$(if $(RAM_START_ADDR),,$(error RAM_START_ADDR is not defined))
$(if $(ROM_LEN),,$(error ROM_LEN is not defined))
$(if $(RAM_LEN),,$(error RAM_LEN is not defined))
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_start_addr=$(ROM_START_ADDR)
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR)
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN)
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN)
endif
ifneq (,$(ITIM_START_ADDR))
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_itim_start_addr=$(ITIM_START_ADDR)
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_itim_length=$(ITIM_LEN)
endif
LINKER_SCRIPT ?= fe310.ld
include $(RIOTMAKE)/arch/riscv.inc.mk

10
cpu/fe310/ldscripts/fe310_g002.ld → cpu/fe310/ldscripts/fe310.ld
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@ -11,18 +11,20 @@
* @{
*
* @file
* @brief Memory definitions for the SiFive FE310_G002
* @brief Memory definitions for the SiFive FE310
*
* @author Ken Rabold
* @author Koen Zandberg <koen@bergzand.net>
*
* @}
*/
INCLUDE fe310_vars.ld
MEMORY
{
flash (rxai!w) : ORIGIN = 0x20010000, LENGTH = 0x0006a120
ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x00004000
itim (wxa!ri) : ORIGIN = 0x08000000, LENGTH = 0x00002000
flash (rxai!w) : ORIGIN = _rom_start_addr , LENGTH = _rom_length
ram (wxa!ri) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
itim (wxa!ri) : ORIGIN = _itim_start_addr, LENGTH = _itim_length
}
INCLUDE fe310_base.ld

28
cpu/fe310/ldscripts/fe310_g000.ld
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@ -1,28 +0,0 @@
/*
* Copyright (C) 2017, 2019 Ken Rabold
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_fe310
* @{
*
* @file
* @brief Memory definitions for the SiFive FE310_G000
*
* @author Ken Rabold
*
* @}
*/
MEMORY
{
flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 0x1fc00000
ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x00004000
itim (wxa!ri) : ORIGIN = 0x08000000, LENGTH = 0x00002000
}
INCLUDE fe310_base.ld

23
cpu/fe310/ldscripts/fe310_vars.ld Normal file
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@ -0,0 +1,23 @@
/*
* Copyright (C) 2020 Inria
* 2020 Koen Zandberg <koen@bergzand.net
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_fe310
* @{
*
* @file
* @brief Linker variables for SiFive FE310
*
* @author Koen Zandberg <koen@bergzand.net>
*
* @}
*/
_itim_start_addr = DEFINED( _itim_start_addr ) ? _itim_start_addr : 0x0;
_itim_length = DEFINED( _itim_length ) ? _itim_length : 0x0;