diff --git a/boards/common/esp32/include/board_common_esp32.h b/boards/common/esp32/include/board_common_esp32.h index 759c306eb6..a66cae0e52 100644 --- a/boards/common/esp32/include/board_common_esp32.h +++ b/boards/common/esp32/include/board_common_esp32.h @@ -22,8 +22,6 @@ * @{ */ -#include "board_common.h" - /** * @brief External clock crystal frequency (MHz) * @@ -39,6 +37,23 @@ #define ESP32_XTAL_FREQ (40) #endif +#if !DOXYGEN + +/** + * @name ztimer Configuration valid for all ESP32 boards + * @{ + */ +#if CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ <= 80 +# define CONFIG_ZTIMER_USEC_ADJUST_SET (880/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +# define CONFIG_ZTIMER_USEC_ADJUST_SLEEP ((CONFIG_ZTIMER_USEC_ADJUST_SET >> 2) * 5) +#else +# define CONFIG_ZTIMER_USEC_ADJUST_SET (960/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +# define CONFIG_ZTIMER_USEC_ADJUST_SLEEP (CONFIG_ZTIMER_USEC_ADJUST_SET + 1) +#endif +/** @} */ + +#endif /* !DOXYGEN */ + #ifdef __cplusplus extern "C" { #endif diff --git a/boards/common/esp32c3/include/board_common_esp32c3.h b/boards/common/esp32c3/include/board_common_esp32c3.h new file mode 100644 index 0000000000..0bf30898ca --- /dev/null +++ b/boards/common/esp32c3/include/board_common_esp32c3.h @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2025 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +#pragma once + +/** + * @ingroup boards_common_esp32c3 + * @brief Board definitions that are common for all ESP32-C3 boards. + * + * This file contains board configurations that are valid for all ESP32-C3. + * + * For detailed information about the configuration of ESP32-C3 boards, see + * section \ref esp32_peripherals "Common Peripherals". + * + * @author Gunar Schorcht + * @file + * @{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if !DOXYGEN + +/** + * @name ztimer Configuration valid for all ESP32-C3 boards + * @{ + */ +#define CONFIG_ZTIMER_USEC_ADJUST_SET (640/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +#define CONFIG_ZTIMER_USEC_ADJUST_SLEEP (CONFIG_ZTIMER_USEC_ADJUST_SET) +/** @} */ + +#endif /* !DOXYGEN */ + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +/** @} */ diff --git a/boards/common/esp32s2/include/board_common_esp32s2.h b/boards/common/esp32s2/include/board_common_esp32s2.h new file mode 100644 index 0000000000..ace204af95 --- /dev/null +++ b/boards/common/esp32s2/include/board_common_esp32s2.h @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2025 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +#pragma once + +/** + * @ingroup boards_common_esp32s2 + * @brief Board definitions that are common for all ESP32-S2 boards. + * + * This file contains board configurations that are valid for all ESP32-S2. + * + * For detailed information about the configuration of ESP32-S2 boards, see + * section \ref esp32_peripherals "Common Peripherals". + * + * @author Gunar Schorcht + * @file + * @{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if !DOXYGEN + +/** + * @name ztimer Configuration valid for all ESP32-S2 boards + * @{ + */ +#if CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ <= 80 +# define CONFIG_ZTIMER_USEC_ADJUST_SET (880/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +# define CONFIG_ZTIMER_USEC_ADJUST_SLEEP ((CONFIG_ZTIMER_USEC_ADJUST_SET >> 2) * 5) +#else +# define CONFIG_ZTIMER_USEC_ADJUST_SET (960/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +# define CONFIG_ZTIMER_USEC_ADJUST_SLEEP (CONFIG_ZTIMER_USEC_ADJUST_SET + 1) +#endif +/** @} */ + +#endif /* !DOXYGEN */ + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +/** @} */ diff --git a/boards/common/esp32s3/include/board_common_esp32s3.h b/boards/common/esp32s3/include/board_common_esp32s3.h new file mode 100644 index 0000000000..96fe480097 --- /dev/null +++ b/boards/common/esp32s3/include/board_common_esp32s3.h @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2025 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +#pragma once + +/** + * @ingroup boards_common_esp32s3 + * @brief Board definitions that are common for all ESP32-S3 boards. + * + * This file contains board configurations that are valid for all ESP32-S3. + * + * For detailed information about the configuration of ESP32-S3 boards, see + * section \ref esp32_peripherals "Common Peripherals". + * + * @author Gunar Schorcht + * @file + * @{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if !DOXYGEN + +/** + * @name ztimer Configuration valid for all ESP32-S3 boards + * @{ + */ +#if CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ <= 80 +# define CONFIG_ZTIMER_USEC_ADJUST_SET (880/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +# define CONFIG_ZTIMER_USEC_ADJUST_SLEEP ((CONFIG_ZTIMER_USEC_ADJUST_SET >> 2) * 5) +#else +# define CONFIG_ZTIMER_USEC_ADJUST_SET (960/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) +# define CONFIG_ZTIMER_USEC_ADJUST_SLEEP (CONFIG_ZTIMER_USEC_ADJUST_SET) +#endif +/** @} */ + +#endif /* !DOXYGEN */ + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +/** @} */ diff --git a/boards/common/esp32x/include/board_common.h b/boards/common/esp32x/include/board_common.h index 4bdbcea506..c986a934f7 100644 --- a/boards/common/esp32x/include/board_common.h +++ b/boards/common/esp32x/include/board_common.h @@ -31,8 +31,21 @@ #endif #include "periph/gpio.h" + #include "sdkconfig.h" +#if defined(CPU_FAM_ESP32) +# include "board_common_esp32.h" +#elif defined(CPU_FAM_ESP32C3) +# include "board_common_esp32c3.h" +#elif defined(CPU_FAM_ESP32S2) +# include "board_common_esp32s2.h" +#elif defined(CPU_FAM_ESP32S3) +# include "board_common_esp32s3.h" +#else +# error "ESP32x SoC family not supported" +#endif + #ifdef __cplusplus extern "C" { #endif diff --git a/boards/esp32-heltec-lora32-v2/doc.txt b/boards/esp32-heltec-lora32-v2/doc.txt index e96515f13d..061bdfcd0f 100644 --- a/boards/esp32-heltec-lora32-v2/doc.txt +++ b/boards/esp32-heltec-lora32-v2/doc.txt @@ -216,8 +216,8 @@ purpose. However, if optional off-board hardware modules are used, these GPIOs may also be occupied, see section \ref esp32_heltec_lora32_v2_board_configuration for more information. -The corresponding board schematics can be found [here for SX1276 version](https://github.com/Heltec-Aaron-Lee/WiFi_Kit_series/blob/master/SchematicDiagram/WiFi_LoRa_32(V2)/WIFI_LoRa_32_V2(868-915).PDF) -and [here for SX1278 version](https://github.com/Heltec-Aaron-Lee/WiFi_Kit_series/blob/master/SchematicDiagram/WiFi_LoRa_32(V2)/WiFi_LoRa_32_V2(433%2C470-510).PDF). +The corresponding board schematics can be found [here for SX1276 version](https://resource.heltec.cn/download/WiFi_LoRa_32/V2/WIFI_LoRa_32_V2(868-915).PDF) +and [here for SX1278 version](https://resource.heltec.cn/download/WiFi_LoRa_32/V2/WiFi_LoRa_32_V2(433%2C470-510).PDF). \anchor esp32_heltec_lora_32_v2_pinout_img @image html "https://gitlab.com/gschorcht/RIOT.wiki-Images/raw/master/esp32/Heltec_WiFi_LoRa_32_V2_pinout_v2.png" "WiFi LoRa 32 V2 Pintout Diagram" diff --git a/boards/esp32s2-devkit/doc.txt b/boards/esp32s2-devkit/doc.txt index 18cd5c1840..e0cf4d31f0 100644 --- a/boards/esp32s2-devkit/doc.txt +++ b/boards/esp32s2-devkit/doc.txt @@ -155,10 +155,10 @@ I2C_DEV(0) SDA | GPIO8 | | \ref esp32_i2c_interfaces "I2C Interfaces" PWM_DEV(0) | GPIO11, GPIO12, GPIO13, GPIO14 | - | \ref esp32_pwm_channels "PWM Channels" PWM_DEV(1) | GPIO15, GPIO16 | if module `esp_rtc_timer_32k` is not used | \ref esp32_pwm_channels "PWM Channels" RGB-LED | GPIO18 | supported by driver module `ws281x` | | -SPI_DEV(0) CLK | GPIO12 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" -SPI_DEV(0) MISO | GPIO13 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" -SPI_DEV(0) MOSI | GPIO11 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" -SPI_DEV(0) CS0 | GPIO10 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) CLK | GPIO36 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) MISO | GPIO37 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) MOSI | GPIO35 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) CS0 | GPIO34 | SPI2_HOST (FSPI) is used | \ref esp32_spi_interfaces "SPI Interfaces" UART_DEV(0) TxD | GPIO43 | Console (configuration is fixed) | \ref esp32_uart_interfaces "UART interfaces" UART_DEV(0) RxD | GPIO44 | Console (configuration is fixed) | \ref esp32_uart_interfaces "UART interfaces" @@ -175,7 +175,7 @@ The following figures show the pinouts as configured by default board definition. @image html "https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32s2/_images/esp32-s2-devkitm-1-v1-pin-layout.png" "ESP32-S2-DevKitM-1x Pinout" width=900px -@image html "https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32s2/_images/esp32-s2-devkitm-1-v1-pin-layout.png" "ESP32-S2-DevKitC-1x Pinout" width=900px +@image html "https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32s2/_images/esp32-s2-devkitc-1-v1-pinout.png" "ESP32-S2-DevKitC-1x Pinout" width=900px @image html "https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32s2/_images/esp32-s2_saola1-pinout.jpg" "ESP32-S2-Saola-1x Pinout" width=900px The corresponding board schematics can be found: diff --git a/cpu/esp32/Kconfig.esp32c3 b/cpu/esp32/Kconfig.esp32c3 index a41a7eadc2..89f1bdbb10 100644 --- a/cpu/esp32/Kconfig.esp32c3 +++ b/cpu/esp32/Kconfig.esp32c3 @@ -69,7 +69,7 @@ menu "ESP32-C3 specific configurations" config ESP32C3_DEFAULT_CPU_FREQ_MHZ_2 bool "2 MHz" config ESP32C3_DEFAULT_CPU_FREQ_MHZ_5 - bool "50 MHz" + bool "5 MHz" config ESP32C3_DEFAULT_CPU_FREQ_MHZ_10 bool "10 MHz" config ESP32C3_DEFAULT_CPU_FREQ_MHZ_20 diff --git a/cpu/esp32/Makefile b/cpu/esp32/Makefile index bd546aa749..ab7e91414e 100644 --- a/cpu/esp32/Makefile +++ b/cpu/esp32/Makefile @@ -7,7 +7,6 @@ SRC = irq_arch.c startup.c stdatomic.c syscalls.c DIRS += $(RIOTCPU)/esp_common DIRS += periph DIRS += esp-idf -DIRS += esp-idf-api ifneq (, $(filter esp_bootloader, $(USEMODULE))) DIRS += bootloader diff --git a/cpu/esp32/Makefile.dep b/cpu/esp32/Makefile.dep index ab43157e29..fe46c56825 100644 --- a/cpu/esp32/Makefile.dep +++ b/cpu/esp32/Makefile.dep @@ -4,7 +4,6 @@ include $(RIOTCPU)/esp_common/Makefile.dep USEPKG += esp32_sdk -USEMODULE += esp_idf_api USEMODULE += esp_idf_common USEMODULE += esp_idf_efuse USEMODULE += esp_bootloader @@ -21,6 +20,8 @@ ifneq (,$(filter esp_ble,$(USEMODULE))) # add additional modules and packages used for any BLE interface FEATURES_REQUIRED += esp_ble USEMODULE += esp_idf_ble + USEMODULE += esp_idf_nvs_flash + USEMODULE += esp_idf_phy USEPKG += esp32_sdk_lib_phy ifeq (esp32,$(CPU_FAM)) FEATURES_REQUIRED += esp_ble_esp32 @@ -36,20 +37,19 @@ ifneq (,$(filter esp_eth,$(USEMODULE))) USEMODULE += esp_idf_eth USEMODULE += esp_idf_event USEMODULE += esp_idf_gpio - USEMODULE += esp_idf_spi_flash USEMODULE += netdev_eth USEMODULE += netopt - USEMODULE += ztimer_msec endif ifneq (,$(filter esp_wifi_any,$(USEMODULE))) # add additional modules and packages used for any WiFi interface + USEPKG += esp32_sdk_lib_coexist USEPKG += esp32_sdk_lib_phy USEPKG += esp32_sdk_lib_wifi USEMODULE += esp_idf_event USEMODULE += esp_idf_heap USEMODULE += esp_idf_nvs_flash - USEMODULE += esp_idf_spi_flash + USEMODULE += esp_idf_phy USEMODULE += esp_idf_wifi USEMODULE += esp_idf_wpa_supplicant USEMODULE += esp_idf_wpa_supplicant_esp_supplicant @@ -70,9 +70,12 @@ ifneq (,$(filter esp_hw_counter,$(USEMODULE))) endif ifneq (,$(filter esp_idf_nvs_flash,$(USEMODULE))) + # NVS flash uses MBed TLS for encryption + USEPKG += mbedtls + USEMODULE += mbedtls_contrib # add additional modules required by esp_idf_nvs_flash + USEMODULE += esp_idf_spi_flash USEMODULE += pthread - USEMODULE += mtd endif ifneq (,$(filter esp_idf_wifi,$(USEMODULE))) @@ -115,7 +118,6 @@ ifneq (,$(filter esp_spi_ram,$(USEMODULE))) FEATURES_OPTIONAL += esp_spi_oct USEMODULE += esp_idf_gpio USEMODULE += esp_idf_heap - USEMODULE += esp_idf_spi_flash USEMODULE += esp_idf_spi_ram endif @@ -124,13 +126,12 @@ ifneq (,$(filter esp_spi_oct,$(FEATURES_USED))) endif ifneq (,$(filter esp_idf_heap,$(USEMODULE))) - # The ESP-IDF heap component uses the TLSF implementation that is part of - # the component. To avoid conflicts with modules and packages that use the - # RIOT package `tlsf`, this package is also used for the ESP-IDF heap instead - # of its own implementation. There does not seem to be any differences in - # the implementations of TLSF with the exception of heap poisoning, which - # is not configured. - USEPKG += tlsf + # ESP-IDF heap component uses its own and modified TLSF implementation + USEPKG += esp32_sdk_tlsf +endif + +ifneq (,$(filter esp_jtag,$(USEMODULE))) + FEATURES_REQUIRED += esp_jtag endif ifneq (,$(filter lcd_parallel_ll_mcu,$(USEMODULE))) @@ -192,10 +193,6 @@ ifneq (,$(filter tinyusb_portable_espressif,$(USEMODULE))) USEMODULE += esp_idf_usb endif -ifneq (,$(filter esp_jtag,$(USEMODULE))) - FEATURES_REQUIRED += esp_jtag -endif - # enable bootloader reset over USB, requires CDC ACM to be used ifneq (,$(filter usbus_cdc_acm tinyusb_class_cdc,$(USEMODULE))) USEMODULE += usb_board_reset diff --git a/cpu/esp32/Makefile.include b/cpu/esp32/Makefile.include index 59aff47c79..2a4c076c42 100644 --- a/cpu/esp32/Makefile.include +++ b/cpu/esp32/Makefile.include @@ -111,6 +111,7 @@ PSEUDOMODULES += esp_bootloader PSEUDOMODULES += esp_gdbstub PSEUDOMODULES += esp_hw_counter PSEUDOMODULES += esp_idf_gpio_hal +PSEUDOMODULES += esp_idf_phy PSEUDOMODULES += esp_i2c_hw PSEUDOMODULES += esp_jtag PSEUDOMODULES += esp_lcd_gpio @@ -126,13 +127,19 @@ INCLUDES += -I$(RIOTCPU)/$(CPU)/vendor/include INCLUDES += -I$(ESP32_SDK_DIR)/components INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/deprecated +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_adc/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_adc/$(CPU_FAM)/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_common/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_gpio/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_uart/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/soc +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM)/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM) INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include/$(CPU_FAM) +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/include/$(CPU_FAM) INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/port/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_timer/include @@ -144,7 +151,9 @@ INCLUDES += -I$(ESP32_SDK_DIR)/components/log/include INCLUDES += -I$(ESP32_SDK_DIR)/components/newlib/platform_include INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/include INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/register INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include/spi_flash ifneq (,$(filter riscv32%,$(TARGET_ARCH))) INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include @@ -156,7 +165,11 @@ ifneq (,$(filter xtensa%,$(TARGET_ARCH))) endif ifneq (,$(filter esp_ble,$(USEMODULE))) - INCLUDES += -I$(ESP32_SDK_DIR)/components/bt/include/$(CPU_FAM)/include + ifeq (esp32,$(CPU_FAM)) + INCLUDES += -I$(ESP32_SDK_DIR)/components/bt/include/$(CPU_FAM)/include + else ifneq (,$(filter esp32s3 esp32c3,$(CPU_FAM))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/bt/include/esp32c3/include + endif endif ifneq (,$(filter esp_ble_nimble,$(USEMODULE))) @@ -164,12 +177,25 @@ ifneq (,$(filter esp_ble_nimble,$(USEMODULE))) INCLUDES += $(NIMIBASE)/nimble/transport/common/hci_h4/include endif +ifneq (,$(filter esp_i2c_hw,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_i2c/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_pm/include +endif + ifneq (,$(filter esp_spi_ram,$(USEMODULE))) - INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/soc/$(CPU_FAM) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_psram/include endif ifneq (,$(filter esp_idf_lcd,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_i2c/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_spi/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_lcd/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_lcd/priv_include +endif + +ifneq (,$(filter esp_idf_nvs_flash,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_partition/include + CFLAGS += -DMBEDTLS_CIPHER_MODE_XTS endif ifneq (,$(filter esp_idf_spi_flash,$(USEMODULE))) @@ -187,7 +213,6 @@ ifneq (,$(filter esp_wifi_any,$(USEMODULE))) INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_netif/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_wifi/include INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/include - INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include endif ifneq (,$(filter esp_wifi_enterprise,$(USEMODULE))) @@ -202,14 +227,26 @@ ifneq (,$(filter esp_eth,$(USEMODULE))) INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_wifi/include endif +ifneq (,$(filter periph_sdmmc,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_sdmmc/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/sdmmc/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/dma/include +endif + +ifneq (,$(filter ws281x_esp32_hw,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_rmt/include + CFLAGS += -DCONFIG_RMT_SUPPRESS_DEPRECATE_WARN +endif + CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM)) -# we use ESP32 only in single core mode +# we use ESP32x SoC only in single core mode CFLAGS += -DCONFIG_ESP_SYSTEM_SINGLE_CORE_MODE CFLAGS += -DCONFIG_FREERTOS_UNICORE # other ESP-IDF configurations CFLAGS += -DCONFIG_IDF_TARGET_$(call uppercase_and_underscore,$(CPU_FAM)) +CFLAGS += -DCONFIG_IDF_TARGET=\"$(CPU_FAM)\" CFLAGS += -DESP_PLATFORM CFLAGS += -DLOG_TAG_IN_BRACKETS @@ -246,7 +283,9 @@ CFLAGS += -D_CONST=const # TODO no relaxation yet ifneq (,$(filter riscv%,$(TARGET_ARCH))) + CFLAGS += -DCONFIG_IDF_TARGET_ARCH_RISCV CFLAGS += -mno-relax -march=rv32imc_zicsr_zifencei -mabi=ilp32 -DRISCV_NO_RELAX + LDGENFLAGS += -DCONFIG_IDF_TARGET_ARCH_RISCV LINKFLAGS += -mno-relax -march=rv32imc_zicsr_zifencei -mabi=ilp32 GCC_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | \ $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 \ @@ -258,6 +297,8 @@ ifneq (,$(filter riscv%,$(TARGET_ARCH))) endif ifneq (,$(filter xtensa%,$(TARGET_ARCH))) + CFLAGS += -DCONFIG_IDF_TARGET_ARCH_XTENSA + LDGENFLAGS += -DCONFIG_IDF_TARGET_ARCH_XTENSA LINKFLAGS += -L$(ESP32_SDK_DIR)/components/xtensa/$(CPU_FAM) ARCHIVES += -lxt_hal endif @@ -272,13 +313,25 @@ LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom. LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.api.ld LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.libgcc.ld -ifeq (esp32s2,$(CPU_FAM)) - LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.spiflash.ld +ifeq (esp32,$(CPU_FAM)) + # We don't use newlibc functions in ROM for ESP32 + # LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib-data.ld + # LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib-funcs.lds +else ifeq (esp32s2,$(CPU_FAM)) + # We don't use newlibc functions in ROM for ESP32-S2 + # LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib-data.ld + # LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib-funcs.ld + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.spiflash_legacy.ld +else ifeq (esp32s3,$(CPU_FAM)) + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.ble_cca.ld + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.bt_funcs.ld + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld else ifeq (esp32c3,$(CPU_FAM)) + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.ble_cca.ld + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.bt_funcs.ld LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.eco3.ld -else ifeq (esp32s3,$(CPU_FAM)) - LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld + LINKFLAGS += -T$(ESP32_SDK_DIR)/components/riscv/ld/rom.api.ld endif LINKFLAGS += -nostdlib -lgcc -Wl,-gc-sections @@ -293,6 +346,7 @@ endif ifneq (,$(filter esp_wifi_any,$(USEMODULE))) LINKFLAGS += -L$(ESP32_SDK_LIB_WIFI_DIR)/$(CPU_FAM) LINKFLAGS += -L$(ESP32_SDK_LIB_PHY_DIR)/$(CPU_FAM) + LINKFLAGS += -L$(ESP32_SDK_LIB_COEXIST_DIR)/$(CPU_FAM) ARCHIVES += -lcoexist -lcore -lmesh -lnet80211 -lpp ARCHIVES += -lphy -lstdc++ ifeq (esp32,$(CPU_FAM)) @@ -342,13 +396,17 @@ ifneq (,$(filter esp_jtag,$(USEMODULE))) endif LD_SCRIPTS += $(BINDIR)/memory.ld $(BINDIR)/sections.ld +LDGENFLAGS += -DLD_FILE_GEN +LDGENFLAGS += -DRESERVE_RTC_MEM=0x18 +LDGENFLAGS += -DESP_BOOTLOADER_RESERVE_RTC=0x18 -$(BINDIR)/memory.ld: $(RIOTCPU)/$(CPU)/ld/$(CPU_FAM)/memory.ld.in \ +$(BINDIR)/memory.ld: $(RIOTCPU)/$(CPU)/vendor/ld/$(CPU_FAM)/memory.ld.in \ $(BINDIR)/riotbuild/riotbuild.h pkg-prepare - $(Q)$(CC) -DLD_FILE_GEN $(INCLUDES) -include '$(BINDIR)/riotbuild/riotbuild.h' \ - -I$(RIOTCPU)/$(CPU)/ld -P -x c -E $< -o $@ -$(BINDIR)/sections.ld: $(RIOTCPU)/$(CPU)/ld/$(CPU_FAM)/sections.ld.in \ + $(Q)$(CC) $(INCLUDES) -include '$(BINDIR)/riotbuild/riotbuild.h' \ + $(LDGENFLAGS) -I$(RIOTCPU)/$(CPU)/vendor/ld -P -x c -E $< -o $@ +$(BINDIR)/sections.ld: $(RIOTCPU)/$(CPU)/vendor/ld/$(CPU_FAM)/sections.ld.in \ $(BINDIR)/riotbuild/riotbuild.h pkg-prepare - $(Q)$(CC) -DLD_FILE_GEN -include '$(BINDIR)/riotbuild/riotbuild.h' -C -P -x c -E $< -o $@ + $(Q)$(CC) $(INCLUDES) -include '$(BINDIR)/riotbuild/riotbuild.h' \ + $(LDGENFLAGS) -I$(RIOTCPU)/$(CPU)/vendor/ld -C -P -x c -E $< -o $@ $(BOOTLOADER_BIN): diff --git a/cpu/esp32/bootloader/Makefile b/cpu/esp32/bootloader/Makefile index 54b0c7bb92..1cf29cd21d 100644 --- a/cpu/esp32/bootloader/Makefile +++ b/cpu/esp32/bootloader/Makefile @@ -18,15 +18,16 @@ BOOTLOADER_BAUD ?= $(BAUD) ESP_SDK_BOOTLOADER_SRCS = \ components/bootloader/subproject/main/bootloader_start.c \ components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.c \ + components/bootloader_support/bootloader_flash/src/bootloader_flash.c \ + components/bootloader_support/bootloader_flash/src/bootloader_flash_config_$(CPU_FAM).c \ + components/bootloader_support/bootloader_flash/src/flash_qio_mode.c \ components/bootloader_support/src/bootloader_clock_init.c \ components/bootloader_support/src/bootloader_clock_loader.c \ components/bootloader_support/src/bootloader_common.c \ components/bootloader_support/src/bootloader_common_loader.c \ components/bootloader_support/src/bootloader_console.c \ components/bootloader_support/src/bootloader_console_loader.c \ - components/bootloader_support/src/bootloader_efuse_$(CPU_FAM).c \ - components/bootloader_support/src/bootloader_flash.c \ - components/bootloader_support/src/bootloader_flash_config_$(CPU_FAM).c \ + components/bootloader_support/src/bootloader_efuse.c \ components/bootloader_support/src/bootloader_init.c \ components/bootloader_support/src/bootloader_mem.c \ components/bootloader_support/src/bootloader_panic.c \ @@ -39,7 +40,6 @@ ESP_SDK_BOOTLOADER_SRCS = \ components/bootloader_support/src/esp_image_format.c \ components/bootloader_support/src/flash_encrypt.c \ components/bootloader_support/src/flash_partitions.c \ - components/bootloader_support/src/flash_qio_mode.c \ components/bootloader_support/src/secure_boot.c \ components/efuse/$(CPU_FAM)/esp_efuse_fields.c \ components/efuse/$(CPU_FAM)/esp_efuse_table.c \ @@ -47,82 +47,131 @@ ESP_SDK_BOOTLOADER_SRCS = \ components/efuse/src/esp_efuse_api.c \ components/efuse/src/esp_efuse_fields.c \ components/efuse/src/esp_efuse_utility.c \ + components/esp_bootloader_format/esp_bootloader_desc.c \ components/esp_common/src/esp_err_to_name.c \ - components/esp_hw_support/compare_set.c \ - components/esp_hw_support/cpu_util.c \ + components/esp_hw_support/cpu.c \ + components/esp_hw_support/esp_memory_utils.c \ components/esp_hw_support/port/$(CPU_FAM)/chip_info.c \ + components/esp_hw_support/port/$(CPU_FAM)/cpu_region_protect.c \ + components/esp_hw_support/port/$(CPU_FAM)/esp_cpu_intr.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_clk.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_clk_init.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_init.c \ - components/esp_hw_support/port/$(CPU_FAM)/rtc_pm.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_sleep.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_time.c \ components/esp_rom/patches/esp_rom_crc.c \ + components/esp_rom/patches/esp_rom_efuse.c \ + components/esp_rom/patches/esp_rom_gpio.c \ + components/esp_rom/patches/esp_rom_print.c \ + components/esp_rom/patches/esp_rom_spiflash.c \ components/esp_rom/patches/esp_rom_sys.c \ - components/esp_rom/patches/esp_rom_tjpgd.c \ components/esp_rom/patches/esp_rom_uart.c \ components/esp_system/esp_err.c \ - components/hal/cpu_hal.c \ - components/hal/mpu_hal.c \ - components/hal/wdt_hal_iram.c \ - components/log/log_buffers.c \ - components/log/log.c \ - components/log/log_noos.c \ - components/newlib/syscalls.c \ + components/hal/efuse_hal.c \ + components/hal/$(CPU_FAM)/efuse_hal.c \ + components/hal/hal_utils.c \ + components/hal/mmu_hal.c \ + components/log/src/log_timestamp_common.c \ + components/log/src/noos/log_lock.c \ + components/log/src/noos/log_timestamp.c \ + components/soc/dport_access_common.c \ components/soc/$(CPU_FAM)/adc_periph.c \ components/soc/$(CPU_FAM)/gpio_periph.c \ components/soc/$(CPU_FAM)/i2c_periph.c \ components/soc/$(CPU_FAM)/i2s_periph.c \ components/soc/$(CPU_FAM)/interrupts.c \ components/soc/$(CPU_FAM)/ledc_periph.c \ + components/soc/$(CPU_FAM)/mpi_periph.c \ components/soc/$(CPU_FAM)/rmt_periph.c \ - components/soc/$(CPU_FAM)/sigmadelta_periph.c \ + components/soc/$(CPU_FAM)/sdm_periph.c \ components/soc/$(CPU_FAM)/spi_periph.c \ components/soc/$(CPU_FAM)/timer_periph.c \ + components/soc/$(CPU_FAM)/twai_periph.c \ components/soc/$(CPU_FAM)/uart_periph.c \ + components/soc/$(CPU_FAM)/wdt_periph.c \ components/soc/lldesc.c \ - components/spi_flash/$(CPU_FAM)/spi_flash_rom_patch.c \ + components/spi_flash/spi_flash_wrap.c \ # ifneq (,$(filter xtensa%,$(TARGET_ARCH))) - ESP_SDK_BOOTLOADER_SRCS += components/esp_hw_support/port/$(CPU_FAM)/rtc_wdt.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/lcd_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/pcnt_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/rtc_io_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/touch_sensor_periph.c + ESP_SDK_BOOTLOADER_ASMSRC = components/esp_rom/patches/esp_rom_longjmp.S ESP_SDK_BOOTLOADER_SRCS += components/xtensa/eri.c ESP_SDK_BOOTLOADER_SRCS += components/xtensa/xt_trax.c else - ESP_SDK_BOOTLOADER_SRCS += components/esp_hw_support/port/$(CPU_FAM)/cpu_util_$(CPU_FAM).c -endif - -ifneq (,$(filter esp32 esp32s2,$(CPU_FAM))) - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/dac_periph.c -endif - -ifneq (,$(filter esp32 esp32s3,$(CPU_FAM))) - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/mcpwm_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/sdio_slave_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/sdmmc_periph.c -endif - -ifneq (,$(filter esp32c3 esp32h2 esp32s3,$(CPU_FAM))) - ESP_SDK_BOOTLOADER_SRCS += components/efuse/$(CPU_FAM)/esp_efuse_rtc_calib.c endif ifneq (,$(filter esp32,$(CPU_FAM))) - ESP_SDK_BOOTLOADER_SRCS += components/efuse/src/esp_efuse_api_key_esp32.c - ESP_SDK_BOOTLOADER_ASMSRC = components/esp_rom/patches/esp_rom_longjmp.S + ESP_SDK_BOOTLOADER_SRCS += \ + components/efuse/src/efuse_controller/keys/without_key_purposes/three_key_blocks/esp_efuse_api_key.c \ + components/hal/$(CPU_FAM)/cache_hal_$(CPU_FAM).c \ + components/hal/mpu_hal.c \ + components/hal/wdt_hal_iram.c \ + components/soc/$(CPU_FAM)/dac_periph.c \ + components/soc/$(CPU_FAM)/dport_access.c \ + components/soc/$(CPU_FAM)/emac_periph.c \ + components/soc/$(CPU_FAM)/lcd_periph.c \ + components/soc/$(CPU_FAM)/mcpwm_periph.c \ + components/soc/$(CPU_FAM)/pcnt_periph.c \ + components/soc/$(CPU_FAM)/rtc_io_periph.c \ + components/soc/$(CPU_FAM)/sdio_slave_periph.c \ + components/soc/$(CPU_FAM)/sdmmc_periph.c \ + components/soc/$(CPU_FAM)/touch_sensor_periph.c \ + # else ifneq (,$(filter esp32s2,$(CPU_FAM))) - ESP_SDK_BOOTLOADER_SRCS += components/efuse/src/esp_efuse_api_key_esp32xx.c - ESP_SDK_BOOTLOADER_SRCS += components/esp_hw_support/port/$(CPU_FAM)/regi2c_ctrl.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/dedic_gpio_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/soc_include_legacy_warn.c + ESP_SDK_BOOTLOADER_SRCS += \ + components/efuse/$(CPU_FAM)/esp_efuse_rtc_calib.c \ + components/efuse/$(CPU_FAM)/esp_efuse_rtc_table.c \ + components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c \ + components/esp_rom/$(CPU_FAM)/usb_patches.c \ + components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.c \ + components/esp_rom/patches/esp_rom_regi2c_$(CPU_FAM).c \ + components/hal/cache_hal.c \ + components/hal/mpu_hal.c \ + components/hal/wdt_hal_iram.c \ + components/esp_rom/patches/esp_rom_systimer.c \ + components/soc/$(CPU_FAM)/dedic_gpio_periph.c \ + components/soc/$(CPU_FAM)/lcd_periph.c \ + components/soc/$(CPU_FAM)/pcnt_periph.c \ + components/soc/$(CPU_FAM)/rtc_io_periph.c \ + components/soc/$(CPU_FAM)/temperature_sensor_periph.c \ + components/soc/$(CPU_FAM)/touch_sensor_periph.c \ + components/soc/$(CPU_FAM)/usb_dwc_periph.c \ + # +else ifneq (,$(filter esp32s3,$(CPU_FAM))) + ESP_SDK_BOOTLOADER_ASMSRC += \ + components/esp_rom/patches/esp_rom_cache_writeback_$(CPU_FAM).S + ESP_SDK_BOOTLOADER_SRCS += \ + components/efuse/$(CPU_FAM)/esp_efuse_rtc_calib.c \ + components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c \ + components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.c \ + components/esp_rom/patches/esp_rom_systimer.c \ + components/esp_rom/patches/esp_rom_wdt.c \ + components/hal/cache_hal.c \ + components/hal/mpu_hal.c \ + components/soc/$(CPU_FAM)/dedic_gpio_periph.c \ + components/soc/$(CPU_FAM)/gdma_periph.c \ + components/soc/$(CPU_FAM)/lcd_periph.c \ + components/soc/$(CPU_FAM)/mcpwm_periph.c \ + components/soc/$(CPU_FAM)/pcnt_periph.c \ + components/soc/$(CPU_FAM)/rtc_io_periph.c \ + components/soc/$(CPU_FAM)/sdmmc_periph.c \ + components/soc/$(CPU_FAM)/temperature_sensor_periph.c \ + components/soc/$(CPU_FAM)/touch_sensor_periph.c \ + components/soc/$(CPU_FAM)/usb_dwc_periph.c \ + # +else ifneq (,$(filter esp32c3,$(CPU_FAM))) + ESP_SDK_BOOTLOADER_SRCS += \ + components/efuse/$(CPU_FAM)/esp_efuse_rtc_calib.c \ + components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c \ + components/esp_rom/patches/esp_rom_systimer.c \ + components/hal/cache_hal.c \ + components/hal/wdt_hal_iram.c \ + components/soc/$(CPU_FAM)/dedic_gpio_periph.c \ + components/soc/$(CPU_FAM)/gdma_periph.c \ + components/soc/$(CPU_FAM)/temperature_sensor_periph.c \ + # else - ESP_SDK_BOOTLOADER_SRCS += components/efuse/src/esp_efuse_api_key_esp32xx.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/dedic_gpio_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/gdma_periph.c - ESP_SDK_BOOTLOADER_SRCS += components/soc/soc_include_legacy_warn.c + $(error Missing make configuration for ESP32x SoC variant (family): $(CPU_FAM)) endif # Bootloader sdkconfig.h defined in CURDIR directory. @@ -134,18 +183,25 @@ INCLUDES = \ -I$(ESP32_SDK_DIR)/components/bootloader/subproject/components/micro-ecc/micro-ecc \ -I$(ESP32_SDK_DIR)/components/bootloader_support/bootloader_flash/include \ -I$(ESP32_SDK_DIR)/components/bootloader_support/include \ - -I$(ESP32_SDK_DIR)/components/bootloader_support/include_bootloader \ + -I$(ESP32_SDK_DIR)/components/bootloader_support/private_include \ -I$(ESP32_SDK_DIR)/components/efuse/include \ -I$(ESP32_SDK_DIR)/components/efuse/private_include \ -I$(ESP32_SDK_DIR)/components/efuse/$(CPU_FAM)/include \ -I$(ESP32_SDK_DIR)/components/efuse/$(CPU_FAM)/private_include \ + -I$(ESP32_SDK_DIR)/components/esp_app_format/include \ + -I$(ESP32_SDK_DIR)/components/esp_bootloader_format/include \ -I$(ESP32_SDK_DIR)/components/esp_common/include \ -I$(ESP32_SDK_DIR)/components/esp_hw_support/include \ + -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/esp_private \ -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/soc \ -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/soc/$(CPU_FAM) \ + -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/include \ -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM) \ + -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM)/include/ \ -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM)/private_include \ -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM) \ + -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/include \ + -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/include/$(CPU_FAM) \ -I$(ESP32_SDK_DIR)/components/esp_rom/include \ -I$(ESP32_SDK_DIR)/components/esp_rom/include/$(CPU_FAM) \ -I$(ESP32_SDK_DIR)/components/hal/$(CPU_FAM)/include \ @@ -153,8 +209,9 @@ INCLUDES = \ -I$(ESP32_SDK_DIR)/components/hal/platform_port/include \ -I$(ESP32_SDK_DIR)/components/log/include \ -I$(ESP32_SDK_DIR)/components/newlib/platform_include \ - -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/. \ + -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM) \ -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/include \ + -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/register \ -I$(ESP32_SDK_DIR)/components/soc/include \ -I$(ESP32_SDK_DIR)/components/spi_flash/include \ -I$(ESP32_SDK_DIR)/components/spi_flash/include/spi_flash \ @@ -171,10 +228,9 @@ CFLAGS += -Wno-format ifneq (,$(filter riscv32%,$(TARGET_ARCH))) INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include CFLAGS += -DCONFIG_IDF_TARGET_ARCH_RISCV - CFLAGS += -march=rv32imc + CFLAGS += -march=rv32imc_zicsr_zifencei CFLAGS += -Wno-error=format= CFLAGS += -nostartfiles - CFLAGS += -Wno-format GCC_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | \ $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 \ -misa-spec=2.2 -E - > /dev/null 2>&1 && \ @@ -187,53 +243,88 @@ endif ifneq (,$(filter xtensa%,$(TARGET_ARCH))) INCLUDES += -I$(ESP32_SDK_DIR)/components/xtensa/include INCLUDES += -I$(ESP32_SDK_DIR)/components/xtensa/$(CPU_FAM)/include - CFLAGS += -mlongcalls -mtext-section-literals + CFLAGS += -DCONFIG_IDF_TARGET_ARCH_XTENSA + CFLAGS += -mlongcalls + CFLAGS += -mtext-section-literals + CFLAGS += -fno-builtin-memcpy + CFLAGS += -fno-builtin-memset + CFLAGS += -fno-builtin-bzero + CFLAGS += -fno-builtin-stpcpy + CFLAGS += -fno-builtin-strncpy +endif + +ifneq (,$(filter esp32,$(CPU_FAM))) + CFLAGS += -Wno-frame-address endif # BOOTLOADER_BUILD=1 signals to the SDK that's a bootloader build. CFLAGS += \ - -Wno-frame-address \ - -ffunction-sections \ - -fdata-sections \ -Wall \ + -Wextra \ -Werror=all \ + -Wno-error=deprecated-declarations \ + -Wno-error=unused-but-set-variable \ -Wno-error=unused-function \ -Wno-error=unused-variable \ - -Wno-error=deprecated-declarations \ - -Wextra \ - -Wno-unused-parameter \ + -Wno-old-style-declaration \ -Wno-sign-compare \ - -ggdb \ - -Os \ - -freorder-blocks \ - -fstrict-volatile-bitfields \ - -Wno-error=unused-but-set-variable \ + -Wno-unused-parameter \ + -fdata-sections \ + -ffunction-sections \ + -fdiagnostics-color=always \ -fno-jump-tables \ -fno-tree-switch-conversion \ -fno-stack-protector \ + -freorder-blocks \ + -fstrict-volatile-bitfields \ + -ggdb \ + -Os \ -std=gnu99 \ - -Wno-old-style-declaration \ -D_GNU_SOURCE \ -DESP_PLATFORM \ -DBOOTLOADER_BUILD=1 \ + -DNON_OS_BUILD=1 \ + -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE \ + -DSOC_XTAL_FREQ_MHZ=CONFIG_XTAL_FREQ \ + -D_GLIBCXX_HAVE_POSIX_SEMAPHORE \ + -D_GLIBCXX_USE_POSIX_SEMAPHORE \ -DRIOT_BOOTLOADER_BAUD=$(BOOTLOADER_BAUD) \ -DRIOT_FLASH_SIZE=$(FLASH_SIZE) \ - -DWITH_POSIX \ -DHAVE_CONFIG_H \ -MD \ -MT \ # ifneq (,$(filter xtensa%,$(TARGET_ARCH))) - LINKFLAGS = -mlongcalls + LINKFLAGS += -mlongcalls ESP_SDK_BOOTLOADER_ADD_LINK_FLAGS += -L$(ESP32_SDK_DIR)/components/xtensa/$(CPU_FAM) -lxt_hal endif -ifneq (,$(filter esp32 esp32s2,$(CPU_FAM))) - LINKFLAGS = +ifneq (,$(filter esp32,$(CPU_FAM))) ESP_SDK_BOOTLOADER_ADD_LINK_FLAGS += \ -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib-funcs.ld \ - -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.spiflash.ld \ + # +else ifneq (,$(filter esp32s2,$(CPU_FAM))) + ESP_SDK_BOOTLOADER_ADD_LINK_FLAGS += \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib-funcs.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.spiflash_legacy.ld \ + # +else ifneq (,$(filter esp32s3,$(CPU_FAM))) + ESP_SDK_BOOTLOADER_ADD_LINK_FLAGS += \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.wdt.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.version.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.bt_funcs.ld \ + # +else ifneq (,$(filter esp32c3,$(CPU_FAM))) + LINKFLAGS += -nostartfiles + LINKFLAGS += --specs=nosys.specs + ESP_SDK_BOOTLOADER_ADD_LINK_FLAGS += \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.version.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.bt_funcs.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.eco3.ld \ + -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.eco3_bt_funcs.ld \ # endif @@ -255,7 +346,6 @@ LINKFLAGS += \ $(ESP_SDK_BOOTLOADER_OBJS) \ $(ESP_SDK_BOOTLOADER_ADDOBJS) \ $(ESP_SDK_BOOTLOADER_ASMOBJS) \ - -Lgcc \ $(ESP_SDK_BOOTLOADER_ADD_LINK_FLAGS) \ -T$(ESP32_SDK_DIR)/components/bootloader/subproject/main/ld/$(CPU_FAM)/bootloader.ld \ -T$(ESP32_SDK_DIR)/components/bootloader/subproject/main/ld/$(CPU_FAM)/bootloader.rom.ld \ @@ -265,6 +355,7 @@ LINKFLAGS += \ -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.libgcc.ld \ -Wl,--end-group \ -Wl,-EL \ + # # Build the bootloader on the application directory as it depends on the current # app settings from riotbuild.h. @@ -278,7 +369,6 @@ ESP_SDK_BOOTLOADER_ELF = $(ESP_SDK_BOOTLOADER_DIR)/bootloader.elf ESP_SDK_BOOTLOADER_OBJ_FILTER = \ components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.o \ components/bootloader_support/src/secure_boot.o \ - components/bootloader_support/src/flash_encrypt.o \ # ESP_SDK_BOOTLOADER_OBJS = \ @@ -310,7 +400,8 @@ $(ESP_SDK_BOOTLOADER_DIR)/%.o: $(ESP32_SDK_DIR)/%.c $(OBJ_DEPS) $(ESP_SDK_BOOTLOADER_ASMOBJS): \ $(ESP_SDK_BOOTLOADER_DIR)/%.o: $(ESP32_SDK_DIR)/%.S $(Q)mkdir -p $(dir $@) - $(Q)$(AS) $(ASFLAGS) -o $@ $(abspath $<) + $(Q)$(CCACHE) $(CC) \ + $(CFLAGS) $(INCLUDES) -MMD -MP -c $(abspath $<) -o $@ $(ESP_SDK_BOOTLOADER_ADDOBJS): \ $(ESP_SDK_BOOTLOADER_DIR)/%.o: $(CURDIR)/stub.c $(OBJ_DEPS) diff --git a/cpu/esp32/bootloader/sdkconfig.h b/cpu/esp32/bootloader/sdkconfig.h index 9d16694813..8902e481c8 100644 --- a/cpu/esp32/bootloader/sdkconfig.h +++ b/cpu/esp32/bootloader/sdkconfig.h @@ -1,5 +1,6 @@ /* * Copyright (C) 2021 iosabi + * Copyright (C) 2024 Gunar Schorcht * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level @@ -24,6 +25,7 @@ * bootloader. * * @author iosabi + * @author Gunar Schorcht */ #ifndef DOXYGEN @@ -48,8 +50,10 @@ extern "C" { #endif +#define CONFIG_BOOTLOADER_PROJECT_VER 1 + #if MODULE_ESP_LOG_COLORED -#define CONFIG_LOG_COLORS 1 +# define CONFIG_BOOTLOADER_LOG_COLORS 1 #endif #ifndef CONFIG_BOOTLOADER_LOG_LEVEL @@ -104,6 +108,10 @@ extern "C" { #define CONFIG_ESP_CONSOLE_UART_NUM 0 #endif +#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM CONFIG_ESP_CONSOLE_UART_NUM + +#define CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST 1 + #ifdef __cplusplus } #endif diff --git a/cpu/esp32/bootloader/sdkconfig_default_common.h b/cpu/esp32/bootloader/sdkconfig_default_common.h index 203ffc090f..7abc18945e 100644 --- a/cpu/esp32/bootloader/sdkconfig_default_common.h +++ b/cpu/esp32/bootloader/sdkconfig_default_common.h @@ -25,7 +25,6 @@ extern "C" { #endif #define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1 -#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1 #define CONFIG_BOOTLOADER_WDT_ENABLE 1 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0 diff --git a/cpu/esp32/bootloader/sdkconfig_default_esp32.h b/cpu/esp32/bootloader/sdkconfig_default_esp32.h index 5897cdd34d..cfda5ff06f 100644 --- a/cpu/esp32/bootloader/sdkconfig_default_esp32.h +++ b/cpu/esp32/bootloader/sdkconfig_default_esp32.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022 Gunar Schorcht + * Copyright (C) 2024 Gunar Schorcht * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level @@ -24,17 +24,26 @@ extern "C" { #endif -#ifndef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #endif -#define CONFIG_ESP32_DEBUG_OCDAWARE 1 -#define CONFIG_ESP32_XTAL_FREQ 0 +#define CONFIG_XTAL_FREQ 40 + +#define CONFIG_ESP_DEBUG_OCDAWARE 1 #define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000 +#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1 #define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1 #define CONFIG_EFUSE_MAX_BLK_LEN 192 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000 +#define CONFIG_MMU_PAGE_SIZE 0x10000 + +#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1 + +#define CONFIG_ESP_INT_WDT 1 +#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300 +#define CONFIG_ESP_INT_WDT_CHECK_CPU 1 #ifdef __cplusplus } diff --git a/cpu/esp32/bootloader/sdkconfig_default_esp32c3.h b/cpu/esp32/bootloader/sdkconfig_default_esp32c3.h index 4b4003bfe4..4224be7bc6 100644 --- a/cpu/esp32/bootloader/sdkconfig_default_esp32c3.h +++ b/cpu/esp32/bootloader/sdkconfig_default_esp32c3.h @@ -24,16 +24,20 @@ extern "C" { #endif -#ifndef CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 160 +#define CONFIG_ESP32C3_REV_MIN 3 + +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #endif -#define CONFIG_ESP32C3_DEBUG_OCDAWARE 1 -#define CONFIG_ESP32C3_REV_MIN 3 +#define CONFIG_XTAL_FREQ 40 + +#define CONFIG_ESP_DEBUG_OCDAWARE 1 #define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0 #define CONFIG_EFUSE_MAX_BLK_LEN 256 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0005 +#define CONFIG_MMU_PAGE_SIZE 0x10000 #define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1 diff --git a/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h b/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h index 9c9dc5d263..96d369011b 100644 --- a/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h +++ b/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h @@ -24,15 +24,19 @@ extern "C" { #endif -#ifndef CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 160 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #endif -#define CONFIG_ESP32S2_DEBUG_OCDAWARE 1 +#define CONFIG_XTAL_FREQ 40 + +#define CONFIG_ESP_DEBUG_OCDAWARE 1 #define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000 +#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1 #define CONFIG_EFUSE_MAX_BLK_LEN 256 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0002 +#define CONFIG_MMU_PAGE_SIZE 0x10000 #ifdef __cplusplus } diff --git a/cpu/esp32/bootloader/sdkconfig_default_esp32s3.h b/cpu/esp32/bootloader/sdkconfig_default_esp32s3.h index 69995fdf62..baabd7185a 100644 --- a/cpu/esp32/bootloader/sdkconfig_default_esp32s3.h +++ b/cpu/esp32/bootloader/sdkconfig_default_esp32s3.h @@ -24,15 +24,19 @@ extern "C" { #endif -#ifndef CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 160 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #endif -#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1 +#define CONFIG_XTAL_FREQ 40 + +#define CONFIG_ESP_DEBUG_OCDAWARE 1 #define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0 +#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1 #define CONFIG_EFUSE_MAX_BLK_LEN 256 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009 +#define CONFIG_MMU_PAGE_SIZE 0x10000 #define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1 diff --git a/cpu/esp32/doc.txt b/cpu/esp32/doc.txt index 4449b20bc5..5a89f7c6d5 100644 --- a/cpu/esp32/doc.txt +++ b/cpu/esp32/doc.txt @@ -818,19 +818,6 @@ Attenuation | Voltage Range | Symbol @note The reference voltage Vref can vary from device to device in the range of 1.0V and 1.2V. -The Vref of a device can be read at a predefined GPIO with the function -#adc_line_vref_to_gpio. The results of the ADC input can then be adjusted -accordingly. -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~{.c} -extern int adc_line_vref_to_gpio(adc_t line, gpio_t gpio); -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -For the GPIO that can be used with this function, see: - -- \ref esp32_adc_channels_esp32 "ESP32" -- \ref esp32_adc_channels_esp32c3 "ESP32-C3" -- \ref esp32_adc_channels_esp32s2 "ESP32-S2" -- \ref esp32_adc_channels_esp32s3 "ESP32-S3" - @note ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are therefore not available as ADC channels if the modules `esp_wifi` or `esp_now` are used. @@ -1405,15 +1392,14 @@ _Light-sleep_ and the _Deep-sleep_ mode: Parameter | Default | Mode | Description :----------------|:-------------------------|:------|:------------ -ESP_PM_GPIO_HOLD | not defined | Deep | Hold GPIO output level if defined -ESP_PM_WUP_PINS | none | Deep | GPIOs used as wake-up source -ESP_PM_WUP_LEVEL | ESP_PM_WUP_PINS_ANY_HIGH | Deep | Level for wake-up pins to wake-up +ESP_PM_GPIO_HOLD | not defined | Deep | Hold GPIO output level in _Deep-sleep_ mode if defined +ESP_PM_WUP_PINS | none | Deep | GPIOs used as wake-up source from _Deep-sleep_ mode +ESP_PM_WUP_LEVEL | ESP_PM_WUP_PINS_ANY_HIGH | Deep | Level for wake-up pins to wake-up from _Deep-sleep_ mode ESP_PM_WUP_UART0 | disabled | Light | Positive UART0 RxD signal edges to wake-up ESP_PM_WUP_UART1 | disabled | Light | Positive UART1 RxD signal edges to wake-up
-@note - If `ESP_PM_GPIO_HOLD` is defined, GPIOs hold their last output level when entering _Deep-sleep_ mode. Please note that only RTC GPIOs can hold their output value in _Deep-sleep_ mode. @@ -1431,10 +1417,9 @@ ESP_PM_WUP_UART1 | disabled | Light | Positive UART1 RxD signal - `ESP_PM_WUP_PINS_ANY_HIGH` (default) - The system is woken up when any of the GPIOs specified in `ESP_PM_WUP_PINS` becomes HIGH. - `ESP_PM_WUP_PINS_ANY_LOW` - The system is woken up when any of - the GPIOs specified in `ESP_PM_WUP_PINS` becomes LOW - (only available with the ESP32-C3 variant). + the GPIOs specified in `ESP_PM_WUP_PINS` becomes LOW. - `ESP_PM_WUP_PINS_ALL_LOW` - The system is woken up when all GPIOs specified - in `ESP_PM_WUP_PINS` become LOW (not available with the ESP32-C3 variant). + in `ESP_PM_WUP_PINS` become LOW. - `ESP_PM_WUP_UART0` and `ESP_PM_WUP_UART1` define the number of positive edges of the RxD signal of the respective UART that are necessary to wake up the system in the _Light-sleep_ mode. The value must be greater than 2, @@ -1442,6 +1427,15 @@ ESP_PM_WUP_UART1 | disabled | Light | Positive UART1 RxD signal reduced by 2 so that `ESP_PM_WUP_UART0` or `ESP_PM_WUP_UART1` plus 2 is the number of positive edges required to wake up. +@note +- Wake-up from _Light-sleep_ mode works for any of the GPIOs defined as input + with enabled interrupt. +- `ESP_PM_GPIO_HOLD` is not available on ESP32-C3 variant. +- `ESP_PM_GPIO_HOLD` works only for RTC GPIOs. +- `ESP_PM_WUP_PINS_ANY_LOW` is not available on ESP32 variant. +- `ESP_PM_WUP_PINS_ALL_LOW` is only available on ESP32 variant, all other + ESP32x variants support only `ESP_PM_WUP_PINS_ANY_LOW` instead. + In the following example the system shall be woken up from _Deep-sleep_ if the pulled-up pin `GPIO25` (`ESP_PM_WUP_PINS=GPIO25`) goes LOW (`ESP_PM_WUP_LEVEL=ESP_PM_WUP_PINS_ALL_LOW`). The last GPIO output values diff --git a/cpu/esp32/doc_esp32.txt b/cpu/esp32/doc_esp32.txt index 3cb89d508d..ba4d198066 100644 --- a/cpu/esp32/doc_esp32.txt +++ b/cpu/esp32/doc_esp32.txt @@ -110,7 +110,6 @@ The maximum number of ADC channels #ADC_NUMOF_MAX is 18 - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are therefore not available as ADC channels if the modules `esp_wifi` or `esp_now` are used. -- Vref can be read with function #adc_line_vref_to_gpio at GPIO25. ## DAC Channels {#esp32_dac_channels_esp32} diff --git a/cpu/esp32/doc_esp32c3.txt b/cpu/esp32/doc_esp32c3.txt index dd9ad592eb..d29e89db2e 100644 --- a/cpu/esp32/doc_esp32c3.txt +++ b/cpu/esp32/doc_esp32c3.txt @@ -80,10 +80,13 @@ total: The maximum number of ADC channels #ADC_NUMOF_MAX is 6. @note -- ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are - therefore not available as ADC channels if the modules `esp_wifi` or +- According to the ESP32-C2 Errata Sheet, ADC2 with GPIO5 as ADC channel may + not work correctly. By default it is still possible to use it anyway. + Set `CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3` to 0 if you do not want to use + it and want to activate the configuration check for this channel. +- ADC2 is also used by the WiFi module. GPIO5 connected to ADC2 is + therefore not available as ADC channels if the modules `esp_wifi*` or `esp_now` are used. -- Vref can be read with function #adc_line_vref_to_gpio at GPIO5. ## I2C Interfaces {#esp32_i2c_interfaces_esp32c3} @@ -116,8 +119,7 @@ mode: - Controller SPI0 is reserved for caching external memory like Flash - Controller SPI1 is reserved for external memory like PSRAM -- Controller SPI2 can be used as general purpose SPI (also called HSPI) -- Controller SPI3 can be used as general purpose SPI (also called VSPI) +- Controller SPI2 can be used as general purpose SPI (also called FSPI) Thus, only SPI2 (FSPI) can be used as general purpose SPI in RIOT as SPI_DEV(0). @@ -176,15 +178,18 @@ UART_DEV(2) | RxD | GPIO16 |`UART2_RXD` | optional, can be overridden There are two option on how to uese the JTAG interface on ESP32-C3: 1. Using the built-in USB-to-JTAG bridge connected to an USB cable as follows: +
USB Signal | ESP32-C3 Pin :--------------|:----------- D- (white) | GPIO18 D+ (green) | GPIO19 V_Bus (red) | 5V Ground (black) | GND +
2. Using an external JTAG adapter connected to the JTAG interface exposed to GPIOs as follows: +
JTAG Signal | ESP32-C3 Pin :-----------|:----------- TRST_N | CHIP_PU @@ -193,10 +198,11 @@ There are two option on how to uese the JTAG interface on ESP32-C3: TCK | GPIO6 (MTCK) TMS | GPIO4 (MTMS) GND | GND -
+

@note This option requires that the USB D- and USB D+ signals are connected to the ESP32-C3 USB interface at GPIO18 and GPIO19. +
Using the built-in USB-to-JTAG is the default option, i.e. the JTAG interface of the ESP32-C3 is connected to the built-in USB-to-JTAG bridge. To use an external JTAG adapter, the JTAG interface of the ESP32-C3 has to be connected diff --git a/cpu/esp32/doc_esp32s2.txt b/cpu/esp32/doc_esp32s2.txt index 1d4123e1b4..2e6d7bf6d7 100644 --- a/cpu/esp32/doc_esp32s2.txt +++ b/cpu/esp32/doc_esp32s2.txt @@ -170,8 +170,6 @@ total: - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are therefore not available as ADC channels if the modules `esp_wifi` or `esp_now` are used. -- Vref can be read with function #adc_line_vref_to_gpio at any ADC2 channel, - that is at GPIO11 ... GPIO20. - GPIO3 is a strapping pin und shouldn't be used as ADC channel ## DAC Channels {#esp32_dac_channels_esp32s2} diff --git a/cpu/esp32/doc_esp32s3.txt b/cpu/esp32/doc_esp32s3.txt index 9661713cdc..d5cdd640d1 100644 --- a/cpu/esp32/doc_esp32s3.txt +++ b/cpu/esp32/doc_esp32s3.txt @@ -182,8 +182,6 @@ total: - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are therefore not available as ADC channels if the modules `esp_wifi` or `esp_now` are used. -- Vref can be read with function #adc_line_vref_to_gpio at any ADC2 channel, - that is at GPIO11 ... GPIO20. - GPIO3 is a strapping pin und shouldn't be used as ADC channel ## I2C Interfaces {#esp32_i2c_interfaces_esp32s3} diff --git a/cpu/esp32/esp-eth/esp_eth_netdev.c b/cpu/esp32/esp-eth/esp_eth_netdev.c index b46dee1088..85d3e82d4e 100644 --- a/cpu/esp32/esp-eth/esp_eth_netdev.c +++ b/cpu/esp32/esp-eth/esp_eth_netdev.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "net/gnrc/netif/ethernet.h" #include "net/gnrc.h" @@ -32,7 +33,6 @@ #include "od.h" #include "timex.h" -#include "ztimer.h" #include "esp_common.h" #include "esp_attr.h" @@ -44,7 +44,9 @@ #include "esp_eth.h" #include "esp_eth_phy.h" #include "esp_eth_mac.h" +#include "esp_eth_mac_esp.h" #include "esp_event.h" +#include "esp_event_legacy.h" #include "board.h" @@ -73,6 +75,10 @@ #define esp_eth_phy_new_xxxxx(cfg) esp_eth_phy_new_ksz8081(cfg) #elif defined(EMAC_PHY_RTL8201) #define esp_eth_phy_new_xxxxx(cfg) esp_eth_phy_new_rtl8201(cfg) +#elif defined(EMAC_PHY_GENERIC) +#define esp_eth_phy_new_xxxxx(cfg) esp_eth_phy_new_generic(cfg) +#else +#error "Physiscal layer transceiver not defined" #endif /* for source code compatibility of board definitions from ESP-IDF 3.1 */ @@ -164,31 +170,36 @@ static int _esp_eth_init(netdev_t *netdev) phy_config.phy_addr = EMAC_PHY_ADDRESS; phy_config.reset_gpio_num = EMAC_PHY_POWER_PIN; - /* set MAC configuration */ + /* set EMAC configuration */ eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG(); mac_config.sw_reset_timeout_ms = 500; - mac_config.smi_mdc_gpio_num = EMAC_PHY_SMI_MDC_PIN; - mac_config.smi_mdio_gpio_num = EMAC_PHY_SMI_MDIO_PIN; + mac_config.rx_task_prio = 20; + + /* set EMAC configuration */ + eth_esp32_emac_config_t emac_config = ETH_ESP32_EMAC_DEFAULT_CONFIG(); + + emac_config.smi_gpio.mdc_num = EMAC_PHY_SMI_MDC_PIN; + emac_config.smi_gpio.mdio_num = EMAC_PHY_SMI_MDIO_PIN; if (EMAC_PHY_CLOCK_MODE == ETH_CLOCK_GPIO0_IN) { - mac_config.clock_config.rmii.clock_mode = EMAC_CLK_EXT_IN; - mac_config.clock_config.rmii.clock_gpio = EMAC_CLK_IN_GPIO; + emac_config.clock_config.rmii.clock_mode = EMAC_CLK_EXT_IN; + emac_config.clock_config.rmii.clock_gpio = EMAC_CLK_IN_GPIO; } else if (EMAC_PHY_CLOCK_MODE == ETH_CLOCK_GPIO0_OUT) { - mac_config.clock_config.rmii.clock_mode = EMAC_CLK_OUT; - mac_config.clock_config.rmii.clock_gpio = EMAC_APPL_CLK_OUT_GPIO; + emac_config.clock_config.rmii.clock_mode = EMAC_CLK_OUT; + emac_config.clock_config.rmii.clock_gpio = EMAC_APPL_CLK_OUT_GPIO; } else if (EMAC_PHY_CLOCK_MODE == ETH_CLOCK_GPIO16_OUT) { - mac_config.clock_config.rmii.clock_mode = EMAC_CLK_OUT; - mac_config.clock_config.rmii.clock_gpio = EMAC_CLK_OUT_GPIO; + emac_config.clock_config.rmii.clock_mode = EMAC_CLK_OUT; + emac_config.clock_config.rmii.clock_gpio = EMAC_CLK_OUT_GPIO; } else if (EMAC_PHY_CLOCK_MODE == ETH_CLOCK_GPIO17_OUT) { - mac_config.clock_config.rmii.clock_mode = EMAC_CLK_OUT; - mac_config.clock_config.rmii.clock_gpio = EMAC_CLK_OUT_180_GPIO; + emac_config.clock_config.rmii.clock_mode = EMAC_CLK_OUT; + emac_config.clock_config.rmii.clock_gpio = EMAC_CLK_OUT_180_GPIO; } - esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&mac_config); + esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&emac_config, &mac_config); esp_eth_phy_t *phy = esp_eth_phy_new_xxxxx(&phy_config); /* generate Ethernet driver configuration */ @@ -301,7 +312,7 @@ static int _esp_eth_recv(netdev_t *netdev, void *buf, size_t len, void *info) if (IS_ACTIVE(ENABLE_DEBUG)) { printf ("%s: received %d byte\n", __func__, dev->rx_len); - if (IS_ACTIVE(ENABLE_DEBUG) && IS_USED(MODULE_OD)) { + if (IS_ACTIVE(ENABLE_DEBUG_HEXDUMP) && IS_USED(MODULE_OD)) { od_hex_dump(dev->rx_buf, dev->rx_len, OD_WIDTH_DEFAULT); } } diff --git a/cpu/esp32/esp-idf-api/Makefile b/cpu/esp32/esp-idf-api/Makefile deleted file mode 100644 index 67b3b7ffca..0000000000 --- a/cpu/esp32/esp-idf-api/Makefile +++ /dev/null @@ -1,18 +0,0 @@ -MODULE = esp_idf_api - -# ESP-IDF header files must be found first in this module. Therefore, -# the ESP-IDF include paths must come before the RIOT include paths. -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_common/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/platform_port/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/include - -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/$(CPU_FAM)/include -PRE_INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/include - -include $(RIOTBASE)/Makefile.base - -INCLUDES := $(PRE_INCLUDES) $(INCLUDES) diff --git a/cpu/esp32/esp-idf-api/doc.txt b/cpu/esp32/esp-idf-api/doc.txt deleted file mode 100644 index d6129637a4..0000000000 --- a/cpu/esp32/esp-idf-api/doc.txt +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (C) 2022 Gunar Schorcht - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @defgroup cpu_esp32_esp_idf_api ESP-IDF Interface API - * @ingroup cpu_esp32 - * @brief ESP-IDF Interface API - * - * This module implements an interface for ESP-IDF types and functions that are - * required by RIOT-OS but cannot be included directly due to name conflicts. - * - * For this purpose, the header files of this module declare all the types and - * functions that are required from the ESP-IDF, but without using the ESP-IDF - * header files with conflicting names. The implementation of the module then - * uses the ESP-IDF. In most cases, simple wrapper functions are sufficient. - * - * @author Gunar Schorcht - */ diff --git a/cpu/esp32/esp-idf-api/gpio.c b/cpu/esp32/esp-idf-api/gpio.c deleted file mode 100644 index d373dfda9b..0000000000 --- a/cpu/esp32/esp-idf-api/gpio.c +++ /dev/null @@ -1,144 +0,0 @@ -/* - * Copyright (C) 2022 Gunar Schorcht - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @ingroup cpu_esp32_esp_idf_api - * @{ - * - * @file - * @brief Interface for the ESP-IDF GPIO HAL API - * - * @author Gunar Schorcht - * @} - */ - -#include - -#include "driver/gpio.h" -#include "driver/rtc_io.h" -#include "hal/gpio_hal.h" -#include "esp_sleep.h" - -#include "esp_idf_api/gpio.h" - -esp_err_t esp_idf_gpio_config(const gpio_config_t *cfg) -{ - return gpio_config(cfg); -} - -esp_err_t esp_idf_gpio_reset_pin(gpio_num_t gpio_num) -{ - return gpio_reset_pin(gpio_num); -} - -esp_err_t esp_idf_gpio_intr_enable(gpio_num_t gpio_num) -{ - return gpio_intr_enable(gpio_num); -} - -esp_err_t esp_idf_gpio_intr_disable(gpio_num_t gpio_num) -{ - return gpio_intr_disable(gpio_num); -} - -esp_err_t esp_idf_gpio_set_intr_type(gpio_num_t gpio_num, - gpio_int_type_t intr_type) -{ - return gpio_set_intr_type(gpio_num, intr_type); -} - -esp_err_t esp_idf_gpio_install_isr_service(int intr_alloc_flags) - -{ - return gpio_install_isr_service(intr_alloc_flags); -} - -esp_err_t esp_idf_gpio_isr_handler_add(gpio_num_t gpio_num, - gpio_isr_t isr_handler, void *args) - -{ - return gpio_isr_handler_add(gpio_num, isr_handler, args); -} - -esp_err_t esp_idf_gpio_wakeup_enable(gpio_num_t gpio_num, - gpio_int_type_t intr_type) - -{ - return gpio_wakeup_enable(gpio_num, intr_type); -} - -#ifdef ESP_PM_GPIO_HOLD -esp_err_t esp_idf_gpio_deep_sleep_hold(void) -{ -#if SOC_RTCIO_HOLD_SUPPORTED - extern esp_err_t rtc_gpio_force_hold_en_all(void); - return rtc_gpio_force_hold_en_all(); -#elif SOC_GPIO_SUPPORT_FORCE_HOLD - gpio_deep_sleep_hold_en(); - return ESP_OK; -#else - _Static_assert(0, "ESP32x SoC does not support hold feature in deep sleep"); - return ESP_FAIL; -#endif -#if CPU_FAM_ESP32 - /* isolating GPIO12 from external circuits is especially recommended for - * ESP32-WROVER that have an external pullup on GPIO12 */ - rtc_gpio_isolate(GPIO_NUM_12); -#endif -} -#endif /* ESP_PM_GPIO_HOLD */ - -esp_err_t esp_idf_gpio_set_drive_capability(gpio_num_t gpio_num, - gpio_drive_cap_t strength) -{ - return gpio_set_drive_capability(gpio_num, strength); -} - -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED -esp_err_t esp_idf_rtc_gpio_deinit(gpio_num_t gpio_num) - -{ - if (!rtc_gpio_is_valid_gpio(gpio_num)) { - return ESP_ERR_INVALID_ARG; - } - return rtc_gpio_deinit(gpio_num); -} - -esp_err_t esp_idf_rtc_gpio_pullup_en(gpio_num_t gpio_num) -{ - if (!rtc_gpio_is_valid_gpio(gpio_num)) { - return ESP_ERR_INVALID_ARG; - } - return rtc_gpio_pullup_en(gpio_num); -} - -esp_err_t esp_idf_rtc_gpio_pullup_dis(gpio_num_t gpio_num) -{ - if (!rtc_gpio_is_valid_gpio(gpio_num)) { - return ESP_ERR_INVALID_ARG; - } - return rtc_gpio_pullup_dis(gpio_num); -} - -esp_err_t esp_idf_rtc_gpio_pulldown_en(gpio_num_t gpio_num) -{ - if (!rtc_gpio_is_valid_gpio(gpio_num)) { - return ESP_ERR_INVALID_ARG; - } - return rtc_gpio_pulldown_en(gpio_num); -} - -esp_err_t esp_idf_rtc_gpio_pulldown_dis(gpio_num_t gpio_num) -{ - if (!rtc_gpio_is_valid_gpio(gpio_num)) { - return ESP_ERR_INVALID_ARG; - } - return rtc_gpio_pulldown_dis(gpio_num); -} - -#endif diff --git a/cpu/esp32/esp-idf-api/uart.c b/cpu/esp32/esp-idf-api/uart.c deleted file mode 100644 index 1d73617601..0000000000 --- a/cpu/esp32/esp-idf-api/uart.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2022 Gunar Schorcht - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @ingroup cpu_esp32_esp_idf_api - * @{ - * - * @file - * @brief Interface for the ESP-IDF UART HAL API - * - * @author Gunar Schorcht - * @} - */ - -#include -#include - -#include "driver/uart.h" -#include "hal/uart_hal.h" - -#include "esp_idf_api/uart.h" - -static uart_hal_context_t _uart_hal_ctx[] = { -#if UART_NUM_MAX >= 1 - { - .dev = UART_LL_GET_HW(0), - }, -#endif -#if UART_NUM_MAX >= 2 - { - .dev = UART_LL_GET_HW(1), - }, -#endif -#if UART_NUM_MAX >= 3 - { - .dev = UART_LL_GET_HW(2), - }, -#endif -}; - -void esp_idf_uart_set_wakeup_threshold(unsigned uart_num, uint32_t threshold) -{ - assert(uart_num < ARRAY_SIZE(_uart_hal_ctx)); - uart_hal_set_wakeup_thrd(&_uart_hal_ctx[uart_num], threshold); -} diff --git a/cpu/esp32/esp-idf/adc/Makefile b/cpu/esp32/esp-idf/adc/Makefile index 267f7fa6ac..d8c952c280 100644 --- a/cpu/esp32/esp-idf/adc/Makefile +++ b/cpu/esp32/esp-idf/adc/Makefile @@ -2,28 +2,44 @@ MODULE = esp_idf_adc # source files to be compiled for this module ESP32_SDK_SRC = \ - components/driver/adc.c \ - components/driver/adc_common.c \ - components/hal/adc_hal.c \ + components/esp_adc/adc_cali.c \ + components/esp_adc/adc_common.c \ + components/esp_adc/adc_oneshot.c \ + components/esp_hw_support/adc_share_hw_ctrl.c \ + components/hal/adc_hal_common.c \ + components/hal/adc_oneshot_hal.c \ components/soc/$(CPU_FAM)/adc_periph.c \ # -ifneq (,$(filter esp32c3 esp32s2,$(CPU_FAM))) - ESP32_SDK_SRC += components/driver/$(CPU_FAM)/adc2_init_cal.c - INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/include/driver +ifeq (,$(filter esp_idf_gpio,$(USEMODULE))) + ESP32_SDK_SRC += components/hal/rtc_io_hal.c endif -ifneq (,$(filter esp32c3 esp32h2 esp32s3,$(CPU_FAM))) +ifneq (esp32,$(CPU_FAM)) ESP32_SDK_SRC += components/efuse/$(CPU_FAM)/esp_efuse_rtc_calib.c endif -ifneq (,$(filter esp32s2,$(CPU_FAM))) +ifeq (esp32s2,$(CPU_FAM)) ESP32_SDK_SRC += components/efuse/esp32s2/esp_efuse_rtc_table.c endif +ifneq (,$(filter esp32 esp32s2,$(CPU_FAM))) + ESP32_SDK_SRC += components/esp_adc/$(CPU_FAM)/adc_cali_line_fitting.c +else + ESP32_SDK_SRC += components/esp_adc/adc_cali_curve_fitting.c +endif + +ifneq (,$(filter esp32h2 esp32s3 esp32c3 esp32c6,$(CPU_FAM))) + ESP32_SDK_SRC += components/esp_adc/$(CPU_FAM)/curve_fitting_coefficients.c +endif + include $(RIOTBASE)/Makefile.base ESP32_SDK_BIN = $(BINDIR)/$(MODULE) +CFLAGS += -Wno-unused-but-set-variable + +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_adc/interface + include ../esp_idf.mk include ../esp_idf_cflags.mk diff --git a/cpu/esp32/esp-idf/ble/Makefile b/cpu/esp32/esp-idf/ble/Makefile index d0e1a4baa6..0dc4888cd0 100644 --- a/cpu/esp32/esp-idf/ble/Makefile +++ b/cpu/esp32/esp-idf/ble/Makefile @@ -1,27 +1,20 @@ MODULE = esp_idf_ble -# source files to be compiled for this module -ESP32_SDK_SRC = \ - components/bt/controller/$(CPU_FAM)/bt.c \ - # - -ifeq (,$(filter esp_idf_wifi,$(USEMODULE))) - ESP32_SDK_SRC += \ - components/esp_hw_support/port/$(CPU_FAM)/dport_access.c \ - components/esp_phy/src/phy_init.c \ - components/esp_wifi/src/wifi_init.c \ - # +ifeq (esp32,$(CPU_FAM)) + # source files to be compiled for this module + ESP32_SDK_SRC += components/bt/controller/$(CPU_FAM)/bt.c + ESP32_SDK_SRC += components/esp_system/esp_system.c +else ifneq (,$(filter esp32s3 esp32c3,$(CPU_FAM))) + # source files to be compiled for this module + ESP32_SDK_SRC += components/bt/controller/esp32c3/bt.c + ESP32_SDK_SRC += components/esp_system/esp_system.c endif -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_event/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_netif/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/$(CPU_FAM)/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_coex/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_partition/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_wifi/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/include - +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/include INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/esp_supplicant/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/tcpip_adapter/include CFLAGS += -Wno-cast-function-type CFLAGS += -Wno-implicit-fallthrough diff --git a/cpu/esp32/esp-idf/common/Makefile b/cpu/esp32/esp-idf/common/Makefile index ec7d684b80..6a3502a2b7 100644 --- a/cpu/esp32/esp-idf/common/Makefile +++ b/cpu/esp32/esp-idf/common/Makefile @@ -2,35 +2,47 @@ MODULE = esp_idf_common # source files required from ESP-IDF in any case, regardless of additional modules ESP32_SDK_SRC = \ - components/bootloader_support/src/bootloader_flash_config_$(CPU_FAM).c \ - components/bootloader_support/src/bootloader_flash.c \ - components/bootloader_support/src/bootloader_efuse_$(CPU_FAM).c \ + components/bootloader_support/bootloader_flash/src/bootloader_flash_config_$(CPU_FAM).c \ + components/bootloader_support/bootloader_flash/src/bootloader_flash.c \ + components/bootloader_support/src/bootloader_common.c \ + components/bootloader_support/src/bootloader_efuse.c \ components/bootloader_support/src/bootloader_mem.c \ components/bootloader_support/src/bootloader_random_$(CPU_FAM).c \ - components/driver/periph_ctrl.c \ - components/esp_hw_support/cpu_util.c \ + components/esp_app_format/esp_app_desc.c \ + components/esp_hw_support/clk_ctrl_os.c \ components/esp_hw_support/esp_clk.c \ + components/esp_hw_support/esp_gpio_reserve.c \ + components/esp_hw_support/periph_ctrl.c \ + components/esp_hw_support/port/$(CPU_FAM)/esp_clk_tree.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_clk.c \ - components/esp_hw_support/port/$(CPU_FAM)/rtc_clk_init.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_init.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_sleep.c \ components/esp_hw_support/port/$(CPU_FAM)/rtc_time.c \ + components/esp_hw_support/port/$(CPU_FAM)/sar_periph_ctrl.c \ + components/esp_hw_support/port/esp_clk_tree_common.c \ components/esp_hw_support/regi2c_ctrl.c \ + components/esp_hw_support/sleep_gpio.c \ + components/esp_hw_support/sleep_event.c \ components/esp_hw_support/sleep_modes.c \ - components/esp_pm/pm_impl.c \ + components/esp_hw_support/sleep_modem.c \ + components/esp_mm/esp_cache.c \ + components/esp_mm/esp_mmu_map.c \ + components/esp_mm/port/$(CPU_FAM)/ext_mem_layout.c \ + components/esp_rom/patches/esp_rom_sys.c \ components/esp_rom/patches/esp_rom_uart.c \ components/esp_system/esp_err.c \ - components/esp_system/esp_system.c \ components/esp_system/port/cpu_start.c \ components/esp_system/port/soc/$(CPU_FAM)/cache_err_int.c \ components/esp_system/port/soc/$(CPU_FAM)/clk.c \ - components/esp_system/port/soc/$(CPU_FAM)/reset_reason.c \ - components/esp_system/system_time.c \ + components/esp_system/port/esp_system_chip.c \ components/esp_timer/src/esp_timer.c \ + components/esp_timer/src/esp_timer_impl_common.c \ + components/esp_timer/src/esp_timer_init.c \ components/esp_timer/src/system_time.c \ - components/hal/cpu_hal.c \ - components/hal/mpu_hal.c \ - components/hal/timer_hal.c \ + components/hal/efuse_hal.c \ + components/hal/mmu_hal.c \ + components/hal/$(CPU_FAM)/clk_tree_hal.c \ + components/hal/$(CPU_FAM)/efuse_hal.c \ components/hal/uart_hal.c \ components/hal/wdt_hal_iram.c \ components/newlib/port/esp_time_impl.c \ @@ -38,8 +50,37 @@ ESP32_SDK_SRC = \ components/spi_flash/flash_ops.c \ # -ifneq (,$(filter periph_adc periph_dac,$(USEMODULE))) - ESP32_SDK_SRC += components/hal/rtc_io_hal.c +ifneq (,$(filter esp_idf_nvs_flash,$(USEMODULE))) + ESP32_SDK_SRC += components/bootloader_support/src/flash_encrypt.c + ESP32_SDK_SRC += components/esp_partition/partition.c + ESP32_SDK_SRC += components/esp_partition/partition_target.c + INCLUDES += -I$(ESP32_SDK_DIR)/components/app_update/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_bootloader_format/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_partition/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/include +endif + +ifneq (,$(filter esp_spi_ram,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_psram/include +endif + +# TODO separate module +ifneq (,$(filter esp_idf_phy,$(USEMODULE))) + ESP32_SDK_SRC += components/esp_phy/$(CPU_FAM)/phy_init_data.c + ESP32_SDK_SRC += components/esp_phy/src/phy_common.c + ESP32_SDK_SRC += components/esp_phy/src/phy_init.c + ESP32_SDK_SRC += components/esp_system/port/soc/$(CPU_FAM)/reset_reason.c + ESP32_SDK_SRC += components/soc/esp32/dport_access.c + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_event/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_netif/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/$(CPU_FAM)/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_wifi/include + ifeq (,$(filter esp_idf_wifi,$(USEMODULE))) + ESP32_SDK_SRC += components/esp_wifi/src/wifi_init.c + INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/esp_supplicant/include + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_coex/include + endif endif # TODO separate module @@ -50,7 +91,6 @@ endif # TODO separate module ifneq (,$(filter periph_dac,$(USEMODULE))) - ESP32_SDK_SRC += components/driver/dac_common.c ESP32_SDK_SRC += components/soc/$(CPU_FAM)/dac_periph.c endif @@ -61,9 +101,7 @@ endif # TODO separate module ifneq (,$(filter periph_i2c%,$(USEMODULE))) - ESP32_SDK_SRC += components/driver/i2c.c ESP32_SDK_SRC += components/hal/i2c_hal.c - ESP32_SDK_SRC += components/hal/i2c_hal_iram.c ESP32_SDK_SRC += components/soc/$(CPU_FAM)/i2c_periph.c endif @@ -76,52 +114,66 @@ endif # TODO separate module ifneq (,$(filter periph_spi,$(USEMODULE))) - ESP32_SDK_SRC += components/hal/spi_hal.c ESP32_SDK_SRC += components/soc/$(CPU_FAM)/spi_periph.c endif +# TODO separate module +ifneq (,$(filter periph_uart,$(USEMODULE))) + ESP32_SDK_SRC += components/soc/$(CPU_FAM)/uart_periph.c +endif + ifneq (,$(filter xtensa%,$(TARGET_ARCH))) - ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/rtc_wdt.c ESP32_SDK_SRC += components/soc/$(CPU_FAM)/rtc_io_periph.c endif ifneq (,$(filter riscv%,$(TARGET_ARCH))) ESP32_SDK_SRC += components/riscv/interrupt.c - ESP32_SDK_ASMSRC += components/freertos/port/riscv/portasm.S + ESP32_SDK_SRC += components/riscv/interrupt_intc.c + ESP32_SDK_ASMSRC += components/freertos/FreeRTOS-Kernel/portable/riscv/portasm.S ESP32_SDK_ASMSRC += components/riscv/vectors.S + ESP32_SDK_ASMSRC += components/riscv/vectors_intc.S endif ifeq (esp32,$(CPU_FAM)) - ESP32_SDK_SRC += components/esp_timer/src/esp_timer_impl_frc_legacy.c + ESP32_SDK_SRC += components/esp_mm/cache_esp32.c + ESP32_SDK_SRC += components/esp_timer/src/esp_timer_impl_lac.c + ESP32_SDK_SRC += components/hal/esp32/cache_hal_esp32.c endif ifeq (esp32c3,$(CPU_FAM)) - ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/cpu_util_$(CPU_FAM).c - ESP32_SDK_SRC += components/esp_hw_support/sleep_retention.c + ESP32_SDK_SRC += components/esp_hw_support/lowpower/port/$(CPU_FAM)/sleep_cpu.c + ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/systimer.c + ESP32_SDK_SRC += components/esp_hw_support/sleep_console.c ESP32_SDK_SRC += components/esp_timer/src/esp_timer_impl_systimer.c ESP32_SDK_SRC += components/hal/$(CPU_FAM)/rtc_cntl_hal.c + ESP32_SDK_SRC += components/hal/cache_hal.c ESP32_SDK_SRC += components/hal/systimer_hal.c endif ifeq (esp32s2,$(CPU_FAM)) - ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/regi2c_ctrl.c + ESP32_SDK_SRC += components/esp_rom/patches/esp_rom_regi2c_$(CPU_FAM).c + ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/systimer.c ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/memprot.c - ESP32_SDK_SRC += components/esp_hw_support/sleep_retention.c ESP32_SDK_SRC += components/esp_system/port/brownout.c ESP32_SDK_SRC += components/esp_timer/src/esp_timer_impl_systimer.c - ESP32_SDK_SRC += components/hal/$(CPU_FAM)/brownout_hal.c ESP32_SDK_SRC += components/hal/$(CPU_FAM)/touch_sensor_hal.c + ESP32_SDK_SRC += components/hal/brownout_hal.c + ESP32_SDK_SRC += components/hal/cache_hal.c ESP32_SDK_SRC += components/hal/systimer_hal.c endif ifeq (esp32s3,$(CPU_FAM)) - ESP32_SDK_SRC += components/esp_hw_support/sleep_retention.c + ESP32_SDK_SRC += components/esp_hw_support/mspi_timing_tuning.c + ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/mspi_timing_config.c + ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/systimer.c + ESP32_SDK_SRC += components/esp_hw_support/sleep_console.c + ESP32_SDK_SRC += components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.c + ESP32_SDK_SRC += components/esp_rom/patches/esp_rom_efuse.c ESP32_SDK_SRC += components/esp_timer/src/esp_timer_impl_systimer.c - ESP32_SDK_SRC += components/hal/$(CPU_FAM)/rtc_cntl_hal.c ESP32_SDK_SRC += components/hal/$(CPU_FAM)/touch_sensor_hal.c + ESP32_SDK_SRC += components/hal/cache_hal.c ESP32_SDK_SRC += components/hal/systimer_hal.c - ESP32_SDK_SRC += components/spi_flash/spi_flash_timing_tuning.c - ESP32_SDK_SRC += components/spi_flash/$(CPU_FAM)/spi_timing_config.c + ESP32_SDK_SRC += components/spi_flash/$(CPU_FAM)/spi_flash_oct_flash_init.c endif include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/efuse/Makefile b/cpu/esp32/esp-idf/efuse/Makefile index 04d9484e1a..758892d5f3 100644 --- a/cpu/esp32/esp-idf/efuse/Makefile +++ b/cpu/esp32/esp-idf/efuse/Makefile @@ -11,9 +11,9 @@ ESP32_SDK_SRC = \ # ifneq (,$(filter esp32,$(CPU_FAM))) - ESP32_SDK_SRC += components/efuse/src/esp_efuse_api_key_esp32.c + ESP32_SDK_SRC += components/efuse/src/efuse_controller/keys/without_key_purposes/three_key_blocks/esp_efuse_api_key.c else - ESP32_SDK_SRC += components/efuse/src/esp_efuse_api_key_esp32xx.c + ESP32_SDK_SRC += components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c endif # additional include pathes required by this module diff --git a/cpu/esp32/esp-idf/esp_idf.mk b/cpu/esp32/esp-idf/esp_idf.mk index 92cd2315c2..8ba15a9e2f 100644 --- a/cpu/esp32/esp-idf/esp_idf.mk +++ b/cpu/esp32/esp-idf/esp_idf.mk @@ -1,19 +1,25 @@ # common definitions for all ESP-IDF modules # additional include pathes required by ESP-IDF module +INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/bootloader_flash/include INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/include_bootloader -INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/$(CPU_FAM)/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/private_include INCLUDES += -I$(ESP32_SDK_DIR)/components/efuse/include INCLUDES += -I$(ESP32_SDK_DIR)/components/efuse/$(CPU_FAM)/include INCLUDES += -I$(ESP32_SDK_DIR)/components/efuse/$(CPU_FAM)/private_include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_app_format/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_gpio/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/ldo/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM) -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM)/private_include -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_ipc/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_mm/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_pm/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/port/public_compat +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/port/include/private INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_timer/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_timer/private_include +INCLUDES += -I$(ESP32_SDK_DIR)/components/freertos/esp_additions/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/platform_port/include/hal +INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/$(CPU_FAM)/include INCLUDES += -I$(ESP32_SDK_DIR)/components/newlib/priv_include INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include @@ -22,8 +28,12 @@ ifneq (,$(filter xtensa%,$(TARGET_ARCH))) INCLUDES += -I$(ESP32_SDK_DIR)/components/xtensa/$(CPU_FAM)/include endif -ifneq (,$(filter esp32c3 esp32h2 esp32s3,$(CPU_FAM))) - INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/port/$(CPU_FAM)/private_include +ifeq (esp32s3,$(CPU_FAM)) + INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include/spi_flash +endif + +ifneq (,$(filter periph_i2c%,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/i2c/include endif SRC := $(addprefix $(ESP32_SDK_DIR)/,$(ESP32_SDK_SRC)) diff --git a/cpu/esp32/esp-idf/esp_idf_cflags.mk b/cpu/esp32/esp-idf/esp_idf_cflags.mk index b503f0e7a7..00ec2884b7 100644 --- a/cpu/esp32/esp-idf/esp_idf_cflags.mk +++ b/cpu/esp32/esp-idf/esp_idf_cflags.mk @@ -34,13 +34,10 @@ CFLAGS += -Wno-enum-compare # those are false positives. CFLAGS += -Wno-cast-align -# TODO: required to be able to compile with GCC 12.1, remove them after upgrade to ESP-IDF 5.1 -CFLAGS += -Wno-attributes +# TODO: required to be able to compile with GCC 14.0, remove them later CFLAGS += -Wno-enum-conversion -CFLAGS += -Wno-error=format= -CFLAGS += -Wno-format -CFLAGS += -Wno-use-after-free CFLAGS += -Wno-incompatible-pointer-types +CFLAGS += -Wno-unused-function # additional CFLAGS required for RISC-V architecture ifneq (,$(filter riscv32%,$(TARGET_ARCH))) diff --git a/cpu/esp32/esp-idf/esp_idf_support.c b/cpu/esp32/esp-idf/esp_idf_support.c index eb23ee349a..289c9c53ee 100644 --- a/cpu/esp32/esp-idf/esp_idf_support.c +++ b/cpu/esp32/esp-idf/esp_idf_support.c @@ -36,39 +36,6 @@ ESP_EVENT_DEFINE_BASE(IP_EVENT); #endif -/* Global variables required by ESP-IDF */ -uint8_t *g_wpa_anonymous_identity; -int g_wpa_anonymous_identity_len; - -uint8_t *g_wpa_username; -int g_wpa_username_len; - -uint8_t *g_wpa_password; -int g_wpa_password_len; - -uint8_t *g_wpa_new_password; -int g_wpa_new_password_len; - -const uint8_t *g_wpa_client_cert; -int g_wpa_client_cert_len; - -const uint8_t *g_wpa_private_key; -int g_wpa_private_key_len; - -const uint8_t *g_wpa_private_key_passwd; -int g_wpa_private_key_passwd_len; - -const uint8_t *g_wpa_ca_cert; -int g_wpa_ca_cert_len; - -char *g_wpa_ttls_phase2_type; -bool g_wpa_suiteb_certification; - -char *g_wpa_phase1_options; - -uint8_t *g_wpa_pac_file; -int g_wpa_pac_file_len; - /* * provided by: /path/to/esp-idf/components/log/log_freertos.c */ @@ -88,7 +55,7 @@ static esp_log_level_entry_t _log_levels[] = { }; /* - * provided by: /path/to/esp-idf/component/log/log.c + * provided by: /path/to/esp-idf/components/log/log.c */ void IRAM_ATTR esp_log_write(esp_log_level_t level, const char* tag, const char* format, ...) @@ -100,7 +67,7 @@ void IRAM_ATTR esp_log_write(esp_log_level_t level, } /* - * provided by: /path/to/esp-idf/component/log/log.c + * provided by: /path/to/esp-idf/components/log/log.c */ void IRAM_ATTR esp_log_writev(esp_log_level_t level, const char *tag, @@ -134,7 +101,7 @@ void IRAM_ATTR esp_log_writev(esp_log_level_t level, } /* - * provided by: /path/to/esp-idf/component/log/log.c + * provided by: /path/to/esp-idf/components/log/log.c */ void esp_log_level_set(const char* tag, esp_log_level_t level) { @@ -152,3 +119,12 @@ void esp_log_level_set(const char* tag, esp_log_level_t level) _log_levels[i].level = level; } + +/* + * provided by: /path/to/esp-idf/components/newlib/time.c + */ +void esp_newlib_time_init(void) +{ + extern void esp_time_impl_init(void); + esp_time_impl_init(); +} diff --git a/cpu/esp32/esp-idf/eth/Makefile b/cpu/esp32/esp-idf/eth/Makefile index 1eeb9aa80b..bb3916e48b 100644 --- a/cpu/esp32/esp-idf/eth/Makefile +++ b/cpu/esp32/esp-idf/eth/Makefile @@ -3,15 +3,20 @@ MODULE = esp_idf_eth # source files to be compiled for this module ESP32_SDK_SRC = \ components/esp_eth/src/esp_eth.c \ - components/esp_eth/src/esp_eth_mac_esp.c \ components/esp_eth/src/esp_eth_netif_glue.c \ - components/esp_eth/src/esp_eth_phy.c \ - components/esp_eth/src/esp_eth_phy_dp83848.c \ - components/esp_eth/src/esp_eth_phy_ip101.c \ - components/esp_eth/src/esp_eth_phy_ksz80xx.c \ - components/esp_eth/src/esp_eth_phy_lan87xx.c \ - components/esp_eth/src/esp_eth_phy_rtl8201.c \ + components/esp_eth/src/mac/esp_eth_mac_esp.c \ + components/esp_eth/src/mac/esp_eth_mac_esp_dma.c \ + components/esp_eth/src/mac/esp_eth_mac_esp_gpio.c \ + components/esp_eth/src/phy/esp_eth_phy_802_3.c \ + components/esp_eth/src/phy/esp_eth_phy_dp83848.c \ + components/esp_eth/src/phy/esp_eth_phy_generic.c \ + components/esp_eth/src/phy/esp_eth_phy_ip101.c \ + components/esp_eth/src/phy/esp_eth_phy_ksz80xx.c \ + components/esp_eth/src/phy/esp_eth_phy_lan87xx.c \ + components/esp_eth/src/phy/esp_eth_phy_rtl8201.c \ + components/esp_hw_support/esp_clock_output.c \ components/hal/emac_hal.c \ + components/soc/$(CPU_FAM)/emac_periph.c \ # include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/gpio/Makefile b/cpu/esp32/esp-idf/gpio/Makefile index 820a5f5c1f..9da177ad17 100644 --- a/cpu/esp32/esp-idf/gpio/Makefile +++ b/cpu/esp32/esp-idf/gpio/Makefile @@ -2,10 +2,11 @@ MODULE = esp_idf_gpio # source files to be compiled for this module ESP32_SDK_SRC = \ - components/driver/gpio.c \ - components/driver/rtc_io.c \ - components/driver/rtc_module.c \ + components/esp_driver_gpio/src/gpio.c \ + components/esp_driver_gpio/src/rtc_io.c \ + components/esp_hw_support/rtc_module.c \ components/hal/gpio_hal.c \ + components/hal/rtc_io_hal.c \ components/soc/$(CPU_FAM)/gpio_periph.c \ # diff --git a/cpu/esp32/esp-idf/heap/Makefile b/cpu/esp32/esp-idf/heap/Makefile index d32b59c96a..99172bd8b4 100644 --- a/cpu/esp32/esp-idf/heap/Makefile +++ b/cpu/esp32/esp-idf/heap/Makefile @@ -2,12 +2,11 @@ MODULE = esp_idf_heap # source files to be compiled for this module ESP32_SDK_SRC = \ + components/esp_mm/heap_align_hw.c \ components/heap/heap_caps.c \ + components/heap/heap_caps_base.c \ components/heap/heap_caps_init.c \ - components/heap/heap_task_info.c \ - components/heap/heap_trace_standalone.c \ components/heap/multi_heap.c \ - components/heap/multi_heap_poisoning.c \ components/heap/port/$(CPU_FAM)/memory_layout.c \ components/heap/port/memory_layout_utils.c \ # @@ -22,6 +21,7 @@ ESP32_SDK_SRC = \ # additional include pathes required by this module INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/heap/tlsf include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/include/driver/gpio.h b/cpu/esp32/esp-idf/include/driver/gpio.h deleted file mode 100644 index baa7501adf..0000000000 --- a/cpu/esp32/esp-idf/include/driver/gpio.h +++ /dev/null @@ -1,21 +0,0 @@ -#pragma once - -#ifdef ESP_IDF_CODE - -#include_next "driver/gpio.h" - -#else - -#include "hal/gpio_types.h" - -#define GPIO_PIN_COUNT (SOC_GPIO_PIN_COUNT) - -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef __cplusplus -} -#endif diff --git a/cpu/esp32/esp-idf/include/log/esp_log.h b/cpu/esp32/esp-idf/include/log/esp_log.h index 60b70d1efc..dd00ca3543 100644 --- a/cpu/esp32/esp-idf/include/log/esp_log.h +++ b/cpu/esp32/esp-idf/include/log/esp_log.h @@ -25,6 +25,7 @@ extern "C" { #endif +#include "log.h" #include_next "esp_log.h" #if defined(RIOT_VERSION) @@ -55,7 +56,7 @@ extern "C" { } while (0) #define ESP_LOG_LEVEL_LOCAL(level, tag, format, ...) \ - do { \ + do { \ if ( LOG_LOCAL_LEVEL >= level ) { \ ESP_LOG_LEVEL(level, tag, format, ##__VA_ARGS__); \ } \ @@ -69,26 +70,32 @@ extern "C" { #if MODULE_ESP_LOG_TAGGED -#define ESP_DRAM_LOGE(tag, format, ...) \ +#define ESP_DRAM_LOG_LEVEL(level, letter, tag, format, ...) \ do { \ - if ((esp_log_level_t)LOG_LOCAL_LEVEL >= ESP_LOG_ERROR ) { \ - esp_rom_printf(DRAM_STR(LOG_FORMAT(E, format)), \ + if ((esp_log_level_t)LOG_LOCAL_LEVEL >= level ) { \ + esp_rom_printf(DRAM_STR(LOG_FORMAT(letter, format)), \ system_get_time_ms(), ##__VA_ARGS__); \ }\ } while (0U) #else -#define ESP_DRAM_LOGE(tag, format, ...) \ +#define ESP_DRAM_LOG_LEVEL(level, letter, tag, format, ...) \ do { \ - if ((esp_log_level_t)LOG_LOCAL_LEVEL >= ESP_LOG_ERROR ) { \ - esp_rom_printf(DRAM_STR(LOG_FORMAT(E, format)), \ + if ((esp_log_level_t)LOG_LOCAL_LEVEL >= level ) { \ + esp_rom_printf(DRAM_STR(LOG_FORMAT(letter, format)), \ ##__VA_ARGS__); \ }\ } while (0U) #endif +#define ESP_DRAM_LOGE(tag, format, ...) ESP_DRAM_LOG_LEVEL(LOG_ERROR , E, tag, format "\n", ##__VA_ARGS__) +#define ESP_DRAM_LOGW(tag, format, ...) ESP_DRAM_LOG_LEVEL(LOG_WARNING, W, tag, format "\n", ##__VA_ARGS__) +#define ESP_DRAM_LOGI(tag, format, ...) ESP_DRAM_LOG_LEVEL(LOG_INFO , I, tag, format "\n", ##__VA_ARGS__) +#define ESP_DRAM_LOGD(tag, format, ...) ESP_DRAM_LOG_LEVEL(LOG_DEBUG , D, tag, format "\n", ##__VA_ARGS__) +#define ESP_DRAM_LOGV(tag, format, ...) ESP_DRAM_LOG_LEVEL(LOG_ALL , V, tag, format "\n", ##__VA_ARGS__) + #endif /* defined(RIOT_VERSION) */ #ifdef __cplusplus diff --git a/cpu/esp32/esp-idf/lcd/Makefile b/cpu/esp32/esp-idf/lcd/Makefile index 7a97024cbe..4e9af8a2ca 100644 --- a/cpu/esp32/esp-idf/lcd/Makefile +++ b/cpu/esp32/esp-idf/lcd/Makefile @@ -9,13 +9,21 @@ ESP32_SDK_SRC = \ # ifeq (esp32s3,$(CPU_FAM)) - ESP32_SDK_SRC += \ - components/driver/gdma.c \ - components/esp_lcd/src/esp_lcd_panel_io_i80.c \ - components/hal/gdma_hal.c \ - components/hal/lcd_hal.c \ - components/soc/$(CPU_FAM)/gdma_periph.c \ - # + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/dma/include + ESP32_SDK_SRC += components/esp_lcd/i80/esp_lcd_panel_io_i80.c + ESP32_SDK_SRC += components/hal/lcd_hal.c + ifeq (,$(filter esp_idf_rmt,$(USEMODULE))) + ESP32_SDK_SRC += components/bootloader_support/src/flash_encrypt.c + ESP32_SDK_SRC += components/esp_hw_support/dma/gdma.c + ESP32_SDK_SRC += components/esp_hw_support/dma/gdma_link.c + ESP32_SDK_SRC += components/hal/gdma_hal_ahb_v1.c + ESP32_SDK_SRC += components/hal/gdma_hal_top.c + ESP32_SDK_SRC += components/soc/$(CPU_FAM)/gdma_periph.c + ESP32_SDK_ASMSRC += components/esp_rom/patches/esp_rom_cache_writeback_esp32s3.S + endif + ifeq (,$(filter esp_idf_sdmmc,$(USEMODULE))) + ESP32_SDK_SRC += components/esp_hw_support/esp_memory_utils.c + endif else ifneq (,$(filter esp32 esp32s2,$(CPU_FAM))) ESP32_SDK_SRC = \ components/driver/i2s.c \ @@ -27,6 +35,7 @@ endif # additional include pathes required by this module INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_lcd/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_lcd/interface +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_lcd/priv_include include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/nvs_flash/Makefile b/cpu/esp32/esp-idf/nvs_flash/Makefile index 9642bbeefa..cb76ef0e50 100644 --- a/cpu/esp32/esp-idf/nvs_flash/Makefile +++ b/cpu/esp32/esp-idf/nvs_flash/Makefile @@ -3,8 +3,6 @@ MODULE = esp_idf_nvs_flash # source files to be compiled for this module ESP32_SDK_SRCXX = \ components/nvs_flash/src/nvs_api.cpp \ - components/nvs_flash/src/nvs_cxx_api.cpp \ - components/nvs_flash/src/nvs_handle_locked.cpp \ components/nvs_flash/src/nvs_handle_simple.cpp \ components/nvs_flash/src/nvs_item_hash_list.cpp \ components/nvs_flash/src/nvs_page.cpp \ @@ -12,13 +10,15 @@ ESP32_SDK_SRCXX = \ components/nvs_flash/src/nvs_partition.cpp \ components/nvs_flash/src/nvs_partition_lookup.cpp \ components/nvs_flash/src/nvs_partition_manager.cpp \ + components/nvs_flash/src/nvs_platform.cpp \ components/nvs_flash/src/nvs_storage.cpp \ components/nvs_flash/src/nvs_types.cpp \ # # additional include pathes required by this module -INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_partition/include INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/private_include include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/rmt/Makefile b/cpu/esp32/esp-idf/rmt/Makefile index ccc2bfba72..efe6c23ac1 100644 --- a/cpu/esp32/esp-idf/rmt/Makefile +++ b/cpu/esp32/esp-idf/rmt/Makefile @@ -2,11 +2,25 @@ MODULE = esp_idf_rmt # source files to be compiled for this module ESP32_SDK_SRC = \ - components/driver/rmt.c \ - components/soc/$(CPU_FAM)/rmt_periph.c \ + components/esp_driver_rmt/src/rmt_common.c \ + components/esp_driver_rmt/src/rmt_encoder.c \ + components/esp_driver_rmt/src/rmt_tx.c \ + components/esp_pm/pm_locks.c \ components/hal/rmt_hal.c \ + components/soc/$(CPU_FAM)/rmt_periph.c \ # +ifeq (esp32s3,$(CPU_FAM)) + ESP32_SDK_SRC += components/bootloader_support/src/flash_encrypt.c + ESP32_SDK_SRC += components/esp_hw_support/dma/gdma.c + ESP32_SDK_SRC += components/hal/gdma_hal_ahb_v1.c + ESP32_SDK_SRC += components/hal/gdma_hal_top.c + ESP32_SDK_SRC += components/soc/$(CPU_FAM)/gdma_periph.c + ESP32_SDK_ASMSRC += components/esp_rom/patches/esp_rom_cache_writeback_esp32s3.S +endif + +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/dma/include + include $(RIOTBASE)/Makefile.base ESP32_SDK_BIN = $(BINDIR)/$(MODULE) diff --git a/cpu/esp32/esp-idf/sdmmc/Makefile b/cpu/esp32/esp-idf/sdmmc/Makefile index 6ff7663f0f..3142cd8271 100644 --- a/cpu/esp32/esp-idf/sdmmc/Makefile +++ b/cpu/esp32/esp-idf/sdmmc/Makefile @@ -2,13 +2,18 @@ MODULE = esp_idf_sdmmc # source files to be compiled for this module ESP32_SDK_SRC = \ - components/driver/sdmmc_host.c \ - components/driver/sdmmc_transaction.c \ + components/esp_driver_sdmmc/src/sdmmc_host.c \ + components/esp_driver_sdmmc/src/sdmmc_transaction.c \ components/soc/$(CPU_FAM)/sdmmc_periph.c \ + components/hal/sdmmc_hal.c \ + components/esp_hw_support/dma/esp_dma_utils.c \ + components/esp_hw_support/esp_memory_utils.c \ # # additional include pathes required by this module -# INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_sdmmc/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/sdmmc/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/dma/include include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/spi_flash/Makefile b/cpu/esp32/esp-idf/spi_flash/Makefile index efb87afa1f..1d6d96edf4 100644 --- a/cpu/esp32/esp-idf/spi_flash/Makefile +++ b/cpu/esp32/esp-idf/spi_flash/Makefile @@ -2,32 +2,56 @@ MODULE = esp_idf_spi_flash # source files to be compiled for this module ESP32_SDK_SRC = \ - components/bootloader_support/src/bootloader_common.c \ - components/driver/spi_common.c \ - components/spi_flash/$(CPU_FAM)/flash_ops_$(CPU_FAM).c \ - components/spi_flash/$(CPU_FAM)/spi_flash_rom_patch.c \ - components/spi_flash/partition.c \ + components/esp_rom/patches/esp_rom_spiflash.c \ + components/hal/spi_flash_encrypt_hal_iram.c \ + components/hal/spi_flash_hal.c \ + components/hal/spi_flash_hal_iram.c \ + components/spi_flash/esp_flash_api.c \ + components/spi_flash/esp_flash_spi_init.c \ + components/spi_flash/flash_mmap.c \ + components/spi_flash/memspi_host_driver.c \ + components/spi_flash/spi_flash_os_func_app.c \ + components/spi_flash/spi_flash_os_func_noos.c \ + components/spi_flash/spi_flash_chip_boya.c \ + components/spi_flash/spi_flash_chip_drivers.c \ + components/spi_flash/spi_flash_chip_gd.c \ + components/spi_flash/spi_flash_chip_generic.c \ + components/spi_flash/spi_flash_chip_issi.c \ + components/spi_flash/spi_flash_chip_mxic.c \ + components/spi_flash/spi_flash_chip_mxic_opi.c \ + components/spi_flash/spi_flash_chip_th.c \ + components/spi_flash/spi_flash_chip_winbond.c \ # + +ifneq (,$(filter esp32,$(CPU_FAM))) +endif + +ifneq (,$(filter esp32s2,$(CPU_FAM))) + ESP32_SDK_SRC += components/hal/spi_flash_hal_gpspi.c +endif + +ifneq (,$(filter esp32s3,$(CPU_FAM))) + ESP32_SDK_SRC += components/hal/spi_flash_hal_gpspi.c +endif + +ifneq (,$(filter esp32c3,$(CPU_FAM))) + ESP32_SDK_SRC += components/hal/spi_flash_hal_gpspi.c +endif + ifeq (,$(filter periph_spi,$(USEMODULE))) # no need to compile it here if it is already compiled for periph_spi ESP32_SDK_SRC += components/soc/$(CPU_FAM)/spi_periph.c endif -ifneq (,$(filter esp32,$(CPU_FAM))) - ESP32_SDK_SRC += components/spi_flash/esp_flash_spi_init.c -endif - -ifneq (,$(filter esp32 esp32s2 esp32s3,$(CPU_FAM))) - ESP32_SDK_SRC += components/spi_flash/flash_mmap.c -endif - # additional include pathes required by this module -INCLUDES += -I$(ESP32_SDK_DIR)/components/app_update/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/include_bootloader INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM) INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include/spi_flash +ifeq (,$(filter esp_spi_ram,$(USEMODULE))) + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_psram/include +endif + include $(RIOTBASE)/Makefile.base ESP32_SDK_BIN = $(BINDIR)/$(MODULE) diff --git a/cpu/esp32/esp-idf/spi_ram/Makefile b/cpu/esp32/esp-idf/spi_ram/Makefile index 378ce3bf5c..8882e723fd 100644 --- a/cpu/esp32/esp-idf/spi_ram/Makefile +++ b/cpu/esp32/esp-idf/spi_ram/Makefile @@ -1,20 +1,31 @@ MODULE = esp_idf_spi_ram # source files to be compiled for this module -ESP32_SDK_SRC = \ - components/esp_hw_support/port/$(CPU_FAM)/spiram.c \ - components/esp_hw_support/port/$(CPU_FAM)/spiram_psram.c \ - # +ESP32_SDK_SRC += components/esp_psram/esp_psram.c ifeq (esp32,$(CPU_FAM)) ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/cache_sram_mmu.c + ESP32_SDK_SRC += components/esp_psram/$(CPU_FAM)/esp_psram_extram_cache.c + ESP32_SDK_SRC += components/esp_psram/$(CPU_FAM)/esp_psram_impl_quad.c endif -ifneq (,$(filter esp_spi_oct,$(USEMODULE))) - ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/opiram_psram.c +ifeq (esp32s2,$(CPU_FAM)) + ESP32_SDK_SRC += components/esp_psram/$(CPU_FAM)/esp_psram_impl_quad.c endif +ifeq (esp32s3,$(CPU_FAM)) + ifneq (,$(filter esp_spi_oct,$(USEMODULE))) + ESP32_SDK_SRC += components/esp_psram/$(CPU_FAM)/esp_psram_impl_octal.c + else + ESP32_SDK_SRC += components/esp_psram/device/esp_psram_impl_ap_quad.c + endif +endif + +CFLAGS += -Wno-unused-but-set-variable + # additional include pathes required by this module +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_driver_spi/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_psram/include INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/include include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp32/esp-idf/usb/Makefile b/cpu/esp32/esp-idf/usb/Makefile index 3261f5fc13..df1c902f99 100644 --- a/cpu/esp32/esp-idf/usb/Makefile +++ b/cpu/esp32/esp-idf/usb/Makefile @@ -2,13 +2,16 @@ MODULE = esp_idf_usb # source files to be compiled for this module ESP32_SDK_SRC = \ - components/hal/usb_hal.c \ - components/hal/usb_phy_hal.c \ - components/soc/$(CPU_FAM)/usb_periph.c \ - components/soc/$(CPU_FAM)/usb_phy_periph.c \ + components/hal/usb_dwc_hal.c \ + components/hal/usb_wrap_hal.c \ + components/soc/$(CPU_FAM)/usb_dwc_periph.c \ components/usb/usb_phy.c \ # +ifeq (esp32s3,$(CPU_FAM)) + ESP32_SDK_SRC += components/hal/usb_serial_jtag_hal.c +endif + include $(RIOTBASE)/Makefile.base ESP32_SDK_BIN = $(BINDIR)/$(MODULE) diff --git a/cpu/esp32/esp-idf/wifi/Makefile b/cpu/esp32/esp-idf/wifi/Makefile index 131de7a300..10d075b0a4 100644 --- a/cpu/esp32/esp-idf/wifi/Makefile +++ b/cpu/esp32/esp-idf/wifi/Makefile @@ -1,21 +1,24 @@ MODULE = esp_idf_wifi -# source files to be compiled for this module -ESP32_SDK_SRC = \ - components/esp_event/event_send.c \ - components/esp_hw_support/port/$(CPU_FAM)/dport_access.c \ - components/esp_phy/src/phy_init.c \ - components/esp_wifi/$(CPU_FAM)/esp_adapter.c \ - components/esp_wifi/src/wifi_init.c \ - # +ESP32_SDK_SRC += components/esp_coex/$(CPU_FAM)/esp_coex_adapter.c +ESP32_SDK_SRC += components/esp_wifi/$(CPU_FAM)/esp_adapter.c +ESP32_SDK_SRC += components/esp_wifi/src/wifi_init.c # additional include pathes required by this module +INCLUDES += -I$(ESP32_SDK_DIR)/components/app_update/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_bootloader_format/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_coex/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_partition/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/include INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_phy/$(CPU_FAM)/include -INCLUDES += -I$(ESP32_SDK_DIR)/components/tcpip_adapter/include +INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/include INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/port/include INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/esp_supplicant/include +ifneq (,$(filter esp32c3 esp32s2,$(CPU_FAM))) + ESP32_SDK_SRC += components/esp_hw_support/port/$(CPU_FAM)/adc2_init_cal.c +endif + include $(RIOTBASE)/Makefile.base ESP32_SDK_BIN = $(BINDIR)/$(MODULE) diff --git a/cpu/esp32/esp-idf/wpa_supplicant/esp_idf_wpa_supplicant.mk b/cpu/esp32/esp-idf/wpa_supplicant/esp_idf_wpa_supplicant.mk index 9b1a00d437..8581314d4f 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/esp_idf_wpa_supplicant.mk +++ b/cpu/esp32/esp-idf/wpa_supplicant/esp_idf_wpa_supplicant.mk @@ -5,31 +5,39 @@ INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/include INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/port/include INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/src INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/src/utils +INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/src/crypto include $(RIOTBASE)/Makefile.base ESP32_SDK_BIN = $(BINDIR)/$(MODULE) -# definitions for wpa_supplicant from components/wpa_supplicant/component.mk +# definitions for wpa_supplicant from components/wpa_supplicant/CMakeList.txt CFLAGS += -D__ets__ -CFLAGS += -DCONFIG_DPP +CFLAGS += -DCONFIG_CRYPTO_INTERNAL CFLAGS += -DCONFIG_ECC +CFLAGS += -DCONFIG_FAST_PBKDF2 +CFLAGS += -DCONFIG_GMAC CFLAGS += -DCONFIG_IEEE80211W +CFLAGS += -DCONFIG_NO_RADIUS CFLAGS += -DCONFIG_SHA256 -CFLAGS += -DCONFIG_WNM -CFLAGS += -DCONFIG_WPS_PIN -CFLAGS += -DCONFIG_WPS2 +CFLAGS += -DCONFIG_TLSV11 +CFLAGS += -DCONFIG_TLSV12 +CFLAGS += -DCONFIG_TLS_INTERNAL_CLIENT +CFLAGS += -DCONFIG_WPS +CFLAGS += -DEAP_FAST CFLAGS += -DEAP_MSCHAPv2 CFLAGS += -DEAP_PEAP CFLAGS += -DEAP_PEER_METHOD CFLAGS += -DEAP_TLS CFLAGS += -DEAP_TTLS -CFLAGS += -DESP_SUPPLICANT -CFLAGS += -DESP32_WORKAROUND CFLAGS += -DESPRESSIF_USE +CFLAGS += -DESP_PLATFORM +CFLAGS += -DESP_SUPPLICANT CFLAGS += -DIEEE8021X_EAPOL CFLAGS += -DUSE_WPA2_TASK CFLAGS += -DUSE_WPS_TASK + +# additional compiler flags to avoid compile errors CFLAGS += -Wno-strict-aliasing CFLAGS += -Wno-format-nonliteral CFLAGS += -Wno-format-security diff --git a/cpu/esp32/esp-idf/wpa_supplicant/esp_supplicant/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/esp_supplicant/Makefile index e9be2f82f8..6976345e6a 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/esp_supplicant/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/esp_supplicant/Makefile @@ -2,9 +2,11 @@ MODULE = esp_idf_wpa_supplicant_esp_supplicant # source file list to be compiled as configured in component.mk ESP32_SDK_SRC = \ - components/wpa_supplicant/esp_supplicant/src/esp_dpp.c \ + components/wpa_supplicant/esp_supplicant/src/esp_common.c \ + components/wpa_supplicant/esp_supplicant/src/esp_eap_client.c \ components/wpa_supplicant/esp_supplicant/src/esp_hostap.c \ - components/wpa_supplicant/esp_supplicant/src/esp_wpa2.c \ + components/wpa_supplicant/esp_supplicant/src/esp_owe.c \ + components/wpa_supplicant/esp_supplicant/src/esp_wpa2_api_port.c \ components/wpa_supplicant/esp_supplicant/src/esp_wpa3.c \ components/wpa_supplicant/esp_supplicant/src/esp_wpa_main.c \ components/wpa_supplicant/esp_supplicant/src/esp_wpas_glue.c \ diff --git a/cpu/esp32/esp-idf/wpa_supplicant/port/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/port/Makefile index a2d0c81125..ab874c0258 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/port/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/port/Makefile @@ -1,8 +1,7 @@ MODULE = esp_idf_wpa_supplicant_port # source file list to be compiled as configured in component.mk -ESP32_SDK_SRC = \ - components/wpa_supplicant/port/os_xtensa.c \ - # +ESP32_SDK_SRC += components/wpa_supplicant/port/os_xtensa.c +ESP32_SDK_SRC += components/wpa_supplicant/port/eloop.c include $(ESP_IDF_WPA_SUPPLICANT_PATH)/esp_idf_wpa_supplicant.mk diff --git a/cpu/esp32/esp-idf/wpa_supplicant/src/ap/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/src/ap/Makefile index 8a58668e98..3a849f7c6d 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/src/ap/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/src/ap/Makefile @@ -3,7 +3,11 @@ MODULE = esp_idf_wpa_supplicant_ap # source file list to be compiled as configured in component.mk ESP32_SDK_SRC = \ components/wpa_supplicant/src/ap/ap_config.c \ + components/wpa_supplicant/src/ap/comeback_token.c \ + components/wpa_supplicant/src/ap/ieee802_11.c \ components/wpa_supplicant/src/ap/ieee802_1x.c \ + components/wpa_supplicant/src/ap/pmksa_cache_auth.c \ + components/wpa_supplicant/src/ap/sta_info.c \ components/wpa_supplicant/src/ap/wpa_auth.c \ components/wpa_supplicant/src/ap/wpa_auth_ie.c \ # diff --git a/cpu/esp32/esp-idf/wpa_supplicant/src/common/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/src/common/Makefile index 5d6e036f5e..5f42a70522 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/src/common/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/src/common/Makefile @@ -2,7 +2,8 @@ MODULE = esp_idf_wpa_supplicant_common # source file list to be compiled as configured in component.mk ESP32_SDK_SRC = \ - components/wpa_supplicant/src/common/dpp.c \ + components/wpa_supplicant/src/common/dragonfly.c \ + components/wpa_supplicant/src/common/ieee802_11_common.c \ components/wpa_supplicant/src/common/sae.c \ components/wpa_supplicant/src/common/wpa_common.c \ # diff --git a/cpu/esp32/esp-idf/wpa_supplicant/src/crypto/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/src/crypto/Makefile index 06841c8977..65d38cd0a7 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/src/crypto/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/src/crypto/Makefile @@ -32,6 +32,7 @@ ESP32_SDK_SRC = \ components/wpa_supplicant/src/crypto/sha1-pbkdf2.c \ components/wpa_supplicant/src/crypto/sha1-prf.c \ components/wpa_supplicant/src/crypto/sha1-tlsprf.c \ + components/wpa_supplicant/src/crypto/sha1-tprf.c \ components/wpa_supplicant/src/crypto/sha256.c \ components/wpa_supplicant/src/crypto/sha256-internal.c \ components/wpa_supplicant/src/crypto/sha256-kdf.c \ @@ -41,6 +42,7 @@ ESP32_SDK_SRC = \ components/wpa_supplicant/src/crypto/sha384-prf.c \ components/wpa_supplicant/src/crypto/sha384-tlsprf.c \ components/wpa_supplicant/src/crypto/sha512-internal.c \ + components/wpa_supplicant/src/crypto/tls_internal.c \ # include $(ESP_IDF_WPA_SUPPLICANT_PATH)/esp_idf_wpa_supplicant.mk diff --git a/cpu/esp32/esp-idf/wpa_supplicant/src/eap_peer/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/src/eap_peer/Makefile index ed3190febd..f2186dc8d3 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/src/eap_peer/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/src/eap_peer/Makefile @@ -2,9 +2,12 @@ MODULE = esp_idf_wpa_supplicant_eap_peer # source file list to be compiled as configured in component.mk ESP32_SDK_SRC = \ + components/wpa_supplicant/src/eap_common/eap_wsc_common.c \ components/wpa_supplicant/src/eap_peer/chap.c \ components/wpa_supplicant/src/eap_peer/eap.c \ components/wpa_supplicant/src/eap_peer/eap_common.c \ + components/wpa_supplicant/src/eap_peer/eap_fast.c \ + components/wpa_supplicant/src/eap_peer/eap_fast_common.c \ components/wpa_supplicant/src/eap_peer/eap_mschapv2.c \ components/wpa_supplicant/src/eap_peer/eap_peap.c \ components/wpa_supplicant/src/eap_peer/eap_peap_common.c \ @@ -12,6 +15,8 @@ ESP32_SDK_SRC = \ components/wpa_supplicant/src/eap_peer/eap_tls_common.c \ components/wpa_supplicant/src/eap_peer/eap_ttls.c \ components/wpa_supplicant/src/eap_peer/mschapv2.c \ + # eap_fast_pac.c is included by eap_fast.c + # components/wpa_supplicant/src/eap_peer/eap_fast_pac.c \ # include $(ESP_IDF_WPA_SUPPLICANT_PATH)/esp_idf_wpa_supplicant.mk diff --git a/cpu/esp32/esp-idf/wpa_supplicant/src/tls/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/src/tls/Makefile index b1df3a7ee2..e9ac0b2226 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/src/tls/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/src/tls/Makefile @@ -8,16 +8,13 @@ ESP32_SDK_SRC = \ components/wpa_supplicant/src/tls/pkcs5.c \ components/wpa_supplicant/src/tls/pkcs8.c \ components/wpa_supplicant/src/tls/rsa.c \ - components/wpa_supplicant/src/tls/tls_internal.c \ components/wpa_supplicant/src/tls/tlsv1_client.c \ + components/wpa_supplicant/src/tls/tlsv1_client_ocsp.c \ components/wpa_supplicant/src/tls/tlsv1_client_read.c \ components/wpa_supplicant/src/tls/tlsv1_client_write.c \ components/wpa_supplicant/src/tls/tlsv1_common.c \ components/wpa_supplicant/src/tls/tlsv1_cred.c \ components/wpa_supplicant/src/tls/tlsv1_record.c \ - components/wpa_supplicant/src/tls/tlsv1_server.c \ - components/wpa_supplicant/src/tls/tlsv1_server_read.c \ - components/wpa_supplicant/src/tls/tlsv1_server_write.c \ components/wpa_supplicant/src/tls/x509v3.c \ # diff --git a/cpu/esp32/esp-idf/wpa_supplicant/src/wps/Makefile b/cpu/esp32/esp-idf/wpa_supplicant/src/wps/Makefile index 301d31a2eb..56723b4d58 100644 --- a/cpu/esp32/esp-idf/wpa_supplicant/src/wps/Makefile +++ b/cpu/esp32/esp-idf/wpa_supplicant/src/wps/Makefile @@ -9,8 +9,8 @@ ESP32_SDK_SRC = \ components/wpa_supplicant/src/wps/wps_common.c \ components/wpa_supplicant/src/wps/wps_dev_attr.c \ components/wpa_supplicant/src/wps/wps_enrollee.c \ - components/wpa_supplicant/src/wps/wps_registrar.c \ - components/wpa_supplicant/src/wps/wps_validate.c \ # include $(ESP_IDF_WPA_SUPPLICANT_PATH)/esp_idf_wpa_supplicant.mk + +CFLAGS += -Wno-format diff --git a/cpu/esp32/esp-lcd/esp_lcd_mcu.c b/cpu/esp32/esp-lcd/esp_lcd_mcu.c index 0439bf4030..ee0a53d7fb 100644 --- a/cpu/esp32/esp-lcd/esp_lcd_mcu.c +++ b/cpu/esp32/esp-lcd/esp_lcd_mcu.c @@ -27,6 +27,7 @@ #include "periph/gpio.h" #include "ztimer.h" +#include "esp_lcd_common.h" #include "esp_lcd_panel_io.h" #include "soc/gpio_reg.h" @@ -57,6 +58,10 @@ static_assert(CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE >= 32, "CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE mus be at least 32"); +static_assert(CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE <= LCD_I80_IO_FORMAT_BUF_SIZE, + "CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE must be less or equal to " + "LCD_I80_IO_FORMAT_BUF_SIZE"); + /* ESP32x SoCs support only one LCD peripheral so we can use single instances * of the following variables */ @@ -91,7 +96,7 @@ static void _lcd_ll_mcu_init(lcd_t *dev) esp_lcd_i80_bus_config_t i80_bus_config = { .dc_gpio_num = dev->params->dcx_pin, .wr_gpio_num = dev->params->wrx_pin, - .clk_src = LCD_CLK_SRC_PLL160M, + .clk_src = LCD_CLK_SRC_DEFAULT, #if IS_USED(MODULE_LCD_PARALLEL_16BIT) .data_gpio_nums = { dev->params->d0_pin, diff --git a/cpu/esp32/include/adc_arch.h b/cpu/esp32/include/adc_arch.h index 11acd1a89a..20da6acecf 100644 --- a/cpu/esp32/include/adc_arch.h +++ b/cpu/esp32/include/adc_arch.h @@ -34,7 +34,7 @@ extern "C" { #include "periph/gpio.h" #include "driver/adc.h" -#include "hal/adc_types.h" +#include "driver/adc_types_legacy.h" /** * @brief Attenuations that can be set for ADC lines @@ -47,16 +47,26 @@ typedef enum { ADC_ATTENUATION_0_DB = ADC_ATTEN_DB_0, /**< full-range is about 1.1 V (Vref) */ ADC_ATTENUATION_3_DB = ADC_ATTEN_DB_2_5, /**< full-range is about 1.5 V */ ADC_ATTENUATION_6_DB = ADC_ATTEN_DB_6, /**< full-range is about 2.2 V */ - ADC_ATTENUATION_11_DB = ADC_ATTEN_DB_11, /**< full-range is about 3.3 V */ + ADC_ATTENUATION_12_DB = ADC_ATTEN_DB_12, /**< full-range is about 3.3 V */ } adc_attenuation_t; /** - * @brief Set the attenuation for the ADC line. Default attenuation is 11 dB. + * @brief Attenuation of 11 dB is depcricated and has to be mapped + * + * The define ensures the compatibility with older versions. + * + * @deprecated `ADC_ATTENUATION_11_DB` is deprecated, use + * `ADC_ATTENUATION_12_DB` instead. + */ +#define ADC_ATTENUATION_11_DB ADC_ATTENUATION_12_DB + +/** + * @brief Set the attenuation for the ADC line. Default attenuation is 12 dB. * * For each ADC line, an attenuation of the input signal can be defined * separately. This results in different full ranges of the measurable voltage - * at the input. The attenuation can be set to 0 dB, 3 dB, 6 dB and 11 dB, - * with 11 dB being the standard attenuation. Since an ADC input is measured + * at the input. The attenuation can be set to 0 dB, 3 dB, 6 dB and 12 dB, + * with 12 dB being the standard attenuation. Since an ADC input is measured * against a reference voltage Vref of 1.1 V, approximately the following * measurement ranges are given when using a corresponding attenuation: * @@ -64,41 +74,71 @@ typedef enum { * * Attenuation | Voltage Range | Symbol * ----------------|-------------------|---------------------- - * 0 dB | 0 ... 1.1V (Vref) | ADC_ATTEN_DB_0 - * 2.5 dB | 0 ... 1.5V | ADC_ATTEN_DB_2_5 - * 6 dB | 0 ... 2.2V | ADC_ATTEN_DB_6 - * 11 dB (default) | 0 ... 3.3V | ADC_ATTEN_DB_11 + * 0 dB | 0 ... 1.1V (Vref) | `ADC_ATTEN_DB_0` + * 2.5 dB | 0 ... 1.5V | `ADC_ATTEN_DB_2_5` + * 6 dB | 0 ... 2.2V | `ADC_ATTEN_DB_6` + * 12 dB (default) | 0 ... 3.3V | `ADC_ATTEN_DB_12` * * * - * @note: The reference voltage Vref can vary from ADC unit to ADC unit in - * the range of 1.0V and 1.2V. The Vref of a unit can be routed with - * function *adc_vref_to_gpio* to a GPIO pin. + * @pre #adc_init must have been executed for the line before. + * @note The function has to be executed before @ref adc_sample if required. + * The configured attenuation is then used for all subsequent samples. * - * @param line ADC line for which the attenuation is set - * @param atten Attenuation, see type definition of *adc_attenuation_t - * @return 0 on success - * @return -1 on error + * @param [in] line ADC line for which the attenuation is set + * @param [in] atten Attenuation, see type definition of @ref adc_attenuation_t + * @retval 0 on success + * @retval -1 on error */ int adc_set_attenuation(adc_t line, adc_atten_t atten); /** - * @brief Output reference voltage of a ADC line to GPIO n + * @brief Get the voltage for a given sample value * - * The Vref of the ADC unit of the given ADC line is routed to a GPIO pin n. + * The function converts the given sample value as read from the channel + * according to the attenuation set with @ref adc_set_attenuation and the + * resolution used to read the sample with @ref adc_sample. It uses a predefined + * calibration scheme and the calibration parameters that have been burned + * into the eFuses of the ESP32x SoC. If the calibration parameters have not + * been burned into the eFuses and the initialization of the calibration + * fails, a linear conversion according to the predefined voltage + * ranges is used as a fallback. + * + * @note In the case that the initialization of the calibration fails, + * the function returns `-EINVAL` and the value in parameter `voltage` + * is expected to be inaccurate. + * @note For ESP32, the valid voltages start at around 140 mV. + * + * @param [in] line ADC line + * @param [in] sample sample sample as read by adc_read + * @param [out] voltage voltage in mV + * @retval 0 on success + * @retval -EINVAL if the initialization of the calibration failed + */ +int adc_raw_to_voltage(adc_t line, int sample, int *voltage); + +#if !DOXYGEN +/** + * @brief Output reference voltage of a ADC line to a GPIO pin + * + * The Vref of the ADC unit for the given ADC line is routed to a GPIO pin. * This allows to measure the Vref used by the ADC unit to adjusted the * results of the conversions accordingly. * + * @warning The function is not supported any longer, use + * @ref adc_raw_to_voltage to get the voltage for a sample value. + * * @note * - The given GPIO must be a valid ADC channel of ADC2 unit. - * - For ESP32 and ESP32C3, the given ADC line has to be a channel of ADC2 unit. + * - For ESP32, only the internal reference voltage of ADC2 is given. * - * @param line ADC line for which Vref of its ADC unit is routed to the GPIO - * @param gpio GPIO to which Vref is routed (ADC2 channel GPIOs only) + * @param [in] line ADC line for which Vref of its ADC unit is routed to the GPIO + * @param [in] gpio GPIO to which Vref is routed (ADC2 channel GPIOs only) * - * @return 0 on success - * @return -1 on error + * @retval 0 on success + * @retval -1 on error */ +__attribute__((__deprecated__)) int adc_line_vref_to_gpio(adc_t line, gpio_t gpio); #if defined(CPU_FAM_ESP32) @@ -107,14 +147,19 @@ int adc_line_vref_to_gpio(adc_t line, gpio_t gpio); * * This function is deprecated and will be removed in future versions. * - * @return 0 on success - * @return -1 on invalid ADC line + * @warning The function is not supported any longer, use + * @ref adc_raw_to_voltage to get the voltage for a sample value. + * + * @retval 0 on success + * @retval -1 on invalid ADC line */ +__attribute__((__deprecated__)) static inline int adc_vref_to_gpio25(void) { return adc_vref_to_gpio(ADC_UNIT_2, GPIO25); } #endif +#endif /* !DOXYGEN */ #ifdef __cplusplus } diff --git a/cpu/esp32/include/adc_arch_private.h b/cpu/esp32/include/adc_arch_private.h index d7c70b3e3e..d20f1c7417 100644 --- a/cpu/esp32/include/adc_arch_private.h +++ b/cpu/esp32/include/adc_arch_private.h @@ -23,14 +23,22 @@ extern "C" { #endif -#include "hal/adc_types.h" +#include "driver/adc_types_legacy.h" #include "periph/gpio.h" +#include "soc/soc_caps.h" #ifndef DOXYGEN /* hide implementation details from doxygen */ #define RTCIO_GPIO(n) n /* n-th RTCIO GPIO */ #define RTCIO_NA UINT8_MAX /* RTCIO pin not available */ +#define ADC_UNIT_INV ((adc_unit_t)255) /* Invalid ADC unit ID */ +#define ADC_CHANNEL_INV SOC_ADC_MAX_CHANNEL_NUM /* Invalid ADC channel ID */ + +#define ADC1_CHANNEL_MAX (SOC_ADC_CHANNEL_NUM(ADC_UNIT_1)) /* Number of channels of ADC1 */ +#define ADC2_CHANNEL_MAX (SOC_ADC_CHANNEL_NUM(ADC_UNIT_2)) /* Number of channels of ADC2 */ +#define ADC_CHANNEL_MAX(u) ((u == ADC_UNIT_1) ? ADC1_CHANNEL_MAX : ADC2_CHANNEL_MAX) + /** * @brief ADC hardware descriptor (for internal use only) */ diff --git a/cpu/esp32/include/cpu_conf.h b/cpu/esp32/include/cpu_conf.h index 1ee5a1c1c1..01493d8207 100644 --- a/cpu/esp32/include/cpu_conf.h +++ b/cpu/esp32/include/cpu_conf.h @@ -79,7 +79,7 @@ */ #if !DOXYGEN && !defined(__ASSEMBLER__) /* start address of flash pages in CPU address space as determined by the linker */ -extern uint8_t _fp_mem_start; +extern uint8_t _fp_mmu_start; #endif #define FLASHPAGE_SIZE (4096U) /**< Size of pages (flash sectors) in bytes */ @@ -94,7 +94,7 @@ extern uint8_t _fp_mem_start; /** * @brief CPU base address for flash page access as determined by the linker */ -#define CPU_FLASH_BASE ((uint32_t)&_fp_mem_start) +#define CPU_FLASH_BASE ((uint32_t)&_fp_mmu_start) /** @} */ diff --git a/cpu/esp32/include/esp_idf_api/gpio.h b/cpu/esp32/include/esp_idf_api/gpio.h deleted file mode 100644 index ef255d7997..0000000000 --- a/cpu/esp32/include/esp_idf_api/gpio.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (C) 2022 Gunar Schorcht - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#pragma once - -/** - * @ingroup cpu_esp32_esp_idf_api - * @{ - * - * @file - * @brief Interface for the ESP-IDF GPIO API - * - * @author Gunar Schorcht - * @} - */ - -#include "esp_err.h" -#include "hal/gpio_types.h" - -#ifndef DOXYGEN /* Hide implementation details from doxygen */ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @name ESP-IDF interface wrapper functions - * @{ - */ -esp_err_t esp_idf_gpio_config(const gpio_config_t *cfg); -esp_err_t esp_idf_gpio_reset_pin(gpio_num_t gpio_num); - -esp_err_t esp_idf_gpio_intr_enable(gpio_num_t gpio_num); -esp_err_t esp_idf_gpio_intr_disable(gpio_num_t gpio_num); -esp_err_t esp_idf_gpio_set_intr_type(gpio_num_t gpio_num, - gpio_int_type_t intr_type); -esp_err_t esp_idf_gpio_install_isr_service(int intr_alloc_flags); -esp_err_t esp_idf_gpio_isr_handler_add(gpio_num_t gpio_num, - gpio_isr_t isr_handler, void *args); - -esp_err_t esp_idf_gpio_wakeup_enable(gpio_num_t gpio_num, - gpio_int_type_t intr_type); -esp_err_t esp_idf_gpio_deep_sleep_hold(void); -esp_err_t esp_idf_gpio_set_drive_capability(gpio_num_t gpio_num, - gpio_drive_cap_t strength); - -esp_err_t esp_idf_rtc_gpio_deinit(gpio_num_t gpio_num); -esp_err_t esp_idf_rtc_gpio_pullup_en(gpio_num_t gpio_num); -esp_err_t esp_idf_rtc_gpio_pullup_dis(gpio_num_t gpio_num); -esp_err_t esp_idf_rtc_gpio_pulldown_en(gpio_num_t gpio_num); -esp_err_t esp_idf_rtc_gpio_pulldown_dis(gpio_num_t gpio_num); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* DOXYGEN */ diff --git a/cpu/esp32/include/esp_idf_api/uart.h b/cpu/esp32/include/esp_idf_api/uart.h deleted file mode 100644 index 4501799508..0000000000 --- a/cpu/esp32/include/esp_idf_api/uart.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2022 Gunar Schorcht - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#pragma once - -/** - * @ingroup cpu_esp32_esp_idf_api - * @{ - * - * @file - * @brief Interface for the ESP-IDF UART HAL API - * - * @author Gunar Schorcht - * @} - */ - -#ifndef DOXYGEN /* Hide implementation details from doxygen */ - -#ifdef __cplusplus -extern "C" { -#endif - -void esp_idf_uart_set_wakeup_threshold(unsigned uart_num, uint32_t threshold); - -#ifdef __cplusplus -} -#endif - -#endif /* DOXYGEN */ diff --git a/cpu/esp32/include/irq_arch.h b/cpu/esp32/include/irq_arch.h index 40aa23992e..6d3a1c7898 100644 --- a/cpu/esp32/include/irq_arch.h +++ b/cpu/esp32/include/irq_arch.h @@ -35,24 +35,34 @@ extern "C" { * * @{ */ -#define CPU_INUM_RMT 1 /**< Level interrupt with low priority 1 */ + +/* On Xtensa-based ESP32x SoCs, interrupt 0 is reserved for the WiFi interface + * and interrupt 1 is available. However, since interrupt 0 is not available on + * RISC-V-based ESP32x SoCs, interrupt 1 is used for the WiFi interface instead. + * Therefore, we use interrupt 1 for the RMT peripheral on Xtensa-based ESP32x + * SoCs, but we use interrupt 11 for the RMT peripheral on RISC-V-based ESP32x + * SoCs. Interrupt 11 is reserved for profiling on Xtensa-based ESP32x SoCs. */ +#if defined(__XTENSA__) +# define CPU_INUM_RMT 1 /**< Level interrupt with low priority 1 */ +#else +# define CPU_INUM_RMT 11 /**< Level interrupt with low priority 1 */ +#endif #define CPU_INUM_GPIO 2 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_CAN 3 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_UART 4 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_USB 8 /**< Level interrupt with low priority 1 */ +#define CPU_INUM_BLE 5 /**< Level interrupt with low priority 1 */ #define CPU_INUM_RTT 9 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_SERIAL_JTAG 10 /**< Level interrupt with low priority 1 */ +#define CPU_INUM_SERIAL_JTAG 10 /**< Edge interrupt with low priority 1 */ #define CPU_INUM_I2C 12 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_WDT 13 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_SOFTWARE 17 /**< Level interrupt with low priority 1 */ +#define CPU_INUM_UART 13 /**< Level interrupt with low priority 1 */ +#define CPU_INUM_CAN 17 /**< Level interrupt with low priority 1 */ #define CPU_INUM_ETH 18 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_LCD 18 /**< Level interrupt with low priority 1 */ -#define CPU_INUM_TIMER 19 /**< Level interrupt with medium priority 2 */ +#define CPU_INUM_USB 18 /**< Level interrupt with low priority 1 */ +#define CPU_INUM_LCDCAM 19 /**< Level interrupt with medium priority 2 */ #define CPU_INUM_FRC2 20 /**< Level interrupt with medium priority 2 */ #define CPU_INUM_SYSTIMER 20 /**< Level interrupt with medium priority 2 */ -#define CPU_INUM_BLE 21 /**< Level interrupt with medium priority 2 */ -#define CPU_INUM_SDMMC 23 /**< Level interrupt with medium priority 2 */ -#define CPU_INUM_CACHEERR 25 /**< Level interrupt with high priority 4 */ +#define CPU_INUM_SDMMC 21 /**< Level interrupt with medium priority 2 */ +#define CPU_INUM_TIMER 22 /**< Edge interrupt with medium priority 2 */ +#define CPU_INUM_WDT 23 /**< Level interrupt with medium priority 3 */ +#define CPU_INUM_SOFTWARE 29 /**< Software interrupt with medium priority 3 */ /** @} */ /** diff --git a/cpu/esp32/include/periph_cpu.h b/cpu/esp32/include/periph_cpu.h index 694ef0f08f..cfe8cd707c 100644 --- a/cpu/esp32/include/periph_cpu.h +++ b/cpu/esp32/include/periph_cpu.h @@ -27,6 +27,8 @@ #include "soc/periph_defs.h" #include "soc/soc_caps.h" +#include "modules.h" + #ifdef __cplusplus extern "C" { #endif @@ -184,13 +186,20 @@ typedef enum { GPIO_PULL_STRONGEST = 0 } gpio_pull_strength_t; +/* + * This include is placed here by intention to avoid type name conflicts. + * Having the macros HAVE_GPIO_* defined before including this file allows to + * use these macros in `hal/gpio_types.h` to decide whether to use the + * ESP-IDF types when compiling ESP-IDF modules or to use the RIOT types + * when compiling RIOT source code. + */ +#include "hal/gpio_types.h" + #define HAVE_GPIO_PULL_T -typedef enum { - GPIO_FLOATING = 0, - GPIO_PULL_UP = 1, - GPIO_PULL_DOWN = 2, - GPIO_PULL_KEEP = 3 /*< not supported */ -} gpio_pull_t; +typedef gpio_pull_mode_t gpio_pull_t; +#define GPIO_PULL_UP GPIO_PULLUP_ONLY +#define GPIO_PULL_DOWN GPIO_PULLDOWN_ONLY +#define GPIO_PULL_KEEP GPIO_PULLUP_PULLDOWN /** * @brief Current an output pin can drive in active and sleep modes @@ -329,18 +338,6 @@ union gpio_conf_esp32 { * @note The reference voltage Vref can vary from device to device in the range * of 1.0V and 1.2V. * - * The Vref of a device can be read at a predefined GPIO with the function - * #adc_line_vref_to_gpio. The results of the ADC input can then be adjusted - * accordingly. - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~{.c} - * extern int adc_line_vref_to_gpio(adc_t line, gpio_t gpio); - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - * For the GPIO that can be used with this function, see: - * - * - \ref esp32_adc_channels_esp32 "ESP32" - * - \ref esp32_adc_channels_esp32c3 "ESP32-C3" - * - \ref esp32_adc_channels_esp32s3 "ESP32-S3" - * * @{ */ @@ -914,9 +911,9 @@ typedef struct { #endif /** Timer group used for system time */ -#define TIMER_SYSTEM_GROUP TIMER_GROUP_0 -/** Index of the timer in the timer timer group used for system time */ -#define TIMER_SYSTEM_INDEX TIMER_0 +#define TIMER_SYSTEM_GROUP 0 /* formerly TIMER_GROUP_0 */ +/** Index of the timer in the timer group used for system time */ +#define TIMER_SYSTEM_INDEX 0 /* formerly TIMER_0 */ /** System time interrupt source */ #define TIMER_SYSTEM_INT_SRC ETS_TG0_T0_LEVEL_INTR_SOURCE @@ -977,6 +974,39 @@ typedef struct { gpio_t rxd; /**< GPIO used as RxD pin */ } uart_conf_t; +#ifndef DOXYGEN +/** + * @brief Override UART stop bits + */ +typedef enum { + UART_STOP_BITS_1 = 0x1, /*!< stop bit: 1bit*/ + UART_STOP_BITS_1_5 = 0x2, /*!< stop bit: 1.5bits*/ + UART_STOP_BITS_2 = 0x3, /*!< stop bit: 2bits*/ +} uart_stop_bits_t; + +#define HAVE_UART_STOP_BITS_T + +/** + * @brief Marker for unsupported UART parity modes + */ +#define UART_MODE_UNSUPPORTED 0xf0 + +/** + * @brief Override UART parity values + */ +typedef enum { + UART_PARITY_NONE = 0x0, + UART_PARITY_EVEN = 0x2, + UART_PARITY_ODD = 0x3, + UART_PARITY_MARK = UART_MODE_UNSUPPORTED | 0, + UART_PARITY_SPACE = UART_MODE_UNSUPPORTED | 1, +} uart_parity_t; + +#define UART_PARITY_DISABLE UART_PARITY_NONE +#define HAVE_UART_PARITY_T + +#endif /* !DOXYGEN */ + /** * @brief Maximum number of UART interfaces */ diff --git a/cpu/esp32/include/periph_cpu_esp32.h b/cpu/esp32/include/periph_cpu_esp32.h index 3100fb7e06..edbf1c8b48 100644 --- a/cpu/esp32/include/periph_cpu_esp32.h +++ b/cpu/esp32/include/periph_cpu_esp32.h @@ -25,7 +25,7 @@ extern "C" { #endif /** Mapping configured ESP32 default clock to CLOCK_CORECLOCK define */ -#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) +#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) /** * @brief CPU cycles per busy wait loop @@ -96,7 +96,6 @@ extern "C" { * - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are * therefore not available as ADC channels if the modules `esp_wifi` or * `esp_now` are used. - * - Vref can be read with function #adc_line_vref_to_gpio at GPIO25. */ /** diff --git a/cpu/esp32/include/periph_cpu_esp32c3.h b/cpu/esp32/include/periph_cpu_esp32c3.h index 9ad0524b8a..d3d3542de9 100644 --- a/cpu/esp32/include/periph_cpu_esp32c3.h +++ b/cpu/esp32/include/periph_cpu_esp32c3.h @@ -25,7 +25,7 @@ extern "C" { #endif /** Mapping configured ESP32-C3 default clock to CLOCK_CORECLOCK define */ -#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ) +#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) /** * @brief CPU cycles per busy wait loop @@ -72,10 +72,9 @@ extern "C" { * The maximum number of ADC channels #ADC_NUMOF_MAX is 6. * * @note - * - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are + * ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are * therefore not available as ADC channels if the modules `esp_wifi` or * `esp_now` are used. - * - Vref can be read with function #adc_line_vref_to_gpio at GPIO5. */ /** diff --git a/cpu/esp32/include/periph_cpu_esp32s2.h b/cpu/esp32/include/periph_cpu_esp32s2.h index 2eec88b677..3890489cd1 100644 --- a/cpu/esp32/include/periph_cpu_esp32s2.h +++ b/cpu/esp32/include/periph_cpu_esp32s2.h @@ -25,7 +25,7 @@ extern "C" { #endif /** Mapping configured ESP32-S2 default clock to CLOCK_CORECLOCK define */ -#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ) +#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) /** * @brief CPU cycles per busy wait loop @@ -95,8 +95,6 @@ extern "C" { * - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are * therefore not available as ADC channels if the modules `esp_wifi` or * `esp_now` are used. - * - Vref can be read with function #adc_line_vref_to_gpio at an ADC2 channel, - * that is at GPIO11 ... GPIO20. * - GPIO3 is a strapping pin und shouldn't be used as ADC channel */ diff --git a/cpu/esp32/include/periph_cpu_esp32s3.h b/cpu/esp32/include/periph_cpu_esp32s3.h index a6ab36fdbf..42bcca221b 100644 --- a/cpu/esp32/include/periph_cpu_esp32s3.h +++ b/cpu/esp32/include/periph_cpu_esp32s3.h @@ -23,7 +23,7 @@ extern "C" { #endif /** Mapping configured ESP32-S3 default clock to CLOCK_CORECLOCK define */ -#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ) +#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) /** * @brief CPU cycles per busy wait loop @@ -95,8 +95,6 @@ extern "C" { * - ADC2 is also used by the WiFi module. The GPIOs connected to ADC2 are * therefore not available as ADC channels if the modules `esp_wifi` or * `esp_now` are used. - * - Vref can be read with function #adc_line_vref_to_gpio at an ADC2 channel, - * that is at GPIO11 ... GPIO20. * - GPIO3 is a strapping pin und shouldn't be used as ADC channel */ diff --git a/cpu/esp32/include/sdkconfig.h b/cpu/esp32/include/sdkconfig.h index 365e1c55a9..7b6a5b2b18 100644 --- a/cpu/esp32/include/sdkconfig.h +++ b/cpu/esp32/include/sdkconfig.h @@ -21,15 +21,6 @@ * @author Gunar Schorcht */ -/* - * Some files in ESP-IDF use functions from `stdlib.h` without including the - * header. To avoid having to patch all these files, `stdlib.h` is included - * in this header file, which in turn is included by every ESP-IDF file. - */ -#if !defined(__ASSEMBLER__) && !defined(LD_FILE_GEN) -#include -#endif - /* * The SoC capability definitions are often included indirectly in the * ESP-IDF files, although all ESP-IDF files require them. Since not all @@ -38,7 +29,9 @@ * capabilities are included in this file and are thus available to all * ESP-IDF files. This avoids to update vendor code. */ -#include "soc/soc_caps.h" +#ifndef LD_FILE_GEN +# include "soc/soc_caps.h" +#endif /** * @brief SDK version number @@ -46,7 +39,7 @@ * Determined with `git describe --tags` in `$ESP32_SDK_DIR` */ #if !defined(IDF_VER) -#include "esp_idf_ver.h" +# include "esp_idf_ver.h" #endif #ifndef DOXYGEN @@ -58,25 +51,27 @@ * can be overridden by an application specific configuration. */ #ifdef CONFIG_CONSOLE_UART_NUM -#define CONFIG_ESP_CONSOLE_UART_NUM CONFIG_CONSOLE_UART_NUM +# define CONFIG_ESP_CONSOLE_UART_NUM CONFIG_CONSOLE_UART_NUM #else -#define CONFIG_ESP_CONSOLE_UART_NUM 0 +# define CONFIG_ESP_CONSOLE_UART_NUM 0 #endif -#define CONFIG_ESP_CONSOLE_UART_BAUDRATE STDIO_UART_BAUDRATE +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE STDIO_UART_BAUDRATE + +#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM CONFIG_ESP_CONSOLE_UART_NUM /** * Log output configuration (DO NOT CHANGE) */ #ifndef CONFIG_LOG_DEFAULT_LEVEL -#define CONFIG_LOG_DEFAULT_LEVEL LOG_LEVEL +# define CONFIG_LOG_DEFAULT_LEVEL LOG_LEVEL #endif -#define CONFIG_LOG_MAXIMUM_LEVEL LOG_LEVEL +#define CONFIG_LOG_MAXIMUM_LEVEL LOG_LEVEL /** * System specific configuration (DO NOT CHANGE) */ -#ifdef MODULE_NEWLIB_NANO -#define CONFIG_NEWLIB_NANO_FORMAT 1 +#if MODULE_NEWLIB_NANO +# define CONFIG_NEWLIB_NANO_FORMAT 1 #endif #define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1 @@ -87,12 +82,18 @@ #define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1 #define CONFIG_ESP_TIMER_TASK_STACK_SIZE 3584 #define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1 +#define CONFIG_ESP_TIMER_TASK_AFFINITY 0 +#define CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0 1 + #define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE #define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1 #define CONFIG_APP_BUILD_GENERATE_BINARIES 1 #define CONFIG_APP_BUILD_BOOTLOADER 1 #define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1 +#define CONFIG_APP_COMPILE_TIME_DATE 1 +#define CONFIG_APP_EXCLUDE_PROJECT_VER_VAR 1 +#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 9 #define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv" #define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv" @@ -102,34 +103,38 @@ /** * BLE driver configuration (DO NOT CHANGE) */ -#ifdef MODULE_ESP_BLE -#define CONFIG_ESP32_WIFI_ENABLED 1 /* WiFi module has to be enabled */ -#define CONFIG_BT_ENABLED 1 -#define CONFIG_BT_CONTROLLER_ONLY 1 -#else -#define CONFIG_BT_ENABLED 0 +#if MODULE_ESP_BLE +# define CONFIG_BT_ENABLED 1 +# define CONFIG_BT_CONTROLLER_ENABLED 1 +# define CONFIG_BT_CONTROLLER_ONLY 1 +# define CONFIG_SOC_BT_SUPPORTED SOC_BT_SUPPORTED +# define CONFIG_SOC_PM_SUPPORT_BT_PD SOC_PM_SUPPORT_BT_PD +# define CONFIG_SOC_PM_SUPPORT_BT_WAKEUP SOC_PM_SUPPORT_BT_WAKEUP #endif /** * SPI RAM configuration (DO NOT CHANGE) */ -#ifdef MODULE_ESP_SPI_RAM -#define CONFIG_SPIRAM_TYPE_AUTO 1 -#define CONFIG_SPIRAM_SIZE -1 -#define CONFIG_SPIRAM_SPEED_40M 1 -#define CONFIG_SPIRAM 1 -#define CONFIG_SPIRAM_BOOT_INIT 1 -#define CONFIG_SPIRAM_USE_MALLOC 0 /* using malloc requires QStaticQueue */ -#define CONFIG_SPIRAM_MEMTEST 1 -#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384 -#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768 +#if MODULE_ESP_SPI_RAM +# define CONFIG_SPIRAM 1 +# define CONFIG_SPIRAM_TYPE_AUTO 1 +# define CONFIG_SPIRAM_SIZE -1 +# define CONFIG_SPIRAM_SPEED_40M 1 +# define CONFIG_SPIRAM_SPEED 40 +# define CONFIG_SPIRAM_BOOT_INIT 1 +# define CONFIG_SPIRAM_USE_MALLOC 1 /* using malloc requires QStaticQueue */ +# define CONFIG_SPIRAM_USE_CAPS_ALLOC 0 /* using cap instead of malloc */ +# define CONFIG_SPIRAM_MEMTEST 1 +# define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384 +# define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768 +# define CONFIG_SOC_SPIRAM_SUPPORTED SOC_SPIRAM_SUPPORTED +# define CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND 1 #endif /** * SPI Flash driver configuration (DO NOT CHANGE) */ #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 -#define CONFIG_SPI_FLASH_USE_LEGACY_IMPL 1 #define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1 #define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1 #define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20 @@ -143,11 +148,20 @@ #define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1 #define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1 +/** + * RTC Clock configuration + */ +#if MODULE_ESP_RTC_TIMER_32K +# define CONFIG_RTC_CLK_SRC_EXT_CRYS 1 +#else +# define CONFIG_RTC_CLK_SRC_INT_RC 1 +#endif + /** * Ethernet driver configuration (DO NOT CHANGE) */ -#ifdef MODULE_ESP_ETH -#define CONFIG_ETH_ENABLED 1 +#if MODULE_ESP_ETH +# define CONFIG_ETH_ENABLED 1 #endif /** @@ -157,78 +171,114 @@ !defined(CONFIG_FLASHMODE_DIO) && \ !defined(CONFIG_FLASHMODE_QOUT) && \ !defined(CONFIG_FLASHMODE_QIO) -#error "Flash mode not configured" +# error "Flash mode not configured" #endif /** * Wi-Fi driver configuration (DO NOT CHANGE) */ -#ifdef MODULE_ESP_WIFI_ANY -#define CONFIG_ESP32_WIFI_ENABLED 1 -#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10 -#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32 -#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1 -#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1 -#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32 -#define CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM 32 /* required when CONFIG_SPIRAM_USE_MALLOC=0 */ -#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1 -#define CONFIG_ESP32_WIFI_TX_BA_WIN 6 -#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1 -#define CONFIG_ESP32_WIFI_RX_BA_WIN 6 -#if defined(MODULE_ESP_IDF_NVS_FLASH) && !defined(CPU_FAM_ESP32C3) -#define CONFIG_ESP32_WIFI_NVS_ENABLED 1 -#endif -#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1 -#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752 -#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32 -#define CONFIG_ESP32_WIFI_IRAM_OPT 1 -#define CONFIG_ESP32_WIFI_RX_IRAM_OPT 1 -#define CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE 1 -#if defined(MODULE_ESP_WIFI_AP) || defined(MODULE_ESP_NOW) -#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1 -#endif -#ifdef MODULE_ESP_BLE -#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1 -#endif +#if MODULE_ESP_WIFI_ANY +# define CONFIG_ESP_WIFI_ENABLED 1 +# define CONFIG_ESP_WIFI_AMPDU_RX_ENABLED 1 +# define CONFIG_ESP_WIFI_AMPDU_TX_ENABLED 1 +# define CONFIG_ESP_WIFI_AUTH_WPA2_PSK 1 +# define CONFIG_ESP_WIFI_CACHE_TX_BUFFER_NUM 32 +# define CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM 32 +# define CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF 0 +# define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER 1 +# define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM 32 +# define CONFIG_ESP_WIFI_ENABLE_SAE_PK 0 /* default 1 for WPA3 */ +# define CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA 0 /* default 1 for WPA3 */ +# define CONFIG_ESP_WIFI_ENABLE_WPA3_SAE 0 /* default 1 for WPA3 */ +# define CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM 7 +# define CONFIG_ESP_WIFI_GMAC_SUPPORT 1 +# define CONFIG_ESP_WIFI_IRAM_OPT 0 /* default 1 */ +# define CONFIG_ESP_WIFI_MBEDTLS_CRYPTO 0 /* default 1 for WPA3 */ +# define CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT 0 /* default 1 for WPA3 */ +# define CONFIG_ESP_WIFI_MGMT_SBUF_NUM 32 +# define CONFIG_ESP_WIFI_NVS_ENABLED MODULE_ESP_IDF_NVS_FLASH +# define CONFIG_ESP_WIFI_PW_ID "" +# define CONFIG_ESP_WIFI_RX_BA_WIN 6 +# define CONFIG_ESP_WIFI_RX_IRAM_OPT 0 /* default 1 */ +# define CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF 5 +# define CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN 752 +# define CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE 1 +# define CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM 10 +# define CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER 1 +# define CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0 1 +# define CONFIG_ESP_WIFI_TX_BA_WIN 6 +# define CONFIG_ESP_WIFI_TX_BUFFER_TYPE 1 + +# define CONFIG_CRYPTO_INTERNAL 1 + +# if MODULE_ESP_WIFI_AP || MODULE_ESP_NOW +# define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1 +# endif + +# if MODULE_ESP_WIFI_ENTERPRISE +# define CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT 1 +# endif + #endif +#define CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME 10 +#define CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME 50 +#define CONFIG_ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME 15 + /** * PHY configuration */ -#if MODULE_ESP_IDF_NVS_ENABLED -#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1 +#if SOC_PHY_SUPPORTED +# define CONFIG_ESP_PHY_ENABLED 1 +# define CONFIG_ESP_PHY_CALIBRATION_MODE 0 +# define CONFIG_ESP_PHY_MAX_TX_POWER 20 +# define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20 +# define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1 +# if MODULE_ESP_IDF_NVS_FLASH +# define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1 +# endif #endif -#define CONFIG_ESP_PHY_MAX_TX_POWER 20 -#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20 - -#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE -#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER +/** + * Coexist configuration (DO NOT CHANGE) + */ +#if !SOC_WIRELESS_HOST_SUPPORTED +# define CONFIG_ESP_COEX_ENABLED 1 +# if CONFIG_ESP_WIFI_ENABLED && CONFIG_BT_ENABLED +# define CONFIG_ESP_COEX_SW_COEXIST_ENABLE 1 +# endif +# if 0 + /* TODO: + * CONFIG_SW_COEXIST_ENABLE is deprecated but still used in code. + * It is not defined in IDF sdkconfigs and does not work if defined. */ +# define CONFIG_SW_COEXIST_ENABLE 1 +# endif +#endif /* !SOC_WIRELESS_HOST_SUPPORTED */ /** * Flashpage configuration */ #ifndef CONFIG_ESP_FLASHPAGE_CAPACITY -#ifdef MODULE_PERIPH_FLASHPAGE -#if CONFIG_ESP_FLASHPAGE_CAPACITY_64K -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x10000 -#elif CONFIG_ESP_FLASHPAGE_CAPACITY_128K -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x20000 -#elif CONFIG_ESP_FLASHPAGE_CAPACITY_256K -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x40000 -#elif CONFIG_ESP_FLASHPAGE_CAPACITY_512K -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x80000 -#elif CONFIG_ESP_FLASHPAGE_CAPACITY_1M -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x100000 -#elif CONFIG_ESP_FLASHPAGE_CAPACITY_2M -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x200000 -#else -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x80000 -#endif -#else /* MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE */ -#define CONFIG_ESP_FLASHPAGE_CAPACITY 0x0 -#endif /* MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE */ +#if MODULE_PERIPH_FLASHPAGE +# if CONFIG_ESP_FLASHPAGE_CAPACITY_64K +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x10000 +# elif CONFIG_ESP_FLASHPAGE_CAPACITY_128K +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x20000 +# elif CONFIG_ESP_FLASHPAGE_CAPACITY_256K +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x40000 +# elif CONFIG_ESP_FLASHPAGE_CAPACITY_512K +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x80000 +# elif CONFIG_ESP_FLASHPAGE_CAPACITY_1M +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x100000 +# elif CONFIG_ESP_FLASHPAGE_CAPACITY_2M +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x200000 +# else +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x80000 +# endif +#else /* MODULE_PERIPH_FLASHPAGE */ +# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x0 +#endif /* MODULE_PERIPH_FLASHPAGE */ #endif /* !CONFIG_ESP_FLASHPAGE_CAPACITY */ @@ -236,30 +286,92 @@ * LCD driver configuration */ #if MODULE_ESP_IDF_LCD -#ifndef CONFIG_LCD_DATA_BUF_SIZE -#define CONFIG_LCD_DATA_BUF_SIZE 512 +# ifndef CONFIG_LCD_DATA_BUF_SIZE +# define CONFIG_LCD_DATA_BUF_SIZE 512 +# endif +# define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE CONFIG_LCD_DATA_BUF_SIZE #endif -#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE CONFIG_LCD_DATA_BUF_SIZE -#endif - -#endif /* DOXYGEN */ - /** * @brief Include ESP32x family specific SDK configuration */ #if defined(CPU_FAM_ESP32) -#include "sdkconfig_esp32.h" +# include "sdkconfig_esp32.h" #elif defined(CPU_FAM_ESP32C3) -#include "sdkconfig_esp32c3.h" +# include "sdkconfig_esp32c3.h" #elif defined(CPU_FAM_ESP32S2) -#include "sdkconfig_esp32s2.h" +# include "sdkconfig_esp32s2.h" #elif defined(CPU_FAM_ESP32S3) -#include "sdkconfig_esp32s3.h" +# include "sdkconfig_esp32s3.h" #else -#error "ESP32x family implementation missing" +# error "ESP32x family implementation missing" #endif +#ifndef CONFIG_MMU_PAGE_SIZE +# define CONFIG_MMU_PAGE_SIZE_64KB 1 +# define CONFIG_MMU_PAGE_SIZE 0x10000 +#endif + +#ifndef CONFIG_FREERTOS_NUMBER_OF_CORES +# define CONFIG_FREERTOS_NUMBER_OF_CORES 1 +#endif + +#define CONFIG_ESP_DEBUG_OCDAWARE 1 + +#define CONFIG_ADC_SUPPRESS_DEPRECATE_WARN 1 + +#define CONFIG_HEAP_POISONING_DISABLED 1 +#define CONFIG_HEAP_TRACING_OFF 1 +#define CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP 1 + +#define CONFIG_ULP_COPROC_RESERVE_MEM 0 + +#ifdef SOC_RTC_MEM_SUPPORTED +# define CONFIG_SOC_RTC_MEM_SUPPORTED 1 +#endif +#ifdef SOC_RTC_FAST_MEM_SUPPORTED +# define CONFIG_SOC_RTC_FAST_MEM_SUPPORTED 1 +#endif +#ifdef SOC_RTC_SLOW_SUPPORTED +# define CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED 1 +#endif + +/** + * SDMMC Host configuration + */ +#ifdef SOC_SDMMC_HOST_SUPPORTED +# define CONFIG_SOC_SDMMC_HOST_SUPPORTED SOC_SDMMC_HOST_SUPPORTED +# define CONFIG_SOC_SDMMC_DELAY_PHASE_NUM SOC_SDMMC_DELAY_PHASE_NUM +# define CONFIG_SOC_SDMMC_NUM_SLOTS SOC_SDMMC_NUM_SLOTS +# define CONFIG_SOC_SDMMC_SUPPORT_XTAL_CLOCK SOC_SDMMC_SUPPORT_XTAL_CLOCK +# define CONFIG_SOC_SDMMC_USE_GPIO_MATRIX SOC_SDMMC_USE_GPIO_MATRIX +# define CONFIG_SOC_SDMMC_USE_IOMUX SOC_SDMMC_USE_IOMUX +#endif /* SOC_SDMMC_HOST_SUPPORTED */ + +/** + * USB Serial/JTAG configuration + */ +#ifdef SOC_USB_SERIAL_JTAG_SUPPORTED +# ifndef CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG +# define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1 +# endif +# ifndef CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG +# define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG 0 +# endif +# define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED (CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG || \ + CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG) +# define CONFIG_SOC_EFUSE_DIS_USB_JTAG SOC_EFUSE_DIS_USB_JTAG +# define CONFIG_SOC_EFUSE_HARD_DIS_JTAG SOC_EFUSE_HARD_DIS_JTAG +# define CONFIG_SOC_EFUSE_SOFT_DIS_JTAG SOC_EFUSE_SOFT_DIS_JTAG +# define CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED 1 +# define CONFIG_USJ_ENABLE_USB_SERIAL_JTAG CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED +#endif /* SOC_USB_SERIAL_JTAG_SUPPORTED */ + +/* should be RIOT_APPLICATION but PROJECT_NAME must be less than 24 characters */ +#define PROJECT_NAME "RIOT-OS Application" + +#endif /* DOXYGEN */ + #ifdef __cplusplus extern "C" { #endif diff --git a/cpu/esp32/include/sdkconfig_esp32.h b/cpu/esp32/include/sdkconfig_esp32.h index 141c7c4245..ea7af01f72 100644 --- a/cpu/esp32/include/sdkconfig_esp32.h +++ b/cpu/esp32/include/sdkconfig_esp32.h @@ -34,41 +34,50 @@ extern "C" { /* Mapping of Kconfig defines to the respective enumeration values */ #if CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_2 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 2 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 2 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_5 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 5 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 5 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_10 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 10 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 10 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_20 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 20 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 20 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_40 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 40 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 40 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_80 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 80 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_160 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #elif CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ_240 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 240 #endif /** * @brief Defines the CPU frequency [values = 2, 5, 10, 20, 40, 80, 160, 240] */ -#ifndef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 80 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #endif + /** @} */ /** * ESP32 specific RTC clock configuration */ -#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES (8 * 1024) +#define CONFIG_RTC_CLK_CAL_CYCLES 1024 + +#ifdef MODULE_ESP_RTC_TIMER_32K +# define CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_NONE 1 +# define CONFIG_RTC_XTAL_CAL_RETRY 1 +# define CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES 5 +#endif /** * ESP32 specific EFUSE configuration */ #define CONFIG_EFUSE_MAX_BLK_LEN 192 #define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL 0 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL 99 /** * ESP32 specific MAC configuration @@ -82,38 +91,34 @@ extern "C" { /** * ESP32 specific system configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_TIMER_IMPL_FRC2 1 -#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1 - -#define CONFIG_ESP32_DEBUG_OCDAWARE 1 #define CONFIG_ESP32_REV_MIN 0 - -#define CONFIG_ESP32_BROWNOUT_DET 1 -#define CONFIG_ESP32_BROWNOUT_DET_LVL 0 -#define CONFIG_BROWNOUT_DET CONFIG_ESP32_BROWNOUT_DET - -#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 2000 #define CONFIG_ESP32_TRACEMEM_RESERVE_DRAM 0x0 -#define CONFIG_ESP32_ULP_COPROC_RESERVE_MEM 0 + +#define CONFIG_ESP_BROWNOUT_DET 1 +#define CONFIG_ESP_BROWNOUT_DET_LVL 0 +#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1 +#define CONFIG_ESP_DEBUG_OCDAWARE 1 +#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 2000 + +#define CONFIG_ULP_COPROC_RESERVE_MEM 0 /** * ESP32 specific sleep configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 2000 /** * ESP32 specific ADC calibration */ -#define CONFIG_ADC_CAL_EFUSE_TP_ENABLE 1 -#define CONFIG_ADC_CAL_EFUSE_VREF_ENABLE 1 -#define CONFIG_ADC_CAL_LUT_ENABLE 1 +#define CONFIG_ADC_CALI_EFUSE_TP_ENABLE 1 +#define CONFIG_ADC_CALI_EFUSE_VREF_ENABLE 1 +#define CONFIG_ADC_CALI_LUT_ENABLE 1 /** * ESP32 specific PHY configuration */ #define CONFIG_ESP_PHY_REDUCE_TX_POWER 1 -#define CONFIG_ESP32_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER -#define CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER /** * ESP32 specific XTAL configuration @@ -121,93 +126,77 @@ extern "C" { * Main clock crystal frequency (MHz). Zero means to auto-configure. * This is configured at the board level, defaulting to 40. */ -#ifndef CONFIG_ESP32_XTAL_FREQ -#define CONFIG_ESP32_XTAL_FREQ 0 +#ifndef CONFIG_XTAL_FREQ +# define CONFIG_XTAL_FREQ 0 #endif -#ifdef MODULE_ESP_RTC_TIMER_32K -#define CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS 1 -#endif -#define CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES 100 - /** * ESP32 specific SPI RAM configuration */ #ifdef MODULE_ESP_SPI_RAM -#define CONFIG_ESP32_SPIRAM_SUPPORT 1 -#define CONFIG_D0WD_PSRAM_CLK_IO 17 -#define CONFIG_D0WD_PSRAM_CS_IO 16 -#define CONFIG_D2WD_PSRAM_CLK_IO 9 -#define CONFIG_D2WD_PSRAM_CS_IO 10 -#define CONFIG_PICO_PSRAM_CS_IO 10 -#define CONFIG_SPIRAM_BANKSWITCH_ENABLE 1 -#define CONFIG_SPIRAM_BANKSWITCH_RESERVE 8 -#define CONFIG_SPIRAM_CACHE_WORKAROUND 1 -#define CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW 1 -#define CONFIG_SPIRAM_SPIWP_SD3_PIN 7 -#define CONFIG_SPIRAM_SUPPORT CONFIG_ESP32_SPIRAM_SUPPORT +# define CONFIG_D0WD_PSRAM_CLK_IO 17 +# define CONFIG_D0WD_PSRAM_CS_IO 16 +# define CONFIG_D2WD_PSRAM_CLK_IO 9 +# define CONFIG_D2WD_PSRAM_CS_IO 10 +# define CONFIG_PICO_PSRAM_CS_IO 10 +# define CONFIG_SPIRAM_BANKSWITCH_ENABLE 1 +# define CONFIG_SPIRAM_BANKSWITCH_RESERVE 8 +# define CONFIG_SPIRAM_CACHE_WORKAROUND 1 +# define CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW 1 +# define CONFIG_SPIRAM_MODE_QUAD 1 +# define CONFIG_SPIRAM_SPIWP_SD3_PIN 7 #endif /** * ESP32 specific ETH configuration */ #ifdef MODULE_ESP_ETH -#define CONFIG_ETH_USE_ESP32_EMAC 1 -#define CONFIG_ETH_PHY_INTERFACE_RMII 1 -#define CONFIG_ETH_RMII_CLK_INPUT 1 -#define CONFIG_ETH_RMII_CLK_IN_GPIO 0 -#define CONFIG_ETH_DMA_BUFFER_SIZE 512 -#define CONFIG_ETH_DMA_RX_BUFFER_NUM 10 -#define CONFIG_ETH_DMA_TX_BUFFER_NUM 10 +# define CONFIG_ETH_USE_ESP32_EMAC 1 +# define CONFIG_ETH_PHY_INTERFACE_RMII 1 +# define CONFIG_ETH_RMII_CLK_INPUT 1 +# define CONFIG_ETH_RMII_CLK_IN_GPIO 0 +# define CONFIG_ETH_DMA_BUFFER_SIZE 512 +# define CONFIG_ETH_DMA_RX_BUFFER_NUM 10 +# define CONFIG_ETH_DMA_TX_BUFFER_NUM 10 #endif /** * ESP32 specific BLE driver configuration (DO NOT CHANGE) */ #ifdef MODULE_ESP_BLE -#define CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD 20 -#define CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1 -#define CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM 100 -#define CONFIG_BTDM_BLE_DEFAULT_SCA_250PPM 1 -#define CONFIG_BTDM_BLE_SCAN_DUPL 1 -#define CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF 1 -#define CONFIG_BTDM_CTRL_BLE_MAX_CONN 3 -#define CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF 3 -#define CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF 0 -#define CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF 0 -#define CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF 0 -#define CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED 1 -#define CONFIG_BTDM_CTRL_HCI_MODE_VHCI 1 -#define CONFIG_BTDM_CTRL_HLI 0 /* ESP-IDF uses 1 by default */ -#define CONFIG_BTDM_CTRL_LPCLK_SEL_MAIN_XTAL 1 -#define CONFIG_BTDM_CTRL_MODE_BLE_ONLY 1 -#define CONFIG_BTDM_CTRL_MODEM_SLEEP 1 -#define CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG 1 -#define CONFIG_BTDM_CTRL_PCM_ROLE_EFF 0 -#define CONFIG_BTDM_CTRL_PCM_POLAR_EFF 0 -#define CONFIG_BTDM_CTRL_PINNED_TO_CORE_0 1 -#define CONFIG_BTDM_CTRL_PINNED_TO_CORE 0 -#define CONFIG_BTDM_RESERVE_DRAM 0xe000 /* at least 0xdb5c, we use 56 kB */ -#define CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE 200 -#define CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE 1 -#define CONFIG_BTDM_SCAN_DUPL_TYPE 0 - -#define CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD CONFIG_ BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD -#define CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM CONFIG_ BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM -#define CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP -#define CONFIG_BLE_SCAN_DUPLICATE CONFIG_BTDM_BLE_SCAN_DUPL -#define CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN CONFIG_BTDM_CTRL_BLE_MAX_CONN -#define CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED -#define CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI CONFIG_BTDM_CTRL_HCI_MODE_VHCI -#define CONFIG_BTDM_CONTROLLER_MODEM_SLEEP CONFIG_BTDM_CTRL_MODEM_SLEEP -#define CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY CONFIG_BTDM_CTRL_MODE_BLE_ONLY -#define CONFIG_DUPLICATE_SCAN_CACHE_SIZE CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE -#define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE - +# define CONFIG_BT_ALARM_MAX_NUM 50 +# define CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD 20 +# define CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM 100 +# define CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1 +# define CONFIG_BTDM_BLE_CHAN_ASS_EN 1 +# define CONFIG_BTDM_BLE_DEFAULT_SCA_250PPM 1 +# define CONFIG_BTDM_BLE_PING_EN 1 +# define CONFIG_BTDM_BLE_SCAN_DUPL 1 +# define CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF 1 +# define CONFIG_BTDM_CTRL_BLE_MAX_CONN 3 +# define CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF 3 +# define CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF 0 +# define CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF 0 +# define CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF 0 +# define CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED 1 +# define CONFIG_BTDM_CTRL_HCI_MODE_VHCI 1 +# define CONFIG_BTDM_CTRL_HLI 0 /* ESP-IDF uses 1 by default */ +# define CONFIG_BTDM_CTRL_LPCLK_SEL_MAIN_XTAL 1 +# define CONFIG_BTDM_CTRL_MODE_BLE_ONLY 1 +# define CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG 1 +# define CONFIG_BTDM_CTRL_MODEM_SLEEP 1 +# define CONFIG_BTDM_CTRL_PCM_FSYNCSHP_EFF 1 +# define CONFIG_BTDM_CTRL_PCM_POLAR_EFF 0 +# define CONFIG_BTDM_CTRL_PCM_ROLE_EFF 0 +# define CONFIG_BTDM_CTRL_PINNED_TO_CORE 0 +# define CONFIG_BTDM_CTRL_PINNED_TO_CORE_0 1 +# define CONFIG_BTDM_RESERVE_DRAM 0xe000 /* at least 0xdb5c, we use 56 kB */ +# define CONFIG_BTDM_SCAN_DUPL_CACHE_REFRESH_PERIOD 0 +# define CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE 200 +# define CONFIG_BTDM_SCAN_DUPL_TYPE 0 +# define CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE 1 #else - -#define CONFIG_BTDM_RESERVE_DRAM 0 - +# define CONFIG_BTDM_RESERVE_DRAM 0 #endif #ifdef __cplusplus diff --git a/cpu/esp32/include/sdkconfig_esp32c3.h b/cpu/esp32/include/sdkconfig_esp32c3.h index 173830b348..6d78cec43b 100644 --- a/cpu/esp32/include/sdkconfig_esp32c3.h +++ b/cpu/esp32/include/sdkconfig_esp32c3.h @@ -34,38 +34,41 @@ extern "C" { /* Mapping of Kconfig defines to the respective enumeration values */ #if CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_2 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 2 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 2 #elif CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_5 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 5 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 5 #elif CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_10 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 10 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 10 #elif CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_20 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 20 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 20 #elif CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_40 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 40 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 40 #elif CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_80 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 80 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #elif CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ_160 -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 160 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #endif /** * @brief Defines the CPU frequency [values = 2, 5, 10, 20, 40, 80, 160] */ -#ifndef CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 80 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #endif + /** @} */ /** * ESP32-C3 specific RTC clock configuration */ -#define CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES (8 * 1024) +#define CONFIG_RTC_CLK_CAL_CYCLES 1024 /** * ESP32-C3 specific EFUSE configuration */ #define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL 0 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL 199 /** * ESP32-C3 specific MAC configuration @@ -90,50 +93,76 @@ extern "C" { /** * ESP32-C3 specific sleep configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_SLEEP_POWER_DOWN_FLASH 1 -#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1 +#define CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND 1 +#define CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB 1 +#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS 0 /* we realize it */ +#define CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_POWER_DOWN_FLASH 1 +#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 0 +#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1 /** * ESP32-C3 specific USB configuration */ -#define CONFIG_ESP_PHY_ENABLE_USB 1 +#define CONFIG_ESP_PHY_ENABLE_USB 1 /** * ESP32-C3 BLE driver configuration (DO NOT CHANGE) */ #ifdef MODULE_ESP_BLE -#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30 -#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20 -#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100 -#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1 -#define CONFIG_BT_CTRL_BLE_MAX_ACT 10 -#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10 -#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1 -#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0 -#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0 -#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1 -#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1 -#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0 -#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10 -#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1 -#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1 -#define CONFIG_BT_CTRL_HCI_TL 1 -#define CONFIG_BT_CTRL_HCI_TL_EFF 1 -#define CONFIG_BT_CTRL_HW_CCA_EFF 0 -#define CONFIG_BT_CTRL_HW_CCA_VAL 20 -#define CONFIG_BT_CTRL_MODE_EFF 1 -#define CONFIG_BT_CTRL_PINNED_TO_CORE 0 -#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1 -#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0 -#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100 -#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0 -#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1 -#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0 -#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0 -#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1 -#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0 -#define CONFIG_BT_ENABLED 1 -#define CONFIG_BT_SOC_SUPPORT_5_0 1 +# define CONFIG_BT_ALARM_MAX_NUM 50 +# define CONFIG_BT_BLE_CCA_MODE 0 +# define CONFIG_BT_BLE_CCA_MODE_NONE 1 +# define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30 +# define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20 +# define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100 +# define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1 +# define CONFIG_BT_CTRL_BLE_MAX_ACT 10 +# define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10 +# define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1 +# define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0 +# define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0 +# define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1 +# define CONFIG_BT_CTRL_CHAN_ASS_EN 1 +# define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1 +# define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0 +# define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 11 +# define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P9 1 +# define CONFIG_BT_CTRL_DUPL_SCAN_CACHE_REFRESH_PERIOD 0 +# define CONFIG_BT_CTRL_HCI_MODE_VHCI 1 +# define CONFIG_BT_CTRL_HCI_TL 1 +# define CONFIG_BT_CTRL_HCI_TL_EFF 1 +# define CONFIG_BT_CTRL_HW_CCA_EFF 0 +# define CONFIG_BT_CTRL_HW_CCA_VAL 20 +# define CONFIG_BT_CTRL_LE_PING_EN 1 +# define CONFIG_BT_CTRL_MODE_EFF 1 +# define CONFIG_BT_CTRL_PINNED_TO_CORE 0 +# define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1 +# define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1 +# define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0 +# define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100 +# define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0 +# define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1 +# define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0 +# define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0 +# define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1 +# define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0 +# define CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS 1 +#endif + +/* According to the ESP32-C3 Errata Sheet ADC2 does not work correctly. + * To use ADC2 and GPIO5 as ADC channel, CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 + * has to be set (default). */ +#ifndef CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 +# define CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 1 +#endif + +/* According to the ESP32-C3 Errata Sheet ADC2 does not work correctly. + * To use ADC2 and GPIO5 as ADC channel, CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 + * has to be set (default). */ +#ifndef CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 +#define CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 1 #endif #ifdef __cplusplus diff --git a/cpu/esp32/include/sdkconfig_esp32s2.h b/cpu/esp32/include/sdkconfig_esp32s2.h index 15d694a980..e416be8d8f 100644 --- a/cpu/esp32/include/sdkconfig_esp32s2.h +++ b/cpu/esp32/include/sdkconfig_esp32s2.h @@ -34,40 +34,47 @@ extern "C" { /* Mapping of Kconfig defines to the respective enumeration values */ #if CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_2 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 2 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 2 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_5 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 5 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 5 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_10 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 10 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 10 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_20 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 20 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 20 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_40 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 40 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 40 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_80 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 80 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_160 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 160 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #elif CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ_240 -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 240 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 240 #endif /** * @brief Defines the CPU frequency [values = 2, 5, 10, 10, 40, 80, 160, 240] */ -#ifndef CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 80 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #endif + /** @} */ /** * ESP32-S2 specific RTC clock configuration */ -#define CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES (8 * 1024) +#define CONFIG_RTC_CLK_CAL_CYCLES 576 + +#ifdef MODULE_ESP_RTC_TIMER_32K +# define CONFIG_RTC_XTAL_CAL_RETRY 3 +#endif /** * ESP32-S2 specific EFUSE configuration */ #define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL 0 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL 99 /** * ESP32-S2 specific MAC configuration @@ -85,49 +92,49 @@ extern "C" { /** * ESP32-S2 specific system configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1 -#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1 - -#define CONFIG_ESP32S2_DEBUG_OCDAWARE 1 - -#define CONFIG_ESP32S2_BROWNOUT_DET 1 -#define CONFIG_ESP32S2_BROWNOUT_DET_LVL 7 - #define CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM 0x0 -#define CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM 0 + +#define CONFIG_ESP_BROWNOUT_DET 1 +#define CONFIG_ESP_BROWNOUT_DET_LVL 7 +#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1 +#define CONFIG_ESP_DEBUG_OCDAWARE 1 +#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1 + +#define CONFIG_ULP_COPROC_RESERVE_MEM 0 /** * ESP32-S2 specific sleep configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 0 /** * ESP32-S2 specific USB configuration */ #ifdef MODULE_ESP_IDF_USB -#define CONFIG_USB_OTG_SUPPORTED 1 +# define CONFIG_USB_OTG_SUPPORTED 1 #endif /** * ESP32-S2 specific SPI RAM configuration */ #ifdef MODULE_ESP_SPI_RAM -#define CONFIG_ESP32S2_SPIRAM_SUPPORT 1 -#ifdef MODULE_ESP_SPI_OCT -#define CONFIG_SPIRAM_MODE_OCT 1 -#else -#define CONFIG_SPIRAM_MODE_QUAD 1 -#endif -#define CONFIG_DEFAULT_PSRAM_CLK_IO 30 -#define CONFIG_DEFAULT_PSRAM_CS_IO 26 -#define CONFIG_SPIRAM_SUPPORT CONFIG_ESP32S2_SPIRAM_SUPPORT +# ifdef MODULE_ESP_SPI_OCT +# define CONFIG_SPIRAM_MODE_OCT 1 +# else +# define CONFIG_SPIRAM_MODE_QUAD 1 +# endif +# define CONFIG_SPIRAM_CLK_IO 30 +# define CONFIG_SPIRAM_CS_IO 26 #endif /** * ESP32-S2 specific Cache config */ #define CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB 1 +#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x2000 #define CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_32B 1 #define CONFIG_ESP32S2_DATA_CACHE_8KB 1 +#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x2000 #define CONFIG_ESP32S2_DATA_CACHE_LINE_32B 1 /** diff --git a/cpu/esp32/include/sdkconfig_esp32s3.h b/cpu/esp32/include/sdkconfig_esp32s3.h index 25e8e1550f..edc3b84bc9 100644 --- a/cpu/esp32/include/sdkconfig_esp32s3.h +++ b/cpu/esp32/include/sdkconfig_esp32s3.h @@ -34,40 +34,43 @@ extern "C" { /* Mapping of Kconfig defines to the respective enumeration values */ #if CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_2 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 2 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 2 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_5 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 5 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 5 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_10 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 10 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 10 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_20 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 20 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 20 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_40 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 40 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 40 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_80 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 80 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_160 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 160 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #elif CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ_240 -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 240 +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 240 #endif /** * @brief Defines the CPU frequency [values = 2, 5, 10, 10, 40, 80, 160, 240] */ -#ifndef CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ -#define CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ 80 +#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 80 #endif + /** @} */ /** * ESP32-S3 specific RTC clock configuration */ -#define CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES (8 * 1024) +#define CONFIG_RTC_CLK_CAL_CYCLES 1024 /** * ESP32-S3 specific EFUSE configuration */ #define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL 0 +#define CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL 199 /** * ESP32-S3 specific MAC configuration @@ -83,49 +86,47 @@ extern "C" { */ #define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1 #define CONFIG_ESPTOOLPY_FLASHFREQ "80m" +#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1 /** * ESP32-S3 specific system configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1 -#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1 - -#define CONFIG_ESP32S3_DEBUG_OCDAWARE 1 - -#define CONFIG_ESP32S3_BROWNOUT_DET 1 -#define CONFIG_ESP32S3_BROWNOUT_DET_LVL 7 - -#define CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY 2000 #define CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM 0x0 -#define CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM 0 + +#define CONFIG_ESP_BROWNOUT_DET 1 +#define CONFIG_ESP_BROWNOUT_DET_LVL 7 +#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1 +#define CONFIG_ESP_DEBUG_OCDAWARE 1 +#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1 + +#define CONFIG_ULP_COPROC_RESERVE_MEM 0 /** * ESP32-S3 specific sleep configuration (DO NOT CHANGE) */ -#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1 -#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1 +#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 2000 /** * ESP32-S3 specific USB configuration */ #define CONFIG_ESP_PHY_ENABLE_USB 1 #ifdef MODULE_ESP_IDF_USB -#define CONFIG_USB_OTG_SUPPORTED 1 +# define CONFIG_USB_OTG_SUPPORTED 1 #endif /** * ESP32-S3 specific SPI RAM configuration */ #ifdef MODULE_ESP_SPI_RAM -#define CONFIG_ESP32S3_SPIRAM_SUPPORT 1 #ifdef MODULE_ESP_SPI_OCT -#define CONFIG_SPIRAM_MODE_OCT 1 +# define CONFIG_SPIRAM_MODE_OCT 1 #else -#define CONFIG_SPIRAM_MODE_QUAD 1 +# define CONFIG_SPIRAM_MODE_QUAD 1 #endif -#define CONFIG_DEFAULT_PSRAM_CLK_IO 30 -#define CONFIG_DEFAULT_PSRAM_CS_IO 26 -#define CONFIG_SPIRAM_SUPPORT CONFIG_ESP32S3_SPIRAM_SUPPORT +# define CONFIG_SPIRAM_CLK_IO 30 +# define CONFIG_SPIRAM_CS_IO 26 #endif /** @@ -148,40 +149,43 @@ extern "C" { * ESP32-S3 BLE driver configuration (DO NOT CHANGE) */ #ifdef MODULE_ESP_BLE -#define CONFIG_BT_CONTROLLER_ONLY 1 -#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30 -#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20 -#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100 -#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1 -#define CONFIG_BT_CTRL_BLE_MAX_ACT 10 -#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10 -#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1 -#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0 -#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0 -#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1 -#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1 -#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0 -#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10 -#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1 -#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1 -#define CONFIG_BT_CTRL_HCI_TL 1 -#define CONFIG_BT_CTRL_HCI_TL_EFF 1 -#define CONFIG_BT_CTRL_HW_CCA_EFF 0 -#define CONFIG_BT_CTRL_HW_CCA_VAL 20 -#define CONFIG_BT_CTRL_MODE_EFF 1 -#define CONFIG_BT_CTRL_PINNED_TO_CORE 0 -#define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1 -#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1 -#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0 -#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100 -#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0 -#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1 -#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0 -#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0 -#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1 -#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0 -#define CONFIG_BT_ENABLED 1 -#define CONFIG_BT_SOC_SUPPORT_5_0 1 +# define CONFIG_BT_ALARM_MAX_NUM 50 +# define CONFIG_BT_BLE_CCA_MODE 0 +# define CONFIG_BT_BLE_CCA_MODE_NONE 1 +# define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30 +# define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20 +# define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100 +# define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1 +# define CONFIG_BT_CTRL_BLE_MAX_ACT 10 +# define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10 +# define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1 +# define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0 +# define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0 +# define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1 +# define CONFIG_BT_CTRL_CHAN_ASS_EN 1 +# define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1 +# define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0 +# define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 11 +# define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P9 1 +# define CONFIG_BT_CTRL_DUPL_SCAN_CACHE_REFRESH_PERIOD 0 +# define CONFIG_BT_CTRL_HCI_MODE_VHCI 1 +# define CONFIG_BT_CTRL_HCI_TL 1 +# define CONFIG_BT_CTRL_HCI_TL_EFF 1 +# define CONFIG_BT_CTRL_HW_CCA_EFF 0 +# define CONFIG_BT_CTRL_HW_CCA_VAL 20 +# define CONFIG_BT_CTRL_LE_PING_EN 1 +# define CONFIG_BT_CTRL_MODE_EFF 1 +# define CONFIG_BT_CTRL_PINNED_TO_CORE 0 +# define CONFIG_BT_CTRL_PINNED_TO_CORE_0 1 +# define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1 +# define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0 +# define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100 +# define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0 +# define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1 +# define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0 +# define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0 +# define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1 +# define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0 #endif #ifdef __cplusplus diff --git a/cpu/esp32/include/syscalls.h b/cpu/esp32/include/syscalls.h index 6d8362d0f6..436bcece05 100644 --- a/cpu/esp32/include/syscalls.h +++ b/cpu/esp32/include/syscalls.h @@ -27,7 +27,7 @@ extern "C" { #endif /** Time since boot in us (64bit version) */ -int64_t system_get_time_64 (void); +uint64_t system_get_time_64 (void); /** initialize system watchdog timer and start it */ void system_wdt_init (void); diff --git a/cpu/esp32/irq_arch.c b/cpu/esp32/irq_arch.c index f84b92410f..9fcc3cb2a1 100644 --- a/cpu/esp32/irq_arch.c +++ b/cpu/esp32/irq_arch.c @@ -19,14 +19,17 @@ */ #include "irq_arch.h" +#include "log.h" #include "esp_attr.h" +#include "esp_bit_defs.h" +#include "esp_cpu.h" #include "esp_err.h" #include "freertos/FreeRTOS.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "rom/ets_sys.h" +#include "soc/interrupts.h" #include "soc/periph_defs.h" +#include "soc/soc.h" #include "esp_intr_alloc.h" #define ENABLE_DEBUG 0 @@ -44,83 +47,87 @@ typedef struct intr_handle_data_t { /* TODO change to a clearer approach */ static const struct intr_handle_data_t _irq_data_table[] = { +#ifndef __XTENSA__ { ETS_FROM_CPU_INTR0_SOURCE, CPU_INUM_SOFTWARE, 1 }, +#endif { ETS_TG0_WDT_LEVEL_INTR_SOURCE, CPU_INUM_WDT, 1 }, { ETS_TG0_T0_LEVEL_INTR_SOURCE, CPU_INUM_RTT, 1 }, -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) +#if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1 { ETS_TG0_T1_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, #endif -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) - { ETS_TG0_LACT_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, -#endif -#if !defined(CPU_FAM_ESP32C2) +#if SOC_TIMER_GROUPS > 1 { ETS_TG1_T0_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, -#endif -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) +# if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1 { ETS_TG1_T1_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, +# endif /* SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1 */ +#endif /* SOC_TIMER_GROUPS > 1 */ +#if defined(CPU_FAM_ESP32) + { ETS_TG0_LACT_LEVEL_INTR_SOURCE, CPU_INUM_SYSTIMER, 2 }, +#elif defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) || defined(CPU_FAM_ESP32C3) + { ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, CPU_INUM_SYSTIMER, 2 }, +#else +# error "Platform implementation is missing" #endif { ETS_UART0_INTR_SOURCE, CPU_INUM_UART, 1 }, { ETS_UART1_INTR_SOURCE, CPU_INUM_UART, 1 }, -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) +#if SOC_UART_NUM > 2 { ETS_UART2_INTR_SOURCE, CPU_INUM_UART, 1 }, #endif { ETS_GPIO_INTR_SOURCE, CPU_INUM_GPIO, 1 }, { ETS_I2C_EXT0_INTR_SOURCE, CPU_INUM_I2C, 1 }, -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) +#if SOC_I2C_NUM > 1 { ETS_I2C_EXT1_INTR_SOURCE, CPU_INUM_I2C, 1 }, #endif -#if defined(CPU_FAM_ESP32) +#if defined(SOC_BLE_SUPPORTED) +# if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S3) || defined(CPU_FAM_ESP32C3) + { ETS_RWBLE_INTR_SOURCE, CPU_INUM_BLE, 2 }, +# else +# error "Platform implementation is missing" +# endif +#endif /* SOC_BLE_SUPPORTED */ +#if defined(SOC_EMAC_SUPPORTED) { ETS_ETH_MAC_INTR_SOURCE, CPU_INUM_ETH, 1 }, #endif -#if !defined(CPU_FAM_ESP32C2) +#if defined(SOC_RMT_SUPPORTED) + { ETS_RMT_INTR_SOURCE, CPU_INUM_RMT, 1 }, +#endif +#if defined(SOC_SDMMC_HOST_SUPPORTED) + { ETS_SDIO_HOST_INTR_SOURCE, CPU_INUM_SDMMC, 2 }, +#endif +#if defined(SOC_TWAI_SUPPORTED) { ETS_TWAI_INTR_SOURCE, CPU_INUM_CAN, 1 }, - { ETS_TIMER2_INTR_SOURCE, CPU_INUM_FRC2, 2 }, #endif -#if !defined(CPU_FAM_ESP32) - { ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, CPU_INUM_SYSTIMER, 2 }, -#endif - { ETS_INTERNAL_SW1_INTR_SOURCE, CPU_INUM_BLE, 2 }, -#if defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) +#if defined(SOC_USB_OTG_SUPPORTED) { ETS_USB_INTR_SOURCE, CPU_INUM_USB, 1 }, #endif -#if defined(ETS_USB_SERIAL_JTAG_INTR_SOURCE) +#if defined(SOC_USB_SERIAL_JTAG_SUPPORTED) { ETS_USB_SERIAL_JTAG_INTR_SOURCE, CPU_INUM_SERIAL_JTAG, 1 }, #endif - { ETS_RMT_INTR_SOURCE, CPU_INUM_RMT, 1 }, -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) - { ETS_I2S0_INTR_SOURCE, CPU_INUM_LCD, 1 }, -#elif defined(CPU_FAM_ESP32S3) - { ETS_LCD_CAM_INTR_SOURCE, CPU_INUM_LCD, 1 }, -#endif -#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) - { ETS_SDIO_HOST_INTR_SOURCE, CPU_INUM_SDMMC, 2 }, +#if SOC_LCDCAM_SUPPORTED + { ETS_LCD_CAM_INTR_SOURCE, CPU_INUM_LCDCAM, 2 }, #endif }; #define IRQ_DATA_TABLE_SIZE ARRAY_SIZE(_irq_data_table) -#if defined(CPU_FAM_ESP32) && MODULE_ESP_LCD && MODULE_ESP_ETH -#error "esp_eth and esp_lcd can't be used at the same time because of an interrupt conflict" -#endif - void esp_irq_init(void) { #ifdef SOC_CPU_HAS_FLEXIBLE_INTC /* to avoid to do it in every component, we initialize levels here once */ for (unsigned i = 0; i < IRQ_DATA_TABLE_SIZE; i++) { - intr_cntrl_ll_set_int_level(_irq_data_table[i].intr, _irq_data_table[i].level); + esp_cpu_intr_set_priority(_irq_data_table[i].intr, _irq_data_table[i].level); } #endif } void esp_intr_enable_source(int inum) { - intr_cntrl_ll_enable_interrupts(BIT(inum)); + esp_cpu_intr_enable(BIT(inum)); } void esp_intr_disable_source(int inum) { - intr_cntrl_ll_disable_interrupts(BIT(inum)); + esp_cpu_intr_disable(BIT(inum)); } esp_err_t esp_intr_enable(intr_handle_t handle) @@ -150,6 +157,8 @@ esp_err_t esp_intr_disable(intr_handle_t handle) esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, void *arg, intr_handle_t *ret_handle) { + DEBUG("%s source=%d flags=0x%04"PRIx16" handler=%p arg=%p\n", + __func__, source, (uint16_t)flags, handler, arg); unsigned i; for (i = 0; i < IRQ_DATA_TABLE_SIZE; i++) { if (_irq_data_table[i].src == source) { @@ -158,6 +167,8 @@ esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, } if (i == IRQ_DATA_TABLE_SIZE) { + LOG_ERROR("%s source=%d not found in interrupt allocation table\n", + __func__, source); return ESP_ERR_NOT_FOUND; } @@ -165,16 +176,16 @@ esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, intr_matrix_set(PRO_CPU_NUM, _irq_data_table[i].src, _irq_data_table[i].intr); /* set the interrupt handler */ - intr_cntrl_ll_set_int_handler(_irq_data_table[i].intr, handler, arg); + esp_cpu_intr_set_handler(_irq_data_table[i].intr, handler, arg); #ifdef SOC_CPU_HAS_FLEXIBLE_INTC /* set interrupt level given by flags */ - intr_cntrl_ll_set_int_level(_irq_data_table[i].intr, esp_intr_flags_to_level(flags)); + esp_cpu_intr_set_priority(_irq_data_table[i].intr, esp_intr_flags_to_level(flags)); #endif /* enable the interrupt if ESP_INTR_FLAG_INTRDISABLED is not set */ if ((flags & ESP_INTR_FLAG_INTRDISABLED) == 0) { - intr_cntrl_ll_enable_interrupts(BIT(_irq_data_table[i].intr)); + esp_cpu_intr_enable(BIT(_irq_data_table[i].intr)); } if (ret_handle) { @@ -204,3 +215,24 @@ int esp_intr_get_cpu(intr_handle_t handle) { return PRO_CPU_NUM; } + +static volatile uint32_t esp_intr_noniram_state; +static uint32_t esp_intr_noniram_call_counter = 0; + +void IRAM_ATTR esp_intr_noniram_disable(void) +{ + if (esp_intr_noniram_call_counter == 0) { + esp_intr_noniram_state = irq_disable(); + } + esp_intr_noniram_call_counter++; +} + +void IRAM_ATTR esp_intr_noniram_enable(void) +{ + if (esp_intr_noniram_call_counter) { + esp_intr_noniram_call_counter--; + if (esp_intr_noniram_call_counter == 0) { + irq_restore(esp_intr_noniram_state); + } + }; +} diff --git a/cpu/esp32/ld/esp32/sections.ld.in b/cpu/esp32/ld/esp32/sections.ld.in deleted file mode 100644 index 692214ac39..0000000000 --- a/cpu/esp32/ld/esp32/sections.ld.in +++ /dev/null @@ -1,648 +0,0 @@ -/* Automatically generated file; DO NOT EDIT */ -/* Espressif IoT Development Framework Linker Script */ -/* Generated from: esp-idf/components/esp_system/ld/esp32/sections.ld.in */ - -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ -/* Default entry point: */ -ENTRY(call_start_cpu0); - -SECTIONS -{ - /* RTC fast memory holds RTC wake stub code, - including from any source file named rtc_wake_stub*.c - */ - .rtc.text : - { - . = ALIGN(4); - _rtc_text_start = ABSOLUTE(.); - - *(.rtc.literal .rtc.text .rtc.text.*) - - *rtc_wake_stub*.*(.literal .text .literal.* .text.*) - _rtc_text_end = ABSOLUTE(.); - } > rtc_iram_seg - - /* - This section is required to skip rtc.text area because rtc_iram_seg and - rtc_data_seg are reflect the same address space on different buses. - */ - .rtc.dummy : - { - _rtc_dummy_start = ABSOLUTE(.); - _rtc_fast_start = ABSOLUTE(.); - . = SIZEOF(.rtc.text); - _rtc_dummy_end = ABSOLUTE(.); - } > rtc_data_seg - - /* This section located in RTC FAST Memory area. - It holds data marked with RTC_FAST_ATTR attribute. - See the file "esp_attr.h" for more information. - */ - .rtc.force_fast : - { - . = ALIGN(4); - _rtc_force_fast_start = ABSOLUTE(.); - - _coredump_rtc_fast_start = ABSOLUTE(.); - *(.rtc.fast.coredump .rtc.fast.coredump.*) - _coredump_rtc_fast_end = ABSOLUTE(.); - - *(.rtc.force_fast .rtc.force_fast.*) - . = ALIGN(4) ; - - _rtc_force_fast_end = ABSOLUTE(.); - } > rtc_data_seg - - /* RTC data section holds RTC wake stub - data/rodata, including from any source file - named rtc_wake_stub*.c and the data marked with - RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. - The memory location of the data is dependent on - CONFIG_ESP32_RTCDATA_IN_FAST_MEM option. - */ - .rtc.data : - { - _rtc_data_start = ABSOLUTE(.); - - _coredump_rtc_start = ABSOLUTE(.); - *(.rtc.coredump .rtc.coredump.*) - _coredump_rtc_end = ABSOLUTE(.); - *(.rtc.data .rtc.data.*) - *(.rtc.rodata .rtc.rodata.*) - - *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) - _rtc_data_end = ABSOLUTE(.); - - } > rtc_data_location - - /* RTC bss, from any source file named rtc_wake_stub*.c */ - .rtc.bss (NOLOAD) : - { - /* part that is initialized if not waking up from deep sleep */ - _rtc_bss_start = ABSOLUTE(.); - *rtc_wake_stub*.*(.bss .bss.*) - *rtc_wake_stub*.*(COMMON) - _rtc_bss_end = ABSOLUTE(.); - /* part that saves some data for rtc periph module, this part is - only initialized at power on reset */ - _rtc_bss_rtc_start = ABSOLUTE(.); - *(.rtc.bss .rtc.bss.*) - _rtc_bss_rtc_end = ABSOLUTE(.); - } > rtc_data_location - - /* This section holds data that should not be initialized at power up - and will be retained during deep sleep. - User data marked with RTC_NOINIT_ATTR will be placed - into this section. See the file "esp_attr.h" for more information. - The memory location of the data is dependent on - CONFIG_ESP32_RTCDATA_IN_FAST_MEM option. - */ - .rtc_noinit (NOLOAD): - { - . = ALIGN(4); - _rtc_noinit_start = ABSOLUTE(.); - *(.rtc_noinit .rtc_noinit.*) - . = ALIGN(4) ; - _rtc_noinit_end = ABSOLUTE(.); - } > rtc_data_location - - /* This section located in RTC SLOW Memory area. - It holds data marked with RTC_SLOW_ATTR attribute. - See the file "esp_attr.h" for more information. - */ - .rtc.force_slow : - { - . = ALIGN(4); - _rtc_force_slow_start = ABSOLUTE(.); - *(.rtc.force_slow .rtc.force_slow.*) - . = ALIGN(4) ; - _rtc_force_slow_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* Get size of rtc slow data based on rtc_data_location alias */ - _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_slow_end - _rtc_data_start) - : (_rtc_force_slow_end - _rtc_force_slow_start); - - _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_fast_end - _rtc_fast_start) - : (_rtc_noinit_end - _rtc_fast_start); - - ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), - "RTC_SLOW segment data does not fit.") - - ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), - "RTC_FAST segment data does not fit.") - - /* Send .iram0 code to iram */ - .iram0.vectors : - { - _iram_start = ABSOLUTE(.); - /* Vectors go to IRAM */ - _vector_table = ABSOLUTE(.); - /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ - . = 0x0; - KEEP(*(.WindowVectors.text)); - . = 0x180; - KEEP(*(.Level2InterruptVector.text)); - . = 0x1c0; - KEEP(*(.Level3InterruptVector.text)); - . = 0x200; - KEEP(*(.Level4InterruptVector.text)); - . = 0x240; - KEEP(*(.Level5InterruptVector.text)); - . = 0x280; - KEEP(*(.DebugExceptionVector.text)); - . = 0x2c0; - KEEP(*(.NMIExceptionVector.text)); - . = 0x300; - KEEP(*(.KernelExceptionVector.text)); - . = 0x340; - KEEP(*(.UserExceptionVector.text)); - . = 0x3C0; - KEEP(*(.DoubleExceptionVector.text)); - . = 0x400; - _invalid_pc_placeholder = ABSOLUTE(.); - *(.*Vector.literal) - - *(.UserEnter.literal); - *(.UserEnter.text); - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - - _init_end = ABSOLUTE(.); - } > iram0_0_seg - - /* If Bluetooth is not used, this DRAM section can be used as heap */ - . = _data_start_btdm; /* 0x3ffae6e0 */ - . = ALIGN (4); - _sheap1 = ABSOLUTE(.); - . = 0x3ffb0000; - _eheap1 = ABSOLUTE(.); - - .iram0.text : - { - /* Code marked as running out of IRAM */ - _iram_text_start = ABSOLUTE(.); - - *(.iram1 .iram1.*) - - /* Xtensa basic functionality written in assembler should be placed in IRAM */ - *xtensa/*(.literal .text .literal.* .text.*) - - /* parts of RIOT that should run in IRAM */ - *core/*(.literal .text .literal.* .text.*) - *syscalls.*(.literal .text .literal.* .text.*) - *esp_common_periph/flash.*(.literal .text .literal.* .text.*) - *esp_common/thread_arch.*(.literal .text .literal.* .text.*) - *esp_freertos_common/*(.literal .text .literal.* .text.*) - - /* parts of ESP-IDF that should run in IRAM */ - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ - *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) - *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) - *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) - *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) - *components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) - *components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*) - *components/esp_ringbuf/*(.literal .literal.* .text .text.*) - *components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort) - *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) - - *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) - *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) - *libgcc.a:save-restore.*(.literal .literal.* .text .text.*) - *libgcov.a:(.literal .literal.* .text .text.*) - - *components/hal/cpu_hal.*(.literal .literal.* .text .text.*) - *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/soc_hal.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) - *components/hal/twai_hal.*(.literal .literal.* .text .text.*) - *components/hal/uart_hal.*(.literal .literal.* .text .text.*) - *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) - *components/heap/heap_tlsf.*(.literal .literal.* .text .text.*) - *components/heap/multi_heap.*(.literal .literal.* .text .text.*) - - *esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write) - - *libnet80211.a:(.wifi0iram .wifi0iram.*) - *libnet80211.a:(.wifirxiram .wifirxiram.*) - *libnet80211.a:(.wifislprxiram .wifislprxiram.*) - - *components/newlib/abort.*(.literal .literal.* .text .text.*) - *components/newlib/assert.*(.literal .literal.* .text .text.*) - *components/newlib/heap.*(.literal .literal.* .text .text.*) - *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) - - *libpp.a:(.wifi0iram .wifi0iram.*) - *libpp.a:(.wifiorslpiram .wifiorslpiram.*) - *libpp.a:(.wifirxiram .wifirxiram.*) - *libpp.a:(.wifislprxiram .wifislprxiram.*) - *librtc.a:(.literal .literal.* .text .text.*) - - *components/soc/lldesc.*(.literal .literal.* .text .text.*) - *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*) - - *libxt_hal.a:(.literal .literal.* .text .text.*) - *libxtensa.a:eri.*(.literal .literal.* .text .text.*) - *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*) - - } > iram0_0_seg - - .dram0.data : - { - _data_start = ABSOLUTE(.); - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - KEEP (*(SORT(.xfa.*))) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - - _esp_system_init_fn_array_start = ABSOLUTE(.); - KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) - _esp_system_init_fn_array_end = ABSOLUTE(.); - - *(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*) - *(.dram1 .dram1.*) - _coredump_dram_start = ABSOLUTE(.); - *(.dram1.coredump .dram1.coredump.*) - _coredump_dram_end = ABSOLUTE(.); - *components/app_trace/app_trace.*(.rodata .rodata.*) - *components/app_trace/app_trace_util.*(.rodata .rodata.*) - _bt_data_start = ABSOLUTE(.); - *components/bt/*(.data .data.*) - . = ALIGN(4); - _bt_data_end = ABSOLUTE(.); - _btdm_data_start = ABSOLUTE(.); - *libbtdm_app.a:(.data .data.*) - . = ALIGN(4); - _btdm_data_end = ABSOLUTE(.); - - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - *components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*) - *components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*) - *components/esp_system/esp_err.*(.rodata .rodata.*) - *components/esp_system/ubsan.*(.rodata .rodata.*) - - *libgcc.a:_divsf3.*(.rodata .rodata.*) - *libgcc.a:save-restore.*(.rodata .rodata.*) - *libgcov.a:(.rodata .rodata.*) - - *components/hal/cpu_hal.*(.rodata .rodata.*) - *components/hal/i2c_hal_iram.*(.rodata .rodata.*) - *components/hal/ledc_hal_iram.*(.rodata .rodata.*) - *components/hal/soc_hal.*(.rodata .rodata.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_slave_hal_iram.*(.rodata .rodata.*) - *components/hal/systimer_hal.*(.rodata .rodata.*) - *components/hal/twai_hal.*(.rodata .rodata.*) - *components/hal/uart_hal.*(.rodata .rodata.*) - *components/hal/wdt_hal_iram.*(.rodata .rodata.*) - *components/heap/heap_tlsf.*(.rodata .rodata.*) - *components/heap/multi_heap.*(.rodata .rodata.*) - - *components/newlib/abort.*(.rodata .rodata.*) - *components/newlib/assert.*(.rodata .rodata.*) - *components/newlib/heap.*(.rodata .rodata.*) - *components/newlib/stdatomic.*(.rodata .rodata.*) - - _nimble_data_start = ABSOLUTE(.); - *libnimble.a:(.data .data.*) - . = ALIGN(4); - _nimble_data_end = ABSOLUTE(.); - *libphy.a:(.rodata .rodata.*) - - *components/soc/lldesc.*(.rodata .rodata.*) - *components/spi_flash/memspi_host_driver.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*) - *components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*) - - _data_end = ABSOLUTE(.); - . = ALIGN(4); - } > dram0_0_seg - - /** - * This section holds data that won't be initialised when startup. - * This section locates in External RAM region. - */ - .ext_ram_noinit (NOLOAD) : - { - _ext_ram_noinit_start = ABSOLUTE(.); - *(.ext_ram_noinit*) - . = ALIGN(4); - _ext_ram_noinit_end = ABSOLUTE(.); - } > extern_ram_seg - - /*This section holds data that should not be initialized at power up. - The section located in Internal SRAM memory region. The macro _NOINIT - can be used as attribute to place data into this section. - See the esp_attr.h file for more information. - */ - .noinit (NOLOAD): - { - . = ALIGN(4); - _noinit_start = ABSOLUTE(.); - *(.noinit .noinit.*) - . = ALIGN(4) ; - _noinit_end = ABSOLUTE(.); - } > dram0_0_seg - - /* external memory bss, from any global variable with EXT_RAM_ATTR attribute*/ - .ext_ram.bss (NOLOAD) : - { - _ext_ram_bss_start = ABSOLUTE(.); - - - . = ALIGN(4); - _ext_ram_bss_end = ABSOLUTE(.); - } > extern_ram_seg - - /* Shared RAM */ - .dram0.bss (NOLOAD) : - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - - *(.bss .bss.*) - *(.ext_ram.bss .ext_ram.bss.*) - *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) - *(COMMON) - _bt_bss_start = ABSOLUTE(.); - *components/bt/*(.bss .bss.* COMMON) - . = ALIGN(4); - _bt_bss_end = ABSOLUTE(.); - _btdm_bss_start = ABSOLUTE(.); - *libbtdm_app.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _btdm_bss_end = ABSOLUTE(.); - _nimble_bss_start = ABSOLUTE(.); - *libnimble.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _nimble_bss_end = ABSOLUTE(.); - - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - } > dram0_0_seg - - ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), - "DRAM segment data does not fit.") - - /* Reserved ROM/ETS data start at 0x3ffe000. */ - . = 0x3ffe0000; - _heap_top = ABSOLUTE(.); - _eheap = ABSOLUTE(.); - - /* Reserved ROM/ETS data region for PRO CPU: 0x3ffe0000 ... 0x3ffe440 */ - . = 0x3ffe0440; - _sheap2 = ABSOLUTE(.); - . = 0x3ffe4000; - _eheap2 = ABSOLUTE(.); - - /* Reserved ROM/ETS data region for APP CPU: 0x3ffe4000 ... 0x3ffe4350 */ - . = 0x3ffe4350; - _sheap3 = ABSOLUTE(.); - . = 0x40000000; - _eheap3 = ABSOLUTE(.); - - .flash.appdesc : ALIGN(0x10) - { - _rodata_start = ABSOLUTE(.); - - *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ - *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ - - /* Create an empty gap within this section. Thanks to this, the end of this - * section will match .flah.rodata's begin address. Thus, both sections - * will be merged when creating the final bin image. */ - . = ALIGN(ALIGNOF(.flash.rodata)); - } >default_rodata_seg - - .flash.rodata : ALIGN(0x10) - { - _flash_rodata_start = ABSOLUTE(.); - - *(.rodata .rodata.*) - - *(.rodata_wlog_error .rodata_wlog_error.*) - *(.rodata_wlog_info .rodata_wlog_info.*) - *(.rodata_wlog_warning .rodata_wlog_warning.*) - - KEEP (*(SORT(.roxfa.*))) - - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table .gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - . = (. + 3) & ~ 3; - __eh_frame = ABSOLUTE(.); - KEEP(*(.eh_frame)) - . = (. + 7) & ~ 3; - /* C++ constructor and destructor tables - - Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt - */ - __init_array_start = ABSOLUTE(.); - KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) - __init_array_end = ABSOLUTE(.); - - KEEP (*crtbegin.*(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - /* Addresses of memory regions reserved via - SOC_RESERVE_MEMORY_REGION() */ - soc_reserved_memory_region_start = ABSOLUTE(.); - KEEP (*(.reserved_memory_address)) - soc_reserved_memory_region_end = ABSOLUTE(.); - _rodata_end = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - _thread_local_start = ABSOLUTE(.); - *(.tdata) - *(.tdata.*) - *(.tbss) - *(.tbss.*) - _thread_local_end = ABSOLUTE(.); - . = ALIGN(4); - } >default_rodata_seg - - _flash_rodata_align = ALIGNOF(.flash.rodata); - - .flash.rodata_noload (NOLOAD) : - { - . = ALIGN (4); - *(.rodata_wlog_debug .rodata_wlog_debug.*) - *(.rodata_wlog_verbose .rodata_wlog_verbose.*) - } > default_rodata_seg - - .flash.text : - { - _stext = .; - _text_start = ABSOLUTE(.); - - *(.literal .literal.* .text .text.*) - - *(.wifi0iram .wifi0iram.*) - *(.wifiorslpiram .wifiorslpiram.*) - *(.wifirxiram .wifirxiram.*) - *(.wifislpiram .wifislpiram.*) - *(.wifislprxiram .wifislprxiram.*) - - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - - /** CPU will try to prefetch up to 16 bytes of - * of instructions. This means that any configuration (e.g. MMU, PMS) must allow - * safe access to up to 16 bytes after the last real instruction, add - * dummy bytes to ensure this - */ - . += _esp_flash_mmap_prefetch_pad_size; - - _text_end = ABSOLUTE(.); - _etext = .; - - /* Similar to _iram_start, this symbol goes here so it is - resolved by addr2line in preference to the first symbol in - the flash.text segment. - */ - _flash_cache_start = ABSOLUTE(0); - } >default_code_seg - - /* Marks the end of IRAM code segment */ - .iram0.text_end (NOLOAD) : - { - . = ALIGN (4); - _iram_text_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.data : - { - . = ALIGN(4); - _iram_data_start = ABSOLUTE(.); - - *(.iram.data .iram.data.*) - _coredump_iram_start = ABSOLUTE(.); - *(.iram.data.coredump .iram.data.coredump.*) - _coredump_iram_end = ABSOLUTE(.); - - _iram_data_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.bss (NOLOAD) : - { - . = ALIGN(4); - _iram_bss_start = ABSOLUTE(.); - - *(.iram.bss .iram.bss.*) - - _iram_bss_end = ABSOLUTE(.); - . = ALIGN(4); - _iram_end = ABSOLUTE(.); - } > iram0_0_seg - - /* Marks the end of data, bss and possibly rodata */ - .dram0.heap_start (NOLOAD) : - { - . = ALIGN (8); - _heap_start = ABSOLUTE(.); - _sheap = ABSOLUTE(.); - } > dram0_0_seg - -#ifdef MODULE_PERIPH_FLASHPAGE - .flash_writable (NOLOAD) : ALIGN(65536) - { - _fp_mem_start = . ; - KEEP(*(SORT(.flash_writable.*))) - _fp_mem_end = . ; - . = ALIGN(4096); - _end_fw = . ; - } > drom0_1_seg -#endif -} - -ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), - "IRAM0 segment data does not fit.") - -ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), - "DRAM segment data does not fit.") - -. = ORIGIN(dram0_0_seg); -_cpu_ram_start = ABSOLUTE(.); -. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); -_cpu_ram_end = ABSOLUTE(.); - -/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile - * match the parameters used in linker script */ -ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE), - "RAM_START_ADDR does not match DRAM start address") -ASSERT(((LENGTH(dram0_0_seg) - 0x200) == CPU_RAM_SIZE), - "RAM_LEN does not match DRAM size") diff --git a/cpu/esp32/ld/esp32c3/sections.ld.in b/cpu/esp32/ld/esp32c3/sections.ld.in deleted file mode 100644 index c8a062a0ed..0000000000 --- a/cpu/esp32/ld/esp32c3/sections.ld.in +++ /dev/null @@ -1,630 +0,0 @@ -/* Automatically generated file; DO NOT EDIT */ -/* Espressif IoT Development Framework Linker Script */ -/* Generated from: esp-idf/components/esp_system/ld/esp32c3/sections.ld.in */ - -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/* Default entry point */ -ENTRY(call_start_cpu0); - -SECTIONS -{ - /** - * RTC fast memory holds RTC wake stub code, - * including from any source file named rtc_wake_stub*.c - */ - .rtc.text : - { - . = ALIGN(4); - _rtc_fast_start = ABSOLUTE(.); - - *(.rtc.literal .rtc.text .rtc.text.*) - - *rtc_wake_stub*.*(.literal .text .literal.* .text.*) - *(.rtc_text_end_test) - - /* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */ - . += _esp_memprot_prefetch_pad_size; - . = ALIGN(4); - - _rtc_text_end = ABSOLUTE(.); - } > rtc_iram_seg - - /** - * This section located in RTC FAST Memory area. - * It holds data marked with RTC_FAST_ATTR attribute. - * See the file "esp_attr.h" for more information. - */ - .rtc.force_fast : - { - . = ALIGN(4); - _rtc_force_fast_start = ABSOLUTE(.); - - _coredump_rtc_fast_start = ABSOLUTE(.); - *(.rtc.fast.coredump .rtc.fast.coredump.*) - _coredump_rtc_fast_end = ABSOLUTE(.); - - *(.rtc.force_fast .rtc.force_fast.*) - . = ALIGN(4) ; - _rtc_force_fast_end = ABSOLUTE(.); - } > rtc_data_seg - - /** - * RTC data section holds RTC wake stub - * data/rodata, including from any source file - * named rtc_wake_stub*.c and the data marked with - * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. - */ - .rtc.data : - { - _rtc_data_start = ABSOLUTE(.); - - _coredump_rtc_start = ABSOLUTE(.); - *(.rtc.coredump .rtc.coredump.*) - _coredump_rtc_end = ABSOLUTE(.); - *(.rtc.data .rtc.data.*) - *(.rtc.rodata .rtc.rodata.*) - - *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) - _rtc_data_end = ABSOLUTE(.); - } > rtc_data_location - - /* RTC bss, from any source file named rtc_wake_stub*.c */ - .rtc.bss (NOLOAD) : - { - /* part that is initialized if not waking up from deep sleep */ - _rtc_bss_start = ABSOLUTE(.); - *rtc_wake_stub*.*(.bss .bss.*) - *rtc_wake_stub*.*(COMMON) - _rtc_bss_end = ABSOLUTE(.); - /* part that saves some data for rtc periph module, this part is - only initialized at power on reset */ - _rtc_bss_rtc_start = ABSOLUTE(.); - *(.rtc.bss .rtc.bss.*) - _rtc_bss_rtc_end = ABSOLUTE(.); - } > rtc_data_location - - /** - * This section holds data that should not be initialized at power up - * and will be retained during deep sleep. - * User data marked with RTC_NOINIT_ATTR will be placed - * into this section. See the file "esp_attr.h" for more information. - */ - .rtc_noinit (NOLOAD): - { - . = ALIGN(4); - _rtc_noinit_start = ABSOLUTE(.); - *(.rtc_noinit .rtc_noinit.*) - . = ALIGN(4) ; - _rtc_noinit_end = ABSOLUTE(.); - } > rtc_data_location - - /** - * This section located in RTC SLOW Memory area. - * It holds data marked with RTC_SLOW_ATTR attribute. - * See the file "esp_attr.h" for more information. - */ - .rtc.force_slow : - { - . = ALIGN(4); - _rtc_force_slow_start = ABSOLUTE(.); - *(.rtc.force_slow .rtc.force_slow.*) - . = ALIGN(4) ; - _rtc_force_slow_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* Get size of rtc slow data based on rtc_data_location alias */ - _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_slow_end - _rtc_data_start) - : (_rtc_force_slow_end - _rtc_force_slow_start); - - _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_fast_end - _rtc_fast_start) - : (_rtc_noinit_end - _rtc_fast_start); - - ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), - "RTC_SLOW segment data does not fit.") - - ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), - "RTC_FAST segment data does not fit.") - - .iram0.text : - { - _iram_start = ABSOLUTE(.); - /* Vectors go to start of IRAM */ - ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned"); - KEEP(*(.exception_vectors.text)); - . = ALIGN(4); - - _invalid_pc_placeholder = ABSOLUTE(.); - - /* Code marked as running out of IRAM */ - _iram_text_start = ABSOLUTE(.); - - *(.iram1 .iram1.*) - - /* parts of RIOT that should run in IRAM */ - *core/*(.literal .text .literal.* .text.*) - *esp_common_periph/flash.*(.literal .text .literal.* .text.*) - *esp_common/thread_arch.*(.literal .text .literal.* .text.*) - *esp_freertos_common/*(.literal .text .literal.* .text.*) - - /* parts of ESP-IDF that should run in IRAM */ - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ - *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) - *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) - *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) - *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) - *components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) - *components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*) - *components/esp_ringbuf/*(.literal .literal.* .text .text.*) - *components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort) - *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) - - *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) - *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) - *libgcc.a:save-restore.*(.literal .literal.* .text .text.*) - *libgcov.a:(.literal .literal.* .text .text.*) - - *components/hal/cpu_hal.*(.literal .literal.* .text .text.*) - *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/soc_hal.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) - *components/hal/twai_hal.*(.literal .literal.* .text .text.*) - *components/hal/uart_hal.*(.literal .literal.* .text .text.*) - *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) - *components/heap/heap_tlsf.*(.literal .literal.* .text .text.*) - *components/heap/multi_heap.*(.literal .literal.* .text .text.*) - - *esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write) - - *libnet80211.a:(.wifi0iram .wifi0iram.*) - *libnet80211.a:(.wifirxiram .wifirxiram.*) - *libnet80211.a:(.wifislprxiram .wifislprxiram.*) - - *components/newlib/abort.*(.literal .literal.* .text .text.*) - *components/newlib/assert.*(.literal .literal.* .text .text.*) - *components/newlib/heap.*(.literal .literal.* .text .text.*) - *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) - - *libpp.a:(.wifi0iram .wifi0iram.*) - *libpp.a:(.wifiorslpiram .wifiorslpiram.*) - *libpp.a:(.wifirxiram .wifirxiram.*) - *libpp.a:(.wifislprxiram .wifislprxiram.*) - *librtc.a:(.literal .literal.* .text .text.*) - - *components/soc/lldesc.*(.literal .literal.* .text .text.*) - *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*) - - *components/riscv/interrupt.*(.literal .literal.* .text .text.*) - *components/riscv/vectors.*(.literal .literal.* .text .text.*) - - } > iram0_0_seg - - /** - * This section is required to skip .iram0.text area because iram0_0_seg and - * dram0_0_seg reflect the same address space on different buses. - */ - .dram0.dummy (NOLOAD): - { - . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; - } > dram0_0_seg - - .dram0.data : - { - _data_start = ABSOLUTE(.); - *(.gnu.linkonce.d.*) - *(.data1) - __global_pointer$ = . + 0x800; - *(.sdata) - *(.sdata.*) - KEEP (*(SORT(.xfa.*))) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - - _esp_system_init_fn_array_start = ABSOLUTE(.); - KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) - _esp_system_init_fn_array_end = ABSOLUTE(.); - - *(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*) - *(.dram1 .dram1.*) - _coredump_dram_start = ABSOLUTE(.); - *(.dram1.coredump .dram1.coredump.*) - _coredump_dram_end = ABSOLUTE(.); - *components/app_trace/app_trace.*(.rodata .rodata.*) - *components/app_trace/app_trace_util.*(.rodata .rodata.*) - _bt_data_start = ABSOLUTE(.); - *components/bt/*(.data .data.*) - . = ALIGN(4); - _bt_data_end = ABSOLUTE(.); - _btdm_data_start = ABSOLUTE(.); - *libbtdm_app.a:(.data .data.*) - . = ALIGN(4); - _btdm_data_end = ABSOLUTE(.); - - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - *components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*) - *components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*) - *components/esp_system/esp_err.*(.rodata .rodata.*) - *components/esp_system/ubsan.*(.rodata .rodata.*) - - *libgcc.a:_divsf3.*(.rodata .rodata.*) - *libgcc.a:save-restore.*(.rodata .rodata.*) - *libgcov.a:(.rodata .rodata.*) - - *components/hal/cpu_hal.*(.rodata .rodata.*) - *components/hal/i2c_hal_iram.*(.rodata .rodata.*) - *components/hal/ledc_hal_iram.*(.rodata .rodata.*) - *components/hal/soc_hal.*(.rodata .rodata.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_slave_hal_iram.*(.rodata .rodata.*) - *components/hal/systimer_hal.*(.rodata .rodata.*) - *components/hal/twai_hal.*(.rodata .rodata.*) - *components/hal/uart_hal.*(.rodata .rodata.*) - *components/hal/wdt_hal_iram.*(.rodata .rodata.*) - *components/heap/heap_tlsf.*(.rodata .rodata.*) - *components/heap/multi_heap.*(.rodata .rodata.*) - - *components/newlib/abort.*(.rodata .rodata.*) - *components/newlib/assert.*(.rodata .rodata.*) - *components/newlib/heap.*(.rodata .rodata.*) - *components/newlib/stdatomic.*(.rodata .rodata.*) - - _nimble_data_start = ABSOLUTE(.); - *libnimble.a:(.data .data.*) - . = ALIGN(4); - _nimble_data_end = ABSOLUTE(.); - *libphy.a:(.rodata .rodata.*) - - *components/soc/lldesc.*(.rodata .rodata.*) - *components/spi_flash/memspi_host_driver.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*) - *components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*) - - _data_end = ABSOLUTE(.); - . = ALIGN(4); - } > dram0_0_seg - - /** - * This section holds data that should not be initialized at power up. - * The section located in Internal SRAM memory region. The macro _NOINIT - * can be used as attribute to place data into this section. - * See the "esp_attr.h" file for more information. - */ - .noinit (NOLOAD): - { - . = ALIGN(4); - _noinit_start = ABSOLUTE(.); - *(.noinit .noinit.*) - . = ALIGN(4) ; - _noinit_end = ABSOLUTE(.); - } > dram0_0_seg - - /* Shared RAM */ - .dram0.bss (NOLOAD) : - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - - *(.bss .bss.*) - *(.ext_ram.bss .ext_ram.bss.*) - *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) - *(COMMON) - _bt_bss_start = ABSOLUTE(.); - *components/bt/*(.bss .bss.* COMMON) - . = ALIGN(4); - _bt_bss_end = ABSOLUTE(.); - _btdm_bss_start = ABSOLUTE(.); - *libbtdm_app.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _btdm_bss_end = ABSOLUTE(.); - _nimble_bss_start = ABSOLUTE(.); - *libnimble.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _nimble_bss_end = ABSOLUTE(.); - - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - *(.share.mem) - *(.gnu.linkonce.b.*) - - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - } > dram0_0_seg - - ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") - - .flash.text : - { - _stext = .; - _instruction_reserved_start = ABSOLUTE(.); - _text_start = ABSOLUTE(.); - - *(.literal .literal.* .text .text.*) - - *(.wifi0iram .wifi0iram.*) - *(.wifiorslpiram .wifiorslpiram.*) - *(.wifirxiram .wifirxiram.*) - *(.wifislpiram .wifislpiram.*) - *(.wifislprxiram .wifislprxiram.*) - - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - - /** CPU will try to prefetch up to 16 bytes of - * of instructions. This means that any configuration (e.g. MMU, PMS) must allow - * safe access to up to 16 bytes after the last real instruction, add - * dummy bytes to ensure this - */ - . += _esp_flash_mmap_prefetch_pad_size; - - _text_end = ABSOLUTE(.); - _instruction_reserved_end = ABSOLUTE(.); - _etext = .; - - /** - * Similar to _iram_start, this symbol goes here so it is - * resolved by addr2line in preference to the first symbol in - * the flash.text segment. - */ - _flash_cache_start = ABSOLUTE(0); - } > default_code_seg - - /** - * This dummy section represents the .flash.text section but in default_rodata_seg. - * Thus, it must have its alignement and (at least) its size. - */ - .flash_rodata_dummy (NOLOAD): - { - _flash_rodata_dummy_start = .; - /* Start at the same alignement constraint than .flash.text */ - . = ALIGN(ALIGNOF(.flash.text)); - /* Create an empty gap as big as .flash.text section */ - . = . + SIZEOF(.flash.text); - /* Prepare the alignement of the section above. Few bytes (0x20) must be - * added for the mapping header. */ - . = ALIGN(0x10000) + 0x20; - _rodata_reserved_start = .; - } > default_rodata_seg - - .flash.appdesc : ALIGN(0x10) - { - _rodata_start = ABSOLUTE(.); - - *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ - *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ - - /* Create an empty gap within this section. Thanks to this, the end of this - * section will match .flash.rodata's begin address. Thus, both sections - * will be merged when creating the final bin image. */ - . = ALIGN(ALIGNOF(.flash.rodata)); - } >default_rodata_seg - - .flash.rodata : ALIGN(0x10) - { - _flash_rodata_start = ABSOLUTE(.); - - *(.rodata .rodata.*) - - *(.rodata_wlog_error .rodata_wlog_error.*) - *(.rodata_wlog_info .rodata_wlog_info.*) - *(.rodata_wlog_warning .rodata_wlog_warning.*) - - KEEP (*(SORT(.roxfa.*))) - - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table .gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - . = (. + 7) & ~ 3; - /* - * C++ constructor and destructor tables - * Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt. - * - * RISC-V gcc is configured with --enable-initfini-array so it emits an .init_array section instead. - * But the init_priority sections will be sorted for iteration in ascending order during startup. - * The rest of the init_array sections is sorted for iteration in descending order during startup, however. - * Hence a different section is generated for the init_priority functions which is iterated in - * ascending order during startup. The corresponding code can be found in startup.c. - */ - __init_priority_array_start = ABSOLUTE(.); - KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*)) - __init_priority_array_end = ABSOLUTE(.); - __init_array_start = ABSOLUTE(.); - KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array)) - __init_array_end = ABSOLUTE(.); - KEEP (*crtbegin.*(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ - soc_reserved_memory_region_start = ABSOLUTE(.); - KEEP (*(.reserved_memory_address)) - soc_reserved_memory_region_end = ABSOLUTE(.); - _rodata_end = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - _thread_local_start = ABSOLUTE(.); - *(.tdata) - *(.tdata.*) - *(.tbss) - *(.tbss.*) - *(.srodata) - *(.srodata.*) - _thread_local_end = ABSOLUTE(.); - _rodata_reserved_end = ABSOLUTE(.); - . = ALIGN(ALIGNOF(.eh_frame)); - } > default_rodata_seg - - /* Keep this section shall be at least aligned on 4 */ - .eh_frame : ALIGN(8) - { - __eh_frame = ABSOLUTE(.); - KEEP (*(.eh_frame)) - __eh_frame_end = ABSOLUTE(.); - /* Guarantee that this section and the next one will be merged by making - * them adjacent. */ - . = ALIGN(ALIGNOF(.eh_frame_hdr)); - } > default_rodata_seg - - /* To avoid any exception in C++ exception frame unwinding code, this section - * shall be aligned on 8. */ - .eh_frame_hdr : ALIGN(8) - { - __eh_frame_hdr = ABSOLUTE(.); - KEEP (*(.eh_frame_hdr)) - __eh_frame_hdr_end = ABSOLUTE(.); - } > default_rodata_seg - - .flash.rodata_noload (NOLOAD) : - { - . = ALIGN (4); - *(.rodata_wlog_debug .rodata_wlog_debug.*) - *(.rodata_wlog_verbose .rodata_wlog_verbose.*) - } > default_rodata_seg - - /* Marks the end of IRAM code segment */ - .iram0.text_end (NOLOAD) : - { - /* iram_end_test section exists for use by Memprot unit tests only */ - *(.iram_end_test) - /* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */ - . += _esp_memprot_prefetch_pad_size; - . = ALIGN(_esp_memprot_align_size); - _iram_text_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.data : - { - . = ALIGN(16); - _iram_data_start = ABSOLUTE(.); - - *(.iram.data .iram.data.*) - _coredump_iram_start = ABSOLUTE(.); - *(.iram.data.coredump .iram.data.coredump.*) - _coredump_iram_end = ABSOLUTE(.); - - _iram_data_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.bss (NOLOAD) : - { - . = ALIGN(16); - _iram_bss_start = ABSOLUTE(.); - - *(.iram.bss .iram.bss.*) - - _iram_bss_end = ABSOLUTE(.); - . = ALIGN(16); - _iram_end = ABSOLUTE(.); - } > iram0_0_seg - - /* Marks the end of data, bss and possibly rodata */ - .dram0.heap_start (NOLOAD) : - { - . = ALIGN (16); - _heap_start = ABSOLUTE(.); - _sheap = ABSOLUTE(.); - } > dram0_0_seg - _eheap = phy_param_rom; - -#ifdef MODULE_PERIPH_FLASHPAGE - .flash_writable (NOLOAD) : ALIGN(65536) - { - _fp_mem_start = . ; - KEEP(*(SORT(.flash_writable.*))) - _fp_mem_end = . ; - . = ALIGN(4096); - _end_fw = . ; - } > drom0_1_seg -#endif -} - -ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), - "IRAM0 segment data does not fit.") - -ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), - "DRAM segment data does not fit.") - -. = ORIGIN(dram0_0_seg); -_cpu_ram_start = ABSOLUTE(.); -. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); -_cpu_ram_end = ABSOLUTE(.); - -/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile - * match the parameters used in linker script */ -ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE), - "RAM_START_ADDR does not match DRAM start address") -ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE), - "RAM_LEN does not match DRAM size") diff --git a/cpu/esp32/ld/esp32s2/sections.ld.in b/cpu/esp32/ld/esp32s2/sections.ld.in deleted file mode 100644 index 384a4c62fd..0000000000 --- a/cpu/esp32/ld/esp32s2/sections.ld.in +++ /dev/null @@ -1,626 +0,0 @@ -/* Automatically generated file; DO NOT EDIT */ -/* Espressif IoT Development Framework Linker Script */ -/* Generated from: /home/gs/tmp/esp-idf-v4.4.1/components/esp_system/ld/esp32s2/sections.ld.in */ - -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/* Default entry point: */ -ENTRY(call_start_cpu0); - -SECTIONS -{ - /* RTC fast memory holds RTC wake stub code, - including from any source file named rtc_wake_stub*.c - */ - .rtc.text : - { - _rtc_text_start = ABSOLUTE(.); - . = ALIGN(4); - - _rtc_code_start = .; - - *(.rtc.literal .rtc.text .rtc.text.*) - - *rtc_wake_stub*.*(.literal .text .literal.* .text.*) - _rtc_code_end = .; - - /* possibly align + add 16B for CPU dummy speculative instr. fetch */ - . = ((_rtc_code_end - _rtc_code_start) == 0) ? ALIGN(0) : ALIGN(4) + 16; - - _rtc_text_end = ABSOLUTE(.); - } > rtc_iram_seg - - /* - This section is required to skip rtc.text area because rtc_iram_seg and - rtc_data_seg are reflect the same address space on different buses. - */ - .rtc.dummy : - { - _rtc_dummy_start = ABSOLUTE(.); - _rtc_fast_start = ABSOLUTE(.); - . = SIZEOF(.rtc.text); - _rtc_dummy_end = ABSOLUTE(.); - } > rtc_data_seg - - /* This section located in RTC FAST Memory area. - It holds data marked with RTC_FAST_ATTR attribute. - See the file "esp_attr.h" for more information. - */ - .rtc.force_fast : - { - . = ALIGN(4); - _rtc_force_fast_start = ABSOLUTE(.); - - _coredump_rtc_fast_start = ABSOLUTE(.); - *(.rtc.fast.coredump .rtc.fast.coredump.*) - _coredump_rtc_fast_end = ABSOLUTE(.); - - *(.rtc.force_fast .rtc.force_fast.*) - . = ALIGN(4) ; - _rtc_force_fast_end = ABSOLUTE(.); - } > rtc_data_seg - - /* RTC data section holds RTC wake stub - data/rodata, including from any source file - named rtc_wake_stub*.c and the data marked with - RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. - The memory location of the data is dependent on - CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option. - */ - .rtc.data : - { - _rtc_data_start = ABSOLUTE(.); - - _coredump_rtc_start = ABSOLUTE(.); - *(.rtc.coredump .rtc.coredump.*) - _coredump_rtc_end = ABSOLUTE(.); - *(.rtc.data .rtc.data.*) - *(.rtc.rodata .rtc.rodata.*) - - *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) - _rtc_data_end = ABSOLUTE(.); - } > rtc_data_location - - /* RTC bss, from any source file named rtc_wake_stub*.c */ - .rtc.bss (NOLOAD) : - { - /* part that is initialized if not waking up from deep sleep */ - _rtc_bss_start = ABSOLUTE(.); - *rtc_wake_stub*.*(.bss .bss.*) - *rtc_wake_stub*.*(COMMON) - _rtc_bss_end = ABSOLUTE(.); - /* part that saves some data for rtc periph module, this part is - only initialized at power on reset */ - _rtc_bss_rtc_start = ABSOLUTE(.); - *(.rtc.bss .rtc.bss.*) - _rtc_bss_rtc_end = ABSOLUTE(.); - } > rtc_data_location - - /* This section holds data that should not be initialized at power up - and will be retained during deep sleep. - User data marked with RTC_NOINIT_ATTR will be placed - into this section. See the file "esp_attr.h" for more information. - The memory location of the data is dependent on - CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option. - */ - .rtc_noinit (NOLOAD): - { - . = ALIGN(4); - _rtc_noinit_start = ABSOLUTE(.); - *(.rtc_noinit .rtc_noinit.*) - . = ALIGN(4) ; - _rtc_noinit_end = ABSOLUTE(.); - } > rtc_data_location - - /* This section located in RTC SLOW Memory area. - It holds data marked with RTC_SLOW_ATTR attribute. - See the file "esp_attr.h" for more information. - */ - .rtc.force_slow : - { - . = ALIGN(4); - _rtc_force_slow_start = ABSOLUTE(.); - *(.rtc.force_slow .rtc.force_slow.*) - . = ALIGN(4) ; - _rtc_force_slow_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* Get size of rtc slow data based on rtc_data_location alias */ - _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_slow_end - _rtc_data_start) - : (_rtc_force_slow_end - _rtc_force_slow_start); - - _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_fast_end - _rtc_fast_start) - : (_rtc_noinit_end - _rtc_fast_start); - - ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), - "RTC_SLOW segment data does not fit.") - - ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), - "RTC_FAST segment data does not fit.") - - /* Send .iram0 code to iram */ - .iram0.vectors : - { - _iram_start = ABSOLUTE(.); - /* Vectors go to IRAM */ - _vector_table = ABSOLUTE(.); - /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ - . = 0x0; - KEEP(*(.WindowVectors.text)); - . = 0x180; - KEEP(*(.Level2InterruptVector.text)); - . = 0x1c0; - KEEP(*(.Level3InterruptVector.text)); - . = 0x200; - KEEP(*(.Level4InterruptVector.text)); - . = 0x240; - KEEP(*(.Level5InterruptVector.text)); - . = 0x280; - KEEP(*(.DebugExceptionVector.text)); - . = 0x2c0; - KEEP(*(.NMIExceptionVector.text)); - . = 0x300; - KEEP(*(.KernelExceptionVector.text)); - . = 0x340; - KEEP(*(.UserExceptionVector.text)); - . = 0x3C0; - KEEP(*(.DoubleExceptionVector.text)); - . = 0x400; - _invalid_pc_placeholder = ABSOLUTE(.); - *(.*Vector.literal) - - *(.UserEnter.literal); - *(.UserEnter.text); - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - _init_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.text : - { - /* Code marked as runnning out of IRAM */ - _iram_text_start = ABSOLUTE(.); - - *(.iram1 .iram1.*) - - /* Xtensa basic functionality written in assembler should be placed in IRAM */ - *xtensa/*(.literal .text .literal.* .text.*) - /* parts of RIOT that should run in IRAM */ - - *core/*(.literal .text .literal.* .text.*) - *esp_common_periph/flash.*(.literal .text .literal.* .text.*) - *esp_common/thread_arch.*(.literal .text .literal.* .text.*) - *esp_freertos_common/*(.literal .text .literal.* .text.*) - - /* parts of ESP-IDF that should run in IRAM */ - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ - *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) - *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) - *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) - *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) - *components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*regi2c_ctrl.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) - *components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*) - *components/esp_ringbuf/*(.literal .literal.* .text .text.*) - *components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort) - *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) - - *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) - *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) - *libgcc.a:save-restore.*(.literal .literal.* .text .text.*) - *libgcov.a:(.literal .literal.* .text .text.*) - - *components/hal/cpu_hal.*(.literal .literal.* .text .text.*) - *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/soc_hal.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) - *components/hal/twai_hal.*(.literal .literal.* .text .text.*) - *components/hal/uart_hal.*(.literal .literal.* .text .text.*) - *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) - *components/heap/heap_tlsf.*(.literal .literal.* .text .text.*) - *components/heap/multi_heap.*(.literal .literal.* .text .text.*) - - *esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write) - - *libnet80211.a:(.wifi0iram .wifi0iram.*) - *libnet80211.a:(.wifirxiram .wifirxiram.*) - *libnet80211.a:(.wifislprxiram .wifislprxiram.*) - - *components/newlib/abort.*(.literal .literal.* .text .text.*) - *components/newlib/assert.*(.literal .literal.* .text .text.*) - *components/newlib/heap.*(.literal .literal.* .text .text.*) - *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) - - *libpp.a:(.wifi0iram .wifi0iram.*) - *libpp.a:(.wifiorslpiram .wifiorslpiram.*) - *libpp.a:(.wifirxiram .wifirxiram.*) - *libpp.a:(.wifislprxiram .wifislprxiram.*) - *librtc.a:(.literal .literal.* .text .text.*) - - *components/soc/lldesc.*(.literal .literal.* .text .text.*) - *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*) - - *libxt_hal.a:(.literal .literal.* .text .text.*) - *libxtensa.a:eri.*(.literal .literal.* .text .text.*) - *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*) - - /* Added to maintain compability, there are no iram0 data section to put - * sections:iram_coredump entry defined in espcoredump's linker.lf file */ - _coredump_iram_start = 0; - _coredump_iram_end = 0; - - /* align + add 16B for CPU dummy speculative instr. fetch */ - . = ALIGN(_esp_memprot_align_size) + _esp_memprot_prefetch_pad_size; - /* iram_end_test section exists for use by memprot unit tests only */ - *(.iram_end_test) - _iram_text_end = ABSOLUTE(.); - _iram_end = ABSOLUTE(.); - } > iram0_0_seg - - .dram0_reserved_for_iram (NOLOAD): - { - . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; - } > dram0_0_seg - - .dram0.data : - { - _data_start = ABSOLUTE(.); - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - KEEP (*(SORT(.xfa.*))) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - - _esp_system_init_fn_array_start = ABSOLUTE(.); - KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) - _esp_system_init_fn_array_end = ABSOLUTE(.); - - *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*) - *(.dram1 .dram1.*) - _coredump_dram_start = ABSOLUTE(.); - *(.dram2.coredump .dram2.coredump.*) - _coredump_dram_end = ABSOLUTE(.); - *libapp_trace.a:app_trace.*(.rodata .rodata.*) - *libapp_trace.a:app_trace_util.*(.rodata .rodata.*) - _bt_data_start = ABSOLUTE(.); - *libbt.a:(.data .data.*) - . = ALIGN(4); - _bt_data_end = ABSOLUTE(.); - _btdm_data_start = ABSOLUTE(.); - *libbtdm_app.a:(.data .data.*) - . = ALIGN(4); - _btdm_data_end = ABSOLUTE(.); - - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - *components/esp_hw_support/*regi2c_ctrl.*(.rodata .rodata.*) - *components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*) - *components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*) - *components/esp_system/esp_err.*(.rodata .rodata.*) - *components/esp_system/ubsan.*(.rodata .rodata.*) - - *libgcc.a:_divsf3.*(.rodata .rodata.*) - *libgcc.a:save-restore.*(.rodata .rodata.*) - *libgcov.a:(.rodata .rodata.*) - - *components/hal/cpu_hal.*(.rodata .rodata.*) - *components/hal/i2c_hal_iram.*(.rodata .rodata.*) - *components/hal/ledc_hal_iram.*(.rodata .rodata.*) - *components/hal/soc_hal.*(.rodata .rodata.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_slave_hal_iram.*(.rodata .rodata.*) - *components/hal/systimer_hal.*(.rodata .rodata.*) - *components/hal/twai_hal.*(.rodata .rodata.*) - *components/hal/uart_hal.*(.rodata .rodata.*) - *components/hal/wdt_hal_iram.*(.rodata .rodata.*) - *components/heap/heap_tlsf.*(.rodata .rodata.*) - *components/heap/multi_heap.*(.rodata .rodata.*) - - *components/newlib/abort.*(.rodata .rodata.*) - *components/newlib/assert.*(.rodata .rodata.*) - *components/newlib/heap.*(.rodata .rodata.*) - *components/newlib/stdatomic.*(.rodata .rodata.*) - - _nimble_data_start = ABSOLUTE(.); - *libnimble.a:(.data .data.*) - . = ALIGN(4); - _nimble_data_end = ABSOLUTE(.); - - *components/soc/lldesc.*(.rodata .rodata.*) - *components/spi_flash/memspi_host_driver.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*) - *components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*) - - _data_end = ABSOLUTE(.); - . = ALIGN(4); - } > dram0_0_seg - - /*This section holds data that should not be initialized at power up. - The section located in Internal SRAM memory region. The macro _NOINIT - can be used as attribute to place data into this section. - See the esp_attr.h file for more information. - */ - .noinit (NOLOAD): - { - . = ALIGN(4); - _noinit_start = ABSOLUTE(.); - *(.noinit .noinit.*) - . = ALIGN(4) ; - _noinit_end = ABSOLUTE(.); - } > dram0_0_seg - - /* external memory bss, from any global variable with EXT_RAM_ATTR attribute*/ - .ext_ram.bss (NOLOAD) : - { - _ext_ram_bss_start = ABSOLUTE(.); - - - . = ALIGN(4); - _ext_ram_bss_end = ABSOLUTE(.); - } > extern_ram_seg - - /* Shared RAM */ - .dram0.bss (NOLOAD) : - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - *(.ext_ram.bss*) - - *(.bss .bss.*) - *(.ext_ram.bss .ext_ram.bss.*) - *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) - *(COMMON) - _bt_bss_start = ABSOLUTE(.); - *libbt.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _bt_bss_end = ABSOLUTE(.); - _btdm_bss_start = ABSOLUTE(.); - *libbtdm_app.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _btdm_bss_end = ABSOLUTE(.); - _nimble_bss_start = ABSOLUTE(.); - *libnimble.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _nimble_bss_end = ABSOLUTE(.); - - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - *(.share.mem) - *(.gnu.linkonce.b.*) - - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - } > dram0_0_seg - - .flash.appdesc : ALIGN(0x10) - { - _rodata_reserved_start = ABSOLUTE(.); - _rodata_start = ABSOLUTE(.); - - *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ - *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ - - /* Create an empty gap within this section. Thanks to this, the end of this - * section will match .flah.rodata's begin address. Thus, both sections - * will be merged when creating the final bin image. */ - . = ALIGN(ALIGNOF(.flash.rodata)); - } >default_rodata_seg - - .flash.rodata : ALIGN(0x10) - { - _flash_rodata_start = ABSOLUTE(.); - - *(.rodata .rodata.*) - - *(.rodata_wlog_error .rodata_wlog_error.*) - *(.rodata_wlog_info .rodata_wlog_info.*) - *(.rodata_wlog_warning .rodata_wlog_warning.*) - - KEEP (*(SORT(.roxfa.*))) - - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table .gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - . = (. + 3) & ~ 3; - __eh_frame = ABSOLUTE(.); - KEEP(*(.eh_frame)) - . = (. + 7) & ~ 3; - /* C++ constructor and destructor tables - - Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt - */ - __init_array_start = ABSOLUTE(.); - KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) - __init_array_end = ABSOLUTE(.); - KEEP (*crtbegin.*(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - /* Addresses of memory regions reserved via - SOC_RESERVE_MEMORY_REGION() */ - soc_reserved_memory_region_start = ABSOLUTE(.); - KEEP (*(.reserved_memory_address)) - soc_reserved_memory_region_end = ABSOLUTE(.); - _rodata_end = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - _thread_local_start = ABSOLUTE(.); - *(.tdata) - *(.tdata.*) - *(.tbss) - *(.tbss.*) - _thread_local_end = ABSOLUTE(.); - _rodata_reserved_end = ABSOLUTE(.); - . = ALIGN(4); - } >default_rodata_seg - - _flash_rodata_align = ALIGNOF(.flash.rodata); - - .flash.rodata_noload (NOLOAD) : - { - . = ALIGN (4); - *(.rodata_wlog_debug .rodata_wlog_debug.*) - *(.rodata_wlog_verbose .rodata_wlog_verbose.*) - } > default_rodata_seg - - .flash.text : - { - _stext = .; - _instruction_reserved_start = ABSOLUTE(.); - _text_start = ABSOLUTE(.); - - *(.literal .literal.* .text .text.*) - - *(.wifi0iram .wifi0iram.*) - *(.wifiorslpiram .wifiorslpiram.*) - *(.wifirxiram .wifirxiram.*) - *(.wifislpiram .wifislpiram.*) - *(.wifislprxiram .wifislprxiram.*) - - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - - /** CPU will try to prefetch up to 16 bytes of - * of instructions. This means that any configuration (e.g. MMU, PMS) must allow - * safe access to up to 16 bytes after the last real instruction, add - * dummy bytes to ensure this - */ - . += _esp_flash_mmap_prefetch_pad_size; - - _text_end = ABSOLUTE(.); - _instruction_reserved_end = ABSOLUTE(.); - _etext = .; - - /* Similar to _iram_start, this symbol goes here so it is - resolved by addr2line in preference to the first symbol in - the flash.text segment. - */ - _flash_cache_start = ABSOLUTE(0); - } >default_code_seg - - /* Marks the end of IRAM code segment */ - .iram0.text_end (NOLOAD) : - { - . = ALIGN (4); - _iram_end = ABSOLUTE(.); - } > iram0_0_seg - - /* Marks the end of data, bss and possibly rodata */ - .dram0.heap_start (NOLOAD) : - { - . = ALIGN (8); - _heap_start = ABSOLUTE(.); - _sheap = ABSOLUTE(.); - } > dram0_0_seg - - . = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); - _eheap = ABSOLUTE(.); - - . = _heap_end; - -#ifdef MODULE_PERIPH_FLASHPAGE - .flash_writable (NOLOAD) : ALIGN(65536) - { - _fp_mem_start = . ; - KEEP(*(SORT(.flash_writable.*))) - _fp_mem_end = . ; - . = ALIGN(4096); - _end_fw = . ; - } > drom0_1_seg -#endif -} - -ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), - "IRAM0 segment data does not fit.") - -ASSERT(((_heap_start - _data_start) <= LENGTH(dram0_0_seg)), - "DRAM segment data does not fit.") - -. = ORIGIN(dram0_0_seg); -_cpu_ram_start = ABSOLUTE(.); -. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); -_cpu_ram_end = ABSOLUTE(.); - -/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile - * match the parameters used in linker script */ -ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE), - "RAM_START_ADDR does not match DRAM start address") -ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE), - "RAM_LEN does not match DRAM size") diff --git a/cpu/esp32/ld/esp32s3/sections.ld.in b/cpu/esp32/ld/esp32s3/sections.ld.in deleted file mode 100644 index e97c81a905..0000000000 --- a/cpu/esp32/ld/esp32s3/sections.ld.in +++ /dev/null @@ -1,655 +0,0 @@ -/* Automatically generated file; DO NOT EDIT */ -/* Espressif IoT Development Framework Linker Script */ -/* Generated from: esp-idf/components/esp_system/ld/esp32s3/sections.ld.in */ - -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/* Default entry point */ -ENTRY(call_start_cpu0); - -_diram_i_start = 0x40378000; - -SECTIONS -{ - /** - * RTC fast memory holds RTC wake stub code, - * including from any source file named rtc_wake_stub*.c - */ - .rtc.text : - { - . = ALIGN(4); - _rtc_text_start = ABSOLUTE(.); - *(.rtc.entry.text) - - *(.rtc.literal .rtc.text .rtc.text.*) - - *rtc_wake_stub*.*(.literal .text .literal.* .text.*) - _rtc_text_end = ABSOLUTE(.); - } > rtc_iram_seg - - /** - * This section is required to skip rtc.text area because rtc_iram_seg and - * rtc_data_seg are reflect the same address space on different buses. - */ - .rtc.dummy : - { - _rtc_dummy_start = ABSOLUTE(.); - _rtc_fast_start = ABSOLUTE(.); - . = SIZEOF(.rtc.text); - _rtc_dummy_end = ABSOLUTE(.); - } > rtc_data_seg - - /** - * This section located in RTC FAST Memory area. - * It holds data marked with RTC_FAST_ATTR attribute. - * See the file "esp_attr.h" for more information. - */ - .rtc.force_fast : - { - . = ALIGN(4); - _rtc_force_fast_start = ABSOLUTE(.); - - _coredump_rtc_fast_start = ABSOLUTE(.); - *(.rtc.fast.coredump .rtc.fast.coredump.*) - _coredump_rtc_fast_end = ABSOLUTE(.); - - *(.rtc.force_fast .rtc.force_fast.*) - . = ALIGN(4) ; - _rtc_force_fast_end = ABSOLUTE(.); - } > rtc_data_seg - - /** - * RTC data section holds RTC wake stub - * data/rodata, including from any source file - * named rtc_wake_stub*.c and the data marked with - * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. - * The memory location of the data is dependent on - * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. - */ - .rtc.data : - { - _rtc_data_start = ABSOLUTE(.); - - _coredump_rtc_start = ABSOLUTE(.); - *(.rtc.coredump .rtc.coredump.*) - _coredump_rtc_end = ABSOLUTE(.); - *(.rtc.data .rtc.data.*) - *(.rtc.rodata .rtc.rodata.*) - - *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*) - _rtc_data_end = ABSOLUTE(.); - } > rtc_data_location - - /* RTC bss, from any source file named rtc_wake_stub*.c */ - .rtc.bss (NOLOAD) : - { - /* part that is initialized if not waking up from deep sleep */ - _rtc_bss_start = ABSOLUTE(.); - *rtc_wake_stub*.*(.bss .bss.*) - *rtc_wake_stub*.*(COMMON) - _rtc_bss_end = ABSOLUTE(.); - /* part that saves some data for rtc periph module, this part is - only initialized at power on reset */ - _rtc_bss_rtc_start = ABSOLUTE(.); - *(.rtc.bss .rtc.bss.*) - _rtc_bss_rtc_end = ABSOLUTE(.); - } > rtc_data_location - - /** - * This section holds data that should not be initialized at power up - * and will be retained during deep sleep. - * User data marked with RTC_NOINIT_ATTR will be placed - * into this section. See the file "esp_attr.h" for more information. - * The memory location of the data is dependent on CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. - */ - .rtc_noinit (NOLOAD): - { - . = ALIGN(4); - _rtc_noinit_start = ABSOLUTE(.); - *(.rtc_noinit .rtc_noinit.*) - . = ALIGN(4) ; - _rtc_noinit_end = ABSOLUTE(.); - } > rtc_data_location - - /** - * This section located in RTC SLOW Memory area. - * It holds data marked with RTC_SLOW_ATTR attribute. - * See the file "esp_attr.h" for more information. - */ - .rtc.force_slow : - { - . = ALIGN(4); - _rtc_force_slow_start = ABSOLUTE(.); - *(.rtc.force_slow .rtc.force_slow.*) - . = ALIGN(4) ; - _rtc_force_slow_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* Get size of rtc slow data based on rtc_data_location alias */ - _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_slow_end - _rtc_data_start) - : (_rtc_force_slow_end - _rtc_force_slow_start); - - _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) - ? (_rtc_force_fast_end - _rtc_fast_start) - : (_rtc_noinit_end - _rtc_fast_start); - - ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), - "RTC_SLOW segment data does not fit.") - - ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), - "RTC_FAST segment data does not fit.") - - /* Send .iram0 code to iram */ - .iram0.vectors : - { - _iram_start = ABSOLUTE(.); - /* Vectors go to IRAM */ - _vector_table = ABSOLUTE(.); - . = 0x0; - KEEP(*(.WindowVectors.text)); - . = 0x180; - KEEP(*(.Level2InterruptVector.text)); - . = 0x1c0; - KEEP(*(.Level3InterruptVector.text)); - . = 0x200; - KEEP(*(.Level4InterruptVector.text)); - . = 0x240; - KEEP(*(.Level5InterruptVector.text)); - . = 0x280; - KEEP(*(.DebugExceptionVector.text)); - . = 0x2c0; - KEEP(*(.NMIExceptionVector.text)); - . = 0x300; - KEEP(*(.KernelExceptionVector.text)); - . = 0x340; - KEEP(*(.UserExceptionVector.text)); - . = 0x3C0; - KEEP(*(.DoubleExceptionVector.text)); - . = 0x400; - _invalid_pc_placeholder = ABSOLUTE(.); - *(.*Vector.literal) - - *(.UserEnter.literal); - *(.UserEnter.text); - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - _init_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.text : - { - /* Code marked as running out of IRAM */ - _iram_text_start = ABSOLUTE(.); - - *(.iram1 .iram1.*) - - /* Xtensa basic functionality written in assembler should be placed in IRAM */ - *xtensa/*(.literal .text .literal.* .text.*) - /* parts of RIOT that should run in IRAM */ - - *core/*(.literal .text .literal.* .text.*) - *esp_common_periph/flash.*(.literal .text .literal.* .text.*) - *esp_common/thread_arch.*(.literal .text .literal.* .text.*) - *esp_freertos_common/*(.literal .text .literal.* .text.*) - - /* parts of ESP-IDF that should run in IRAM */ - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ - *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) - *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) - *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) - *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) - *components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) - *components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/spiram_psram.*(.literal .literal.* .text .text.*) - *components/esp_hw_support/*/opiram_psram.*(.literal .literal.* .text .text.*) - *components/esp_ringbuf/*(.literal .literal.* .text .text.*) - *components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) - *components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort) - *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) - - *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) - *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) - *libgcc.a:save-restore.*(.literal .literal.* .text .text.*) - *libgcov.a:(.literal .literal.* .text .text.*) - - *components/hal/cpu_hal.*(.literal .literal.* .text .text.*) - *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/soc_hal.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) - *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) - *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) - *components/hal/twai_hal.*(.literal .literal.* .text .text.*) - *components/hal/uart_hal.*(.literal .literal.* .text .text.*) - *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) - *components/heap/heap_tlsf.*(.literal .literal.* .text .text.*) - *components/heap/multi_heap.*(.literal .literal.* .text .text.*) - - *esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write) - - *libnet80211.a:(.wifi0iram .wifi0iram.*) - *libnet80211.a:(.wifirxiram .wifirxiram.*) - *libnet80211.a:(.wifislprxiram .wifislprxiram.*) - - *components/newlib/abort.*(.literal .literal.* .text .text.*) - *components/newlib/assert.*(.literal .literal.* .text .text.*) - *components/newlib/heap.*(.literal .literal.* .text .text.*) - *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) - - *libpp.a:(.wifi0iram .wifi0iram.*) - *libpp.a:(.wifiorslpiram .wifiorslpiram.*) - *libpp.a:(.wifirxiram .wifirxiram.*) - *libpp.a:(.wifislprxiram .wifislprxiram.*) - *librtc.a:(.literal .literal.* .text .text.*) - - *components/soc/lldesc.*(.literal .literal.* .text .text.*) - *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*) - *components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*) - *components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*) - - *libxt_hal.a:(.literal .literal.* .text .text.*) - *libxtensa.a:eri.*(.literal .literal.* .text .text.*) - *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*) - - } > iram0_0_seg - - /** - * This section is required to skip .iram0.text area because iram0_0_seg and - * dram0_0_seg reflect the same address space on different buses. - */ - .dram0.dummy (NOLOAD): - { - . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0); - } > dram0_0_seg - - .dram0.data : - { - _data_start = ABSOLUTE(.); - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - KEEP (*(SORT(.xfa.*))) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - - _esp_system_init_fn_array_start = ABSOLUTE(.); - KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*))) - _esp_system_init_fn_array_end = ABSOLUTE(.); - - *(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*) - *(.dram1 .dram1.*) - _coredump_dram_start = ABSOLUTE(.); - *(.dram1.coredump .dram1.coredump.*) - _coredump_dram_end = ABSOLUTE(.); - *libapp_trace.a:app_trace.*(.rodata .rodata.*) - *libapp_trace.a:app_trace_util.*(.rodata .rodata.*) - _bt_data_start = ABSOLUTE(.); - *components/bt/*(.data .data.*) - . = ALIGN(4); - _bt_data_end = ABSOLUTE(.); - _btdm_data_start = ABSOLUTE(.); - *libbtdm_app.a:(.data .data.*) - . = ALIGN(4); - _btdm_data_end = ABSOLUTE(.); - - /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ - *components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*) - *components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*) - *components/esp_system/esp_err.*(.rodata .rodata.*) - *components/esp_system/ubsan.*(.rodata .rodata.*) - - *libgcc.a:_divsf3.*(.rodata .rodata.*) - *libgcc.a:save-restore.*(.rodata .rodata.*) - *libgcov.a:(.rodata .rodata.*) - - *components/hal/cpu_hal.*(.rodata .rodata.*) - *components/hal/i2c_hal_iram.*(.rodata .rodata.*) - *components/hal/ledc_hal_iram.*(.rodata .rodata.*) - *components/hal/soc_hal.*(.rodata .rodata.*) - *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*) - *components/hal/spi_flash_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_hal_iram.*(.rodata .rodata.*) - *components/hal/spi_slave_hal_iram.*(.rodata .rodata.*) - *components/hal/systimer_hal.*(.rodata .rodata.*) - *components/hal/twai_hal.*(.rodata .rodata.*) - *components/hal/uart_hal.*(.rodata .rodata.*) - *components/hal/wdt_hal_iram.*(.rodata .rodata.*) - *components/heap/heap_tlsf.*(.rodata .rodata.*) - *components/heap/multi_heap.*(.rodata .rodata.*) - - *components/newlib/abort.*(.rodata .rodata.*) - *components/newlib/assert.*(.rodata .rodata.*) - *components/newlib/heap.*(.rodata .rodata.*) - *components/newlib/stdatomic.*(.rodata .rodata.*) - - _nimble_data_start = ABSOLUTE(.); - *libnimble.a:(.data .data.*) - . = ALIGN(4); - _nimble_data_end = ABSOLUTE(.); - *libphy.a:(.rodata .rodata.*) - - *components/soc/lldesc.*(.rodata .rodata.*) - *components/spi_flash/memspi_host_driver.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*) - *components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*) - *components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*) - *components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*) - - _data_end = ABSOLUTE(.); - . = ALIGN(4); - } > dram0_0_seg - - /** - * This section holds data that should not be initialized at power up. - * The section located in Internal SRAM memory region. The macro _NOINIT - * can be used as attribute to place data into this section. - * See the "esp_attr.h" file for more information. - */ - .noinit (NOLOAD): - { - . = ALIGN(4); - _noinit_start = ABSOLUTE(.); - *(.noinit .noinit.*) - . = ALIGN(4) ; - _noinit_end = ABSOLUTE(.); - } > dram0_0_seg - - /* Shared RAM */ - .dram0.bss (NOLOAD) : - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - *(.ext_ram.bss*) - - *(.bss .bss.*) - *(.ext_ram.bss .ext_ram.bss.*) - *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) - *(COMMON) - _bt_bss_start = ABSOLUTE(.); - *components/bt/*(.bss .bss.* COMMON) - . = ALIGN(4); - _bt_bss_end = ABSOLUTE(.); - _btdm_bss_start = ABSOLUTE(.); - *libbtdm_app.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _btdm_bss_end = ABSOLUTE(.); - _nimble_bss_start = ABSOLUTE(.); - *libnimble.a:(.bss .bss.* COMMON) - . = ALIGN(4); - _nimble_bss_end = ABSOLUTE(.); - - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - *(.share.mem) - *(.gnu.linkonce.b.*) - - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - } > dram0_0_seg - - ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") - - .flash.text : - { - _stext = .; - _instruction_reserved_start = ABSOLUTE(.); - _text_start = ABSOLUTE(.); - - *(.literal .literal.* .text .text.*) - - *(.wifi0iram .wifi0iram.*) - *(.wifiorslpiram .wifiorslpiram.*) - *(.wifirxiram .wifirxiram.*) - *(.wifislpiram .wifislpiram.*) - *(.wifislprxiram .wifislprxiram.*) - - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - - /** CPU will try to prefetch up to 16 bytes of - * of instructions. This means that any configuration (e.g. MMU, PMS) must allow - * safe access to up to 16 bytes after the last real instruction, add - * dummy bytes to ensure this - */ - . += _esp_flash_mmap_prefetch_pad_size; - - _text_end = ABSOLUTE(.); - _instruction_reserved_end = ABSOLUTE(.); - _etext = .; - - /** - * Similar to _iram_start, this symbol goes here so it is - * resolved by addr2line in preference to the first symbol in - * the flash.text segment. - */ - _flash_cache_start = ABSOLUTE(0); - } > default_code_seg - - /** - * This dummy section represents the .flash.text section but in default_rodata_seg. - * Thus, it must have its alignement and (at least) its size. - */ - .flash_rodata_dummy (NOLOAD): - { - _flash_rodata_dummy_start = .; - /* Start at the same alignement constraint than .flash.text */ - . = ALIGN(ALIGNOF(.flash.text)); - /* Create an empty gap as big as .flash.text section */ - . = . + SIZEOF(.flash.text); - /* Prepare the alignement of the section above. Few bytes (0x20) must be - * added for the mapping header. */ - . = ALIGN(0x10000) + 0x20; - _rodata_reserved_start = .; - } > default_rodata_seg - - .flash.appdesc : ALIGN(0x10) - { - _rodata_start = ABSOLUTE(.); - - *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ - *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ - - /* Create an empty gap within this section. Thanks to this, the end of this - * section will match .flah.rodata's begin address. Thus, both sections - * will be merged when creating the final bin image. */ - . = ALIGN(ALIGNOF(.flash.rodata)); - } >default_rodata_seg - - .flash.rodata : ALIGN(0x10) - { - _flash_rodata_start = ABSOLUTE(.); - - *(.rodata .rodata.*) - - *(.rodata_wlog_error .rodata_wlog_error.*) - *(.rodata_wlog_info .rodata_wlog_info.*) - *(.rodata_wlog_warning .rodata_wlog_warning.*) - - KEEP (*(SORT(.roxfa.*))) - - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table .gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - . = (. + 3) & ~ 3; - __eh_frame = ABSOLUTE(.); - KEEP(*(.eh_frame)) - . = (. + 7) & ~ 3; - /* C++ constructor and destructor tables */ - /* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */ - __init_array_start = ABSOLUTE(.); - KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) - __init_array_end = ABSOLUTE(.); - KEEP (*crtbegin.*(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ - soc_reserved_memory_region_start = ABSOLUTE(.); - KEEP (*(.reserved_memory_address)) - soc_reserved_memory_region_end = ABSOLUTE(.); - _rodata_end = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - _thread_local_start = ABSOLUTE(.); - *(.tdata) - *(.tdata.*) - *(.tbss) - *(.tbss.*) - _thread_local_end = ABSOLUTE(.); - _rodata_reserved_end = ABSOLUTE(.); - . = ALIGN(4); - } > default_rodata_seg - - _flash_rodata_align = ALIGNOF(.flash.rodata); - - .flash.rodata_noload (NOLOAD) : - { - . = ALIGN (4); - *(.rodata_wlog_debug .rodata_wlog_debug.*) - *(.rodata_wlog_verbose .rodata_wlog_verbose.*) - } > default_rodata_seg - - /* Marks the end of IRAM code segment */ - .iram0.text_end (NOLOAD) : - { - /* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */ - . += _esp_memprot_prefetch_pad_size; - . = ALIGN(_esp_memprot_align_size); - /* iram_end_test section exists for use by memprot unit tests only */ - *(.iram_end_test) - _iram_text_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.data : - { - . = ALIGN(4); - _iram_data_start = ABSOLUTE(.); - - *(.iram.data .iram.data.*) - _coredump_iram_start = ABSOLUTE(.); - *(.iram.data.coredump .iram.data.coredump.*) - _coredump_iram_end = ABSOLUTE(.); - - _iram_data_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.bss (NOLOAD) : - { - . = ALIGN(4); - _iram_bss_start = ABSOLUTE(.); - - *(.iram.bss .iram.bss.*) - - _iram_bss_end = ABSOLUTE(.); - . = ALIGN(4); - _iram_end = ABSOLUTE(.); - } > iram0_0_seg - - /* Marks the end of data, bss and possibly rodata */ - .dram0.heap_start (NOLOAD) : - { - . = ALIGN (8); - _heap_start = ABSOLUTE(.); - _sheap = ABSOLUTE(.); - } > dram0_0_seg - - . = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); - _eheap = ABSOLUTE(.); - - . = _heap_end; - -#ifdef MODULE_PERIPH_FLASHPAGE - .flash_writable (NOLOAD) : ALIGN(65536) - { - _fp_mem_start = . ; - KEEP(*(SORT(.flash_writable.*))) - _fp_mem_end = . ; - . = ALIGN(4096); - _end_fw = . ; - } > drom0_1_seg -#endif -} - -ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), - "IRAM0 segment data does not fit.") - -ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), - "DRAM segment data does not fit.") - -. = ORIGIN(dram0_0_seg); -_cpu_ram_start = ABSOLUTE(.); -. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); -_cpu_ram_end = ABSOLUTE(.); - -/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile - * match the parameters used in linker script */ -ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE), - "RAM_START_ADDR does not match DRAM start address") -ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE), - "RAM_LEN does not match DRAM size") diff --git a/cpu/esp32/ld/ld.common b/cpu/esp32/ld/ld.common deleted file mode 100644 index 974cafe5d4..0000000000 --- a/cpu/esp32/ld/ld.common +++ /dev/null @@ -1,24 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include "sdkconfig.h" - -/* CPU instruction prefetch padding size for flash mmap scenario */ -_esp_flash_mmap_prefetch_pad_size = 16; - -/* CPU instruction prefetch padding size for memory protection scenario */ -#ifdef CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE -_esp_memprot_prefetch_pad_size = CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE; -#else -_esp_memprot_prefetch_pad_size = 0; -#endif - -/* Memory alignment size for PMS */ -#ifdef CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE -_esp_memprot_align_size = CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE; -#else -_esp_memprot_align_size = 0; -#endif diff --git a/cpu/esp32/periph/adc.c b/cpu/esp32/periph/adc.c index b552ab0549..b82a415e24 100644 --- a/cpu/esp32/periph/adc.c +++ b/cpu/esp32/periph/adc.c @@ -27,6 +27,7 @@ */ #include +#include #include "board.h" #include "periph/adc.h" @@ -36,92 +37,76 @@ #include "esp_common.h" #include "gpio_arch.h" -#include "driver/adc.h" +#include "esp_adc/adc_oneshot.h" +#include "esp_private/adc_share_hw_ctrl.h" +#include "hal/adc_hal_common.h" #define ENABLE_DEBUG 0 #include "debug.h" -/* forward declarations of internal functions */ -static bool _adc_conf_check(void); -static void _adc1_ctrl_init(void); -static void _adc2_ctrl_init(void); - /* external variable declarations */ extern const gpio_t _gpio_rtcio_map[]; +extern const int _adc_vrange_min_max[]; /* * Structure for mapping RIOT's ADC resolutions to ESP-IDF resolutions * of the according ESP32x SoC. */ typedef struct { - adc_bits_width_t res; /* used ESP-IDF resolution */ - unsigned shift; /* bit shift number for results */ + adc_bitwidth_t hw_res; /* used ESP-IDF resolution */ + unsigned shift; /* bit shift number for results */ } _adc_esp_res_map_t; +#define ADC_BITWIDTH_MAX ((adc_bitwidth_t)255) + /* * Table for resolution mapping + * With the exception of the ESP32, all ESP32x SoCs only support one resolution. + * Therefore, we only use this one resolution and shift the results accordingly. */ -_adc_esp_res_map_t _adc_esp_res_map[] = { -#if defined(CPU_FAM_ESP32) - { .res = ADC_WIDTH_BIT_9, .shift = 3 }, /* ADC_RES_6BIT */ - { .res = ADC_WIDTH_BIT_9, .shift = 1 }, /* ADC_RES_8BIT */ - { .res = ADC_WIDTH_BIT_10, .shift = 0 }, /* ADC_RES_10BIT */ - { .res = ADC_WIDTH_BIT_12, .shift = 0 }, /* ADC_RES_12BIT */ - { .res = ADC_WIDTH_MAX }, /* ADC_RES_14BIT */ - { .res = ADC_WIDTH_MAX }, /* ADC_RES_16BIT */ -#elif SOC_ADC_MAX_BITWIDTH == 12 - { .res = ADC_WIDTH_BIT_12, .shift = 6 }, /* ADC_RES_6BIT */ - { .res = ADC_WIDTH_BIT_12, .shift = 4 }, /* ADC_RES_8BIT */ - { .res = ADC_WIDTH_BIT_12, .shift = 2 }, /* ADC_RES_10BIT */ - { .res = ADC_WIDTH_BIT_12, .shift = 0 }, /* ADC_RES_12BIT */ - { .res = ADC_WIDTH_MAX }, /* ADC_RES_14BIT */ - { .res = ADC_WIDTH_MAX }, /* ADC_RES_16BIT */ -#elif SOC_ADC_MAX_BITWIDTH == 13 - { .res = ADC_WIDTH_BIT_13, .shift = 7 }, /* ADC_RES_6BIT */ - { .res = ADC_WIDTH_BIT_13, .shift = 5 }, /* ADC_RES_8BIT */ - { .res = ADC_WIDTH_BIT_13, .shift = 3 }, /* ADC_RES_10BIT */ - { .res = ADC_WIDTH_BIT_13, .shift = 1 }, /* ADC_RES_12BIT */ - { .res = ADC_WIDTH_MAX }, /* ADC_RES_14BIT */ - { .res = ADC_WIDTH_MAX }, /* ADC_RES_16BIT */ +static const _adc_esp_res_map_t _adc_esp_res_map[] = { +#if SOC_ADC_RTC_MAX_BITWIDTH == 12 + { .hw_res = ADC_BITWIDTH_12, .shift = 6 }, /* ADC_RES_6BIT */ + { .hw_res = ADC_BITWIDTH_12, .shift = 4 }, /* ADC_RES_8BIT */ + { .hw_res = ADC_BITWIDTH_12, .shift = 2 }, /* ADC_RES_10BIT */ + { .hw_res = ADC_BITWIDTH_12, .shift = 0 }, /* ADC_RES_12BIT */ + { .hw_res = ADC_BITWIDTH_MAX }, /* ADC_RES_14BIT */ + { .hw_res = ADC_BITWIDTH_MAX }, /* ADC_RES_16BIT */ +#elif SOC_ADC_RTC_MAX_BITWIDTH == 13 + { .hw_res = ADC_BITWIDTH_13, .shift = 7 }, /* ADC_RES_6BIT */ + { .hw_res = ADC_BITWIDTH_13, .shift = 5 }, /* ADC_RES_8BIT */ + { .hw_res = ADC_BITWIDTH_13, .shift = 3 }, /* ADC_RES_10BIT */ + { .hw_res = ADC_BITWIDTH_13, .shift = 1 }, /* ADC_RES_12BIT */ + { .hw_res = ADC_BITWIDTH_MAX }, /* ADC_RES_14BIT */ + { .hw_res = ADC_BITWIDTH_MAX }, /* ADC_RES_16BIT */ #endif }; -static bool _adc_module_initialized = false; +static adc_oneshot_unit_handle_t _adc_handle[SOC_ADC_PERIPH_NUM] = { }; -static inline void _adc1_ctrl_init(void) -{ - /* nothing to do for the moment */ -} +static adc_oneshot_chan_cfg_t _adc_channel_cfg[ADC_NUMOF] = { }; +static adc_cali_handle_t _adc_channel_cali[ADC_NUMOF] = { }; +static const _adc_esp_res_map_t *_adc_channel_res[ADC_NUMOF] = { }; -static inline void _adc2_ctrl_init(void) -{ - /* nothing to do for the moment */ -} +static bool _adc_driver_initialized = false; + +/* forward declarations of internal functions */ +static void _adc_driver_init(void); +static void _adc_channel_config(adc_t line, adc_bitwidth_t width, adc_atten_t att); +static void _adc_ctrl_init(adc_unit_t unit); int adc_init(adc_t line) { - DEBUG("[adc] line=%u\n", line); + DEBUG("[adc] %s: line=%u\n", __func__, line); - if (line >= ADC_NUMOF) { - return -1; - } + assert(line < ADC_NUMOF); - if (!_adc_module_initialized) { - /* do some configuration checks */ - if (!_adc_conf_check()) { - return -1; - } - _adc_module_initialized = true; - } + /* initialize the ADC driver if needed including configuration sanity checks */ + _adc_driver_init(); /* get the RTCIO pin number for the given GPIO defined as ADC channel */ uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; - /* check whether the GPIO is avalid ADC channel pin */ - if (rtcio == RTCIO_NA) { - return -1; - } - /* check whether the pin is not used for other purposes */ if (gpio_get_pin_usage(_adc_hw[rtcio].gpio) != _GPIO) { LOG_TAG_ERROR("adc", "GPIO%d is used for %s and cannot be used as " @@ -130,27 +115,8 @@ int adc_init(adc_t line) return -1; } - if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_1) { - /* ensure compatibility of given adc_channel_t with adc1_channel_t */ - assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC1_CHANNEL_MAX); - /* initialize the ADC1 unit if needed */ - _adc1_ctrl_init(); - /* set the attenuation and configure its associated GPIO pin mux */ - adc1_config_channel_atten((adc1_channel_t)_adc_hw[rtcio].adc_channel, - ADC_ATTEN_DB_11); - } - else if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) { - /* ensure compatibility of given adc_channel_t with adc2_channel_t */ - assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC2_CHANNEL_MAX); - /* initialize the ADC2 unit if needed */ - _adc2_ctrl_init(); - /* set the attenuation and configure its associated GPIO pin mux */ - adc2_config_channel_atten((adc2_channel_t)_adc_hw[rtcio].adc_channel, - ADC_ATTEN_DB_11); - } - else { - return -1; - } + /* initialize the corresponding ADC unit if needed */ + _adc_ctrl_init(_adc_hw[rtcio].adc_ctrl); /* set pin usage type */ gpio_set_pin_usage(_adc_hw[rtcio].gpio, _ADC); @@ -160,31 +126,29 @@ int adc_init(adc_t line) int32_t adc_sample(adc_t line, adc_res_t res) { - DEBUG("[adc] line=%u res=%u\n", line, res); + DEBUG("[adc] %s: line=%u res=%u\n", __func__, line, res); - if (_adc_esp_res_map[res].res == ADC_WIDTH_MAX) { + assert(_adc_driver_initialized); + assert(line < ADC_NUMOF); + + if (_adc_esp_res_map[res].hw_res == ADC_BITWIDTH_MAX) { return -1; } uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; - int raw; + assert(rtcio != RTCIO_NA); - if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_1) { - adc1_config_width(_adc_esp_res_map[res].res); - /* ensure compatibility of given adc_channel_t with adc1_channel_t */ - assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC1_CHANNEL_MAX); - raw = adc1_get_raw((adc1_channel_t)_adc_hw[rtcio].adc_channel); - if (raw < 0) { - return -1; - } + if (_adc_channel_res[line] != &_adc_esp_res_map[res]) { + /* reconfigure the channel if the resolution is changed */ + _adc_channel_res[line] = &_adc_esp_res_map[res]; + _adc_channel_config(line, _adc_esp_res_map[res].hw_res, + _adc_channel_cfg[line].atten); } - else if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) { - /* ensure compatibility of given adc_channel_t with adc2_channel_t */ - assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC2_CHANNEL_MAX); - if (adc2_get_raw((adc2_channel_t)_adc_hw[rtcio].adc_channel, - _adc_esp_res_map[res].res, &raw) < 0) { - return -1; - } + + int raw = 0; + if (adc_oneshot_read(_adc_handle[_adc_hw[rtcio].adc_ctrl], + _adc_hw[rtcio].adc_channel, &raw) != ESP_OK) { + return -1; } return raw >> _adc_esp_res_map[res].shift; @@ -192,73 +156,177 @@ int32_t adc_sample(adc_t line, adc_res_t res) int adc_set_attenuation(adc_t line, adc_atten_t atten) { - DEBUG("[adc] line=%u atten=%u\n", line, atten); + DEBUG("[adc] %s: line=%u atten=%u\n", __func__, line, atten); + + assert(_adc_driver_initialized); + assert(line < ADC_NUMOF); + assert(atten < SOC_ADC_ATTEN_NUM); + + _adc_channel_config(line, _adc_channel_cfg[line].bitwidth, atten); + + return 0; +} + +int adc_raw_to_voltage(adc_t line, int raw, int *voltage) +{ + DEBUG("[adc] %s: line=%u\n", __func__, line); + + assert(line < ADC_NUMOF); + assert(voltage); + assert(_adc_channel_res[line]); + + /* scale the raw value to the resolution used internally */ + raw = raw << _adc_channel_res[line]->shift; + + if (_adc_channel_cali[line]) { + adc_cali_raw_to_voltage(_adc_channel_cali[line], raw, voltage); + return 0; + } + else { + /* default values for the case the calibration does not work */ + int min = _adc_vrange_min_max[(_adc_channel_cfg[line].atten << 1)]; + int max = _adc_vrange_min_max[(_adc_channel_cfg[line].atten << 1) + 1]; + + *voltage = raw * (max - min) / 4096 + min; + return -EINVAL; + } +} + +__attribute__((__deprecated__)) +int adc_line_vref_to_gpio(adc_t line, gpio_t gpio) +{ + LOG_TAG_ERROR("adc", "%s is no longer supported\n", __func__); + assert(0); + return 0; +} + +static void _adc_driver_init(void) +{ + if (_adc_driver_initialized) { + return; + } + + /* do some configuration checks */ + for (unsigned i = 0; i < ADC_NUMOF; i++) { + uint8_t rtcio = _gpio_rtcio_map[adc_channels[i]]; + + /* check whether the GPIO is a valid ADC channel pin */ + if (rtcio == RTCIO_NA) { + LOG_TAG_ERROR("adc", "GPIO%d cannot be configured as ADC line\n", + adc_channels[i]); + assert(0); + } + if (_adc_hw[rtcio].adc_ctrl >= SOC_ADC_PERIPH_NUM) { + LOG_TAG_ERROR("adc", "Invalid ADC unit %u for ADC line %u\n", + _adc_hw[rtcio].adc_ctrl, adc_channels[i]); + assert(0); + } + if (_adc_hw[rtcio].adc_channel >= ADC_CHANNEL_MAX(_adc_hw[rtcio].adc_ctrl)) { + LOG_TAG_ERROR("adc", "Invalid ADC channel %u for ADC line %u\n", + _adc_hw[rtcio].adc_channel, adc_channels[i]); + assert(0); + } +#if CPU_FAM_ESP32C3 + /* According to the ESP32-C3 Errata Sheet ADC2 does not work correctly. To + * use ADC2 and GPIO5 as ADC channel, CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 + * has to be set (default). */ + if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) { + if (!IS_ACTIVE(CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3)) { + LOG_TAG_ERROR("adc", "ADC2 cannot be used on ESP32-C3 if " + "CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 " + "is not set (ADC line %u)\n", i); + assert(0); + } + /* throw at least a warning */ + LOG_TAG_WARNING("adc", "ADC line %u on ADC2 may not work correctly " + "on ESP32-C3, see errata sheet\n", i); + } +#endif + } + + /* set the default bitwidth and the attenuation for all channels to 12 dB */ + for (unsigned i = 0; i < ADC_NUMOF; i++) { + _adc_channel_cfg[i].bitwidth = ADC_BITWIDTH_DEFAULT; + _adc_channel_cfg[i].atten = ADC_ATTEN_DB_12; + } + + _adc_driver_initialized = true; +} + +static void _adc_ctrl_init(adc_unit_t unit) +{ + DEBUG("[adc] %s: unit=%u\n", __func__, unit); + + assert(unit < SOC_ADC_PERIPH_NUM); + + if (_adc_handle[unit] != NULL) { + /* unit is already initialized */ + return; + } + + adc_oneshot_unit_init_cfg_t unit_cfg = { + .unit_id = unit, + .ulp_mode = ADC_ULP_MODE_DISABLE, + }; + + if (adc_oneshot_new_unit(&unit_cfg, &_adc_handle[unit]) != ESP_OK) { + LOG_TAG_ERROR("adc", "Could not initialize ADC unit %u\n", unit); + } +} + +static void _adc_channel_config(adc_t line, adc_bitwidth_t width, adc_atten_t att) +{ + DEBUG("[adc] %s: line=%u width=%d atten=%u\n", __func__, line, width, att); uint8_t rtcio = _gpio_rtcio_map[adc_channels[line]]; - assert(rtcio != RTCIO_NA); + _adc_channel_cfg[line].bitwidth = width; + _adc_channel_cfg[line].atten = att; - if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_1) { - /* ensure compatibility of given adc_channel_t with adc1_channel_t */ - assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC1_CHANNEL_MAX); - return adc1_config_channel_atten((adc1_channel_t)_adc_hw[rtcio].adc_channel, atten); - } - else if (_adc_hw[rtcio].adc_ctrl == ADC_UNIT_2) { - /* ensure compatibility of given adc_channel_t with adc2_channel_t */ - assert(_adc_hw[rtcio].adc_channel < (adc_channel_t)ADC2_CHANNEL_MAX); - return adc2_config_channel_atten((adc2_channel_t)_adc_hw[rtcio].adc_channel, atten); + if (adc_oneshot_config_channel(_adc_handle[_adc_hw[rtcio].adc_ctrl], + _adc_hw[rtcio].adc_channel, + &_adc_channel_cfg[line]) != ESP_OK) { + LOG_TAG_ERROR("adc", "Could not config ADC line %u\n", line); + return; } - return -1; -} - -int adc_line_vref_to_gpio(adc_t line, gpio_t gpio) -{ - uint8_t rtcio_vref = _gpio_rtcio_map[adc_channels[line]]; - uint8_t rtcio_out = _gpio_rtcio_map[gpio]; - - /* both the ADC line and the GPIO for the output must be ADC channels */ - assert(rtcio_vref != RTCIO_NA); - assert(rtcio_out != RTCIO_NA); - /* avoid compilation problems with NDEBUG defined */ - (void)rtcio_out; - - /* the GPIO for the output must be a channel of ADC2 */ - assert(_adc_hw[rtcio_out].adc_ctrl == ADC_UNIT_2); - /* given ADC line has to be a channel of ADC2 */ - assert(_adc_hw[rtcio_vref].adc_ctrl == ADC_UNIT_2); - - esp_err_t res = ESP_OK; - - if (_adc_hw[rtcio_vref].adc_ctrl == ADC_UNIT_1) { - res = adc_vref_to_gpio(ADC_UNIT_1, gpio); - } - else if (_adc_hw[rtcio_vref].adc_ctrl == ADC_UNIT_2) { - res = adc_vref_to_gpio(ADC_UNIT_2, gpio); + if (_adc_channel_cali[line]) { + /* delete allocated calibration scheme if necessary */ +#if ADC_CALI_SCHEME_CURVE_FITTING_SUPPORTED + adc_cali_delete_scheme_curve_fitting(_adc_channel_cali[line]); +#elif ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED + adc_cali_delete_scheme_line_fitting(_adc_channel_cali[line]); +#endif + _adc_channel_cali[line] = NULL; } + +#if ADC_CALI_SCHEME_CURVE_FITTING_SUPPORTED + adc_cali_curve_fitting_config_t cfg = { + .unit_id = _adc_hw[rtcio].adc_ctrl, + .chan = _adc_hw[rtcio].adc_channel, + .atten = _adc_channel_cfg[line].atten, + .bitwidth = _adc_channel_cfg[line].bitwidth, + }; + int res = adc_cali_create_scheme_curve_fitting(&cfg, &_adc_channel_cali[line]); if (res != ESP_OK) { - LOG_TAG_ERROR("adc", "Could not route Vref of ADC line %d to GPIO%d\n", - line, gpio); - return -1; + DEBUG("[adc] %s: init calibration scheme failed %d\n", __func__, res); + return; } - else { - LOG_TAG_ERROR("adc", "Vref of ADC%d can now be measured at GPIO %d\n", - _adc_hw[rtcio_vref].adc_ctrl, gpio); - return 0; +#elif ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED + adc_cali_line_fitting_config_t cfg = { + .unit_id = _adc_hw[rtcio].adc_ctrl, + .atten = _adc_channel_cfg[line].atten, + .bitwidth = _adc_channel_cfg[line].bitwidth, +#if CONFIG_IDF_TARGET_ESP32 + .default_vref = 1100, +#endif + }; + int res = adc_cali_create_scheme_line_fitting(&cfg, &_adc_channel_cali[line]); + if (res != ESP_OK) { + DEBUG("[adc] %s: init calibration scheme failed %d\n", __func__, res); + return; } -} - -static bool _adc_conf_check(void) -{ - for (unsigned i = 0; i < ADC_NUMOF; i++) { - if (_gpio_rtcio_map[adc_channels[i]] == RTCIO_NA) { - LOG_TAG_ERROR("adc", "GPIO%d cannot be used as ADC line\n", - adc_channels[i]); - return false; - } - } - - return true; +#endif } void adc_print_config(void) diff --git a/cpu/esp32/periph/adc_arch_esp32.c b/cpu/esp32/periph/adc_arch_esp32.c index 192ae2065b..f3860dd96d 100644 --- a/cpu/esp32/periph/adc_arch_esp32.c +++ b/cpu/esp32/periph/adc_arch_esp32.c @@ -107,7 +107,23 @@ const gpio_t _gpio_rtcio_map[] = { RTCIO_GPIO(3), /* GPIO39 SENSOR_VN */ }; +/** + * @brief Default voltage range of ADC results for different attenuations + * + * These values are used by function adc_get_vrange_min_max if software + * calibration doesn't work for any reason and the voltage range can't be + * determined by software. + */ +const int _adc_vrange_min_max[] = { + 0, 950, /* min, max @ ADC_ATTEN_DB_0 */ + 0, 1250, /* min, max @ ADC_ATTEN_DB_2_5 */ + 0, 1750, /* min, max @ ADC_ATTEN_DB_6 */ + 0, 2450, /* min, max @ ADC_ATTEN_DB_12 */ +}; + _Static_assert(ARRAY_SIZE(_adc_hw) == SOC_RTCIO_PIN_COUNT, "size of _adc_hw does not match SOC_RTCIO_PIN_COUNT"); _Static_assert(ARRAY_SIZE(_gpio_rtcio_map) == SOC_GPIO_PIN_COUNT, "size of _gpio_rtcio_map does not match SOC_GPIO_PIN_COUNT"); +_Static_assert(ARRAY_SIZE(_adc_vrange_min_max) == (SOC_ADC_ATTEN_NUM * 2), + "size of _adc_vrange_min_max does not match SOC_ADC_ATTEN_NUM"); diff --git a/cpu/esp32/periph/adc_arch_esp32c3.c b/cpu/esp32/periph/adc_arch_esp32c3.c index 2961a83efa..0db3a1afb2 100644 --- a/cpu/esp32/periph/adc_arch_esp32c3.c +++ b/cpu/esp32/periph/adc_arch_esp32c3.c @@ -71,5 +71,24 @@ const gpio_t _gpio_rtcio_map[] = { RTCIO_NA, /* GPIO21 */ }; +/** + * @brief Default voltage range of ADC results for different attenuations + * + * These values are used by function adc_get_vrange_min_max if software + * calibration doesn't work for any reason and the voltage range can't be + * determined by software. + * + * Table 5-6 in [ESP32-C3 Datasheet] + * (https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf). + */ +const int _adc_vrange_min_max[] = { + 0, 750, /* min, max @ ADC_ATTEN_DB_0 */ + 0, 1050, /* min, max @ ADC_ATTEN_DB_2_5 */ + 0, 1300, /* min, max @ ADC_ATTEN_DB_6 */ + 0, 2500, /* min, max @ ADC_ATTEN_DB_12 */ +}; + _Static_assert(ARRAY_SIZE(_gpio_rtcio_map) == SOC_GPIO_PIN_COUNT, "size of _gpio_rtcio_map does not match SOC_GPIO_PIN_COUNT"); +_Static_assert(ARRAY_SIZE(_adc_vrange_min_max) == (SOC_ADC_ATTEN_NUM * 2), + "size of _adc_vrange_min_max does not match SOC_ADC_ATTEN_NUM"); diff --git a/cpu/esp32/periph/adc_arch_esp32s2.c b/cpu/esp32/periph/adc_arch_esp32s2.c index 7570dfaa79..3f11f33260 100644 --- a/cpu/esp32/periph/adc_arch_esp32s2.c +++ b/cpu/esp32/periph/adc_arch_esp32s2.c @@ -38,7 +38,7 @@ */ const _adc_hw_desc_t _adc_hw[] = { /* rtcio, gpio, adc_ctrl, adc_channel, pad_name */ - { RTCIO_GPIO(0), GPIO0, ADC_UNIT_MAX, ADC_CHANNEL_MAX, "GPIO0" }, + { RTCIO_GPIO(0), GPIO0, ADC_UNIT_INV, ADC_CHANNEL_INV, "GPIO0" }, { RTCIO_GPIO(1), ADC1_CHANNEL_0_GPIO_NUM, ADC_UNIT_1, ADC_CHANNEL_0, "TOUCH1" }, { RTCIO_GPIO(2), ADC1_CHANNEL_1_GPIO_NUM, ADC_UNIT_1, ADC_CHANNEL_1, "TOUCH2" }, { RTCIO_GPIO(3), ADC1_CHANNEL_2_GPIO_NUM, ADC_UNIT_1, ADC_CHANNEL_2, "TOUCH3" }, @@ -59,7 +59,7 @@ const _adc_hw_desc_t _adc_hw[] = { { RTCIO_GPIO(18), ADC2_CHANNEL_7_GPIO_NUM, ADC_UNIT_2, ADC_CHANNEL_7, "DAC2" }, { RTCIO_GPIO(19), ADC2_CHANNEL_8_GPIO_NUM, ADC_UNIT_2, ADC_CHANNEL_8, "USB_D-" }, { RTCIO_GPIO(20), ADC2_CHANNEL_9_GPIO_NUM, ADC_UNIT_2, ADC_CHANNEL_9, "USB_D+" }, - { RTCIO_GPIO(21), GPIO21, ADC_UNIT_MAX, ADC_CHANNEL_MAX, "GPIO21" }, + { RTCIO_GPIO(21), GPIO21, ADC_UNIT_INV, ADC_CHANNEL_INV, "GPIO21" }, }; /** @@ -118,7 +118,23 @@ const gpio_t _gpio_rtcio_map[] = { RTCIO_NA, /* GPIO46 */ }; +/** + * @brief Default voltage range of ADC results for different attenuations + * + * These values are used by function adc_get_vrange_min_max if software + * calibration doesn't work for any reason and the voltage range can't be + * determined by software. + */ +const int _adc_vrange_min_max[] = { + 0, 750, /* min, max @ ADC_ATTEN_DB_0 */ + 0, 1050, /* min, max @ ADC_ATTEN_DB_2_5 */ + 0, 1300, /* min, max @ ADC_ATTEN_DB_6 */ + 0, 2500, /* min, max @ ADC_ATTEN_DB_12 */ +}; + _Static_assert(ARRAY_SIZE(_adc_hw) == SOC_RTCIO_PIN_COUNT, "size of _adc_hw does not match SOC_RTCIO_PIN_COUNT"); _Static_assert(ARRAY_SIZE(_gpio_rtcio_map) == SOC_GPIO_PIN_COUNT, "size of _gpio_rtcio_map does not match SOC_GPIO_PIN_COUNT"); +_Static_assert(ARRAY_SIZE(_adc_vrange_min_max) == (SOC_ADC_ATTEN_NUM * 2), + "size of _adc_vrange_min_max does not match SOC_ADC_ATTEN_NUM"); diff --git a/cpu/esp32/periph/adc_arch_esp32s3.c b/cpu/esp32/periph/adc_arch_esp32s3.c index c4eb936edc..cc9ce27d0e 100644 --- a/cpu/esp32/periph/adc_arch_esp32s3.c +++ b/cpu/esp32/periph/adc_arch_esp32s3.c @@ -37,8 +37,8 @@ * RTCIO GPIO number. */ const _adc_hw_desc_t _adc_hw[] = { - /* rtcio, gpio, adc_ctrl, adc_channel, pad_name */ - { RTCIO_GPIO(0), GPIO0, ADC_UNIT_MAX, ADC_CHANNEL_MAX, "GPIO0" }, + /* rtcio, gpio, adc_ctrl, adc_channel, pad_name */ + { RTCIO_GPIO(0), GPIO0, ADC_UNIT_INV, ADC_CHANNEL_INV, "GPIO0" }, { RTCIO_GPIO(1), ADC1_CHANNEL_0_GPIO_NUM, ADC_UNIT_1, ADC_CHANNEL_0, "TOUCH1" }, { RTCIO_GPIO(2), ADC1_CHANNEL_1_GPIO_NUM, ADC_UNIT_1, ADC_CHANNEL_1, "TOUCH2" }, { RTCIO_GPIO(3), ADC1_CHANNEL_2_GPIO_NUM, ADC_UNIT_1, ADC_CHANNEL_2, "TOUCH3" }, @@ -59,7 +59,7 @@ const _adc_hw_desc_t _adc_hw[] = { { RTCIO_GPIO(18), ADC2_CHANNEL_7_GPIO_NUM, ADC_UNIT_2, ADC_CHANNEL_7, "GPIO18" }, { RTCIO_GPIO(19), ADC2_CHANNEL_8_GPIO_NUM, ADC_UNIT_2, ADC_CHANNEL_8, "USB_D-" }, { RTCIO_GPIO(20), ADC2_CHANNEL_9_GPIO_NUM, ADC_UNIT_2, ADC_CHANNEL_9, "USB_D+" }, - { RTCIO_GPIO(21), GPIO21, ADC_UNIT_MAX, ADC_CHANNEL_MAX, "GPIO21" }, + { RTCIO_GPIO(21), GPIO21, ADC_UNIT_INV, ADC_CHANNEL_INV, "GPIO21" }, }; /** @@ -120,7 +120,26 @@ const gpio_t _gpio_rtcio_map[] = { RTCIO_NA, /* GPIO48 */ }; +/** + * @brief Default voltage range of ADC results for different attenuations + * + * These values are used by function adc_get_vrange_min_max if software + * calibration doesn't work for any reason and the voltage range can't be + * determined by software. + * + * Table 5-5 in [ESP32-S3 Datasheet] + * (https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf). + */ +const int _adc_vrange_min_max[] = { + 0, 850, /* min, max @ ADC_ATTEN_DB_0 */ + 0, 1100, /* min, max @ ADC_ATTEN_DB_2_5 */ + 0, 1600, /* min, max @ ADC_ATTEN_DB_6 */ + 0, 2900, /* min, max @ ADC_ATTEN_DB_12 */ +}; + _Static_assert(ARRAY_SIZE(_adc_hw) == SOC_RTCIO_PIN_COUNT, "size of _adc_hw does not match SOC_RTCIO_PIN_COUNT"); _Static_assert(ARRAY_SIZE(_gpio_rtcio_map) == SOC_GPIO_PIN_COUNT, "size of _gpio_rtcio_map does not match SOC_GPIO_PIN_COUNT"); +_Static_assert(ARRAY_SIZE(_adc_vrange_min_max) == (SOC_ADC_ATTEN_NUM * 2), + "size of _adc_vrange_min_max does not match SOC_ADC_ATTEN_NUM"); diff --git a/cpu/esp32/periph/can.c b/cpu/esp32/periph/can.c index 3a6e9561b9..f327da73be 100644 --- a/cpu/esp32/periph/can.c +++ b/cpu/esp32/periph/can.c @@ -25,13 +25,14 @@ #include "gpio_arch.h" #include "irq_arch.h" -#include "driver/periph_ctrl.h" +#include "esp_clk_tree.h" +#include "esp_cpu.h" +#include "esp_private/periph_ctrl.h" #include "esp_rom_gpio.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "hal/twai_hal.h" #include "log.h" #include "rom/ets_sys.h" +#include "soc/clk_tree_defs.h" #include "soc/gpio_sig_map.h" #define ENABLE_DEBUG 0 @@ -592,11 +593,17 @@ static void _esp_can_power_up(can_t *dev) periph_module_reset(PERIPH_TWAI_MODULE); periph_module_enable(PERIPH_TWAI_MODULE); + twai_hal_config_t config = { .controller_id = 0 }; + + esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TWAI_CLK_SRC_DEFAULT, + ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, + &config.clock_source_hz); + /* initialize the HAL context, on return the CAN controller is in listen * only mode but not yet started, the error counters are reset and * pending interrupts cleared */ - if (!twai_hal_init(&hw)) { + if (!twai_hal_init(&hw, &config)) { assert(false); } @@ -608,8 +615,8 @@ static void _esp_can_power_up(can_t *dev) /* route CAN interrupt source to CPU interrupt and enable it */ intr_matrix_set(PRO_CPU_NUM, ETS_TWAI_INTR_SOURCE, CPU_INUM_CAN); - intr_cntrl_ll_set_int_handler(CPU_INUM_CAN, _esp_can_intr_handler, (void*)(uintptr_t)dev); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_CAN)); + esp_cpu_intr_set_handler(CPU_INUM_CAN, _esp_can_intr_handler, (void*)(uintptr_t)dev); + esp_cpu_intr_enable(BIT(CPU_INUM_CAN)); /* initialize used GPIOs */ _esp_can_init_pins(); diff --git a/cpu/esp32/periph/dac.c b/cpu/esp32/periph/dac.c index 04cf0d4110..85bd84ffb8 100644 --- a/cpu/esp32/periph/dac.c +++ b/cpu/esp32/periph/dac.c @@ -23,12 +23,15 @@ #include "periph/dac.h" #include "esp_common.h" -#include "driver/dac_common.h" +#include "hal/dac_ll.h" #include "soc/dac_periph.h" #define ENABLE_DEBUG 0 #include "debug.h" +/* for source code compatibility */ +#define DAC_CHANNEL_MAX SOC_DAC_CHAN_NUM + /* forward declarations of internal functions */ static bool _dac_conf_check(void); static bool _dac_module_initialized = false; @@ -61,27 +64,27 @@ void dac_set(dac_t line, uint16_t value) { assert(line < DAC_NUMOF); assert(_dac_channels[line] != DAC_CHANNEL_MAX); - dac_output_voltage(_dac_channels[line], value >> (16 - SOC_DAC_RESOLUTION)); + dac_ll_update_output_value(_dac_channels[line], value >> (16 - SOC_DAC_RESOLUTION)); } void dac_poweroff(dac_t line) { assert(line < DAC_NUMOF); assert(_dac_channels[line] != DAC_CHANNEL_MAX); - dac_output_disable(_dac_channels[line]); + dac_ll_power_down(_dac_channels[line]); } void dac_poweron(dac_t line) { assert(line < DAC_NUMOF); assert(_dac_channels[line] != DAC_CHANNEL_MAX); - dac_output_enable(_dac_channels[line]); + dac_ll_power_on(_dac_channels[line]); } static bool _dac_conf_check(void) { for (unsigned i = 0; i < DAC_NUMOF; i++) { - for (unsigned j = 0; i < SOC_DAC_PERIPH_NUM; j++) { + for (unsigned j = 0; i < SOC_DAC_CHAN_NUM; j++) { if (dac_channels[i] == dac_periph_signal.dac_channel_io_num[j]) { _dac_channels[i] = j; break; diff --git a/cpu/esp32/periph/flashpage.c b/cpu/esp32/periph/flashpage.c index 99bb2fea9c..bff983d097 100644 --- a/cpu/esp32/periph/flashpage.c +++ b/cpu/esp32/periph/flashpage.c @@ -27,12 +27,16 @@ #include "irq.h" #include "log.h" -#include "esp_flash_partitions.h" -#include "esp_spi_flash.h" +#include "esp_private/cache_utils.h" +#include "esp_flash.h" +#include "esp_flash_internal.h" +#include "hal/cache_hal.h" +#include "hal/mmu_hal.h" #include "rom/cache.h" #include "rom/spi_flash.h" -#include "soc/mmu.h" #include "soc/soc.h" +#include "soc/ext_mem_defs.h" +#include "spi_flash_mmap.h" #define ENABLE_DEBUG 0 #include "debug.h" @@ -42,16 +46,35 @@ #define ESP_PART_ENTRY_SIZE 0x20 #define ESP_PART_ENTRY_MAGIC ESP_PARTITION_MAGIC +extern uint8_t _fp_mmu_start; +extern uint8_t _fp_mmu_end; extern uint8_t _fp_mem_start; /* start address in CPU address space */ extern uint8_t _fp_mem_end; extern uint8_t _end_fw; static uint32_t _fp_flash_start; /* start address in flash */ +void IRAM_ATTR esp_sync_cache(uint32_t target_addr, size_t len) +{ + DEBUG("%s sync cache from @0x%08"PRIx32" for %u\n", + __func__, target_addr, len); + + for (uint32_t addr = target_addr; addr < (target_addr + len); + addr += SPI_FLASH_MMU_PAGE_SIZE) { +#if defined(CPU_FAM_ESP32) + extern void cache_sync(void); + cache_sync(); +#else + cache_hal_invalidate_addr((uint32_t)addr, SPI_FLASH_MMU_PAGE_SIZE); +#endif + } +} + void IRAM_ATTR esp_flashpage_init(void) { /* CONFIG_ESP_FLASHPAGE_CAPACITY has to be a multiple of SPI_FLASH_MMU_PAGE_SIZE */ assert((CONFIG_ESP_FLASHPAGE_CAPACITY % SPI_FLASH_MMU_PAGE_SIZE) == 0); + assert((FLASHPAGE_ADDR_START % SPI_FLASH_MMU_PAGE_SIZE) == 0); DEBUG("%s pages in CPU address space @0x%08"PRIx32"...0x%08"PRIx32"\n", __func__, CPU_FLASH_BASE, CPU_FLASH_BASE + CONFIG_ESP_FLASHPAGE_CAPACITY - 1); @@ -65,47 +88,43 @@ void IRAM_ATTR esp_flashpage_init(void) uint32_t p_numof = CONFIG_ESP_FLASHPAGE_CAPACITY / SPI_FLASH_MMU_PAGE_SIZE; uint32_t p_addr = FLASHPAGE_ADDR_START; - -#if CPU_FAM_ESP32S2 - /* ESP32-S2 requires special handling to enable the MMU pages in Cache - * explicitly */ - - uint32_t autoload = Cache_Suspend_ICache(); - Cache_Invalidate_ICache_All(); - int res = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, (uint32_t)&_fp_mem_start, - p_addr, 64, p_numof, 0); - Cache_Resume_ICache(autoload); - - DEBUG("%s DCache MMU set paddr=%08"PRIx32" vaddr=%08"PRIx32" size=%d n=%"PRIu32"\n", - __func__, p_addr, (uint32_t)&_fp_mem_start, CONFIG_ESP_FLASHPAGE_CAPACITY, - p_numof); - - if (res != ESP_OK) { - LOG_TAG_ERROR("flashpage", - "Could not map MMU pages in DCache, error: %d\n", res); - } -#else - uint32_t p_mmu = ((uint32_t)&_fp_mem_start - SOC_DROM_LOW) / SPI_FLASH_MMU_PAGE_SIZE; + uint32_t p_mmu = ((uint32_t)&_fp_mmu_start - SOC_DROM_LOW) / SPI_FLASH_MMU_PAGE_SIZE; while (p_numof--) { uint32_t p_flash = p_addr / SPI_FLASH_MMU_PAGE_SIZE; + uint32_t mmu_addr = SOC_DROM_LOW + (p_mmu * SPI_FLASH_MMU_PAGE_SIZE); + DEBUG("%s map MMU page %"PRIu32" @0x%08"PRIx32" to " "flash page %"PRIu32" @0x%08"PRIx32"\n", __func__, - p_mmu, (p_mmu * SPI_FLASH_MMU_PAGE_SIZE) + SOC_DROM_LOW, + p_mmu, mmu_addr, p_flash, p_flash * SPI_FLASH_MMU_PAGE_SIZE); - SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE[p_mmu] = SOC_MMU_PAGE_IN_FLASH(p_flash); + + spi_flash_mmap_handle_t t_handle; + const void *t_mem; + esp_err_t res; + + res = spi_flash_mmap(p_addr, SPI_FLASH_MMU_PAGE_SIZE, SPI_FLASH_MMAP_DATA, + &t_mem, &t_handle); + + assert((uint32_t)t_mem == mmu_addr); + DEBUG("%s map MMU page %"PRIu32" @0x%08"PRIx32" to " + "flash page %"PRIu32" @0x%08"PRIx32" %s\n", __func__, + p_mmu, (uint32_t)t_mem, + p_flash, p_flash * SPI_FLASH_MMU_PAGE_SIZE, + res == ESP_OK ? "OK" : "NOK"); + p_addr += SPI_FLASH_MMU_PAGE_SIZE; p_mmu++; } -#endif + irq_restore(state); - if (IS_ACTIVE(ENABLE_DEBUG)) { + if (ENABLE_DEBUG) { spi_flash_mmap_dump(); } } -void flashpage_erase(unsigned page) +void IRAM_ATTR flashpage_erase(unsigned page) { assert(page < FLASHPAGE_NUMOF); @@ -113,14 +132,20 @@ void flashpage_erase(unsigned page) DEBUG("%s erase page in flash @0x%08"PRIx32"\n", __func__, flash_addr); - int res = spi_flash_erase_range(flash_addr, FLASHPAGE_SIZE); + uint32_t state = irq_disable(); + + int res = esp_flash_erase_region(esp_flash_default_chip, flash_addr, FLASHPAGE_SIZE); + esp_sync_cache((uint32_t)&_fp_mmu_start + (page * FLASHPAGE_SIZE), FLASHPAGE_SIZE); + + irq_restore(state); + if (res != ESP_OK) { LOG_TAG_ERROR("flashpage", "Could not erase page %u, error %d\n", page, res); } } -void flashpage_write(void *target_addr, const void *data, size_t len) +void IRAM_ATTR flashpage_write(void *target_addr, const void *data, size_t len) { DEBUG("%s write %u byte from @%p to @%p\n", __func__, len, data, target_addr); @@ -135,12 +160,18 @@ void flashpage_write(void *target_addr, const void *data, size_t len) assert(((unsigned)target_addr + len) <= (CPU_FLASH_BASE + (FLASHPAGE_SIZE * FLASHPAGE_NUMOF))); - uint32_t flash_addr = ((uint32_t)target_addr - (uint32_t)&_fp_mem_start) + _fp_flash_start; + uint32_t flash_addr = ((uint32_t)target_addr - (uint32_t)&_fp_mmu_start) + _fp_flash_start; DEBUG("%s write to CPU address @%p (flash @0x%08"PRIx32")\n", __func__, target_addr, flash_addr); - int res = spi_flash_write(flash_addr, data, len); + uint32_t state = irq_disable(); + + int res = esp_flash_write(esp_flash_default_chip, data, flash_addr, len); + esp_sync_cache((uint32_t)target_addr, len); + + irq_restore(state); + if (res != ESP_OK) { LOG_TAG_ERROR("flashpage", "Could not write to CPU address @%p " "(flash @0x%08"PRIx32"), error %d\n", @@ -148,14 +179,13 @@ void flashpage_write(void *target_addr, const void *data, size_t len) } } -unsigned flashpage_first_free(void) +unsigned IRAM_ATTR flashpage_first_free(void) { /* _end_fw is page aligned */ return flashpage_page(&_end_fw); } -unsigned flashpage_last_free(void) +unsigned IRAM_ATTR flashpage_last_free(void) { -// return flashpage_page((const void *)SOC_DROM_HIGH) - 1; return flashpage_page((void *)(CPU_FLASH_BASE + CONFIG_ESP_FLASHPAGE_CAPACITY)) - 1; } diff --git a/cpu/esp32/periph/gpio.c b/cpu/esp32/periph/gpio.c index 869015b953..294b8a37ff 100644 --- a/cpu/esp32/periph/gpio.c +++ b/cpu/esp32/periph/gpio.c @@ -27,8 +27,10 @@ #include "periph/gpio_ll_arch.h" #endif +#include "driver/rtc_io.h" #include "esp/common_macros.h" #include "esp_intr_alloc.h" +#include "driver/rtc_io.h" #include "hal/gpio_hal.h" #include "hal/gpio_types.h" #include "hal/rtc_io_types.h" @@ -44,10 +46,9 @@ #include "xtensa/xtensa_api.h" #endif -#include "esp_idf_api/gpio.h" - -#include "adc_arch.h" +#include "bitarithm.h" #include "bitfield.h" +#include "board.h" #include "esp_common.h" #include "esp_sleep.h" #include "gpio_arch.h" @@ -58,23 +59,42 @@ #include "debug.h" #if SOC_PM_SUPPORT_EXT_WAKEUP +#if CPU_FAM_ESP32 #define ESP_PM_WUP_PINS_ANY_HIGH ESP_EXT1_WAKEUP_ANY_HIGH -#define ESP_PM_WUP_PINS_ALL_LOW ESP_EXT1_WAKEUP_ALL_LOW #define ESP_PM_WUP_PINS_ANY_LOW -1 -#endif - -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#define ESP_PM_WUP_PINS_ALL_LOW ESP_EXT1_WAKEUP_ALL_LOW +#else /* CPU_FAM_ESP32 */ +#define ESP_PM_WUP_PINS_ANY_HIGH ESP_EXT1_WAKEUP_ANY_HIGH +#define ESP_PM_WUP_PINS_ANY_LOW ESP_EXT1_WAKEUP_ANY_LOW +#define ESP_PM_WUP_PINS_ALL_LOW -1 +#endif /* CPU_FAM_ESP32 */ +#elif SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #define ESP_PM_WUP_PINS_ANY_HIGH ESP_GPIO_WAKEUP_GPIO_HIGH #define ESP_PM_WUP_PINS_ANY_LOW ESP_GPIO_WAKEUP_GPIO_LOW #define ESP_PM_WUP_PINS_ALL_LOW -1 +#else +#define ESP_PM_WUP_PINS_ANY_HIGH -1 +#define ESP_PM_WUP_PINS_ANY_LOW -1 +#define ESP_PM_WUP_PINS_ALL_LOW -1 #endif +#if CPU_FAM_ESP32 +#if ESP_PM_WUP_LEVEL == ESP_PM_WUP_PINS_ANY_LOW +#error "ESP_PM_WUP_PINS_ANY_LOW is not allowed as ESP_PM_WUP_LEVEL." +#endif +#else +#if ESP_PM_WUP_LEVEL == ESP_PM_WUP_PINS_ALL_LOW +#error "ESP_PM_WUP_PINS_ALL_LOW is not allowed as ESP_PM_WUP_LEVEL." +#endif +#endif + + #ifndef ESP_PM_WUP_LEVEL #define ESP_PM_WUP_LEVEL ESP_PM_WUP_PINS_ANY_HIGH #endif #if ESP_PM_WUP_LEVEL == -1 -#error "ESP32x SoC does not support this ESP_PM_WUP_LEVEL" +#error "ESP32x variant does not support this ESP_PM_WUP_LEVEL" #endif #define GPIO_PRO_CPU_INTR_ENA (BIT(2)) @@ -234,12 +254,23 @@ int gpio_init(gpio_t pin, gpio_mode_t mode) cfg.intr_type = GPIO_INTR_DISABLE; #ifdef ESP_PM_WUP_PINS -/* for saving the pullup/pulldown settings of wakeup pins in deep sleep mode */ + /* for saving the pullup/pulldown settings of wakeup pins in deep sleep mode */ _gpio_pin_pu[pin] = cfg.pull_up_en; _gpio_pin_pd[pin] = cfg.pull_down_en; +#if SOC_RTCIO_HOLD_SUPPORTED + /* disable the RTCIO hold function for the case we come from deep sleep */ + rtc_gpio_hold_dis(pin); +#endif /* SOC_RTCIO_HOLD_SUPPORTED */ +#endif /* ESP_PM_WUP_PINS */ + +#ifdef ESP_PM_GPIO_HOLD +#if SOC_RTCIO_HOLD_SUPPORTED + /* disable the RTCIO hold function for the case we come from deep sleep */ + rtc_gpio_force_hold_dis_all(); +#endif #endif - return (esp_idf_gpio_config(&cfg) == ESP_OK) ? 0 : -1; + return (gpio_config(&cfg) == ESP_OK) ? 0 : -1; } #if MODULE_PERIPH_GPIO_IRQ @@ -283,18 +314,18 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank, /* install GPIO ISR of ESP-IDF if not yet done */ if (!gpio_isr_service_installed && - esp_idf_gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1) != ESP_OK) { + gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1) != ESP_OK) { return -1; } gpio_isr_service_installed = true; /* set the interrupt type for the pin */ - if (esp_idf_gpio_set_intr_type(pin, type) != ESP_OK) { + if (gpio_set_intr_type(pin, type) != ESP_OK) { return -1; } /* unmask and clear pending interrupts for the pin */ - if (esp_idf_gpio_isr_handler_add(pin, cb, arg) != ESP_OK) { + if (gpio_isr_handler_add(pin, cb, arg) != ESP_OK) { return -1; } @@ -308,7 +339,7 @@ void gpio_irq_enable(gpio_t pin) DEBUG("%s: gpio=%d\n", __func__, pin); assert(pin < GPIO_PIN_NUMOF); - if (esp_idf_gpio_intr_enable(pin) == ESP_OK) { + if (gpio_intr_enable(pin) == ESP_OK) { gpio_int_enabled_table[pin] = true; } } @@ -318,7 +349,7 @@ void gpio_irq_disable(gpio_t pin) DEBUG("%s: gpio=%d\n", __func__, pin); assert(pin < GPIO_PIN_NUMOF); - if (esp_idf_gpio_intr_disable(pin) == ESP_OK) { + if (gpio_intr_disable(pin) == ESP_OK) { gpio_int_enabled_table[pin] = false; } } @@ -473,12 +504,16 @@ void gpio_pm_sleep_enter(unsigned mode) { if (mode == ESP_PM_DEEP_SLEEP) { #ifdef ESP_PM_GPIO_HOLD - /* - * Activate the power domain for RTC peripherals when - * ESP_PM_GPIO_HOLD is defined for deep sleep mode. - */ - esp_idf_gpio_deep_sleep_hold(); - esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON); +#if SOC_RTCIO_HOLD_SUPPORTED + rtc_gpio_force_hold_en_all(); +#if CPU_FAM_ESP32 + /* isolating GPIO12 from external circuits is especially recommended for + * ESP32-WROVER that have an external pullup on GPIO12 */ + rtc_gpio_isolate(GPIO_NUM_12); +#endif +#else +# error "ESP32x variant does not support hold feature in deep sleep"; +#endif #endif #ifdef ESP_PM_WUP_PINS @@ -491,6 +526,37 @@ void gpio_pm_sleep_enter(unsigned mode) for (unsigned i = 0; i < ARRAY_SIZE(wup_pins); i++) { wup_pin_mask |= 1ULL << wup_pins[i]; + /* ensure that valid GPIOs are used as wake-up source */ +#if SOC_PM_SUPPORT_EXT1_WAKEUP + if (rtc_io_num_map[wup_pins[i]] < 0) { + LOG_ERROR("GPIO%u is not a valid wake-up source, valid GPIOs are:", + wup_pins[i]); + for (unsigned j = 0; j < SOC_GPIO_PIN_COUNT; j++) { + if (rtc_io_num_map[j] != -1) { + printf(" GPIO%u", j); + } + } + printf("\n"); + assert(false); + } +#elif SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK + if (((1ULL << wup_pins[i]) & SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK) == 0) { + LOG_ERROR("GPIO%u is not a valid wake-up source, valid GPIOs are:", + wup_pins[i]); + + unsigned valid_num = bitarithm_bits_set(SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK); + uint32_t valid_mask = SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK; + for (unsigned j = 0; j < valid_num ; j++) { + if (valid_mask & 1) { + printf(" GPIO%u ", j); + } + valid_mask = valid_mask >> 1; + } + printf("\n"); + assert(false); + } +#endif + #if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED /* If internal pullups/pulldowns are used, they have to be activated also in deep sleep mode in RTC power domain */ @@ -499,33 +565,40 @@ void gpio_pm_sleep_enter(unsigned mode) assert(rtc_io_num_map[wup_pins[i]] >= 0); if (_gpio_pin_pu[wup_pins[i]]) { pu_pd_used = true; - esp_idf_rtc_gpio_pullup_en(wup_pins[i]); + rtc_gpio_pullup_en(wup_pins[i]); + rtc_gpio_pulldown_dis(wup_pins[i]); } - else { - esp_idf_rtc_gpio_pullup_dis(wup_pins[i]); - } - if (_gpio_pin_pd[wup_pins[i]]) { + else if (_gpio_pin_pd[wup_pins[i]]) { pu_pd_used = true; - esp_idf_rtc_gpio_pulldown_en(wup_pins[i]); - } - else { - esp_idf_rtc_gpio_pulldown_dis(wup_pins[i]); + rtc_gpio_pullup_dis(wup_pins[i]); + rtc_gpio_pulldown_en(wup_pins[i]); } if (pu_pd_used) { +#if SOC_PM_SUPPORT_RTC_PERIPH_PD /* If internal pullups/pulldowns are used, the RTC power domain - * must remain active in deep sleep mode */ + * must remain active in deep sleep mode if supported */ esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON); +#endif } -#endif /* SOC_RTCIO_INPUT_OUTPUT_SUPPORTED */ +#elif SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED + if (_gpio_pin_pu[wup_pins[i]]) { + gpio_pullup_en(wup_pins[i]); + gpio_pulldown_dis(wup_pins[i]); + } + else if (_gpio_pin_pd[wup_pins[i]]) { + gpio_pullup_dis(wup_pins[i]); + gpio_pulldown_en(wup_pins[i]); + } +#endif } -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#if SOC_PM_SUPPORT_EXT1_WAKEUP + /* ESP_PM_WUP_PINS_ALL_LOW or ESP_PM_WUP_PINS_ANY_HIGH */ + esp_sleep_enable_ext1_wakeup_io(wup_pin_mask, ESP_PM_WUP_LEVEL); +#elif SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED /* ESP_PM_WUP_PINS_ANY_LOW or ESP_PM_WUP_PINS_ANY_HIGH */ esp_deep_sleep_enable_gpio_wakeup(wup_pin_mask, ESP_PM_WUP_LEVEL); -#elif SOC_PM_SUPPORT_EXT_WAKEUP - /* ESP_PM_WUP_PINS_ALL_LOW or ESP_PM_WUP_PINS_ANY_HIGH */ - esp_sleep_enable_ext1_wakeup(wup_pin_mask, ESP_PM_WUP_LEVEL); #else - #error "ESP32x SoC variant doesn't allow to define GPIOs for wake-up from deep sleep" + #error "ESP32x variant doesn't allow to define GPIOs for wake-up from deep sleep" #endif #endif /* ESP_PM_WUP_PINS */ } @@ -537,12 +610,12 @@ void gpio_pm_sleep_enter(unsigned mode) switch (gpio_int_saved_type[i]) { case GPIO_LOW: case GPIO_FALLING: - esp_idf_gpio_wakeup_enable(i, GPIO_INTR_LOW_LEVEL); + gpio_wakeup_enable(i, GPIO_INTR_LOW_LEVEL); DEBUG("%s gpio=%u GPIO_LOW\n", __func__, i); break; case GPIO_HIGH: case GPIO_RISING: - esp_idf_gpio_wakeup_enable(i, GPIO_INTR_HIGH_LEVEL); + gpio_wakeup_enable(i, GPIO_INTR_HIGH_LEVEL); DEBUG("%s gpio=%u GPIO_HIGH\n", __func__, i); break; case GPIO_BOTH: diff --git a/cpu/esp32/periph/gpio_ll.c b/cpu/esp32/periph/gpio_ll.c index 81a5e22d1f..0592b8b108 100644 --- a/cpu/esp32/periph/gpio_ll.c +++ b/cpu/esp32/periph/gpio_ll.c @@ -28,14 +28,13 @@ #include "irq.h" #include "periph/gpio_ll.h" +#include "driver/gpio.h" #include "esp/common_macros.h" #include "hal/gpio_hal.h" #include "hal/gpio_types.h" #include "gpio_ll_arch.h" #include "soc/gpio_struct.h" -#include "esp_idf_api/gpio.h" - #ifdef MODULE_FMT # include "fmt.h" #else @@ -110,7 +109,7 @@ int gpio_ll_init(gpio_port_t port, uint8_t pin, gpio_conf_t conf) } #ifdef ESP_PM_WUP_PINS -/* for saving the pullup/pulldown settings of wakeup pins in deep sleep mode */ + /* for saving the pullup/pulldown settings of wakeup pins in deep sleep mode */ _gpio_pin_pu[pin] = cfg.pull_up_en; _gpio_pin_pd[pin] = cfg.pull_down_en; #endif @@ -118,13 +117,13 @@ int gpio_ll_init(gpio_port_t port, uint8_t pin, gpio_conf_t conf) if (conf.state == GPIO_DISCONNECT) { /* reset the pin to disconnects any other peripheral output configured via GPIO Matrix, the pin is reconfigured according to given conf */ - esp_idf_gpio_reset_pin(gpio); + gpio_reset_pin(gpio); } /* since we can't read back the configuration, we have to save it */ _gpio_conf[gpio] = conf; - if (esp_idf_gpio_config(&cfg) != ESP_OK) { + if (gpio_config(&cfg) != ESP_OK) { return -ENOTSUP; } @@ -147,7 +146,7 @@ int gpio_ll_init(gpio_port_t port, uint8_t pin, gpio_conf_t conf) strength = GPIO_DRIVE_CAP_DEFAULT; } if ((cfg.pin_bit_mask & SOC_GPIO_VALID_OUTPUT_GPIO_MASK) && - (esp_idf_gpio_set_drive_capability(gpio, strength) != ESP_OK)) { + (gpio_set_drive_capability(gpio, strength) != ESP_OK)) { return -ENOTSUP; } diff --git a/cpu/esp32/periph/gpio_ll_irq.c b/cpu/esp32/periph/gpio_ll_irq.c index 5a47e43b93..a3ca97e638 100644 --- a/cpu/esp32/periph/gpio_ll_irq.c +++ b/cpu/esp32/periph/gpio_ll_irq.c @@ -27,6 +27,7 @@ #include "log.h" #include "periph/gpio_ll_irq.h" +#include "driver/gpio.h" #include "esp/common_macros.h" #include "esp_intr_alloc.h" #include "hal/gpio_hal.h" @@ -37,8 +38,6 @@ #include "xtensa/xtensa_api.h" #endif -#include "esp_idf_api/gpio.h" - #include "irq_arch.h" #if MODULE_PERIPH_GPIO_IRQ @@ -68,7 +67,7 @@ int gpio_ll_irq(gpio_port_t port, uint8_t pin, gpio_irq_trig_t trig, /* install GPIO ISR of ESP-IDF if not yet done */ if (!gpio_isr_service_installed && - esp_idf_gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1) != ESP_OK) { + gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1) != ESP_OK) { return -1; } gpio_isr_service_installed = true; @@ -94,12 +93,12 @@ int gpio_ll_irq(gpio_port_t port, uint8_t pin, gpio_irq_trig_t trig, default: type = GPIO_INTR_DISABLE; } - if (esp_idf_gpio_set_intr_type(gpio, type) != ESP_OK) { + if (gpio_set_intr_type(gpio, type) != ESP_OK) { return -1; } /* add interrupt handler for the pin */ - if (esp_idf_gpio_isr_handler_add(gpio, cb, arg) != ESP_OK) { + if (gpio_isr_handler_add(gpio, cb, arg) != ESP_OK) { return -1; } @@ -118,7 +117,7 @@ void gpio_ll_irq_mask(gpio_port_t port, uint8_t pin) DEBUG("%s gpio=%u port=%u pin=%u\n", __func__, gpio, (unsigned)gpio_port_num(port), pin); - if (esp_idf_gpio_intr_disable(gpio) == ESP_OK) { + if (gpio_intr_disable(gpio) == ESP_OK) { gpio_int_enabled_table[gpio] = false; } } @@ -130,7 +129,7 @@ void gpio_ll_irq_unmask(gpio_port_t port, uint8_t pin) DEBUG("%s gpio=%u port=%u pin=%u\n", __func__, gpio, port, pin); - if (esp_idf_gpio_intr_enable(gpio) == ESP_OK) { + if (gpio_intr_enable(gpio) == ESP_OK) { gpio_int_enabled_table[gpio] = true; } } @@ -151,7 +150,7 @@ void gpio_ll_irq_unmask_and_clear(gpio_port_t port, uint8_t pin) *status_w1tc = BIT(pin); - if (esp_idf_gpio_intr_enable(gpio) == ESP_OK) { + if (gpio_intr_enable(gpio) == ESP_OK) { gpio_int_enabled_table[gpio] = true; } } diff --git a/cpu/esp32/periph/hwrng.c b/cpu/esp32/periph/hwrng.c index 9048a5ce99..c1eae7fb47 100644 --- a/cpu/esp32/periph/hwrng.c +++ b/cpu/esp32/periph/hwrng.c @@ -25,25 +25,15 @@ #include "bootloader_random.h" #include "esp_random.h" -#include "soc/wdev_reg.h" - -#define RNG_DATA_REG (*(volatile uint32_t *)RNG_DATA_REG_ADDR) void hwrng_init(void) { - if (!IS_USED(MODULE_WIFI_ANY)) { - /* - * The hardware RNG generates random numbers uses the noise in the - * RF system of the WiFi or the BT interface as entropy source. - * If both are disabled, the random number generator just returns - * pseudo-random numbers. - * However, the bootloader use an internal non-RF entropy source, - * the internal reference voltage noise. This can be re-enabled - * after startup as entropy source for applications that don't - * use the WiFi or the BT interface. - */ - bootloader_random_enable(); - } + /* If the ADC SAR is used, the Bootloader RNG must not be enabled before + * the random numbers are actually required. The reason is that the + * Bootloader RNG uses the noise of the ADC SAR reference voltage as + * a non-RF entropy source. The calibration of the ADC SAR does not + * work correctly in this case. Therefore, the Bootloader RNG is only + * enabled if random numbers are really required. */ } /** @@ -56,10 +46,22 @@ void hwrng_init(void) */ void hwrng_read(void *buf, unsigned int num) { + if (!IS_USED(MODULE_ESP_WIFI_ANY) && !IS_USED(MODULE_ESP_BLE)) { + /* enable the Bootloader RNG if WiFi and BT are not used */ + bootloader_random_enable(); + } + esp_fill_random(buf, num); + + if (!IS_USED(MODULE_ESP_WIFI_ANY) && !IS_USED(MODULE_ESP_BLE)) { + /* disable the Bootloader RNG to ensure that ADC SAR calibration works */ + bootloader_random_disable(); + } } uint32_t hwrand(void) { - return esp_random(); + uint32_t rand; + hwrng_read(&rand, 4); + return rand; } diff --git a/cpu/esp32/periph/i2c_hw.c b/cpu/esp32/periph/i2c_hw.c index 52018666d3..bcb1b54d72 100644 --- a/cpu/esp32/periph/i2c_hw.c +++ b/cpu/esp32/periph/i2c_hw.c @@ -40,19 +40,27 @@ #include "mutex.h" #include "periph_conf.h" #include "periph/i2c.h" +#include "time_units.h" #include "ztimer.h" #include "esp_attr.h" -#include "driver/i2c.h" +#include "esp_clk_tree.h" +#include "esp_cpu.h" +#include "esp_driver_i2c/i2c_private.h" +#include "esp_rom_gpio.h" +#include "esp_rom_sys.h" #include "hal/i2c_hal.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "rom/ets_sys.h" +#include "soc/clk_tree_defs.h" #include "soc/i2c_reg.h" #define ENABLE_DEBUG 0 #include "debug.h" +/* typical values according to the ESP-IDF doc */ +#define I2C_GLITCH_IGNORE_CNT (7) +#define I2C_CLR_BUS_TIMEOUT_MS (50) + /* Ensure that the I2Cn_* symbols define I2C_DEV(n) */ #if !defined(I2C0_SPEED) && defined(I2C1_SPEED) #error "I2C_DEV(1) is used but I2C_DEV(0) is not defined" @@ -97,9 +105,6 @@ static _i2c_bus_t _i2c_bus[I2C_NUMOF] = { #endif }; -/* functions used from ESP-IDF driver that are not exposed in API */ -extern esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num); - /* forward declaration of internal functions */ static void _i2c_start_cmd(i2c_t dev); static void _i2c_stop_cmd(i2c_t dev); @@ -110,6 +115,11 @@ static void _i2c_transfer(i2c_t dev); static void _i2c_intr_handler(void *arg); static int _i2c_status_to_errno(i2c_t dev); +static void _i2c_configure_gpios(i2c_t dev); +static void _i2c_reset_and_configure(i2c_t dev); +static void _i2c_reset_fsm(i2c_t dev); +static void _i2c_clear_bus(i2c_t dev); + void i2c_init(i2c_t dev) { _Static_assert(I2C_NUMOF <= I2C_NUMOF_MAX, "Too many I2C devices defined"); @@ -140,66 +150,43 @@ void i2c_init(i2c_t dev) i2c_acquire(dev); - i2c_config_t cfg = {}; - - cfg.mode = I2C_MODE_MASTER; - cfg.sda_io_num = i2c_config[dev].sda; - cfg.scl_io_num = i2c_config[dev].scl; - cfg.sda_pullup_en = i2c_config[dev].sda_pullup; - cfg.scl_pullup_en = i2c_config[dev].scl_pullup; -#if defined(SOC_I2C_SUPPORT_RTC) && !defined(CPU_FAM_ESP32S3) - cfg.clk_flags = I2C_SCLK_SRC_FLAG_LIGHT_SLEEP; -#endif + uint32_t clk_speed; switch (i2c_config[dev].speed) { case I2C_SPEED_LOW: - cfg.master.clk_speed = 10 * KHZ(1); + clk_speed = 10 * KHZ(1); break; case I2C_SPEED_NORMAL: - cfg.master.clk_speed = 100 * KHZ(1); + clk_speed = 100 * KHZ(1); break; case I2C_SPEED_FAST: - cfg.master.clk_speed = 400 * KHZ(1); + clk_speed = 400 * KHZ(1); break; case I2C_SPEED_FAST_PLUS: - cfg.master.clk_speed = 1000 * KHZ(1); + clk_speed = 1000 * KHZ(1); break; case I2C_SPEED_HIGH: - cfg.master.clk_speed = 3400 * KHZ(1); + clk_speed = 3400 * KHZ(1); break; default: LOG_TAG_ERROR("i2c", "Invalid speed value in %s\n", __func__); assert(0); } - _i2c_bus[dev].clk_freq = cfg.master.clk_speed; + _i2c_bus[dev].clk_freq = clk_speed; - /* configures the GPIOs, sets the bus timing and enables the periphery */ - i2c_param_config(dev, &cfg); + /* configures the GPIOs */ + _i2c_configure_gpios(dev); -#if defined(SOC_I2C_SUPPORT_APB) - /* If I2C clock is derived from APB clock, the bus timing parameters - * have to be corrected if the APB clock is less than 80 MHz */ - extern uint32_t rtc_clk_apb_freq_get(void); - uint32_t apb_clk = rtc_clk_apb_freq_get(); - - if (apb_clk < MHZ(80)) { - i2c_clk_cal_t clk_cfg; - i2c_ll_cal_bus_clk(apb_clk, cfg.master.clk_speed, &clk_cfg); - i2c_ll_set_bus_timing(_i2c_hw[dev].dev, &clk_cfg); - } -#endif - - /* store the usage type in GPIO table */ - gpio_set_pin_usage(i2c_config[dev].scl, _I2C); - gpio_set_pin_usage(i2c_config[dev].sda, _I2C); + /* enable clocks, set the bus timing and enable the periphery */ + _i2c_reset_and_configure(dev); /* route all I2C interrupt sources to same the CPU interrupt */ intr_matrix_set(PRO_CPU_NUM, i2c_periph_signal[dev].irq, CPU_INUM_I2C); /* set interrupt handler and enable the CPU interrupt */ - intr_cntrl_ll_set_int_handler(CPU_INUM_I2C, _i2c_intr_handler, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_I2C)); + esp_cpu_intr_set_handler(CPU_INUM_I2C, _i2c_intr_handler, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_I2C)); i2c_release(dev); } @@ -235,8 +222,8 @@ int i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t fla _i2c_bus[dev].cmd = 0; /* reset TX/RX FIFO queue */ - i2c_hal_txfifo_rst(&_i2c_hw[dev]); - i2c_hal_rxfifo_rst(&_i2c_hw[dev]); + i2c_ll_txfifo_rst(_i2c_hw[dev].dev); + i2c_ll_rxfifo_rst(_i2c_hw[dev].dev); /* if I2C_NOSTART is not set, START condition and ADDR is used */ if (!(flags & I2C_NOSTART)) { @@ -276,10 +263,10 @@ int i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t fla } /* if transfer was successful, fetch the data from I2C RAM */ - i2c_hal_read_rxfifo(&_i2c_hw[dev], data + off, len); + i2c_ll_read_rxfifo(_i2c_hw[dev].dev, data + off, len); /* reset RX FIFO queue */ - i2c_hal_rxfifo_rst(&_i2c_hw[dev]); + i2c_ll_rxfifo_rst(_i2c_hw[dev].dev); len -= SOC_I2C_FIFO_LEN; off += SOC_I2C_FIFO_LEN; @@ -307,7 +294,7 @@ int i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t fla } /* fetch the data from RX FIFO */ - i2c_hal_read_rxfifo(&_i2c_hw[dev], data + off, len); + i2c_ll_read_rxfifo(_i2c_hw[dev].dev, data + off, len); /* return 0 on success */ return 0; @@ -328,7 +315,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint _i2c_bus[dev].cmd = 0; /* reset TX FIFO queue */ - i2c_hal_txfifo_rst(&_i2c_hw[dev]); + i2c_ll_txfifo_rst(_i2c_hw[dev].dev); /* if I2C_NOSTART is not set, START condition and ADDR is used */ if (!(flags & I2C_NOSTART)) { @@ -358,7 +345,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint uint32_t tx_fifo_free; /* get available TX FIFO space */ - i2c_hal_get_txfifo_cnt(&_i2c_hw[dev], &tx_fifo_free); + i2c_ll_get_txfifo_len(_i2c_hw[dev].dev, &tx_fifo_free); /* if len > SOC_I2C_FIFO_LEN write SOC_I2C_FIFO_LEN bytes at a time */ while (len > tx_fifo_free) { @@ -377,10 +364,10 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint off += tx_fifo_free; /* reset TX FIFO queue */ - i2c_hal_txfifo_rst(&_i2c_hw[dev]); + i2c_ll_txfifo_rst(_i2c_hw[dev].dev); /* update available TX FIFO space */ - i2c_hal_get_txfifo_cnt(&_i2c_hw[dev], &tx_fifo_free); + i2c_ll_get_txfifo_len(_i2c_hw[dev].dev, &tx_fifo_free); } /* write remaining data bytes command */ @@ -439,7 +426,7 @@ static int _i2c_status_to_errno(i2c_t dev) */ uint32_t cnt; - i2c_hal_get_txfifo_cnt(&_i2c_hw[dev], &cnt); + i2c_ll_get_txfifo_len(_i2c_hw[dev].dev, &cnt); return ((SOC_I2C_FIFO_LEN - cnt) >= _i2c_bus[dev].len) ? -ENXIO : -EIO; } else { @@ -455,7 +442,7 @@ static int _i2c_status_to_errno(i2c_t dev) if (_i2c_bus[dev].status & I2C_TIME_OUT_INT_ENA_M) { LOG_TAG_DEBUG("i2c", "bus timeout dev=%u\n", dev); - i2c_hw_fsm_reset(dev); + _i2c_reset_fsm(dev); return -ETIMEDOUT; } @@ -467,8 +454,8 @@ static void _i2c_start_cmd(i2c_t dev) DEBUG ("%s\n", __func__); /* place START condition command in command queue */ - i2c_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_RESTART }; - i2c_hal_write_cmd_reg(&_i2c_hw[dev], cmd, _i2c_bus[dev].cmd); + i2c_ll_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_RESTART }; + i2c_ll_master_write_cmd_reg(_i2c_hw[dev].dev, cmd, _i2c_bus[dev].cmd); /* increment the command counter */ _i2c_bus[dev].cmd++; @@ -479,8 +466,8 @@ static void _i2c_stop_cmd(i2c_t dev) DEBUG ("%s\n", __func__); /* place STOP condition command in command queue */ - i2c_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_STOP }; - i2c_hal_write_cmd_reg(&_i2c_hw[dev], cmd, _i2c_bus[dev].cmd); + i2c_ll_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_STOP }; + i2c_ll_master_write_cmd_reg(_i2c_hw[dev].dev, cmd, _i2c_bus[dev].cmd); /* increment the command counter */ _i2c_bus[dev].cmd++; @@ -491,8 +478,8 @@ static void _i2c_end_cmd(i2c_t dev) DEBUG ("%s\n", __func__); /* place END command for continues data transmission in command queue */ - i2c_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_END }; - i2c_hal_write_cmd_reg(&_i2c_hw[dev], cmd, _i2c_bus[dev].cmd); + i2c_ll_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_END }; + i2c_ll_master_write_cmd_reg(_i2c_hw[dev].dev, cmd, _i2c_bus[dev].cmd); /* increment the command counter */ _i2c_bus[dev].cmd++; @@ -509,15 +496,15 @@ static void _i2c_write_cmd(i2c_t dev, const uint8_t* data, uint8_t len) } /* store the data in TX FIFO */ - i2c_hal_write_txfifo(&_i2c_hw[dev], (uint8_t *)data, len); + i2c_ll_write_txfifo(_i2c_hw[dev].dev, (uint8_t *)data, len); /* place WRITE command for multiple bytes in command queue */ - i2c_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_WRITE, - .byte_num = len, - .ack_en = 1, - .ack_exp = 0, - .ack_val = 0 }; - i2c_hal_write_cmd_reg(&_i2c_hw[dev], cmd, _i2c_bus[dev].cmd); + i2c_ll_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_WRITE, + .byte_num = len, + .ack_en = 1, + .ack_exp = 0, + .ack_val = 0 }; + i2c_ll_master_write_cmd_reg(_i2c_hw[dev].dev, cmd, _i2c_bus[dev].cmd); /* increment the command counter */ _i2c_bus[dev].cmd++; @@ -536,24 +523,24 @@ static void _i2c_read_cmd(i2c_t dev, uint8_t len, bool last) if (len > 1) { /* place READ command for len-1 bytes with positive ack in command queue*/ - i2c_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_READ, - .byte_num = len-1, - .ack_en = 0, - .ack_exp = 0, - .ack_val = 0 }; - i2c_hal_write_cmd_reg(&_i2c_hw[dev], cmd, _i2c_bus[dev].cmd); + i2c_ll_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_READ, + .byte_num = len-1, + .ack_en = 0, + .ack_exp = 0, + .ack_val = 0 }; + i2c_ll_master_write_cmd_reg(_i2c_hw[dev].dev, cmd, _i2c_bus[dev].cmd); /* increment the command counter */ _i2c_bus[dev].cmd++; } /* place READ command for last byte with negative ack in last segment in command queue*/ - i2c_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_READ, - .byte_num = 1, - .ack_en = 0, - .ack_exp = 0, - .ack_val = last ? 1 : 0 }; - i2c_hal_write_cmd_reg(&_i2c_hw[dev], cmd, _i2c_bus[dev].cmd); + i2c_ll_hw_cmd_t cmd = { .op_code = I2C_LL_CMD_READ, + .byte_num = 1, + .ack_en = 0, + .ack_exp = 0, + .ack_val = last ? 1 : 0 }; + i2c_ll_master_write_cmd_reg(_i2c_hw[dev].dev, cmd, _i2c_bus[dev].cmd); /* increment the command counter */ _i2c_bus[dev].cmd++; @@ -571,7 +558,7 @@ void _i2c_transfer_timeout(void *arg) i2c_t dev = (i2c_t)(uintptr_t)arg; /* reset the hardware if I2C got stuck */ - i2c_hw_fsm_reset(dev); + _i2c_reset_fsm(dev); /* set result to timeout */ _i2c_bus[dev].status = I2C_TIME_OUT_INT_ENA_M; @@ -586,8 +573,8 @@ static void _i2c_transfer(i2c_t dev) DEBUG("%s cmd=%d\n", __func__, _i2c_bus[dev].cmd); /* disable and enable all transmission interrupts and clear current status */ - i2c_hal_clr_intsts_mask(&_i2c_hw[dev], I2C_LL_MASTER_INT); - i2c_hal_enable_intr_mask(&_i2c_hw[dev], I2C_LL_MASTER_INT); + i2c_ll_clear_intr_mask(_i2c_hw[dev].dev, I2C_LL_MASTER_INT); + i2c_ll_enable_intr_mask(_i2c_hw[dev].dev, I2C_LL_MASTER_INT); /* set a timer for the case the I2C hardware gets stuck */ #if defined(MODULE_ZTIMER_MSEC) @@ -600,8 +587,8 @@ static void _i2c_transfer(i2c_t dev) /* start the execution of commands in command pipeline */ _i2c_bus[dev].status = 0; - i2c_hal_update_config(&_i2c_hw[dev]); - i2c_hal_trans_start(&_i2c_hw[dev]); + i2c_ll_update(_i2c_hw[dev].dev); + i2c_ll_start_trans(_i2c_hw[dev].dev); /* wait for transfer results and remove timeout timer*/ mutex_lock(&_i2c_bus[dev].cmd_lock); @@ -627,13 +614,14 @@ static void IRAM_ATTR _i2c_intr_handler(void *arg) /* all I2C peripheral interrupt sources are routed to the same interrupt, so we have to use the status register to distinguish interruptees */ for (unsigned dev = 0; dev < I2C_NUMOF; dev++) { - uint32_t mask = i2c_ll_get_intsts_mask(_i2c_hw[dev].dev); + uint32_t mask; + i2c_ll_get_intr_mask(_i2c_hw[dev].dev, &mask); /* test for transfer related interrupts */ if (mask) { _i2c_bus[dev].status = mask; /* disable all interrupts and clear pending interrupts */ - i2c_hal_clr_intsts_mask(&_i2c_hw[dev], I2C_LL_MASTER_INT); - i2c_hal_disable_intr_mask(&_i2c_hw[dev], I2C_LL_MASTER_INT); + i2c_ll_clear_intr_mask(_i2c_hw[dev].dev, I2C_LL_MASTER_INT); + i2c_ll_enable_intr_mask(_i2c_hw[dev].dev, I2C_LL_MASTER_INT); /* wake up the thread that is waiting for the results */ mutex_unlock(&_i2c_bus[dev].cmd_lock); @@ -655,3 +643,115 @@ void i2c_print_config(void) LOG_TAG_INFO("i2c", "no I2C devices\n"); } } + +static void _i2c_configure_gpios(i2c_t dev) +{ + gpio_init(i2c_config[dev].scl, i2c_config[dev].scl_pullup ? GPIO_IN_OD_PU : GPIO_IN_OD_PU); + gpio_set(i2c_config[dev].scl); + esp_rom_gpio_connect_out_signal(i2c_config[dev].scl, i2c_periph_signal[dev].scl_out_sig, 0, 0); + esp_rom_gpio_connect_in_signal(i2c_config[dev].scl, i2c_periph_signal[dev].scl_in_sig, 0); + + gpio_init(i2c_config[dev].sda, i2c_config[dev].sda_pullup ? GPIO_IN_OD_PU : GPIO_IN_OD_PU); + gpio_set(i2c_config[dev].sda); + esp_rom_gpio_connect_out_signal(i2c_config[dev].sda, i2c_periph_signal[dev].sda_out_sig, 0, 0); + esp_rom_gpio_connect_in_signal(i2c_config[dev].sda, i2c_periph_signal[dev].sda_in_sig, 0); + + /* store the usage type in GPIO table */ + gpio_set_pin_usage(i2c_config[dev].scl, _I2C); + gpio_set_pin_usage(i2c_config[dev].sda, _I2C); +} + +static void _i2c_reset_and_configure(i2c_t dev) +{ + i2c_ll_enable_controller_clock(_i2c_hw[dev].dev, true); + + I2C_RCC_ATOMIC() { + i2c_ll_enable_bus_clock(dev, true); + i2c_ll_reset_register(dev); + } + + i2c_ll_master_init(_i2c_hw[dev].dev); + i2c_ll_set_data_mode(_i2c_hw[dev].dev, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST); + i2c_ll_txfifo_rst(_i2c_hw[dev].dev); + i2c_ll_rxfifo_rst(_i2c_hw[dev].dev); + + soc_module_clk_t clk_src = (soc_module_clk_t)I2C_CLK_SRC_DEFAULT; + uint32_t clk_src_hz; + + esp_clk_tree_src_get_freq_hz(clk_src, ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX, &clk_src_hz); + + i2c_hal_clk_config_t clk_cfg; + i2c_ll_master_cal_bus_clk(clk_src_hz, _i2c_bus[dev].clk_freq, &clk_cfg); + i2c_ll_master_set_bus_timing(_i2c_hw[dev].dev, &clk_cfg); + i2c_ll_master_set_filter(_i2c_hw[dev].dev, I2C_GLITCH_IGNORE_CNT); + i2c_ll_set_source_clk(_i2c_hw[dev].dev, (soc_periph_i2c_clk_src_t)clk_src); + + i2c_ll_update(_i2c_hw[dev].dev); + + /* clear pending interrupts */ + i2c_ll_clear_intr_mask(_i2c_hw[dev].dev, I2C_LL_MASTER_EVENT_INTR); +} + +static void _i2c_reset_fsm(i2c_t dev) +{ +#if SOC_I2C_SUPPORT_HW_FSM_RST + i2c_ll_master_fsm_rst(_i2c_hw[dev].dev); + _i2c_clear_bus(dev); +#else + _i2c_clear_bus(dev); + _i2c_reset_and_configure(dev); +#endif +} + +static void _i2c_clear_bus(i2c_t dev) +{ +#if SOC_I2C_SUPPORT_HW_CLR_BUS + i2c_ll_master_clr_bus(_i2c_hw[dev].dev, I2C_LL_RESET_SLV_SCL_PULSE_NUM_DEFAULT, true); + + uint32_t timeout = system_get_time_ms() + I2C_CLR_BUS_TIMEOUT_MS; + while (i2c_ll_master_is_bus_clear_done(_i2c_hw[dev].dev) && + (timeout > system_get_time_ms())) { } + + if (timeout < system_get_time_ms()) { + LOG_TAG_ERROR("i2c", "clear bus failed\n"); + } + + i2c_ll_master_clr_bus(_i2c_hw[dev].dev, 0, false); + i2c_ll_update(_i2c_hw[dev].dev); +#else + gpio_set_pin_usage(i2c_config[dev].scl, _GPIO); + gpio_set_pin_usage(i2c_config[dev].sda, _GPIO); + + gpio_init(i2c_config[dev].scl, i2c_config[dev].scl_pullup ? GPIO_IN_OD_PU : GPIO_IN_OD_PU); + gpio_init(i2c_config[dev].sda, i2c_config[dev].sda_pullup ? GPIO_IN_OD_PU : GPIO_IN_OD_PU); + + gpio_set(i2c_config[dev].scl); + gpio_set(i2c_config[dev].sda); + + /* + * If SDA is low it is driven by the slave, wait until SDA goes high, at + * maximum 9 clock cycles in standard mode at 100 kHz including the ACK bit. + */ + uint32_t half_cycle = 5; + int count = 9; + + while (!gpio_read(i2c_config[dev].sda) && count--) { + gpio_clear(i2c_config[dev].scl); + esp_rom_delay_us(half_cycle); + gpio_set(i2c_config[dev].scl); + esp_rom_delay_us(half_cycle); + } + + /* generate a STOP condition */ + gpio_clear(i2c_config[dev].scl); + esp_rom_delay_us(half_cycle); + gpio_clear(i2c_config[dev].sda); + esp_rom_delay_us(half_cycle); + gpio_set(i2c_config[dev].scl); + esp_rom_delay_us(half_cycle); + gpio_set(i2c_config[dev].sda); + + /* reconfigure gpios */ + _i2c_configure_gpios(dev); +#endif +} diff --git a/cpu/esp32/periph/pm.c b/cpu/esp32/periph/pm.c index 52463d0b85..2faa14d860 100644 --- a/cpu/esp32/periph/pm.c +++ b/cpu/esp32/periph/pm.c @@ -30,14 +30,14 @@ #include "periph/uart.h" /* ESP-IDF headers */ +#include "driver/gpio.h" +#include "driver/uart.h" #include "esp_sleep.h" #include "rom/rtc.h" #include "rom/uart.h" #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" -#include "esp_idf_api/uart.h" - #define ENABLE_DEBUG 0 #include "debug.h" @@ -85,8 +85,10 @@ static inline void pm_set_lowest_normal(void) void IRAM_ATTR pm_off(void) { /* disable remaining power domains */ +#if ESP_PD_DOMAIN_RTC_SLOW_MEM && ESP_PD_DOMAIN_RTC_FAST_MEM esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_SLOW_MEM, ESP_PD_OPTION_OFF); esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_FAST_MEM, ESP_PD_OPTION_OFF); +#endif /* enter hibernate mode without any enabled wake-up sources */ esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_ALL); @@ -137,6 +139,7 @@ void pm_set(unsigned mode) /* flush stdout */ fflush(stdout); +#if SOC_PM_SUPPORT_RTC_SLOW_MEM_PD /* Labels for RTC slow memory that are defined in the linker script */ extern int _rtc_bss_rtc_start; extern int _rtc_bss_rtc_end; @@ -151,6 +154,7 @@ void pm_set(unsigned mode) if (&_rtc_bss_rtc_end > &_rtc_bss_rtc_start) { esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_SLOW_MEM, ESP_PD_OPTION_ON); } +#endif /* first disable all wake-up sources */ esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_ALL); @@ -161,15 +165,31 @@ void pm_set(unsigned mode) /* Prepare GPIOs as wakeup source */ gpio_pm_sleep_enter(mode); - extern esp_err_t esp_sleep_enable_uart_wakeup(int uart); #if (ESP_PM_WUP_UART0 > 2) - esp_idf_uart_set_wakeup_threshold(UART_DEV(0), ESP_PM_WUP_UART0); + _Static_assert(UART_NUMOF > 0, "UART_DEV(0) is not defined"); +#if CPU_FAM_ESP32 + /* For ESP32, UART RxD has to be configured for direct IO using IOMUX */ + const uart_periph_sig_t *sig = &uart_periph_signal[UART_DEV(0)].pins[SOC_UART_RX_PIN_IDX]; + gpio_iomux_out(UART0_RXD, sig->iomux_func, false); + gpio_iomux_in(UART0_RXD, sig->signal); +#endif + uart_set_wakeup_threshold(UART_DEV(0), ESP_PM_WUP_UART0); esp_sleep_enable_uart_wakeup(0); #endif #if (ESP_PM_WUP_UART1 > 2) - esp_idf_uart_set_wakeup_threshold(UART_DEV(1), ESP_PM_WUP_UART1); + _Static_assert(UART_NUMOF > 1, "UART_DEV(1) is not defined"); +#if CPU_FAM_ESP32 + /* For ESP32, UART RxD has to be configured for direct IO using IOMUX */ + const uart_periph_sig_t *sig = &uart_periph_signal[UART_DEV(0)].pins[SOC_UART_RX_PIN_IDX]; + gpio_iomux_out(UART1_RXD, sig->iomux_func, false); + gpio_iomux_in(UART1_RXD, sig->signal); +#endif + uart_set_wakeup_threshold(UART_DEV(1), ESP_PM_WUP_UART1); esp_sleep_enable_uart_wakeup(1); #endif +#if MODULE_STDIO_UART + uart_wait_tx_idle_polling(CONFIG_ESP_CONSOLE_UART_NUM); +#endif if (mode == ESP_PM_DEEP_SLEEP) { esp_deep_sleep_start(); diff --git a/cpu/esp32/periph/pwm.c b/cpu/esp32/periph/pwm.c index 4505acc332..fa4d8312a9 100644 --- a/cpu/esp32/periph/pwm.c +++ b/cpu/esp32/periph/pwm.c @@ -28,8 +28,9 @@ #include "periph/pwm.h" #include "periph/gpio.h" -#include "driver/periph_ctrl.h" +#include "esp_cpu.h" #include "esp_common.h" +#include "esp_private/periph_ctrl.h" #include "esp_rom_gpio.h" #include "hal/ledc_hal.h" #include "soc/ledc_struct.h" @@ -53,7 +54,7 @@ #define SOC_LEDC_CLK_DIV_INT_BIT_NUM 10 /* integral part of CLK divider */ #define SOC_LEDC_CLK_DIV_FRAC_BIT_NUM 8 /* fractional part of CLK divider */ -#define PWM_HW_RES_MAX ((uint32_t)1 << SOC_LEDC_TIMER_BIT_WIDE_NUM) +#define PWM_HW_RES_MAX ((uint32_t)1 << SOC_LEDC_TIMER_BIT_WIDTH) #define PWM_HW_RES_MIN ((uint32_t)1 << 1) #define _DEV _pwm_dev[pwm] /* shortcut for PWM device descriptor */ @@ -121,7 +122,7 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res) * next power of two, which covers the desired resolution */ ledc_timer_bit_t hw_res_bit = bitarithm_msb(res - 1); - if (hw_res_bit < SOC_LEDC_TIMER_BIT_WIDE_NUM) { + if (hw_res_bit < SOC_LEDC_TIMER_BIT_WIDTH) { hw_res_bit++; } @@ -129,7 +130,7 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res) uint32_t hw_ticks_max = rtc_clk_apb_freq_get(); uint32_t hw_ticks_min = hw_ticks_max / (1 << SOC_LEDC_CLK_DIV_INT_BIT_NUM); - uint32_t hw_freq_min = hw_ticks_min / (1 << SOC_LEDC_TIMER_BIT_WIDE_NUM) + 1; + uint32_t hw_freq_min = hw_ticks_min / (1 << SOC_LEDC_TIMER_BIT_WIDTH) + 1; if (freq < hw_freq_min) { LOG_TAG_ERROR("pwm", "Frequency of %"PRIu32" Hz is too less, minimum " @@ -255,7 +256,9 @@ void pwm_poweron(pwm_t pwm) periph_module_enable(_CFG.module); ledc_hal_init(&_DEV.hw, _CFG.group); ledc_hal_set_slow_clk_sel(&_DEV.hw, LEDC_SLOW_CLK_APB); +#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX ledc_hal_set_clock_source(&_DEV.hw, _CFG.timer, LEDC_APB_CLK); +#endif /* update the timer according to determined parameters */ ledc_hal_set_clock_divider(&_DEV.hw, _CFG.timer, _DEV.hw_clk_div); @@ -266,10 +269,7 @@ void pwm_poweron(pwm_t pwm) critical_enter(); for (unsigned i = 0; i < _CFG.ch_numof; i++) { /* static configuration of the channel, no fading */ - ledc_hal_set_duty_direction(&_DEV.hw, _DEV.ch[i].ch, 1); - ledc_hal_set_duty_num(&_DEV.hw, _DEV.ch[i].ch, 1); - ledc_hal_set_duty_cycle(&_DEV.hw, _DEV.ch[i].ch, 1); - ledc_hal_set_duty_scale(&_DEV.hw, _DEV.ch[i].ch, 0); + ledc_hal_set_fade_param(&_DEV.hw, _DEV.ch[i].ch, 0, 1, 1, 0, 1); ledc_hal_set_fade_end_intr(&_DEV.hw, _DEV.ch[i].ch, 0); /* bind the channel to the timer and disable the output for now */ diff --git a/cpu/esp32/periph/rtt.c b/cpu/esp32/periph/rtt.c index dd9e909924..0a4b976fac 100644 --- a/cpu/esp32/periph/rtt.c +++ b/cpu/esp32/periph/rtt.c @@ -59,6 +59,7 @@ extern uint32_t rtc_clk_slow_freq_get_hz(void); void rtt_restore_counter(bool sys_time); static void _rtt_update_hw_alarm(void); static void _rtt_isr(void *arg); +static inline uint32_t _rtt_get_counter(void); /* forward declarations of driver functions */ uint64_t _rtc_get_counter(void); @@ -82,10 +83,10 @@ void rtt_init(void) } } - DEBUG("%s rtt_offset=%" PRIu32 " @rtc=%" PRIu64 - " rtc_active=%d @sys_time=%" PRIi64 "\n", __func__, - _rtt_offset, _rtc_get_counter(), - (_rtt_hw == &_rtt_hw_sys_driver) ? 1 : 0, system_get_time_64()); + DEBUG("%s rtt_offset=%" PRIu32 " @rtc=%" PRIu32 + " rtc_active=%d @sys_time=%" PRIu32 "\n", __func__, + _rtt_offset, (uint32_t)_rtc_get_counter(), + (_rtt_hw == &_rtt_hw_sys_driver) ? 1 : 0, (uint32_t)system_get_time_64()); /* init the hardware counter if necessary */ _rtt_hw->init(); @@ -132,8 +133,8 @@ void rtt_clear_overflow_cb(void) uint32_t rtt_get_counter(void) { /* we use only the lower 32 bit of the 48-bit RTC counter */ - uint32_t counter = _rtt_hw->get_counter() + _rtt_offset; - DEBUG("%s counter=%" PRIu32 " @sys_time=%" PRIu32" \n", + uint32_t counter = _rtt_get_counter(); + DEBUG("%s counter=%" PRIu32 " @sys_time=%" PRIu32 "\n", __func__, counter, system_get_time()); return counter; } @@ -143,20 +144,22 @@ void rtt_set_counter(uint32_t counter) uint32_t _rtt_current = _rtt_hw->get_counter(); _rtt_offset = counter - _rtt_current; - DEBUG("%s set=%" PRIu32 " rtt_offset=%" PRIu32 " @rtt=%" PRIu32 "\n", - __func__, counter, _rtt_offset, _rtt_current); + DEBUG("%s set=%" PRIu32 " rtt_offset=%" PRIu32 " @rtt=%" PRIu32 + " @sys_time=%" PRIu32 "\n", + __func__, counter, _rtt_offset, _rtt_current, system_get_time()); _rtt_update_hw_alarm(); } void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg) { - uint32_t counter = rtt_get_counter(); + uint32_t counter = _rtt_get_counter(); rtt_counter.alarm = alarm; rtt_counter.alarm_cb = cb; rtt_counter.alarm_arg = arg; - DEBUG("%s alarm=%" PRIu32 " @rtt=%" PRIu32 "\n", __func__, alarm, counter); + DEBUG("%s alarm=%" PRIu32 " @rtt=%" PRIu32 " @sys_time=%" PRIu32 "\n", + __func__, alarm, counter, system_get_time()); _rtt_update_hw_alarm(); } @@ -168,7 +171,8 @@ void rtt_clear_alarm(void) rtt_counter.alarm_cb = NULL; rtt_counter.alarm_arg = NULL; - DEBUG("%s @rtt=%" PRIu32 "\n", __func__, (uint32_t)_rtt_hw->get_counter()); + DEBUG("%s @rtt=%" PRIu32 " @sys_time=%" PRIu32 "\n", + __func__, (uint32_t)_rtt_hw->get_counter(), system_get_time()); _rtt_update_hw_alarm(); } @@ -196,11 +200,11 @@ uint64_t rtt_pm_sleep_enter(unsigned mode) return 0; } - uint32_t counter = rtt_get_counter(); + uint32_t counter = _rtt_get_counter(); uint64_t t_diff = RTT_TICKS_TO_US(rtt_counter.alarm_active - counter); - DEBUG("%s rtt_alarm=%" PRIu32 " @rtt=%" PRIu32 " t_diff=%llu\n", __func__, - rtt_counter.alarm_active, counter, t_diff); + DEBUG("%s rtt_alarm=%" PRIu32 " @rtt=%" PRIu32 " t_diff=%" PRIu32 "\n", __func__, + rtt_counter.alarm_active, counter, (uint32_t)t_diff); if (t_diff) { rtt_counter.wakeup = true; @@ -222,9 +226,14 @@ void rtt_pm_sleep_exit(uint32_t cause) } } +static inline uint32_t _rtt_get_counter(void) +{ + return _rtt_hw->get_counter() + _rtt_offset; +} + static void _rtt_update_hw_alarm(void) { - if (rtt_counter.alarm_cb && ((rtt_counter.alarm > rtt_get_counter()) || + if (rtt_counter.alarm_cb && ((rtt_counter.alarm > _rtt_get_counter()) || (rtt_counter.overflow_cb == NULL))) { /* alarm is the next event if either the alarm is greater than the current counter value or the overflow callback is not set. */ @@ -253,7 +262,7 @@ static void IRAM_ATTR _rtt_isr(void *arg) if (rtt_counter.wakeup) { rtt_counter.wakeup = false; DEBUG("%s wakeup alarm alarm=%" PRIu32 " rtt_alarm=%" PRIu32 " @rtt=%" PRIu32 "\n", - __func__, alarm, rtt_counter.alarm_active, rtt_get_counter()); + __func__, alarm, rtt_counter.alarm_active, _rtt_get_counter()); } if ((alarm == rtt_counter.alarm) && rtt_counter.alarm_cb) { @@ -278,7 +287,7 @@ static void IRAM_ATTR _rtt_isr(void *arg) } } - DEBUG("%s next rtt=%" PRIu32 "\n", __func__, rtt_counter.alarm_active); + DEBUG("%s next rtt=%" PRIu32 "\n", __func__, rtt_counter.alarm_active); } uint32_t _rtt_hw_to_rtt_counter(uint32_t hw_counter) diff --git a/cpu/esp32/periph/rtt_hw_rtc.c b/cpu/esp32/periph/rtt_hw_rtc.c index 6f12d634bd..5bd112038a 100644 --- a/cpu/esp32/periph/rtt_hw_rtc.c +++ b/cpu/esp32/periph/rtt_hw_rtc.c @@ -32,9 +32,8 @@ /* ESP-IDF headers */ #include "esp_attr.h" +#include "esp_cpu.h" #include "esp_sleep.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "rom/ets_sys.h" #include "soc/periph_defs.h" #include "soc/rtc_cntl_struct.h" @@ -70,7 +69,7 @@ uint64_t _rtc_counter_to_us(uint64_t raw) { const uint32_t cal = esp_clk_slowclk_cal_get(); return ((((raw >> 32) * cal) << (32 - RTC_CLK_CAL_FRACT)) + /* high part */ - (((raw & 0xffffffff) * cal) >> RTC_CLK_CAL_FRACT)); /* low part */ + (((raw & UINT32_MAX) * cal) >> RTC_CLK_CAL_FRACT)); /* low part */ } static void _rtc_init(void) @@ -83,15 +82,15 @@ static void _rtc_poweron(void) intr_matrix_set(PRO_CPU_NUM, ETS_RTC_CORE_INTR_SOURCE, CPU_INUM_RTT); /* set interrupt handler and enable the CPU interrupt */ - intr_cntrl_ll_set_int_handler(CPU_INUM_RTT, _rtc_isr, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_RTT)); + esp_cpu_intr_set_handler(CPU_INUM_RTT, _rtc_isr, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_RTT)); } static void _rtc_poweroff(void) { /* reset interrupt handler and disable the CPU interrupt */ - intr_cntrl_ll_disable_interrupts(BIT(CPU_INUM_RTT)); - intr_cntrl_ll_set_int_handler(CPU_INUM_RTT, NULL, NULL); + esp_cpu_intr_disable(BIT(CPU_INUM_RTT)); + esp_cpu_intr_set_handler(CPU_INUM_RTT, NULL, NULL); } uint64_t _rtc_get_counter(void) @@ -123,8 +122,8 @@ static void _rtc_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg) uint64_t rtc_alarm = (rtc_counter + rtt_diff) & RTT_HW_COUNTER_MAX; DEBUG("%s alarm=%" PRIu32 " rtt_diff=%" PRIu32 - " rtc_alarm=%" PRIu64 " @rtc=%" PRIu64 "\n", - __func__, alarm, rtt_diff, rtc_alarm, rtc_counter); + " rtc_alarm=%" PRIu32 " @rtc=%" PRIu32 "\n", + __func__, alarm, rtt_diff, (uint32_t)rtc_alarm, (uint32_t)rtc_counter); /* save the alarm configuration for interrupt handling */ _rtc_alarm.alarm_set = alarm; @@ -132,18 +131,18 @@ static void _rtc_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg) _rtc_alarm.alarm_arg = arg; /* set the timer value */ - RTCCNTL.slp_timer0 = rtc_alarm & 0xffffffff; + RTCCNTL.slp_timer0 = rtc_alarm & UINT32_MAX; RTCCNTL.slp_timer1.slp_val_hi = rtc_alarm >> 32; DEBUG("%s %08x%08x \n", __func__, (unsigned)RTCCNTL.slp_timer1.slp_val_hi, (unsigned)RTCCNTL.slp_timer0); - /* enable RTC timer alarm */ - RTCCNTL.slp_timer1.main_timer_alarm_en = 1; - /* clear and enable RTC timer interrupt */ RTCCNTL.int_clr.rtc_main_timer = 1; RTCCNTL.int_ena.rtc_main_timer = 1; + + /* enable RTC timer alarm */ + RTCCNTL.slp_timer1.main_timer_alarm_en = 1; } static void _rtc_clear_alarm(void) @@ -176,8 +175,8 @@ static void IRAM _rtc_isr(void *arg) RTCCNTL.slp_timer1.main_timer_alarm_en = 0; /* clear the bit in interrupt enable and status register */ - RTCCNTL.int_clr.rtc_main_timer = 0; RTCCNTL.int_ena.rtc_main_timer = 0; + RTCCNTL.int_clr.rtc_main_timer = 1; /* save the lower 32 bit of the current counter value */ uint32_t counter = _rtc_get_counter(); diff --git a/cpu/esp32/periph/rtt_hw_sys.c b/cpu/esp32/periph/rtt_hw_sys.c index 1deb9094e7..6d841c3e5f 100644 --- a/cpu/esp32/periph/rtt_hw_sys.c +++ b/cpu/esp32/periph/rtt_hw_sys.c @@ -31,12 +31,13 @@ /* ESP-IDF headers */ #include "esp_attr.h" +#include "esp_cpu.h" #include "esp_sleep.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "hal/timer_hal.h" +#include "hal/timer_ll.h" #include "rom/ets_sys.h" #include "soc/periph_defs.h" +#include "soc/soc.h" #include "soc/timer_group_struct.h" #if __xtensa__ @@ -46,8 +47,6 @@ #define ENABLE_DEBUG 0 #include "debug.h" -#define TIMER_SYSTEM_INT_MASK BIT(TIMER_SYSTEM_INDEX) - #define SYS_US_TO_TICKS(us) ((((uint64_t)us) << 15) / US_PER_SEC) #define SYS_TICKS_TO_US(cnt) (((uint64_t)cnt * US_PER_SEC) >> 15) @@ -85,15 +84,15 @@ static void _sys_poweron(void) intr_matrix_set(PRO_CPU_NUM, TIMER_SYSTEM_INT_SRC, CPU_INUM_RTT); /* set interrupt handler and enable the CPU interrupt */ - intr_cntrl_ll_set_int_handler(CPU_INUM_RTT, _sys_isr, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_RTT)); + esp_cpu_intr_set_handler(CPU_INUM_RTT, _sys_isr, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_RTT)); } static void _sys_poweroff(void) { /* reset interrupt handler and disable the CPU interrupt */ - intr_cntrl_ll_disable_interrupts(BIT(CPU_INUM_RTT)); - intr_cntrl_ll_set_int_handler(CPU_INUM_RTT, NULL, NULL); + esp_cpu_intr_disable(BIT(CPU_INUM_RTT)); + esp_cpu_intr_set_handler(CPU_INUM_RTT, NULL, NULL); } static uint64_t _sys_get_counter(void) @@ -117,33 +116,34 @@ static void _sys_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg) uint64_t _sys_alarm_time = _sys_time + _sys_diff; DEBUG("%s alarm=%" PRIu32 " rtt_diff=%" PRIu32 " " - "sys_diff=%" PRIu64 " sys_alarm=%" PRIu64 " @sys_time=%" PRIu64 "\n", __func__, - alarm, rtt_diff, _sys_diff, _sys_alarm_time, _sys_time); + "sys_diff=%" PRIu32 " sys_alarm=%" PRIu32 " @sys_time=%" PRIu32 "\n", __func__, + alarm, rtt_diff, (uint32_t)_sys_diff, (uint32_t)_sys_alarm_time, (uint32_t)_sys_time); /* save the alarm configuration for interrupt handling */ _sys_alarm.alarm_set = alarm; _sys_alarm.alarm_cb = cb; _sys_alarm.alarm_arg = arg; - /* set the timer value */ - timer_hal_set_alarm_value(&sys_timer, _sys_alarm_time); + /* set the timer alarm value */ + timer_ll_enable_alarm(sys_timer.dev, sys_timer.timer_id, false); + timer_ll_set_alarm_value(sys_timer.dev, sys_timer.timer_id, _sys_alarm_time); /* clear the bit in status and set the bit in interrupt enable */ - timer_hal_clear_intr_status(&sys_timer); - timer_hal_intr_enable(&sys_timer); + timer_ll_clear_intr_status(sys_timer.dev, TIMER_LL_EVENT_ALARM(sys_timer.timer_id)); + timer_ll_enable_intr(sys_timer.dev, TIMER_LL_EVENT_ALARM(sys_timer.timer_id), true); /* enable the timer alarm */ - timer_hal_set_alarm_enable(&sys_timer, true); + timer_ll_enable_alarm(sys_timer.dev, sys_timer.timer_id, true); } static void _sys_clear_alarm(void) { /* disable alarms first */ - timer_hal_intr_disable(&sys_timer); - timer_hal_set_alarm_enable(&sys_timer, false); + timer_ll_enable_intr(sys_timer.dev, TIMER_LL_EVENT_ALARM(sys_timer.timer_id), false); + timer_ll_enable_alarm(sys_timer.dev, sys_timer.timer_id, false); /* clear the bit in interrupt status register */ - timer_hal_clear_intr_status(&sys_timer); + timer_ll_clear_intr_status(sys_timer.dev, TIMER_LL_EVENT_ALARM(sys_timer.timer_id)); /* reset the alarm configuration for interrupt handling */ _sys_alarm.alarm_set = 0; @@ -161,8 +161,8 @@ static void _sys_save_counter(void) critical_exit(); - DEBUG("%s rtc_time_saved=%" PRIu64 " sys_time_saved=%" PRIu64 "\n", __func__, - _rtc_counter_saved, _sys_counter_saved); + DEBUG("%s rtc_time_saved=%" PRIu32 " sys_time_saved=%" PRIu32 "\n", __func__, + (uint32_t)_rtc_counter_saved, (uint32_t)_sys_counter_saved); } static void _sys_restore_counter(bool in_init) @@ -176,36 +176,36 @@ static void _sys_restore_counter(bool in_init) critical_exit(); - DEBUG("%s rtc_time_saved=%" PRIu64 " rtc_time_diff=%" PRIu64 " " - "sys_time_saved=%" PRIu64 " sys_time_offset=%" PRIu64 "\n", __func__, - _rtc_counter_saved, _rtc_time_diff, - _sys_counter_saved, _sys_counter_offset); + DEBUG("%s rtc_time_saved=%" PRIu32 " rtc_time_diff=%" PRIu32 " " + "sys_time_saved=%" PRIu32 " sys_time_offset=%" PRIu32 "\n", __func__, + (uint32_t)_rtc_counter_saved, (uint32_t)_rtc_time_diff, + (uint32_t)_sys_counter_saved, (uint32_t)_sys_counter_offset); } static void IRAM _sys_isr(void *arg) { - uint32_t int_status; - - timer_hal_get_intr_status(&sys_timer, &int_status); - if (!(int_status & TIMER_SYSTEM_INT_MASK)) { + uint32_t int_status = timer_ll_get_intr_status(sys_timer.dev); + if (!(int_status & TIMER_LL_EVENT_ALARM(sys_timer.timer_id))) { /* return in case of another timer interrupt */ return; } /* disable alarms first */ - timer_hal_intr_disable(&sys_timer); - timer_hal_set_alarm_enable(&sys_timer, false); + timer_ll_enable_intr(sys_timer.dev, TIMER_LL_EVENT_ALARM(sys_timer.timer_id), false); + timer_ll_enable_alarm(sys_timer.dev, sys_timer.timer_id, false); /* clear the bit in interrupt status register */ - timer_hal_clear_intr_status(&sys_timer); + timer_ll_clear_intr_status(sys_timer.dev, TIMER_LL_EVENT_ALARM(sys_timer.timer_id)); /* save the lower 32 bit of the current counter value */ uint32_t counter = _sys_get_counter(); - DEBUG("%s %" PRIu32 "\n", __func__, counter); + DEBUG("%s %" PRIu32 " @sys_time=%" PRIu32 "\n", + __func__, counter, (uint32_t)system_get_time_64()); if (_sys_alarm.alarm_cb) { - DEBUG("%s alarm %" PRIu32 "\n", __func__, counter); + DEBUG("%s alarm %" PRIu32 " @sys_time=%" PRIu32 "\n", + __func__, counter, (uint32_t)system_get_time_64()); rtt_cb_t alarm_cb = _sys_alarm.alarm_cb; void *alarm_arg = _sys_alarm.alarm_arg; diff --git a/cpu/esp32/periph/sdmmc.c b/cpu/esp32/periph/sdmmc.c index e740100308..79759dd4fa 100644 --- a/cpu/esp32/periph/sdmmc.c +++ b/cpu/esp32/periph/sdmmc.c @@ -122,6 +122,8 @@ static void _isr_cd_pin(void *arg); static void _init(sdmmc_dev_t *sdmmc_dev) { + DEBUG("[sdmmc] %s", __func__); + esp32_sdmmc_dev_t *dev = container_of(sdmmc_dev, esp32_sdmmc_dev_t, sdmmc_dev); assert(dev); @@ -243,7 +245,7 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg, .data = 0, .datalen = 0, .blklen = 0, - .timeout_ms = 100, + .timeout_ms = 1000, }; switch (resp_type) { @@ -266,7 +268,7 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg, cmd.flags |= SCF_RSP_R5; break; case SDMMC_R6: - cmd.flags |= SCF_RSP_R7; + cmd.flags |= SCF_RSP_R6; break; case SDMMC_R7: cmd.flags |= SCF_RSP_R7; @@ -275,13 +277,13 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg, break; } + DEBUG("[sdmmc] %s dev=%p slot=%d op=%" PRIu32 " arg=%" PRIx32 " flags=%x\n", + __func__, dev, dev->config->slot, cmd.opcode, cmd.arg, cmd.flags); + esp_err_t res = sdmmc_host_do_transaction(dev->config->slot, &cmd); if (res) { return _esp_err_to_sdmmc_err_code(res); } - else if (cmd.error) { - return _esp_err_to_sdmmc_err_code(cmd.error); - } if ((resp_type == SDMMC_R1) || (resp_type == SDMMC_R1B)) { sdmmc_dev->status = cmd.response[0]; @@ -299,6 +301,28 @@ static int _send_cmd(sdmmc_dev_t *sdmmc_dev, sdmmc_cmd_t cmd_idx, uint32_t arg, } } + if (cmd.error) { +#if CPU_FAM_ESP32S3 + /* + * FIXME: + * The host controller triggers an invalid response error on ESP32-S3, + * although the response from the card is completely correct and is + * received completely by the host controller. The reason for this is + * not yet clear. The sequence of commands including all parameters + * sent to the host controller as well as the timing are exactly the + * same as in the IDF code. The initialization of the host controller + * is also exactly the same as in the IDF code. The problem only + * occurs with the ESP32-S3, but not with the ESP32. As a workaround, + * we ignore invalid response errors on ESP32-S3. + */ + if (cmd.error != ESP_ERR_INVALID_RESPONSE) { + return _esp_err_to_sdmmc_err_code(cmd.error); + } +#else + return _esp_err_to_sdmmc_err_code(cmd.error); +#endif + } + return 0; } @@ -385,7 +409,7 @@ static int _xfer_execute(sdmmc_dev_t *sdmmc_dev, sdmmc_xfer_desc_t *xfer, .data = xfer->write ? (void *)data_wr : data_rd, .datalen = xfer->block_num * xfer->block_size, .blklen = xfer->block_size, - .timeout_ms = xfer->write ? 2500 : 1000, // TODO + .timeout_ms = xfer->write ? 2500 : 1000, /* TODO */ }; if (done) { @@ -397,7 +421,25 @@ static int _xfer_execute(sdmmc_dev_t *sdmmc_dev, sdmmc_xfer_desc_t *xfer, return _esp_err_to_sdmmc_err_code(res); } else if (cmd.error) { +#ifdef CPU_FAM_ESP32S3 + /* + * FIXME: + * The host controller triggers an invalid response error on ESP32-S3, + * although the response from the card is completely correct and is + * received completely by the host controller. The reason for this is + * not yet clear. The sequence of commands including all parameters + * sent to the host controller as well as the timing are exactly the + * same as in the IDF code. The initialization of the host controller + * is also exactly the same as in the IDF code. The problem only + * occurs with the ESP32-S3, but not with the ESP32. As a workaround, + * we ignore invalid response errors on ESP32-S3. + */ + if (cmd.error != ESP_ERR_INVALID_RESPONSE) { + return _esp_err_to_sdmmc_err_code(cmd.error); + } +#else return _esp_err_to_sdmmc_err_code(cmd.error); +#endif } if (done) { diff --git a/cpu/esp32/periph/spi.c b/cpu/esp32/periph/spi.c index b218782486..a4b0400645 100644 --- a/cpu/esp32/periph/spi.c +++ b/cpu/esp32/periph/spi.c @@ -26,6 +26,10 @@ * @} */ +/* -Wsign-compare has to be deactivated in this file due to the comparison + * of int and size_t in spi_ll.h of the ESP-IDF */ +#pragma GCC diagnostic ignored "-Wsign-compare" + #include #include @@ -38,15 +42,15 @@ #include "periph/spi.h" #include "syscalls.h" -#include "driver/periph_ctrl.h" +#include "driver/gpio.h" #include "esp_attr.h" +#include "esp_cpu.h" +#include "esp_private/periph_ctrl.h" #include "esp_rom_gpio.h" #include "hal/spi_hal.h" #include "hal/spi_types.h" #include "soc/rtc.h" -#include "esp_idf_api/gpio.h" - #undef MHZ #include "macros/units.h" @@ -97,6 +101,15 @@ _Static_assert(SPI_NUMOF == ARRAY_SIZE(_spi), _Static_assert(SPI_NUMOF <= SPI_NUMOF_MAX, "Number of defined SPI devices is greater than the number of supported devices"); +#define PERIPH_SPI1_MODULE PERIPH_SPI_MODULE +#if defined(CPU_FAM_ESP32) +# define PERIPH_SPI2_MODULE PERIPH_HSPI_MODULE +# define PERIPH_SPI3_MODULE PERIPH_VSPI_MODULE +#elif defined(CPU_FAM_ESP32S2) +# define PERIPH_SPI2_MODULE PERIPH_FSPI_MODULE +# define PERIPH_SPI3_MODULE PERIPH_HSPI_MODULE +#endif + void IRAM_ATTR spi_init(spi_t bus) { DEBUG("%s bus=%u\n", __func__, bus); @@ -117,10 +130,27 @@ void IRAM_ATTR spi_init(spi_t bus) } /* enable (power on) the according SPI module */ - periph_module_enable(_spi[bus].periph->module); + if (spi_config[bus].ctrl == SPI1_HOST) { + periph_module_enable(PERIPH_SPI1_MODULE); + } +#if SOC_SPI_PERIPH_NUM > 1 + else if (spi_config[bus].ctrl == SPI2_HOST) { + periph_module_enable(PERIPH_SPI2_MODULE); + } +#endif +#if SOC_SPI_PERIPH_NUM > 2 + else if (spi_config[bus].ctrl == SPI3_HOST) { + periph_module_enable(PERIPH_SPI3_MODULE); + } +#endif + else { + assert(false); + } /* initialize SPI peripheral */ spi_ll_master_init(_spi[bus].periph->hw); + spi_ll_set_mosi_delay(_spi[bus].periph->hw, 0, 0); + spi_ll_apply_config(_spi[bus].periph->hw); /* bring the bus into a defined state (one-line mode) */ spi_ll_master_set_line_mode(_spi[bus].periph->hw, (spi_line_mode_t){ 1, 1, 1 }); @@ -241,22 +271,22 @@ void spi_deinit_pins(spi_t bus) _spi[bus].pins_initialized = false; if (gpio_is_valid(spi_config[bus].sck)) { - esp_idf_gpio_reset_pin(spi_config[bus].sck); + gpio_reset_pin(spi_config[bus].sck); gpio_set_pin_usage(spi_config[bus].sck, _GPIO); } if (gpio_is_valid(spi_config[bus].mosi)) { - esp_idf_gpio_reset_pin(spi_config[bus].mosi); + gpio_reset_pin(spi_config[bus].mosi); gpio_set_pin_usage(spi_config[bus].mosi, _GPIO); } if (gpio_is_valid(spi_config[bus].miso)) { - esp_idf_gpio_reset_pin(spi_config[bus].miso); + gpio_reset_pin(spi_config[bus].miso); gpio_set_pin_usage(spi_config[bus].miso, _GPIO); } if (gpio_is_valid(spi_config[bus].cs)) { - esp_idf_gpio_reset_pin(spi_config[bus].cs); + gpio_reset_pin(spi_config[bus].cs); gpio_set_pin_usage(spi_config[bus].cs, _GPIO); } @@ -332,6 +362,7 @@ void IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t cl } spi_ll_master_set_clock_by_reg(_spi[bus].periph->hw, &_spi[bus].timing.clock_reg); + spi_ll_apply_config(_spi[bus].periph->hw); #if defined(CPU_FAM_ESP32C3) || defined(CPU_FAM_ESP32S3) /* @@ -417,7 +448,8 @@ static void IRAM_ATTR _spi_transfer(uint8_t bus, spi_ll_write_buffer(_spi[bus].periph->hw, out ? out : _spi_empty_out, len << 3); /* start the transfer */ - spi_ll_master_user_start(_spi[bus].periph->hw); + spi_ll_apply_config(_spi[bus].periph->hw); + spi_ll_user_start(_spi[bus].periph->hw); /* wait until the transfer is finished */ while (spi_ll_get_running_cmd(_spi[bus].periph->hw)) {} diff --git a/cpu/esp32/periph/timer.c b/cpu/esp32/periph/timer.c index 579138f1c7..4e94a9b24b 100644 --- a/cpu/esp32/periph/timer.c +++ b/cpu/esp32/periph/timer.c @@ -26,14 +26,16 @@ */ #include "periph/timer.h" -#include "driver/periph_ctrl.h" #include "esp/common_macros.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" +#include "esp_cpu.h" +#include "esp_private/periph_ctrl.h" +#include "esp_rom_sys.h" #include "hal/timer_hal.h" +#include "hal/timer_ll.h" #include "rom/ets_sys.h" #include "soc/periph_defs.h" #include "soc/rtc.h" +#include "soc/timer_group_reg.h" #include "soc/timer_group_struct.h" #if __xtensa__ @@ -53,6 +55,12 @@ #ifndef MODULE_ESP_HW_COUNTER +/* for compatibility with older versions of ESP-IDF */ +#define TIMER_GROUP_0 0 +#define TIMER_GROUP_1 1 +#define TIMER_0 0 +#define TIMER_1 1 + /* hardware timer modules used */ /** @@ -81,51 +89,26 @@ * * 0 -> TMG1 timer 0 * - * PLEASE NOTE: Don't use ETS timer functions ets_timer_* in and this hardware + * PLEASE NOTE: Don't use ETS timer functions ets_timer_* and this hardware * timer implementation together! */ -#if defined(CPU_FAM_ESP32) - -#define HW_TIMER_CORRECTION (RTC_PLL_320M / CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) -#define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION << 1, 5)) - -#elif defined(CPU_FAM_ESP32C3) - -#define HW_TIMER_CORRECTION 10 -#define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION << 1, 5)) - -#elif defined(CPU_FAM_ESP32S2) - -#define HW_TIMER_CORRECTION (RTC_PLL_320M / CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ) -#define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION << 1, 5)) - -#elif defined(CPU_FAM_ESP32S3) - -#define HW_TIMER_CORRECTION (RTC_PLL_320M / CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ) -#define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION << 1, 5)) - -#else -#error "MCU implementation needed" -#endif - #define HW_TIMER_NUMOF ARRAY_SIZE(_timers_desc) #define HW_TIMER_CHANNELS 1 struct _hw_timer_t { - bool initialized; /* indicates whether timer is already initialized */ - bool started; /* indicates whether timer is already started */ - + bool initialized; /* indicates whether timer is already initialized */ timer_isr_ctx_t isr_ctx; /* registered ISR */ - timer_hal_context_t hw; /* timer hardware reference */ + gptimer_soc_handle_t group; /* timer group device */ + uint32_t index; /* timer index in timer group */ + uint32_t int_mask; /* timer interrupt bit mask in interrupt regs */ }; struct _hw_timer_desc_t { - uint8_t module; /* hardware module identifier */ - timer_group_t group; /* timer group identifier */ - timer_idx_t index; /* timer index in timer group */ - uint8_t int_mask; /* timer interrupt bit mask in interrupt regs */ - uint8_t int_src; /* timer interrupt source */ + uint8_t module; /* hardware module identifier */ + uint8_t group; /* timer group index */ + uint8_t index; /* timer index in timer group */ + uint8_t int_src; /* timer interrupt source */ }; static const struct _hw_timer_desc_t _timers_desc[] = @@ -135,21 +118,18 @@ static const struct _hw_timer_desc_t _timers_desc[] = .module = PERIPH_TIMG0_MODULE, .group = TIMER_GROUP_0, .index = TIMER_1, - .int_mask = BIT(TIMER_1), .int_src = ETS_TG0_T1_LEVEL_INTR_SOURCE, }, { .module = PERIPH_TIMG1_MODULE, .group = TIMER_GROUP_1, .index = TIMER_0, - .int_mask = BIT(TIMER_0), .int_src = ETS_TG1_T0_LEVEL_INTR_SOURCE, }, { .module = PERIPH_TIMG1_MODULE, .group = TIMER_GROUP_1, .index = TIMER_1, - .int_mask = BIT(TIMER_1), .int_src = ETS_TG1_T1_LEVEL_INTR_SOURCE, } #elif defined(CPU_FAM_ESP32C3) @@ -157,7 +137,6 @@ static const struct _hw_timer_desc_t _timers_desc[] = .module = PERIPH_TIMG1_MODULE, .group = TIMER_GROUP_1, .index = TIMER_0, - .int_mask = BIT(TIMER_0), .int_src = ETS_TG1_T0_LEVEL_INTR_SOURCE }, #else @@ -172,9 +151,10 @@ static inline uint32_t _timer_get_counter_lo(tim_t dev) { /* latch the current timer value and get current timer value */ uint64_t value; - timer_hal_get_counter_value(&_timers[dev].hw, &value); + timer_ll_trigger_soft_capture(_timers[dev].group, _timers[dev].index); + value = timer_ll_get_counter_value(_timers[dev].group, _timers[dev].index); - /* return high and low part of timer */ + /* return low part of thr timer */ return value; } @@ -185,7 +165,8 @@ void IRAM_ATTR _timer_int_handler(void* arg) /* since all timer interrupt sources are routed to the same cpu interrupt */ /* signal, we can't use arg to identify the timer which caused the it */ - irq_isr_enter(); + /* disable interrupts */ + int state = irq_disable (); for (unsigned dev = 0; dev < HW_TIMER_NUMOF; dev++) { /* iterate over all devices and check what interrupt flags are set */ @@ -193,26 +174,26 @@ void IRAM_ATTR _timer_int_handler(void* arg) if (!_timers[dev].initialized) { continue; } - uint32_t int_status; - timer_hal_get_intr_status(&_timers[dev].hw, &int_status); - if (int_status & _timers_desc[dev].int_mask) { + uint32_t int_status = timer_ll_get_intr_status(_timers[dev].group); + + if (int_status & _timers[dev].int_mask) { DEBUG("%s dev=%d\n", __func__, dev); /* disable alarms */ - timer_hal_set_alarm_enable(&_timers[dev].hw, false); + timer_ll_enable_alarm(_timers[dev].group, _timers[dev].index, false); /* disable interrupt source and clear the bit in interrupt status */ - timer_hal_set_level_int_enable(&_timers[dev].hw, false); - timer_hal_intr_disable(&_timers[dev].hw); - timer_hal_clear_intr_status(&_timers[dev].hw); + timer_ll_enable_intr(_timers[dev].group, _timers[dev].int_mask, false); + timer_ll_clear_intr_status(_timers[dev].group, _timers[dev].int_mask); /* execute the callback function */ _timers[dev].isr_ctx.cb(_timers[dev].isr_ctx.arg, 0); } } - irq_isr_exit(); + /* restore interrupts enabled state */ + irq_restore (state); } int timer_init(tim_t dev, uint32_t freq, timer_cb_t cb, void *arg) @@ -230,34 +211,36 @@ int timer_init(tim_t dev, uint32_t freq, timer_cb_t cb, void *arg) assert(cb != NULL); /* initialize timer data structure */ - _timers[dev].initialized = true; - _timers[dev].started = false; _timers[dev].isr_ctx.cb = cb; _timers[dev].isr_ctx.arg = arg; + _timers[dev].group = TIMER_LL_GET_HW(_timers_desc[dev].group); + _timers[dev].index = _timers_desc[dev].index; + _timers[dev].int_mask = TIMER_LL_EVENT_ALARM(_timers_desc[dev].index); /* route all timer interrupt sources to the same level type interrupt */ intr_matrix_set(PRO_CPU_NUM, _timers_desc[dev].int_src, CPU_INUM_TIMER); /* we have to enable therefore the interrupt here */ - intr_cntrl_ll_set_int_handler(CPU_INUM_TIMER, _timer_int_handler, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_TIMER)); + esp_cpu_intr_set_handler(CPU_INUM_TIMER, _timer_int_handler, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_TIMER)); /* enable TMG module */ periph_module_enable(_timers_desc[dev].module); /* hardware timer configuration */ - timer_hal_init(&_timers[dev].hw, _timers_desc[dev].group, _timers_desc[dev].index); + timer_ll_set_clock_source(_timers[dev].group, _timers[dev].index, GPTIMER_CLK_SRC_DEFAULT); + timer_ll_enable_clock(_timers[dev].group, _timers[dev].index, true); - timer_hal_set_counter_enable(&_timers[dev].hw, false); - timer_hal_set_counter_increase(&_timers[dev].hw, true); - timer_hal_set_divider(&_timers[dev].hw, clk_div); - timer_hal_set_auto_reload(&_timers[dev].hw, false); + timer_ll_enable_counter(_timers[dev].group, _timers[dev].index, false); + timer_ll_set_count_direction(_timers[dev].group, _timers[dev].index, GPTIMER_COUNT_UP); + timer_ll_set_clock_prescale(_timers[dev].group, _timers[dev].index, clk_div); + timer_ll_enable_auto_reload(_timers[dev].group, _timers[dev].index, false); /* disable alarm and interrupt source */ - timer_hal_set_alarm_enable(&_timers[dev].hw, false); - timer_hal_intr_disable(&_timers[dev].hw); - timer_hal_set_level_int_enable(&_timers[dev].hw, false); - timer_hal_set_edge_int_enable(&_timers[dev].hw, false); + timer_ll_enable_alarm(_timers[dev].group, _timers[dev].index, false); + timer_ll_enable_intr(_timers[dev].group, _timers[dev].int_mask, false); + + _timers[dev].initialized = true; /* start the timer */ timer_start(dev); @@ -279,31 +262,30 @@ int IRAM_ATTR timer_set(tim_t dev, int chn, unsigned int delta) int state = irq_disable (); /* disable alarms and interrupt source */ - timer_hal_set_alarm_enable(&_timers[dev].hw, false); - timer_hal_set_level_int_enable(&_timers[dev].hw, false); - timer_hal_intr_disable(&_timers[dev].hw); - - delta = (delta > HW_TIMER_DELTA_MIN) ? delta : HW_TIMER_DELTA_MIN; - delta = (delta > HW_TIMER_CORRECTION) ? delta - HW_TIMER_CORRECTION : HW_TIMER_CORRECTION; + timer_ll_enable_alarm(_timers[dev].group, _timers[dev].index, false); + timer_ll_enable_intr(_timers[dev].group, _timers[dev].int_mask, false); /* latch and read current timer value */ uint64_t alarm; - timer_hal_get_counter_value(&_timers[dev].hw, &alarm); + timer_ll_trigger_soft_capture(_timers[dev].group, _timers[dev].index); + alarm = timer_ll_get_counter_value(_timers[dev].group, _timers[dev].index); + + DEBUG("%s dev=%u channel=%d now=%" PRIu32" alarm=%" PRIu32 "\n", + __func__, dev, chn, (uint32_t)alarm, (uint32_t)alarm + delta); /* determine the alarm time and set the alarm */ alarm += delta; - timer_hal_set_alarm_value(&_timers[dev].hw, alarm); + timer_ll_set_alarm_value(_timers[dev].group, _timers[dev].index, alarm); /* enable alarms and interrupt sources */ - timer_hal_set_alarm_enable(&_timers[dev].hw, true); + timer_ll_enable_alarm(_timers[dev].group, _timers[dev].index, true); /* clear possible pending interrupts and enable interrupt source */ - timer_hal_set_level_int_enable(&_timers[dev].hw, true); - timer_hal_intr_enable(&_timers[dev].hw); - timer_hal_clear_intr_status(&_timers[dev].hw); + timer_ll_clear_intr_status(_timers[dev].group, _timers[dev].int_mask); + timer_ll_enable_intr(_timers[dev].group, _timers[dev].int_mask, true); /* enable the counter */ - timer_hal_set_counter_enable(&_timers[dev].hw, true); + timer_ll_enable_counter(_timers[dev].group, _timers[dev].index, true); /* restore interrupts enabled state */ irq_restore (state); @@ -329,12 +311,11 @@ int timer_clear(tim_t dev, int chn) } /* disable alarms */ - timer_hal_set_alarm_enable(&_timers[dev].hw, false); + timer_ll_enable_alarm(_timers[dev].group, _timers[dev].index, false); /* disable interrupt source and clear possible pending interrupts */ - timer_hal_set_level_int_enable(&_timers[dev].hw, false); - timer_hal_intr_disable(&_timers[dev].hw); - timer_hal_clear_intr_status(&_timers[dev].hw); + timer_ll_enable_intr(_timers[dev].group, _timers[dev].int_mask, false); + timer_ll_clear_intr_status(_timers[dev].group, _timers[dev].int_mask); return 0; } @@ -357,14 +338,14 @@ void IRAM_ATTR timer_start(tim_t dev) { DEBUG("%s dev=%u @%" PRIu32 "\n", __func__, dev, system_get_time()); assert(dev < HW_TIMER_NUMOF); - timer_hal_set_counter_enable(&_timers[dev].hw, true); + timer_ll_enable_counter(_timers[dev].group, _timers[dev].index, true); } void IRAM_ATTR timer_stop(tim_t dev) { - DEBUG("%s dev=%u\n", __func__, dev); + DEBUG("%s dev=%u @%" PRIu32 "\n", __func__, dev, system_get_time()); assert(dev < HW_TIMER_NUMOF); - timer_hal_set_counter_enable(&_timers[dev].hw, false); + timer_ll_enable_counter(_timers[dev].group, _timers[dev].index, false); } #else /* MODULE_ESP_HW_COUNTER */ @@ -397,17 +378,17 @@ void IRAM_ATTR timer_stop(tim_t dev) #if defined(CPU_FAM_ESP32) -#define HW_TIMER_CORRECTION (RTC_PLL_480M / CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) +#define HW_TIMER_CORRECTION (RTC_PLL_480M / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) #define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION, 5)) #elif defined(CPU_FAM_ESP32S2) -#define HW_TIMER_CORRECTION (RTC_PLL_480M / CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ) +#define HW_TIMER_CORRECTION (RTC_PLL_480M / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) #define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION, 5)) #elif defined(CPU_FAM_ESP32S3) -#define HW_TIMER_CORRECTION (RTC_PLL_480M / CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ) +#define HW_TIMER_CORRECTION (RTC_PLL_480M / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) #define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION, 5)) #else @@ -492,7 +473,6 @@ int timer_init (tim_t dev, uint32_t freq, timer_cb_t cb, void *arg) if (_timers[dev].initialized) { DEBUG("%s timer dev=%u is already initialized (used)\n", __func__, dev); - return -1; } _timers[dev].dev = dev; diff --git a/cpu/esp32/periph/uart.c b/cpu/esp32/periph/uart.c new file mode 100644 index 0000000000..2c9761fe26 --- /dev/null +++ b/cpu/esp32/periph/uart.c @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2025 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup cpu_esp32 + * @ingroup drivers_periph_uart + * @{ + * + * @file + * @brief Low-level UART functions required by ESP32x + * + * @author Gunar Schorcht + * + * @} + */ + +#include "periph/uart.h" + +#include "esp_err.h" +#include "esp_private/uart_share_hw_ctrl.h" +#include "hal/uart_ll.h" + +void uart_set_wakeup_threshold(uart_t uart, uint32_t threshold) +{ + assert(uart < SOC_UART_NUM); + + HP_UART_PAD_CLK_ATOMIC() { + uart_ll_set_wakeup_thrd(UART_LL_GET_HW(uart), threshold); + uart_ll_enable_pad_sleep_clock(UART_LL_GET_HW(uart), true); + } +} + +esp_err_t uart_wait_tx_idle_polling(uart_t uart) +{ + if (uart_ll_is_enabled(uart)) { + while (!uart_ll_is_tx_idle(UART_LL_GET_HW(uart))) { } + } + return ESP_OK; +} diff --git a/cpu/esp32/startup.c b/cpu/esp32/startup.c index 8c96a17caa..2f7a0b39f9 100644 --- a/cpu/esp32/startup.c +++ b/cpu/esp32/startup.c @@ -43,7 +43,6 @@ #include "periph/rtc.h" /* ESP-IDF headers */ -#include "driver/periph_ctrl.h" #include "esp_attr.h" #include "esp_clk_internal.h" #include "esp_heap_caps_init.h" @@ -53,17 +52,14 @@ #include "esp_rom_uart.h" #include "esp_sleep.h" #include "esp_timer.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "rom/cache.h" #include "rom/ets_sys.h" #include "rom/rtc.h" #include "rom/uart.h" -#include "soc/apb_ctrl_reg.h" -#include "soc/cpu.h" #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/rtc_cntl_struct.h" +#include "soc/syscon_reg.h" #include "soc/timer_group_struct.h" #if __xtensa__ @@ -73,8 +69,13 @@ #include "xtensa/xtensa_api.h" #endif +#if IS_USED(MODULE_ESP_IDF_SPI_FLASH) +#include "esp_private/spi_flash_os.h" +#include "esp_flash_internal.h" +#endif + #if IS_USED(MODULE_ESP_SPI_RAM) -#include "spiram.h" +#include "esp_private/esp_psram_extram.h" #endif #if IS_USED(MODULE_PUF_SRAM) @@ -134,6 +135,7 @@ esp_err_t esp_timer_impl_early_init(void) * This function is the entry point in the user application. It is called * after a CPU initialization to startup the system. */ + static NORETURN void IRAM system_startup_cpu0(void) { #if __xtensa__ @@ -150,6 +152,7 @@ static NORETURN void IRAM system_startup_cpu0(void) #if IS_USED(MODULE_ESP_IDF_HEAP) /* init heap */ heap_caps_init(); + heap_caps_enable_nonos_stack_heaps(); if (IS_ACTIVE(ENABLE_DEBUG)) { ets_printf("Heap free: %u byte\n", get_free_heap_size()); } @@ -163,7 +166,7 @@ static NORETURN void IRAM system_startup_cpu0(void) uart_system_init(); /* initialize stdio */ - esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM); + esp_rom_output_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM); early_init(); RESET_REASON reset_reason = rtc_get_reset_reason(PRO_CPU_NUM); @@ -250,9 +253,11 @@ static NORETURN void IRAM system_init (void) srand(hwrand()); /* add SPI RAM to heap if enabled */ -#if CONFIG_SPIRAM_SUPPORT && CONFIG_SPIRAM_BOOT_INIT - esp_spiram_init_cache(); - esp_spiram_add_to_heapalloc(); +#if CONFIG_SPIRAM && CONFIG_SPIRAM_BOOT_INIT + esp_psram_extram_add_to_heap_allocator(); +#if CONFIG_SPIRAM_USE_MALLOC + heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL); +#endif #endif /* print some infos */ @@ -304,11 +309,14 @@ static NORETURN void IRAM system_init (void) extern void board_init(void); board_init(); - /* route a software interrupt source to CPU as trigger for thread yields */ +#ifndef __XTENSA__ + /* route a software interrupt source to CPU as trigger for thread yields, + * we use an internal software interrupt on Xtensa-based ESP32x SoCs */ intr_matrix_set(PRO_CPU_NUM, ETS_FROM_CPU_INTR0_SOURCE, CPU_INUM_SOFTWARE); +#endif /* set thread yield handler and enable the software interrupt */ - intr_cntrl_ll_set_int_handler(CPU_INUM_SOFTWARE, thread_yield_isr, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_SOFTWARE)); + esp_cpu_intr_set_handler(CPU_INUM_SOFTWARE, thread_yield_isr, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_SOFTWARE)); /* initialize ESP system event loop */ extern void esp_event_handler_init(void); @@ -317,13 +325,29 @@ static NORETURN void IRAM system_init (void) /* initialize ESP-IDF timer task */ esp_timer_init(); +#if IS_USED(MODULE_ESP_IDF_SPI_FLASH) +#if CONFIG_SPI_FLASH_ROM_IMPL + spi_flash_rom_impl_init(); +#endif + + extern void spi_flash_init_lock(void); + + spi_flash_init_lock(); + spi_flash_guard_set(&g_flash_guard_default_ops); + + esp_err_t flash_ret = esp_flash_init_default_chip(); + (void)flash_ret; + assert(flash_ret == ESP_OK); +#endif /* MODULE_ESP_IDF_SPI_FLASH */ + /* starting RIOT */ #if IS_USED(MODULE_ESP_LOG_STARTUP) LOG_STARTUP("Starting RIOT kernel on PRO cpu\n"); - esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM); + esp_rom_output_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM); #else ets_printf("\n"); #endif + kernel_init(); UNREACHABLE(); } diff --git a/cpu/esp32/stdio_usb_serial_jtag/usb_serial_jtag.c b/cpu/esp32/stdio_usb_serial_jtag/usb_serial_jtag.c index d167fb93e9..fd54f2dc27 100644 --- a/cpu/esp32/stdio_usb_serial_jtag/usb_serial_jtag.c +++ b/cpu/esp32/stdio_usb_serial_jtag/usb_serial_jtag.c @@ -26,12 +26,13 @@ #include "irq_arch.h" #include "esp_attr.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" +#include "esp_cpu.h" #include "hal/usb_serial_jtag_ll.h" #include "soc/periph_defs.h" #include "rom/ets_sys.h" +#define USB_SERIAL_JTAG_PACKET_SZ_BYTES 64 + static tsrb_t serial_tx_rb; static uint8_t serial_tx_rb_buf[USB_SERIAL_JTAG_PACKET_SZ_BYTES]; @@ -98,18 +99,18 @@ static void _init(void) intr_matrix_set(PRO_CPU_NUM, ETS_USB_SERIAL_JTAG_INTR_SOURCE, CPU_INUM_SERIAL_JTAG); /* enable the CPU interrupt */ - intr_cntrl_ll_set_int_handler(CPU_INUM_SERIAL_JTAG, _serial_intr_handler, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_SERIAL_JTAG)); + esp_cpu_intr_set_handler(CPU_INUM_SERIAL_JTAG, _serial_intr_handler, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_SERIAL_JTAG)); #ifdef SOC_CPU_HAS_FLEXIBLE_INTC /* set interrupt level */ - intr_cntrl_ll_set_int_level(CPU_INUM_SERIAL_JTAG, 1); + esp_cpu_intr_set_priority(CPU_INUM_SERIAL_JTAG, 1); #endif } static void _detach(void) { - intr_cntrl_ll_disable_interrupts(BIT(CPU_INUM_SERIAL_JTAG)); + esp_cpu_intr_disable(BIT(CPU_INUM_SERIAL_JTAG)); } STDIO_PROVIDER(STDIO_ESP32_SERIAL_JTAG, _init, _detach, _write) diff --git a/cpu/esp32/syscalls.c b/cpu/esp32/syscalls.c index f8e9142d60..e3bb2c351b 100644 --- a/cpu/esp32/syscalls.c +++ b/cpu/esp32/syscalls.c @@ -32,10 +32,11 @@ #include "sys/lock.h" #include "timex.h" +#include "esp_cpu.h" +#include "esp_private/periph_ctrl.h" #include "esp_rom_caps.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" #include "hal/timer_hal.h" +#include "hal/timer_ll.h" #include "hal/wdt_hal.h" #include "hal/wdt_types.h" #include "rom/ets_sys.h" @@ -92,6 +93,28 @@ void heap_stats(void) _alloc + _free, _alloc, _free); } +#else /* IS_USED(MODULE_ESP_IDF_HEAP) */ + +void *heap_caps_malloc_prefer(size_t size, size_t num, ...) +{ + /* This function usually allocates a chunk of memory in descending order + * of the capabilities as defined in variable parameters. However, + * allocating memory according to given capabilities is only relevant + * if multiple heaps use memories of different capabalities, like the + * alignment, the memory type a.s.o. Since we only use embedded RAM with + * identical capabilities, we just map this function to the standard malloc. + */ + return malloc(size); +} + +void *heap_caps_aligned_calloc(size_t alignment, size_t n, size_t size, uint32_t caps) +{ + (void)alignment; + (void)caps; + + return calloc(n, size); +} + #endif /* IS_USED(MODULE_ESP_IDF_HEAP) */ /** @@ -193,10 +216,10 @@ static struct syscall_stub_table s_stub_table = { .__getreent = &__getreent, - ._malloc_r = &_malloc_r, - ._free_r = &_free_r, - ._realloc_r = &_realloc_r, - ._calloc_r = &_calloc_r, + ._malloc_r = (void * (*)(struct _reent *, size_t))&_malloc_r, + ._free_r = (void (*)(struct _reent *, void *))&_free_r, + ._realloc_r = (void * (*)(struct _reent *, void *, size_t))&_realloc_r, + ._calloc_r = (void * (*)(struct _reent *, size_t, size_t))&_calloc_r, ._sbrk_r = &_sbrk_r, ._system_r = (void*)&_no_sys_func, @@ -256,7 +279,7 @@ static struct syscall_stub_table s_stub_table = timer_hal_context_t sys_timer = { .dev = TIMER_LL_GET_HW(TIMER_SYSTEM_GROUP), - .idx = TIMER_SYSTEM_INDEX, + .timer_id = TIMER_SYSTEM_INDEX, }; #if defined(_RETARGETABLE_LOCKING) @@ -276,16 +299,123 @@ extern struct __lock __attribute__((alias("s_shared_mutex"))) __lock___tz_mutex; extern struct __lock __attribute__((alias("s_shared_mutex"))) __lock___dd_hash_mutex; extern struct __lock __attribute__((alias("s_shared_mutex"))) __lock___arc4random_mutex; -#endif +/* map newlib's `__retarget_*` functions to the existing `_lock_*` functions */ + +void __retarget_lock_init(_LOCK_T *lock) +{ + _lock_init(lock); +} + +extern void __retarget_lock_init_recursive(_LOCK_T *lock) +{ + _lock_init_recursive(lock); +} + +void __retarget_lock_close(_LOCK_T lock) +{ + _lock_close(&lock); +} + +void __retarget_lock_close_recursive(_LOCK_T lock) +{ + _lock_close_recursive(&lock); +} + +void __retarget_lock_acquire(_LOCK_T lock) +{ + if (lock == NULL) { + /* use the shared mutex if lock is NULL */ + lock = (_lock_t)&s_shared_mutex; + } + _lock_acquire(&lock); +} + +void __retarget_lock_acquire_recursive(_LOCK_T lock) +{ + if (lock == NULL) { + /* use the shared rmutex if lock is NULL */ + lock = (_lock_t)&s_shared_rmutex; + } + _lock_acquire_recursive(&lock); +} + +int __retarget_lock_try_acquire(_LOCK_T lock) +{ + if (lock == NULL) { + /* use the shared mutex if lock is NULL */ + lock = (_lock_t)&s_shared_mutex; + } + return _lock_try_acquire(&lock); +} + +int __retarget_lock_try_acquire_recursive(_LOCK_T lock) +{ + if (lock == NULL) { + /* use the shared rmutex if lock is NULL */ + lock = (_lock_t)&s_shared_rmutex; + } + return _lock_try_acquire_recursive(&lock); +} + +void __retarget_lock_release(_LOCK_T lock) +{ + if (lock == NULL) { + /* use the shared mutex if lock is NULL */ + lock = (_lock_t)&s_shared_mutex; + } + _lock_release(&lock); +} + +void __retarget_lock_release_recursive(_LOCK_T lock) +{ + if (lock == NULL) { + /* use the shared rmutex if lock is NULL */ + lock = (_lock_t)&s_shared_rmutex; + } + _lock_release(&lock); +} + +#endif /* _RETARGETABLE_LOCKING */ void IRAM syscalls_init_arch(void) { - /* initialize and enable the system timer in us (TMG0 is enabled by default) */ - timer_hal_init(&sys_timer, TIMER_SYSTEM_GROUP, TIMER_SYSTEM_INDEX); - timer_hal_set_divider(&sys_timer, rtc_clk_apb_freq_get() / MHZ); - timer_hal_set_counter_increase(&sys_timer, true); - timer_hal_set_auto_reload(&sys_timer, false); - timer_hal_set_counter_enable(&sys_timer, true); +#if 0 + /* In ESP-IDF, the newlibc functions in ROM are used that require some + * variables that have to be set to the shared mutex/rmutex. Since we + * don't use the newlib functions in ROM, we don't have to set these + * variables here for the moment + */ +#ifdef CONFIG_IDF_TARGET_ESP32 + /* Newlib 2.2.0 is used in ROM, the following lock symbols are defined: */ + extern _lock_t __sfp_lock; + __sfp_lock = (_lock_t) &s_shared_rmutex; + extern _lock_t __sinit_lock; + __sinit_lock = (_lock_t) &s_shared_rmutex; + extern _lock_t __env_lock_object; + __env_lock_object = (_lock_t) &s_shared_rmutex; + extern _lock_t __tz_lock_object; + __tz_lock_object = (_lock_t) &s_shared_rmutex; +#elif defined(CONFIG_IDF_TARGET_ESP32S2) + /* Newlib 3.0.0 is used in ROM, the following lock symbols are defined: */ + extern _lock_t __sinit_recursive_mutex; + __sinit_recursive_mutex = (_lock_t) &s_shared_rmutex; + extern _lock_t __sfp_recursive_mutex; + __sfp_recursive_mutex = (_lock_t) &s_shared_rmutex; +#endif +#endif + + /* initialize and enable the system timer in us */ + periph_module_enable(PERIPH_TIMG0_MODULE); + timer_ll_set_clock_source(sys_timer.dev, sys_timer.timer_id, GPTIMER_CLK_SRC_DEFAULT); + timer_ll_enable_clock(sys_timer.dev, sys_timer.timer_id, true); + timer_ll_set_clock_prescale(sys_timer.dev, sys_timer.timer_id, rtc_clk_apb_freq_get() / MHZ); + timer_ll_set_count_direction(sys_timer.dev, sys_timer.timer_id, GPTIMER_COUNT_UP); + timer_ll_enable_auto_reload(sys_timer.dev, sys_timer.timer_id, false); + timer_ll_enable_counter(sys_timer.dev, sys_timer.timer_id, true); + timer_ll_enable_alarm(sys_timer.dev, sys_timer.timer_id, false); +#if SOC_TIMER_SUPPORT_ETM + timer_ll_enable_etm(sys_timer.dev, true); +#endif #if defined(CPU_FAM_ESP32) syscall_table_ptr_pro = &s_stub_table; @@ -307,11 +437,10 @@ uint32_t system_get_time_ms(void) return system_get_time_64() / US_PER_MS; } -int64_t system_get_time_64(void) +uint64_t system_get_time_64(void) { - uint64_t ret; - timer_hal_get_counter_value(&sys_timer, &ret); - return ret; + timer_ll_trigger_soft_capture(sys_timer.dev, sys_timer.timer_id); + return timer_ll_get_counter_value(sys_timer.dev, sys_timer.timer_id); } wdt_hal_context_t mwdt; @@ -357,32 +486,23 @@ void system_wdt_init(void) wdt_hal_write_protect_enable(&mwdt); wdt_hal_write_protect_enable(&rwdt); -#if defined(CPU_FAM_ESP32) - DEBUG("%s TIMERG0 wdtconfig0=%08"PRIx32" wdtconfig1=%08"PRIx32 - " wdtconfig2=%08"PRIx32" wdtconfig3=%08"PRIx32 - " wdtconfig4=%08"PRIx32" regclk=%08"PRIx32"\n", __func__, - TIMERG0.wdt_config0.val, TIMERG0.wdt_config1.val, - TIMERG0.wdt_config2, TIMERG0.wdt_config3, - TIMERG0.wdt_config4, TIMERG0.clk.val); -#else DEBUG("%s TIMERG0 wdtconfig0=%08"PRIx32" wdtconfig1=%08"PRIx32 " wdtconfig2=%08"PRIx32" wdtconfig3=%08"PRIx32 " wdtconfig4=%08"PRIx32" regclk=%08"PRIx32"\n", __func__, TIMERG0.wdtconfig0.val, TIMERG0.wdtconfig1.val, TIMERG0.wdtconfig2.val, TIMERG0.wdtconfig3.val, TIMERG0.wdtconfig4.val, TIMERG0.regclk.val); -#endif /* route WDT peripheral interrupt source to CPU_INUM_WDT */ intr_matrix_set(PRO_CPU_NUM, ETS_TG0_WDT_LEVEL_INTR_SOURCE, CPU_INUM_WDT); /* set the interrupt handler and activate the interrupt */ - intr_cntrl_ll_set_int_handler(CPU_INUM_WDT, system_wdt_int_handler, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_WDT)); + esp_cpu_intr_set_handler(CPU_INUM_WDT, system_wdt_int_handler, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_WDT)); } void system_wdt_stop(void) { - intr_cntrl_ll_disable_interrupts(BIT(CPU_INUM_WDT)); + esp_cpu_intr_disable(BIT(CPU_INUM_WDT)); wdt_hal_write_protect_disable(&mwdt); wdt_hal_disable(&mwdt); wdt_hal_write_protect_enable(&mwdt); @@ -393,5 +513,16 @@ void system_wdt_start(void) wdt_hal_write_protect_disable(&mwdt); wdt_hal_enable(&mwdt); wdt_hal_write_protect_enable(&mwdt); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_WDT)); + esp_cpu_intr_enable(BIT(CPU_INUM_WDT)); } + +#ifndef MODULE_POSIX_SLEEP + +int usleep(useconds_t us) +{ + extern void esp_rom_delay_us(uint32_t us); + esp_rom_delay_us((uint32_t) us); + return 0; +} + +#endif diff --git a/cpu/esp32/usb_reset.c b/cpu/esp32/usb_reset.c index f3647f6edf..15aec846b8 100644 --- a/cpu/esp32/usb_reset.c +++ b/cpu/esp32/usb_reset.c @@ -22,7 +22,7 @@ * @} */ -#include "driver/periph_ctrl.h" +#include "esp_private/periph_ctrl.h" #include "rom/usb/chip_usb_dw_wrapper.h" #include "rom/usb/usb_persist.h" #include "soc/rtc_cntl_reg.h" diff --git a/cpu/esp32/vendor/include/esp_event_legacy.h b/cpu/esp32/vendor/include/esp_event_legacy.h new file mode 100644 index 0000000000..dbeeced674 --- /dev/null +++ b/cpu/esp32/vendor/include/esp_event_legacy.h @@ -0,0 +1,261 @@ +// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#include +#include + +#include "esp_err.h" +#include "esp_wifi_types.h" +#include "esp_netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** System event types enumeration */ +typedef enum { + SYSTEM_EVENT_WIFI_READY = 0, /*!< ESP32 WiFi ready */ + SYSTEM_EVENT_SCAN_DONE, /*!< ESP32 finish scanning AP */ + SYSTEM_EVENT_STA_START, /*!< ESP32 station start */ + SYSTEM_EVENT_STA_STOP, /*!< ESP32 station stop */ + SYSTEM_EVENT_STA_CONNECTED, /*!< ESP32 station connected to AP */ + SYSTEM_EVENT_STA_DISCONNECTED, /*!< ESP32 station disconnected from AP */ + SYSTEM_EVENT_STA_AUTHMODE_CHANGE, /*!< the auth mode of AP connected by ESP32 station changed */ + SYSTEM_EVENT_STA_GOT_IP, /*!< ESP32 station got IP from connected AP */ + SYSTEM_EVENT_STA_LOST_IP, /*!< ESP32 station lost IP and the IP is reset to 0 */ + SYSTEM_EVENT_STA_BSS_RSSI_LOW, /*!< ESP32 station connected BSS rssi goes below threshold */ + SYSTEM_EVENT_STA_WPS_ER_SUCCESS, /*!< ESP32 station wps succeeds in enrollee mode */ + SYSTEM_EVENT_STA_WPS_ER_FAILED, /*!< ESP32 station wps fails in enrollee mode */ + SYSTEM_EVENT_STA_WPS_ER_TIMEOUT, /*!< ESP32 station wps timeout in enrollee mode */ + SYSTEM_EVENT_STA_WPS_ER_PIN, /*!< ESP32 station wps pin code in enrollee mode */ + SYSTEM_EVENT_STA_WPS_ER_PBC_OVERLAP, /*!< ESP32 station wps overlap in enrollee mode */ + SYSTEM_EVENT_AP_START, /*!< ESP32 soft-AP start */ + SYSTEM_EVENT_AP_STOP, /*!< ESP32 soft-AP stop */ + SYSTEM_EVENT_AP_STACONNECTED, /*!< a station connected to ESP32 soft-AP */ + SYSTEM_EVENT_AP_STADISCONNECTED, /*!< a station disconnected from ESP32 soft-AP */ + SYSTEM_EVENT_AP_STAIPASSIGNED, /*!< ESP32 soft-AP assign an IP to a connected station */ + SYSTEM_EVENT_AP_PROBEREQRECVED, /*!< Receive probe request packet in soft-AP interface */ + SYSTEM_EVENT_ACTION_TX_STATUS, /*!< Receive status of Action frame transmitted */ + SYSTEM_EVENT_ROC_DONE, /*!< Indicates the completion of Remain-on-Channel operation status */ + SYSTEM_EVENT_STA_BEACON_TIMEOUT, /*!< ESP32 station beacon timeout */ + SYSTEM_EVENT_FTM_REPORT, /*!< Receive report of FTM procedure */ + SYSTEM_EVENT_GOT_IP6, /*!< ESP32 station or ap or ethernet interface v6IP addr is preferred */ + SYSTEM_EVENT_ETH_START, /*!< ESP32 ethernet start */ + SYSTEM_EVENT_ETH_STOP, /*!< ESP32 ethernet stop */ + SYSTEM_EVENT_ETH_CONNECTED, /*!< ESP32 ethernet phy link up */ + SYSTEM_EVENT_ETH_DISCONNECTED, /*!< ESP32 ethernet phy link down */ + SYSTEM_EVENT_ETH_GOT_IP, /*!< ESP32 ethernet got IP from connected AP */ + SYSTEM_EVENT_ETH_LOST_IP, /*!< ESP32 ethernet lost IP and the IP is reset to 0 */ + SYSTEM_EVENT_MAX /*!< Number of members in this enum */ +} system_event_id_t; + +/* add this macro define for compatible with old IDF version */ +#ifndef SYSTEM_EVENT_AP_STA_GOT_IP6 +#define SYSTEM_EVENT_AP_STA_GOT_IP6 SYSTEM_EVENT_GOT_IP6 +#endif + + +/** Argument structure of SYSTEM_EVENT_STA_WPS_ER_FAILED event */ +typedef wifi_event_sta_wps_fail_reason_t system_event_sta_wps_fail_reason_t; + +/** Argument structure of SYSTEM_EVENT_SCAN_DONE event */ +typedef wifi_event_sta_scan_done_t system_event_sta_scan_done_t; + +/** Argument structure of SYSTEM_EVENT_STA_CONNECTED event */ +typedef wifi_event_sta_connected_t system_event_sta_connected_t; + +/** Argument structure of SYSTEM_EVENT_STA_DISCONNECTED event */ +typedef wifi_event_sta_disconnected_t system_event_sta_disconnected_t; + +/** Argument structure of SYSTEM_EVENT_STA_AUTHMODE_CHANGE event */ +typedef wifi_event_sta_authmode_change_t system_event_sta_authmode_change_t; + +/** Argument structure of SYSTEM_EVENT_STA_WPS_ER_PIN event */ +typedef wifi_event_sta_wps_er_pin_t system_event_sta_wps_er_pin_t; + +/** Argument structure of SYSTEM_EVENT_STA_WPS_ER_PIN event */ +typedef wifi_event_sta_wps_er_success_t system_event_sta_wps_er_success_t; + +/** Argument structure of event */ +typedef wifi_event_ap_staconnected_t system_event_ap_staconnected_t; + +/** Argument structure of event */ +typedef wifi_event_ap_stadisconnected_t system_event_ap_stadisconnected_t; + +/** Argument structure of event */ +typedef wifi_event_ap_probe_req_rx_t system_event_ap_probe_req_rx_t; + +/** Argument structure of SYSTEM_EVENT_FTM_REPORT event */ +typedef wifi_event_ftm_report_t system_event_ftm_report_t; + +/** Argument structure of event */ +typedef ip_event_ap_staipassigned_t system_event_ap_staipassigned_t; + +/** Argument structure of event */ +typedef ip_event_got_ip_t system_event_sta_got_ip_t; + +/** Argument structure of event */ +typedef ip_event_got_ip6_t system_event_got_ip6_t; + +/** Union of all possible system_event argument structures */ +typedef union { + system_event_sta_connected_t connected; /*!< ESP32 station connected to AP */ + system_event_sta_disconnected_t disconnected; /*!< ESP32 station disconnected to AP */ + system_event_sta_scan_done_t scan_done; /*!< ESP32 station scan (APs) done */ + system_event_sta_authmode_change_t auth_change; /*!< the auth mode of AP ESP32 station connected to changed */ + system_event_sta_got_ip_t got_ip; /*!< ESP32 station got IP, first time got IP or when IP is changed */ + system_event_sta_wps_er_pin_t sta_er_pin; /*!< ESP32 station WPS enrollee mode PIN code received */ + system_event_sta_wps_fail_reason_t sta_er_fail_reason; /*!< ESP32 station WPS enrollee mode failed reason code received */ + system_event_sta_wps_er_success_t sta_er_success; /*!< ESP32 station WPS enrollee success */ + system_event_ap_staconnected_t sta_connected; /*!< a station connected to ESP32 soft-AP */ + system_event_ap_stadisconnected_t sta_disconnected; /*!< a station disconnected to ESP32 soft-AP */ + system_event_ap_probe_req_rx_t ap_probereqrecved; /*!< ESP32 soft-AP receive probe request packet */ + system_event_ftm_report_t ftm_report; /*!< Report of FTM procedure */ + system_event_ap_staipassigned_t ap_staipassigned; /**< ESP32 soft-AP assign an IP to the station*/ + system_event_got_ip6_t got_ip6; /*!< ESP32 station　or ap or ethernet ipv6 addr state change to preferred */ +} system_event_info_t; + +/** Event, as a tagged enum */ +typedef struct { + system_event_id_t event_id; /*!< event ID */ + system_event_info_t event_info; /*!< event information */ +} system_event_t; + +/** Event handler function type */ +typedef esp_err_t (*system_event_handler_t)(esp_event_base_t event_base, + int32_t event_id, + void* event_data, + size_t event_data_size, + TickType_t ticks_to_wait); + +/** + * @brief Send a event to event task + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + * + * Other task/modules, such as the tcpip_adapter, can call this API to send an event to event task + * + * @param event Event to send + * + * @return ESP_OK : succeed + * @return others : fail + */ +esp_err_t esp_event_send(system_event_t *event) __attribute__ ((deprecated)); + +/** + * @brief Send a event to event task + * + * @note This API is used by WiFi Driver only. + * + * Other task/modules, such as the tcpip_adapter, can call this API to send an event to event task + * + * @param[in] event_base the event base that identifies the event + * @param[in] event_id the event id that identifies the event + * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler + * @param[in] event_data_size the size of the event data + * @param[in] ticks_to_wait number of ticks to block on a full event queue + * + * @return ESP_OK : succeed + * @return others : fail + */ +esp_err_t esp_event_send_internal(esp_event_base_t event_base, + int32_t event_id, + void* event_data, + size_t event_data_size, + TickType_t ticks_to_wait); + +/** + * @brief Default event handler for system events + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + * + * This function performs default handling of system events. + * When using esp_event_loop APIs, it is called automatically before invoking the user-provided + * callback function. + * + * Applications which implement a custom event loop must call this function + * as part of event processing. + * + * @param event pointer to event to be handled + * @return ESP_OK if an event was handled successfully + */ +esp_err_t esp_event_process_default(system_event_t *event) __attribute__ ((deprecated)); + +/** + * @brief Install default event handlers for Ethernet interface + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + * + */ +void esp_event_set_default_eth_handlers(void); + +/** + * @brief Install default event handlers for Wi-Fi interfaces (station and AP) + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + */ +void esp_event_set_default_wifi_handlers(void) __attribute__ ((deprecated)); + +/** + * @brief Application specified event callback function + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + * + * + * @param ctx reserved for user + * @param event event type defined in this file + * + * @return + * - ESP_OK: succeed + * - others: fail + */ +typedef esp_err_t (*system_event_cb_t)(void *ctx, system_event_t *event); + +/** + * @brief Initialize event loop + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + * + * Create the event handler and task + * + * @param cb application specified event callback, it can be modified by call esp_event_set_cb + * @param ctx reserved for user + * + * @return + * - ESP_OK: succeed + * - others: fail + */ +esp_err_t esp_event_loop_init(system_event_cb_t cb, void *ctx) __attribute__ ((deprecated)); + +/** + * @brief Set application specified event callback function + * + * @note This API is part of the legacy event system. New code should use event library API in esp_event.h + * + * @attention 1. If cb is NULL, means application don't need to handle + * If cb is not NULL, it will be call when an event is received, after the default event callback is completed + * + * @param cb application callback function + * @param ctx argument to be passed to callback + * + * + * @return old callback + */ +system_event_cb_t esp_event_loop_set_cb(system_event_cb_t cb, void *ctx) __attribute__ ((deprecated)); + +#ifdef __cplusplus +} +#endif diff --git a/cpu/esp32/vendor/ld/elf_misc.ld.in b/cpu/esp32/vendor/ld/elf_misc.ld.in new file mode 100644 index 0000000000..5f15c0a8f7 --- /dev/null +++ b/cpu/esp32/vendor/ld/elf_misc.ld.in @@ -0,0 +1,88 @@ +#include "sdkconfig.h" + + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + /* DWARF 3 */ + .debug_ranges 0 : { *(.debug_ranges) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* GNU DWARF 2 extensions */ + .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) } + .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) } + /* DWARF 4 */ + .debug_types 0 : { *(.debug_types) } + /* DWARF 5 */ + .debug_addr 0 : { *(.debug_addr) } + .debug_line_str 0 : { *(.debug_line_str) } + .debug_loclists 0 : { *(.debug_loclists) } + .debug_macro 0 : { *(.debug_macro) } + .debug_names 0 : { *(.debug_names) } + .debug_rnglists 0 : { *(.debug_rnglists) } + .debug_str_offsets 0 : { *(.debug_str_offsets) } + + .comment 0 : { *(.comment) } + .note.GNU-stack 0: { *(.note.GNU-stack) } + +#if CONFIG_IDF_TARGET_ARCH_RISCV + .riscv.attributes 0: { *(.riscv.attributes) } + + /DISCARD/ : + { + /** + * Discarding .rela.* sections results in the following mapping: + * .rela.text.* -> .text.* + * .rela.data.* -> .data.* + * And so forth... + */ + *(.rela.*) + *(.got .got.plt) /* TODO: GCC-382 */ +#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME) + *(.eh_frame_hdr) + *(.eh_frame) +#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME) + } +#elif CONFIG_IDF_TARGET_ARCH_XTENSA +/** + * .xt.prop and .xt.lit sections will be used by the debugger and disassembler + * to get more information about raw data present in the code. + * Indeed, it may be required to add some padding at some points in the code + * in order to align a branch/jump destination on a particular bound. + * Padding these instructions will generate null bytes that shall be + * interpreted as data, and not code by the debugger or disassembler. + * This section will only be present in the ELF file, not in the final binary + * For more details, check GCC-212 + */ + .xtensa.info 0: { *(.xtensa.info) } + .xt.prop 0 : { *(.xt.prop .xt.prop.* .gnu.linkonce.prop.*) } + .xt.lit 0 : { *(.xt.lit .xt.lit.* .gnu.linkonce.p.*) } + + /DISCARD/ : + { + *(.fini) + *(.eh_frame_hdr) +#if !CONFIG_COMPILER_CXX_EXCEPTIONS + *(.eh_frame) +#endif // !CONFIG_COMPILER_CXX_EXCEPTIONS + } +#else + #error "Target architecture is not supported!" +#endif diff --git a/cpu/esp32/ld/esp32/memory.ld.in b/cpu/esp32/vendor/ld/esp32/memory.ld.in similarity index 69% rename from cpu/esp32/ld/esp32/memory.ld.in rename to cpu/esp32/vendor/ld/esp32/memory.ld.in index 3bc5a602e3..e0b2517ff8 100644 --- a/cpu/esp32/ld/esp32/memory.ld.in +++ b/cpu/esp32/vendor/ld/esp32/memory.ld.in @@ -27,14 +27,6 @@ #define CONFIG_BTDM_RESERVE_DRAM 0 #endif -#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE) -#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP) -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE) -#else -#define ESP_BOOTLOADER_RESERVE_RTC 0 -#endif - #if defined(CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE) ASSERT((CONFIG_ESP32_FIXED_STATIC_RAM_SIZE <= 0x2c200), @@ -46,6 +38,13 @@ ASSERT((CONFIG_ESP32_FIXED_STATIC_RAM_SIZE <= 0x2c200), #define DRAM0_0_SEG_LEN 0x2c200 #endif +#if CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM +#define SRAM1_IRAM_LEN 0xA000 +#else +#define SRAM1_IRAM_LEN 0x0 +#endif + + MEMORY { /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length @@ -53,7 +52,7 @@ MEMORY are connected to the data port of the CPU and eg allow bytewise access. */ /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + SRAM1_IRAM_LEN #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Even though the segment name is iram, it is actually mapped to flash @@ -84,31 +83,43 @@ MEMORY #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ -#ifdef MODULE_PERIPH_FLASHPAGE - drom0_0_seg (R) : org = 0x3F400020, - len = 0x400000 - 0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY - drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), - len = CONFIG_ESP_FLASHPAGE_CAPACITY -#else drom0_0_seg (R) : org = 0x3F400020, len = 0x400000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ -#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS - /* RTC fast memory (executable). Persists over deep sleep. - */ - rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 + /* RTC fast memory (executable). Persists over deep sleep. */ + rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC - /* RTC fast memory (same block as above), viewed from data bus */ + /* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */ rtc_data_seg(RW) : org = 0x3ff80000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC + /* We reduced the size of rtc_iram_seg and rtc_data_seg by ESP_BOOTLOADER_RESERVE_RTC value. + It reserves the amount of RTC fast memory that we use for this memory segment. + This segment is intended for keeping bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on). + The aim of this is to keep data that will not be moved around and have a fixed address. + org = 0x3ff80000 + 0x2000 - ESP_BOOTLOADER_RESERVE_RTC == SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t) + */ + rtc_fast_reserved_seg(RW) : org = 0x3ff80000 + 0x2000 - ESP_BOOTLOADER_RESERVE_RTC, len = ESP_BOOTLOADER_RESERVE_RTC + /* RTC slow memory (data accessible). Persists over deep sleep. Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. */ - rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM, - len = 0x2000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM +#if CONFIG_ULP_COPROC_ENABLED + rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM, + len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM - RESERVE_RTC_MEM +#else + rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000 - RESERVE_RTC_MEM +#endif // CONFIG_ULP_COPROC_ENABLED + + /* We reduced the size of rtc_slow_seg by RESERVE_RTC_MEM value. + It reserves the amount of RTC slow memory that we use for this memory segment. + This segment is intended for keeping rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). + The aim of this is to keep data that will not be moved around and have a fixed address. + org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM + */ + rtc_slow_reserved_seg(RW) : org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM /* external memory */ extern_ram_seg(RWX) : org = 0x3F800000, @@ -117,13 +128,19 @@ MEMORY #if defined(CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE) /* static data ends at defined address */ -_static_data_end = 0x3FFB0000 + DRAM0_0_SEG_LEN; +_heap_start = 0x3FFB0000 + DRAM0_0_SEG_LEN; #else -_static_data_end = _bss_end; +_heap_start = _heap_low_start; #endif -/* Heap ends at top of dram0_0_seg */ +_sram1_iram_start = 0x400A0000; +_sram1_iram_len = ( _iram_end > _sram1_iram_start) ? (_iram_end - _sram1_iram_start) : 0; +_heap_end = ALIGN(0x40000000 - _sram1_iram_len - 3, 4); + +#if CONFIG_ESP32_TRACEMEM_RESERVE_DRAM != 0 _heap_end = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM; +#endif + _data_seg_org = ORIGIN(rtc_data_seg); diff --git a/cpu/esp32/vendor/ld/esp32/sections.ld.in b/cpu/esp32/vendor/ld/esp32/sections.ld.in new file mode 100644 index 0000000000..bedd7b692f --- /dev/null +++ b/cpu/esp32/vendor/ld/esp32/sections.ld.in @@ -0,0 +1,793 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ld.common" + +/* Default entry point */ +ENTRY(call_start_cpu0); + +SECTIONS +{ + /** + * RTC fast memory holds RTC wake stub code, + * including from any source file named rtc_wake_stub*.c + */ + .rtc.text : + { + ALIGNED_SYMBOL(4, _rtc_text_start) + + *(.rtc.literal .rtc.text .rtc.text.*) + + *rtc_wake_stub*.*(.literal .text .literal.* .text.*) + + _rtc_text_end = ABSOLUTE(.); + } > rtc_iram_seg + + /** + * This section is required to skip rtc.text area because rtc_iram_seg and + * rtc_data_seg are reflect the same address space on different buses. + */ + .rtc.dummy : + { + _rtc_dummy_start = ABSOLUTE(.); + _rtc_fast_start = ABSOLUTE(.); + + . = SIZEOF(.rtc.text); + + _rtc_dummy_end = ABSOLUTE(.); + } > rtc_data_seg + + /** + * This section located in RTC FAST Memory area. + * It holds data marked with RTC_FAST_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_fast : + { + ALIGNED_SYMBOL(4, _rtc_force_fast_start) + + _coredump_rtc_fast_start = ABSOLUTE(.); + *(.rtc.fast.coredump .rtc.fast.coredump.*) + _coredump_rtc_fast_end = ABSOLUTE(.); + + *(.rtc.force_fast .rtc.force_fast.*) + + ALIGNED_SYMBOL(4, _rtc_force_fast_end) + } > rtc_data_seg + + /** + * RTC data section holds RTC wake stub + * data/rodata, including from any source file + * named rtc_wake_stub*.c and the data marked with + * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. + * The memory location of the data is dependent on + * CONFIG_ESP32_RTCDATA_IN_FAST_MEM option. + */ + .rtc.data : + { + _rtc_data_start = ABSOLUTE(.); + + _coredump_rtc_start = ABSOLUTE(.); + *(.rtc.coredump .rtc.coredump.*) + _coredump_rtc_end = ABSOLUTE(.); + + *(.rtc.data .rtc.data.*) + *(.rtc.rodata .rtc.rodata.*) + + *rtc_wake_stub*.*(.data .rodata .data.* .rodata.*) + + _rtc_data_end = ABSOLUTE(.); + } > rtc_data_location + + /* RTC bss, from any source file named rtc_wake_stub*.c */ + .rtc.bss (NOLOAD) : + { + _rtc_bss_start = ABSOLUTE(.); + + *rtc_wake_stub*.*(.bss .bss.*) + *rtc_wake_stub*.*(COMMON) + + _rtc_bss_end = ABSOLUTE(.); + + /* part that saves some data for rtc periph module, this part is + only initialized at power on reset */ + _rtc_bss_rtc_start = ABSOLUTE(.); + *(.rtc.bss .rtc.bss.*) + _rtc_bss_rtc_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section holds data that should not be initialized at power up + * and will be retained during deep sleep. + * User data marked with RTC_NOINIT_ATTR will be placed + * into this section. See the file "esp_attr.h" for more information. + * The memory location of the data is dependent on + * CONFIG_ESP32_RTCDATA_IN_FAST_MEM option. + */ + .rtc_noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_noinit_start) + + *(.rtc_noinit .rtc_noinit.*) + + ALIGNED_SYMBOL(4, _rtc_noinit_end) + } > rtc_data_location + + /** + * This section located in RTC SLOW Memory area. + * It holds data marked with RTC_SLOW_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_slow : + { + ALIGNED_SYMBOL(4, _rtc_force_slow_start) + + *(.rtc.force_slow .rtc.force_slow.*) + + ALIGNED_SYMBOL(4, _rtc_force_slow_end) + } > rtc_slow_seg + + /** + * This section holds RTC FAST data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep + * sleep. + */ + .rtc_fast_reserved (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_fast_reserved_start) + + /** + * New data can only be added here to ensure existing data are not moved. + * Because data have adhered to the end of the segment and code is relied + * on it. + * >> put new data here << + */ + + KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + + _rtc_fast_reserved_end = ABSOLUTE(.); + } > rtc_fast_reserved_seg + + _rtc_fast_reserved_length = _rtc_fast_reserved_end - _rtc_fast_reserved_start; + ASSERT((_rtc_fast_reserved_length <= LENGTH(rtc_fast_reserved_seg)), + "RTC FAST reserved segment data does not fit.") + + /** + * This section holds RTC SLOW data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep + * sleep. + */ + .rtc_slow_reserved (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_slow_reserved_start) + + /** + * New data can only be added here to ensure existing data are not moved. + * Because data have adhered to the end of the segment and code is relied + * on it. + * >> put new data here << + */ + + *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) + + _rtc_slow_reserved_end = ABSOLUTE(.); + } > rtc_slow_reserved_seg + + _rtc_slow_reserved_length = _rtc_slow_reserved_end - _rtc_slow_reserved_start; + _rtc_reserved_length = _rtc_slow_reserved_length; + ASSERT((_rtc_slow_reserved_length <= LENGTH(rtc_slow_reserved_seg)), + "RTC SLOW reserved segment data does not fit.") + + /* Get size of rtc slow data based on rtc_data_location alias */ + _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_slow_end - _rtc_data_start) + : (_rtc_force_slow_end - _rtc_force_slow_start); + + _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_fast_end - _rtc_fast_start) + : (_rtc_noinit_end - _rtc_fast_start); + + ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), + "RTC_SLOW segment data does not fit.") + + ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), + "RTC_FAST segment data does not fit.") + + /* Send .iram0 code to iram */ + .iram0.vectors : + { + _iram_start = ABSOLUTE(.); + /* Vectors go to IRAM */ + _vector_table = ABSOLUTE(.); + . = 0x0; + KEEP(*(.WindowVectors.text)); + . = 0x180; + KEEP(*(.Level2InterruptVector.text)); + . = 0x1c0; + KEEP(*(.Level3InterruptVector.text)); + . = 0x200; + KEEP(*(.Level4InterruptVector.text)); + . = 0x240; + KEEP(*(.Level5InterruptVector.text)); + . = 0x280; + KEEP(*(.DebugExceptionVector.text)); + . = 0x2c0; + KEEP(*(.NMIExceptionVector.text)); + . = 0x300; + KEEP(*(.KernelExceptionVector.text)); + . = 0x340; + KEEP(*(.UserExceptionVector.text)); + . = 0x3C0; + KEEP(*(.DoubleExceptionVector.text)); + . = 0x400; + _invalid_pc_placeholder = ABSOLUTE(.); + *(.*Vector.literal) + + *(.UserEnter.literal); + *(.UserEnter.text); + . = ALIGN (16); + *(.entry.literal) + *(.entry.text) + *(.init.literal) + *(.init) + + _init_end = ABSOLUTE(.); + } > iram0_0_seg + + /* If Bluetooth is not used, this DRAM section can be used as heap */ + . = _data_start_btdm; /* 0x3ffae6e0 */ + . = ALIGN (4); + _sheap1 = ABSOLUTE(.); + . = 0x3ffb0000; + _eheap1 = ABSOLUTE(.); + + .iram0.text : + { + /* Code marked as running out of IRAM */ + _iram_text_start = ABSOLUTE(.); + + *(.iram1 .iram1.*) + + /* Xtensa basic functionality written in assembler should be placed in IRAM */ + *xtensa/*(.literal .text .literal.* .text.*) + + /* parts of RIOT that should run in IRAM */ + *core/*(.literal .text .literal.* .text.*) + *core_lib/*(.literal .text .literal.* .text.*) + *esp_common_periph/flash.*(.literal .text .literal.* .text.*) + *esp_common/thread_arch.*(.literal .text .literal.* .text.*) + *esp_freertos_common/*(.literal .text .literal.* .text.*) + *isrpipe/*(.literal .text .literal.* .text.*) + *stdio/stdio.*(.literal .text .literal.* .text.*) + *stdio_*/stdio*(.literal .text .literal.* .text.*) + *syscalls.*(.literal .text .literal.* .text.*) + *tsrb/*(.literal .text .literal.* .text.*) + + /* parts of ESP-IDF that should run in IRAM */ + /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ + /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ + *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) + *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) + *components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*) + *components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr) + *components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_reset .text.spi_dma_reset) + *components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_start .text.spi_dma_start) + *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) + *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr) + *components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.pedwriph_module_reset) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable) + *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config) + *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) + *components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/rtc_wdt.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable) + *components/esp_mm/cache_esp32.*(.literal .literal.* .text .text.*) + *components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*) + *components/esp_psram/*/esp_psram_impl_*(.literal .literal.* .text .text.*) + *components/esp_psram/mmu_psram_flash*(.literal .literal.* .text .text.*) + *components/esp_ringbuf/*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*) + *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) + *components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort) + *components/esp_system/port/image_process.*(.literal .literal.* .text .text.*) + *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) + *components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap) + + *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) + *libgcov.a:(.literal .literal.* .text .text.*) + *libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*) + + *components/hal/esp32/cache_hal_esp32.*(.literal .literal.* .text .text.*) + *components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep) + *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/mmu_hal.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value) + *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) + *components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs) + *components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block) + *components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block) + *components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock) + *components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock) + *components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free) + *components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock) + *tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead) + *tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size) + *tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free) + *tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool) + *tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc) + *tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign) + *tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs) + *tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc) + *tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size) + *components/log/*/log_lock.*(.literal .literal.* .text .text.*) + *components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write) + + *libnet80211.a:(.wifi0iram .wifi0iram.*) + *libnet80211.a:(.wifirxiram .wifirxiram.*) + *libnet80211.a:(.wifislprxiram .wifislprxiram.*) + + *components/newlib/abort.*(.literal .literal.* .text .text.*) + *components/newlib/assert.*(.literal .literal.* .text .text.*) + *components/newlib/heap.*(.literal .literal.* .text .text.*) + *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) + + *libpp.a:(.wifi0iram .wifi0iram.*) + *libpp.a:(.wifiorslpiram .wifiorslpiram.*) + *libpp.a:(.wifirxiram .wifirxiram.*) + *libpp.a:(.wifislprxiram .wifislprxiram.*) + *librtc.a:(.literal .literal.* .text .text.*) + + *components/soc/lldesc.*(.literal .literal.* .text .text.*) + *components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*) + *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*) + + *libxt_hal.a:(.literal .literal.* .text .text.*) + + *components/xtensa/*(.literal .literal.* .text .text.*) + + } > iram0_0_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + KEEP (*(SORT(.xfa.*))) + *(.gnu.linkonce.s.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + + *(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*) + *(.data .data.*) + *(.dram1 .dram1.*) + + _coredump_dram_start = ABSOLUTE(.); + *(.dram2.coredump .dram2.coredump.*) + _coredump_dram_end = ABSOLUTE(.); + + *components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _bt_data_start = ABSOLUTE(.); + *libbt.a:(.data .data.*) + . = ALIGN(4); + _bt_data_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_data_start = ABSOLUTE(.); + *libbtdm_app.a:(.data .data.*) + . = ALIGN(4); + _bt_controller_data_end = ABSOLUTE(.); + + *components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_mm/cache_esp32.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_psram/*/esp_psram_impl_*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_psram/mmu_psram_flash*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/hal/esp32/cache_hal_esp32.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/wdt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/log/*/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _nimble_data_start = ABSOLUTE(.); + *libnimble.a:(.data .data.*) + . = ALIGN(4); + _nimble_data_end = ABSOLUTE(.); + *libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _data_end = ABSOLUTE(.); + } > dram0_0_seg + + /** + * This section holds data that won't be initialised when startup. + * This section locates in External RAM region. + */ + .ext_ram_noinit (NOLOAD) : + { + _ext_ram_noinit_start = ABSOLUTE(.); + + *(.ext_ram_noinit*) + + ALIGNED_SYMBOL(4, _ext_ram_noinit_end) + } > extern_ram_seg + + /** + * This section holds data that should not be initialized at power up. + * The section located in Internal SRAM memory region. The macro _NOINIT + * can be used as attribute to place data into this section. + * See the "esp_attr.h" file for more information. + */ + .noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _noinit_start) + + *(.noinit .noinit.*) + + ALIGNED_SYMBOL(4, _noinit_end) + } > dram0_0_seg + + /* External Memory BSS. (Variables with EXT_RAM_BSS_ATTR attribute). */ + .ext_ram.bss (NOLOAD) : + { + ALIGNED_SYMBOL(4, _ext_ram_bss_start) + + ALIGNED_SYMBOL(4, _ext_ram_bss_end) + } > extern_ram_seg + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(8, _bss_start) + + /** + * ldgen places all bss-related data to mapping[dram0_bss] + * (See components/esp_system/app.lf). + */ + *(.bss .bss.*) + *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) + *(.ext_ram.bss .ext_ram.bss.*) + *(COMMON) + + . = ALIGN(4); + _bt_bss_start = ABSOLUTE(.); + *libbt.a:(.bss .bss.*) + . = ALIGN(4); + _bt_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_common_start = ABSOLUTE(.); + *libbt.a:(COMMON) + . = ALIGN(4); + _bt_common_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_bss_start = ABSOLUTE(.); + *libbtdm_app.a:(.bss .bss.*) + . = ALIGN(4); + _bt_controller_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_common_start = ABSOLUTE(.); + *libbtdm_app.a:(COMMON) + . = ALIGN(4); + _bt_controller_common_end = ABSOLUTE(.); + _nimble_bss_start = ABSOLUTE(.); + *libnimble.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _nimble_bss_end = ABSOLUTE(.); + + ALIGNED_SYMBOL(8, _bss_end) + } > dram0_0_seg + + ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") + + /* Reserved ROM/ETS data start at 0x3ffe000. */ + . = 0x3ffe0000; + _heap_top = ABSOLUTE(.); + _eheap = ABSOLUTE(.); + + /* Reserved ROM/ETS data region for PRO CPU: 0x3ffe0000 ... 0x3ffe440 */ + . = 0x3ffe0440; + _sheap2 = ABSOLUTE(.); + . = 0x3ffe4000; + _eheap2 = ABSOLUTE(.); + + /* Reserved ROM/ETS data region for APP CPU: 0x3ffe4000 ... 0x3ffe4350 */ + . = 0x3ffe4350; + _sheap3 = ABSOLUTE(.); + . = 0x40000000; + _eheap3 = ABSOLUTE(.); + + .flash.appdesc : ALIGN(0x10) + { + /** + * Mark flash.rodata start. + * This can be used for mmu driver to maintain virtual address + */ + _rodata_reserved_start = ABSOLUTE(.); + _rodata_start = ABSOLUTE(.); + + /* !DO NOT PUT ANYTHING BEFORE THIS! */ + + /* Should be the first. App version info. */ + *(.rodata_desc .rodata_desc.*) + /* Should be the second. Custom app version info. */ + *(.rodata_custom_desc .rodata_custom_desc.*) + + /** + * Create an empty gap within this section. Thanks to this, the end of this + * section will match .flah.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. + */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata) + + .flash.rodata : ALIGN(0x10) + { + _flash_rodata_start = ABSOLUTE(.); + + *(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *(.rodata_wlog_error .rodata_wlog_error.*) + *(.rodata_wlog_info .rodata_wlog_info.*) + *(.rodata_wlog_warning .rodata_wlog_warning.*) + + KEEP (*(SORT(.roxfa.*))) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + + /* C++ exception handlers table. */ + ALIGNED_SYMBOL(4, __XT_EXCEPTION_TABLE_) + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + + ALIGNED_SYMBOL(4, __XT_EXCEPTION_DESCS_) + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + +#if CONFIG_COMPILER_CXX_EXCEPTIONS + ALIGNED_SYMBOL(4, __eh_frame) + KEEP(*(.eh_frame)) + /** + * As we are not linking with crtend.o, which includes the CIE terminator + * (see __FRAME_END__ in libgcc sources), it is manually provided here. + */ + LONG(0); +#endif // CONFIG_COMPILER_CXX_EXCEPTIONS + + /** + * C++ constructor tables. + * + * Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt. + */ + ALIGNED_SYMBOL(4, __init_array_start) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) + __init_array_end = ABSOLUTE(.); + + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + ALIGNED_SYMBOL(4, soc_reserved_memory_region_start) + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + + /* System init functions registered via ESP_SYSTEM_INIT_FN */ + ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start) + KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + _rodata_end = ABSOLUTE(.); + + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + + /* TLS data. */ + ALIGNED_SYMBOL(4, _thread_local_start) + *(.tdata) + *(.tdata.*) + *(.tbss) + *(.tbss.*) + _thread_local_end = ABSOLUTE(.); + } > default_rodata_seg + + _flash_rodata_align = ALIGNOF(.flash.rodata); + + /** + * This section contains all the rodata that is not used + * at runtime, helping to avoid an increase in binary size. + */ + .flash.rodata_noload (NOLOAD) : + { + /** + * This symbol marks the end of flash.rodata. It can be utilized by the MMU + * driver to maintain the virtual address. + * NOLOAD rodata may not be included in this section. + */ + _rodata_reserved_end = ABSOLUTE(.); + + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + _fp_mmu_start = .; + _fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY; + + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + + *(.rodata_wlog_debug .rodata_wlog_debug.*) + *(.rodata_wlog_verbose .rodata_wlog_verbose.*) + + } > default_rodata_seg + + .flash.text : + { + _stext = .; + /** + * Mark the start of flash.text. + * This can be used by the MMU driver to maintain the virtual address. + */ + _instruction_reserved_start = ABSOLUTE(.); + _text_start = ABSOLUTE(.); + + *(.literal .literal.* .text .text.*) + *(.wifi0iram .wifi0iram.*) + *(.wifiextrairam .wifiextrairam.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(.wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifislprxiram .wifislprxiram.*) + + *(.stub) + *(.gnu.warning) + *(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + + /** + * CPU will try to prefetch up to 16 bytes of of instructions. + * This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, + * add dummy bytes to ensure this. + */ + . += _esp_flash_mmap_prefetch_pad_size; + + _text_end = ABSOLUTE(.); + /** + * Mark the flash.text end. + * This can be used for MMU driver to maintain virtual address. + */ + _instruction_reserved_end = ABSOLUTE(.); + _etext = .; + + /** + * Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + _flash_cache_start = ABSOLUTE(0); + } > default_code_seg + + /* Marks the end of IRAM code segment */ + .iram0.text_end (NOLOAD) : + { + ALIGNED_SYMBOL(4, _iram_text_end) + } > iram0_0_seg + + .iram0.data : + { + ALIGNED_SYMBOL(4, _iram_data_start) + + *(.iram.data .iram.data.*) + _coredump_iram_start = ABSOLUTE(.); + *(.iram2.coredump .iram2.coredump.*) + _coredump_iram_end = ABSOLUTE(.); + + _iram_data_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(4, _iram_bss_start) + + *(.iram.bss .iram.bss.*) + _iram_bss_end = ABSOLUTE(.); + ALIGNED_SYMBOL(4, _iram_end) + } > iram0_0_seg + + /* Marks the end of data, bss and possibly rodata */ + .dram0.heap_start (NOLOAD) : + { + /* Lowest possible start address for the heap */ + ALIGNED_SYMBOL(8, _heap_low_start) + _sheap = ABSOLUTE(.); + } > dram0_0_seg + +#include "elf_misc.ld.in" +} + +ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), + "IRAM0 segment data does not fit.") + +ASSERT(((_heap_low_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") diff --git a/cpu/esp32/ld/esp32c3/memory.ld.in b/cpu/esp32/vendor/ld/esp32c3/memory.ld.in similarity index 75% rename from cpu/esp32/ld/esp32c3/memory.ld.in rename to cpu/esp32/vendor/ld/esp32c3/memory.ld.in index f33d2339bf..4c62313833 100644 --- a/cpu/esp32/ld/esp32c3/memory.ld.in +++ b/cpu/esp32/vendor/ld/esp32c3/memory.ld.in @@ -15,31 +15,23 @@ #include "sdkconfig.h" #include "ld.common" -#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE) -#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP) -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE) -#else -#define ESP_BOOTLOADER_RESERVE_RTC 0 -#endif - +/** + * physical memory is mapped twice to the vritual address (IRAM and DRAM). + * `I_D_SRAM_OFFSET` is the offset between the two locations of the same physical memory + */ #define SRAM_IRAM_START 0x4037C000 #define SRAM_DRAM_START 0x3FC7C000 #define ICACHE_SIZE 0x4000 /* ICache size is fixed to 16KB on ESP32-C3 */ #define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START) -#define SRAM_DRAM_END 0x403D0000 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */ +#define SRAM_DRAM_END 0x403CE710 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */ #define SRAM_IRAM_ORG (SRAM_IRAM_START + ICACHE_SIZE) #define SRAM_DRAM_ORG (SRAM_DRAM_START + ICACHE_SIZE) #define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG -#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE -ASSERT((CONFIG_ESP32C3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.") -#define DRAM0_0_SEG_LEN CONFIG_ESP3C3_FIXED_STATIC_RAM_SIZE -#else #define DRAM0_0_SEG_LEN I_D_SRAM_SIZE -#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE + MEMORY { /** @@ -72,30 +64,25 @@ MEMORY #if CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ -#ifdef MODULE_PERIPH_FLASHPAGE - drom0_0_seg (R) : org = 0x3C000020, - len = 0x800000 - 0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY - drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), - len = CONFIG_ESP_FLASHPAGE_CAPACITY -#else drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ -#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /** * RTC fast memory (executable). Persists over deep sleep. */ - rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC -} + rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - RESERVE_RTC_MEM -#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE -/* static data ends at defined address */ -_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN; -#else -_static_data_end = _bss_end; -#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE + /* We reduced the size of rtc_iram_seg by RESERVE_RTC_MEM value. + It reserves the amount of RTC fast memory that we use for this memory segment. + This segment is intended for keeping: + - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). + - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on). + The aim of this is to keep data that will not be moved around and have a fixed address. + */ + rtc_reserved_seg(RW) : org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM +} /* Heap ends at top of dram0_0_seg */ _heap_end = 0x40000000; diff --git a/cpu/esp32/vendor/ld/esp32c3/sections.ld.in b/cpu/esp32/vendor/ld/esp32c3/sections.ld.in new file mode 100644 index 0000000000..f43e665add --- /dev/null +++ b/cpu/esp32/vendor/ld/esp32c3/sections.ld.in @@ -0,0 +1,760 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ld.common" + +/* Default entry point */ +ENTRY(call_start_cpu0); + +SECTIONS +{ + /** + * RTC fast memory holds RTC wake stub code, + * including from any source file named rtc_wake_stub*.c + */ + .rtc.text : + { + ALIGNED_SYMBOL(4, _rtc_fast_start) + + *(.rtc.literal .rtc.text .rtc.text.*) + + *rtc_wake_stub*.*(.text .text.*) + *(.rtc_text_end_test) + + /* Padding for possible CPU prefetch + alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + + _rtc_text_end = ABSOLUTE(.); + } > rtc_iram_seg + + /** + * This section located in RTC FAST Memory area. + * It holds data marked with RTC_FAST_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_fast : + { + ALIGNED_SYMBOL(4, _rtc_force_fast_start) + + _coredump_rtc_fast_start = ABSOLUTE(.); + *(.rtc.fast.coredump .rtc.fast.coredump.*) + _coredump_rtc_fast_end = ABSOLUTE(.); + + *(.rtc.force_fast .rtc.force_fast.*) + + ALIGNED_SYMBOL(4, _rtc_force_fast_end) + } > rtc_data_seg + + /** + * RTC data section holds RTC wake stub + * data/rodata, including from any source file + * named rtc_wake_stub*.c and the data marked with + * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. + */ + .rtc.data : + { + _rtc_data_start = ABSOLUTE(.); + + _coredump_rtc_start = ABSOLUTE(.); + *(.rtc.coredump .rtc.coredump.*) + _coredump_rtc_end = ABSOLUTE(.); + *(.rtc.data .rtc.data.*) + *(.rtc.rodata .rtc.rodata.*) + + *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .srodata.*) + + _rtc_data_end = ABSOLUTE(.); + } > rtc_data_location + + /* RTC bss, from any source file named rtc_wake_stub*.c */ + .rtc.bss (NOLOAD) : + { + /* part that is initialized if not waking up from deep sleep */ + _rtc_bss_start = ABSOLUTE(.); + + *rtc_wake_stub*.*(.bss .bss.* .sbss .sbss.*) + *rtc_wake_stub*.*(COMMON) + + _rtc_bss_end = ABSOLUTE(.); + /* part that saves some data for rtc periph module, this part is + only initialized at power on reset */ + _rtc_bss_rtc_start = ABSOLUTE(.); + *(.rtc.bss .rtc.bss.*) + _rtc_bss_rtc_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section holds data that should not be initialized at power up + * and will be retained during deep sleep. + * User data marked with RTC_NOINIT_ATTR will be placed + * into this section. See the file "esp_attr.h" for more information. + */ + .rtc_noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_noinit_start) + + *(.rtc_noinit .rtc_noinit.*) + + ALIGNED_SYMBOL(4, _rtc_noinit_end) + } > rtc_data_location + + /** + * This section located in RTC SLOW Memory area. + * It holds data marked with RTC_SLOW_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_slow : + { + ALIGNED_SYMBOL(4, _rtc_force_slow_start) + + *(.rtc.force_slow .rtc.force_slow.*) + + ALIGNED_SYMBOL(4, _rtc_force_slow_end) + } > rtc_slow_seg + + /** + * This section holds RTC data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep + * sleep. + */ + .rtc_reserved (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_reserved_start) + + /** + * New data can only be added here to ensure existing data are not moved. + * Because data have adhered to the end of the segment and code is relied + * on it. + * >> put new data here << + */ + + *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) + KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + + _rtc_reserved_end = ABSOLUTE(.); + } > rtc_reserved_seg + + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; + ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), + "RTC reserved segment data does not fit.") + + /* Get size of rtc slow data based on rtc_data_location alias */ + _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_slow_end - _rtc_data_start) + : (_rtc_force_slow_end - _rtc_force_slow_start); + + _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_fast_end - _rtc_fast_start) + : (_rtc_noinit_end - _rtc_fast_start); + + ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), + "RTC_SLOW segment data does not fit.") + + ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), + "RTC_FAST segment data does not fit.") + + .iram0.text : + { + _iram_start = ABSOLUTE(.); + /* Vectors go to start of IRAM */ + ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned"); + KEEP(*(.exception_vectors_table.text)); + KEEP(*(.exception_vectors.text)); + + ALIGNED_SYMBOL(4, _invalid_pc_placeholder) + + /* Code marked as running out of IRAM */ + _iram_text_start = ABSOLUTE(.); + + *(.iram1 .iram1.*) + + /* parts of RIOT that should run in IRAM */ + *core/*(.literal .text .literal.* .text.*) + *core_lib/*(.literal .text .literal.* .text.*) + *esp_common_periph/flash.*(.literal .text .literal.* .text.*) + *esp_common/thread_arch.*(.literal .text .literal.* .text.*) + *esp_freertos_common/*(.literal .text .literal.* .text.*) + *isrpipe/*(.literal .text .literal.* .text.*) + *stdio/stdio.*(.literal .text .literal.* .text.*) + *stdio_*/stdio*(.literal .text .literal.* .text.*) + *syscalls.*(.literal .text .literal.* .text.*) + *tsrb/*(.literal .text .literal.* .text.*) + + /* parts of ESP-IDF that should run in IRAM */ + /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ + /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ + *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) + *components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*) + *components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr) + *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) + *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr) + *components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/gdma.*(.literal.gdma_append .text.gdma_append) + *components/esp_hw_support/gdma.*(.literal.gdma_default_rx_isr .text.gdma_default_rx_isr) + *components/esp_hw_support/gdma.*(.literal.gdma_default_tx_isr .text.gdma_default_tx_isr) + *components/esp_hw_support/gdma.*(.literal.gdma_reset .text.gdma_reset) + *components/esp_hw_support/gdma.*(.literal.gdma_start .text.gdma_start) + *components/esp_hw_support/gdma.*(.literal.gdma_stop .text.gdma_stop) + *components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable) + *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable) + *components/esp_hw_support/sleep_console.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/systimer.*(.literal .literal.* .text .text.*) + *components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*) + *components/esp_ringbuf/*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_systimer.*(.literal .literal.* .text .text.*) + *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) + *components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort) + *components/esp_system/port/image_process.*(.literal .literal.* .text .text.*) + *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) + *components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap) + + *libclang_rt.builtins.a:_divsf3.*(.literal .literal.* .text .text.*) + *libclang_rt.builtins.a:restore.*(.literal .literal.* .text .text.*) + *libclang_rt.builtins.a:save.*(.literal .literal.* .text .text.*) + *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) + *libgcc.a:save-restore.*(.literal .literal.* .text .text.*) + *libgcov.a:(.literal .literal.* .text .text.*) + + *components/hal/cache_hal.*(.literal .literal.* .text .text.*) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_append .text.gdma_ahb_hal_append) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_clear_intr .text.gdma_ahb_hal_clear_intr) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_get_eof_desc_addr .text.gdma_ahb_hal_get_eof_desc_addr) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_read_intr_status .text.gdma_ahb_hal_read_intr_status) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_reset .text.gdma_ahb_hal_reset) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_start_with_desc .text.gdma_ahb_hal_start_with_desc) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_stop .text.gdma_ahb_hal_stop) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_append .text.gdma_hal_append) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_clear_intr .text.gdma_hal_clear_intr) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_get_eof_desc_addr .text.gdma_hal_get_eof_desc_addr) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_read_intr_status .text.gdma_hal_read_intr_status) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_reset .text.gdma_hal_reset) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_start_with_desc .text.gdma_hal_start_with_desc) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_stop .text.gdma_hal_stop) + *components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep) + *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/mmu_hal.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) + *components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value) + *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) + *components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs) + *components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block) + *components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block) + *components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock) + *components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock) + *components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free) + *components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock) + *tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead) + *tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size) + *tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free) + *tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool) + *tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc) + *tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign) + *tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs) + *tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc) + *tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size) + *components/log/*/log_lock.*(.literal .literal.* .text .text.*) + *components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write) + + *libnet80211.a:(.wifi0iram .wifi0iram.*) + *libnet80211.a:(.wifirxiram .wifirxiram.*) + *libnet80211.a:(.wifislprxiram .wifislprxiram.*) + + *components/newlib/abort.*(.literal .literal.* .text .text.*) + *components/newlib/assert.*(.literal .literal.* .text .text.*) + *components/newlib/heap.*(.literal .literal.* .text .text.*) + *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) + + *libpp.a:(.wifi0iram .wifi0iram.*) + *libpp.a:(.wifiorslpiram .wifiorslpiram.*) + *libpp.a:(.wifirxiram .wifirxiram.*) + *libpp.a:(.wifislprxiram .wifislprxiram.*) + + *components/riscv/interrupt.*(.text .text._global_interrupt_handler .text.intr_get_item .text.intr_handler_get_arg) + *components/riscv/vectors.*(.literal .literal.* .text .text.*) + + *librtc.a:(.literal .literal.* .text .text.*) + + *components/soc/lldesc.*(.literal .literal.* .text .text.*) + *components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*) + *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*) + } > iram0_0_seg + + /** + * This section is required to skip .iram0.text area because iram0_0_seg and + * dram0_0_seg reflect the same address space on different buses. + */ + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; + } > dram0_0_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.gnu.linkonce.d.*) + *(.data1) + __global_pointer$ = . + 0x800; + *(.sdata) + *(.sdata.*) + KEEP (*(SORT(.xfa.*))) + *(.gnu.linkonce.s.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data.*) + *(.dram1 .dram1.*) + _coredump_dram_start = ABSOLUTE(.); + *(.dram2.coredump .dram2.coredump.*) + _coredump_dram_end = ABSOLUTE(.); + *components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _bt_data_start = ABSOLUTE(.); + *libbt.a:(.data .data.*) + . = ALIGN(4); + _bt_data_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_data_start = ABSOLUTE(.); + *libbtdm_app.a:(.data .data.*) + . = ALIGN(4); + _bt_controller_data_end = ABSOLUTE(.); + + *components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/sleep_console.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *libclang_rt.builtins.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libclang_rt.builtins.a:restore.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libclang_rt.builtins.a:save.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcc.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcc.a:save-restore.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*) + + *components/hal/cache_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/systimer_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/wdt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/log/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _nimble_data_start = ABSOLUTE(.); + *libnimble.a:(.data .data.*) + . = ALIGN(4); + _nimble_data_end = ABSOLUTE(.); + + *libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _data_end = ABSOLUTE(.); + } > dram0_0_seg + + /** + * This section holds data that should not be initialized at power up. + * The section located in Internal SRAM memory region. The macro _NOINIT + * can be used as attribute to place data into this section. + * See the "esp_attr.h" file for more information. + */ + .noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _noinit_start) + + *(.noinit .noinit.*) + + ALIGNED_SYMBOL(4, _noinit_end) + } > dram0_0_seg + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(8, _bss_start) + + /** + * ldgen places all bss-related data to mapping[dram0_bss] + * (See components/esp_system/app.lf). + */ + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss.*) + *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) + *(.ext_ram.bss .ext_ram.bss.*) + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) COMMON) + + . = ALIGN(4); + _bt_bss_start = ABSOLUTE(.); + *libbt.a:(.bss .bss.*) + . = ALIGN(4); + _bt_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_common_start = ABSOLUTE(.); + *libbt.a:(COMMON) + . = ALIGN(4); + _bt_common_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_bss_start = ABSOLUTE(.); + *libbtdm_app.a:(.bss .bss.*) + . = ALIGN(4); + _bt_controller_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_common_start = ABSOLUTE(.); + *libbtdm_app.a:(COMMON) + . = ALIGN(4); + _bt_controller_common_end = ABSOLUTE(.); + + _nimble_bss_start = ABSOLUTE(.); + *libnimble.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _nimble_bss_end = ABSOLUTE(.); + + ALIGNED_SYMBOL(8, _bss_end) + } > dram0_0_seg + + ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") + + .flash.text : + { + _stext = .; + /** + * Mark the start of flash.text. + * This can be used by the MMU driver to maintain the virtual address. + */ + _instruction_reserved_start = ABSOLUTE(.); + _text_start = ABSOLUTE(.); + + *(.literal .literal.* .text .text.*) + *(.wifi0iram .wifi0iram.*) + *(.wifiextrairam .wifiextrairam.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(.wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifislprxiram .wifislprxiram.*) + + *(.stub) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + + /** + * CPU will try to prefetch up to 16 bytes of of instructions. + * This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, add + * dummy bytes to ensure this + */ + . += _esp_flash_mmap_prefetch_pad_size; + + _text_end = ABSOLUTE(.); + /** + * Mark the flash.text end. + * This can be used for MMU driver to maintain virtual address. + */ + _instruction_reserved_end = ABSOLUTE(.); + _etext = .; + + /** + * Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + _flash_cache_start = ABSOLUTE(0); + } > default_code_seg + + /** + * Dummy section represents the .flash.text section but in default_rodata_seg. + * Thus, it must have its alignment and (at least) its size. + */ + .flash_rodata_dummy (NOLOAD): + { + _flash_rodata_dummy_start = .; + + . = ALIGN(ALIGNOF(.flash.text)) + SIZEOF(.flash.text); + + /* Add alignment of MMU page size + 0x20 bytes for the mapping header. */ + . = ALIGN(_esp_mmu_page_size) + 0x20; + } > default_rodata_seg + + .flash.appdesc : ALIGN(0x10) + { + /** + * Mark flash.rodata start. + * This can be used for mmu driver to maintain virtual address + */ + _rodata_reserved_start = ABSOLUTE(.); + _rodata_start = ABSOLUTE(.); + + /* !DO NOT PUT ANYTHING BEFORE THIS! */ + + /* Should be the first. App version info. */ + *(.rodata_desc .rodata_desc.*) + /* Should be the second. Custom app version info. */ + *(.rodata_custom_desc .rodata_custom_desc.*) + + /** + * Create an empty gap within this section. Thanks to this, the end of this + * section will match .flash.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. + */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata) + + .flash.rodata : ALIGN(0x10) + { + _flash_rodata_start = ABSOLUTE(.); + + *(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *(.rodata_wlog_error .rodata_wlog_error.*) + *(.rodata_wlog_info .rodata_wlog_info.*) + *(.rodata_wlog_warning .rodata_wlog_warning.*) + + KEEP (*(SORT(.roxfa.*))) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + /** + * C++ constructor tables. + * + * Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt. + * + * RISC-V gcc is configured with --enable-initfini-array so it emits + * .init_array section instead. But the init_priority sections will be + * sorted for iteration in ascending order during startup. + * The rest of the init_array sections is sorted for iteration in descending + * order during startup, however. Hence a different section is generated for + * the init_priority functions which is iterated in ascending order during + * startup. The corresponding code can be found in startup.c. + */ + ALIGNED_SYMBOL(4, __init_priority_array_start) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*)) + __init_priority_array_end = ABSOLUTE(.); + + ALIGNED_SYMBOL(4, __init_array_start) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array)) + __init_array_end = ABSOLUTE(.); + + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + ALIGNED_SYMBOL(4, soc_reserved_memory_region_start) + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + + /* System init functions registered via ESP_SYSTEM_INIT_FN */ + ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start) + KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + _rodata_end = ABSOLUTE(.); + . = ALIGN(ALIGNOF(.eh_frame_hdr)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.flash.rodata, .eh_frame_hdr) + + .eh_frame_hdr : + { +#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME + ALIGNED_SYMBOL(4, __eh_frame_hdr) + + KEEP (*(.eh_frame_hdr)) + + __eh_frame_hdr_end = ABSOLUTE(.); +#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME + + . = ALIGN(ALIGNOF(.eh_frame)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame) + + .eh_frame : + { +#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME + ALIGNED_SYMBOL(4, __eh_frame) + + KEEP (*(.eh_frame)) + /** + * As we are not linking with crtend.o, which includes the CIE terminator + * (see __FRAME_END__ in libgcc sources), it is manually provided here. + */ + LONG(0); + + __eh_frame_end = ABSOLUTE(.); +#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME + + . = ALIGN(ALIGNOF(.flash.tdata)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata) + + .flash.tdata : + { + _thread_local_data_start = ABSOLUTE(.); + + *(.tdata .tdata.* .gnu.linkonce.td.*) + + . = ALIGN(ALIGNOF(.flash.tbss)); + _thread_local_data_end = ABSOLUTE(.); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.flash.tdata, .flash.tbss) + + .flash.tbss (NOLOAD) : + { + _thread_local_bss_start = ABSOLUTE(.); + + *(.tbss .tbss.* .gnu.linkonce.tb.*) + *(.tcommon .tcommon.*) + + _thread_local_bss_end = ABSOLUTE(.); + } > default_rodata_seg + + /** + * This section contains all the rodata that is not used + * at runtime, helping to avoid an increase in binary size. + */ + .flash.rodata_noload (NOLOAD) : + { + /** + * This symbol marks the end of flash.rodata. It can be utilized by the MMU + * driver to maintain the virtual address. + * NOLOAD rodata may not be included in this section. + */ + _rodata_reserved_end = ADDR(.flash.tbss); + + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + _fp_mmu_start = .; + _fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY; + + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + + *(.rodata_wlog_debug .rodata_wlog_debug.*) + *(.rodata_wlog_verbose .rodata_wlog_verbose.*) + } > default_rodata_seg + + /* Marks the end of IRAM code segment */ + .iram0.text_end (NOLOAD) : + { + /* Padding for possible CPU prefetch + alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + + /* iram_end_test section exists for use by memprot unit tests only */ + *(.iram_end_test) + + _iram_text_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.data : + { + ALIGNED_SYMBOL(16, _iram_data_start) + + *(.iram.data .iram.data.*) + _coredump_iram_start = ABSOLUTE(.); + *(.iram2.coredump .iram2.coredump.*) + _coredump_iram_end = ABSOLUTE(.); + + _iram_data_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(16, _iram_bss_start) + + *(.iram.bss .iram.bss.*) + + _iram_bss_end = ABSOLUTE(.); + ALIGNED_SYMBOL(16, _iram_end) + } > iram0_0_seg + + /* Marks the end of data, bss and possibly rodata */ + .dram0.heap_start (NOLOAD) : + { + ALIGNED_SYMBOL(16, _heap_start) + _sheap = ABSOLUTE(.); + } > dram0_0_seg + + _eheap = phy_param_rom; + +#include "elf_misc.ld.in" +} + +ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), + "IRAM0 segment data does not fit.") + +ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") diff --git a/cpu/esp32/ld/esp32s2/memory.ld.in b/cpu/esp32/vendor/ld/esp32s2/memory.ld.in similarity index 64% rename from cpu/esp32/ld/esp32s2/memory.ld.in rename to cpu/esp32/vendor/ld/esp32s2/memory.ld.in index 8791d4c703..82fa95625c 100644 --- a/cpu/esp32/ld/esp32s2/memory.ld.in +++ b/cpu/esp32/vendor/ld/esp32s2/memory.ld.in @@ -15,32 +15,10 @@ #include "sdkconfig.h" #include "ld.common" -#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE) -#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP) -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE) -#else -#define ESP_BOOTLOADER_RESERVE_RTC 0 -#endif - -#ifdef CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB -#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x2000 -#else -#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x4000 -#endif - -#ifdef CONFIG_ESP32S2_DATA_CACHE_0KB -#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0 -#elif defined CONFIG_ESP32S2_DATA_CACHE_8KB -#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x2000 -#else -#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x4000 -#endif - #define RAM_IRAM_START 0x40020000 #define RAM_DRAM_START 0x3FFB0000 -#define DATA_RAM_END 0x3FFE0000 /* 2nd stage bootloader iram_loader_seg starts at SRAM block 14 (reclaimed after app boots) */ +#define DATA_RAM_END 0x3FFDE000 /* 2nd stage bootloader iram_loader_seg starts at end of block 13 (reclaimed after app boots) */ #define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \ + CONFIG_ESP32S2_DATA_CACHE_SIZE) @@ -50,17 +28,12 @@ #define I_D_RAM_SIZE DATA_RAM_END - DRAM_ORG -#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE) - -ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE), - "Fixed static ram data does not fit.") - -#define STATIC_RAM_SIZE CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE - +#if CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE +ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE), "Fixed static ram data does not fit.") +#define DRAM0_0_SEG_LEN CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE #else -#define STATIC_RAM_SIZE 0 -#endif - +#define DRAM0_0_SEG_LEN I_D_RAM_SIZE +#endif // CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE MEMORY { /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length @@ -86,46 +59,52 @@ MEMORY /* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */ - dram0_0_seg (RW) : org = DRAM_ORG, len = I_D_RAM_SIZE - STATIC_RAM_SIZE + dram0_0_seg (RW) : org = DRAM_ORG, len = DRAM0_0_SEG_LEN #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ -#ifdef MODULE_PERIPH_FLASHPAGE - drom0_0_seg (R) : org = 0x3F000020, - len = 0x3f0000-0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY - drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), - len = CONFIG_ESP_FLASHPAGE_CAPACITY -#else drom0_0_seg (R) : org = 0x3F000020, len = 0x3f0000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ -#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* RTC fast memory (executable). Persists over deep sleep. */ - rtc_iram_seg(RWX) : org = 0x40070000, len = 0x2000 + rtc_iram_seg(RWX) : org = 0x40070000, len = 0x2000 - RESERVE_RTC_MEM /* RTC slow memory (data accessible). Persists over deep sleep. Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. */ - rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM, - len = 0x2000 - CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM +#if CONFIG_ULP_COPROC_ENABLED + rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM, + len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM +#else + rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000 +#endif // CONFIG_ULP_COPROC_ENABLED - /* RTC fast memory (same block as above), viewed from data bus */ - rtc_data_seg(RW) : org = 0x3ff9e000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC + /* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */ + rtc_data_seg(RW) : org = 0x3ff9e000, len = 0x2000 - RESERVE_RTC_MEM + + /* We reduced the size of rtc_data_seg and rtc_iram_seg by RESERVE_RTC_MEM value. + It reserves the amount of RTC fast memory that we use for this memory segment. + This segment is intended for keeping: + - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). + - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on). + The aim of this is to keep data that will not be moved around and have a fixed address. + */ + rtc_reserved_seg(RW) : org = 0x3ff9e000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM /* external memory, covers the dport, dram0, dram1 cacheable address space */ - extern_ram_seg(RWX) : org = 0x3F500000, - len = 0xA80000 + extern_ram_seg(RWX) : org = 0x3F800000, + len = 0x780000 } #if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE) /* static data ends at defined address */ -_static_data_end = DRAM_ORG + STATIC_RAM_SIZE; +_heap_start = DRAM_ORG + DRAM0_0_SEG_LEN; #else -_static_data_end = _bss_end; +_heap_start = _heap_low_start; #endif _heap_end = 0x40000000; @@ -134,8 +113,7 @@ _data_seg_org = ORIGIN(rtc_data_seg); /* The lines below define location alias for .rtc.data section based on Kconfig option. When the option is not defined then use slow memory segment - else the data will be placed in fast memory segment - TODO: check whether the rtc_data_location is correct for esp32s2 - IDF-761 */ + else the data will be placed in fast memory segment */ #ifndef CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM REGION_ALIAS("rtc_data_location", rtc_slow_seg ); #else diff --git a/cpu/esp32/vendor/ld/esp32s2/sections.ld.in b/cpu/esp32/vendor/ld/esp32s2/sections.ld.in new file mode 100644 index 0000000000..2fd3a28232 --- /dev/null +++ b/cpu/esp32/vendor/ld/esp32s2/sections.ld.in @@ -0,0 +1,767 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ld.common" + +/** + * Added to maintain compatibility: there is no iram0 data section to place + * _coredump_iram_XXX symbols that are defined in espcoredump's linker.lf + */ +_coredump_iram_start = 0; +_coredump_iram_end = 0; + +/* Default entry point */ +ENTRY(call_start_cpu0); + +SECTIONS +{ + /** + * RTC fast memory holds RTC wake stub code, + * including from any source file named rtc_wake_stub*.c + */ + .rtc.text : + { + ALIGNED_SYMBOL(4, _rtc_text_start) + + *(.rtc.literal .rtc.text .rtc.text.*) + + *rtc_wake_stub*.*(.literal .text .literal.* .text.*) + + /* Padding for possible CPU prefetch + alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + + _rtc_text_end = ABSOLUTE(.); + } > rtc_iram_seg + + /** + * This section is required to skip rtc.text area because rtc_iram_seg and + * rtc_data_seg are reflect the same address space on different buses. + */ + .rtc.dummy : + { + _rtc_dummy_start = ABSOLUTE(.); + _rtc_fast_start = ABSOLUTE(.); + + . = SIZEOF(.rtc.text); + + _rtc_dummy_end = ABSOLUTE(.); + } > rtc_data_seg + + /** + * This section located in RTC FAST Memory area. + * It holds data marked with RTC_FAST_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_fast : + { + ALIGNED_SYMBOL(4, _rtc_force_fast_start) + + _coredump_rtc_fast_start = ABSOLUTE(.); + *(.rtc.fast.coredump .rtc.fast.coredump.*) + _coredump_rtc_fast_end = ABSOLUTE(.); + + *(.rtc.force_fast .rtc.force_fast.*) + + ALIGNED_SYMBOL(4, _rtc_force_fast_end) + } > rtc_data_seg + + /** + * RTC data section holds RTC wake stub + * data/rodata, including from any source file + * named rtc_wake_stub*.c and the data marked with + * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. + * The memory location of the data is dependent on + * CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option. + */ + .rtc.data : + { + _rtc_data_start = ABSOLUTE(.); + + _coredump_rtc_start = ABSOLUTE(.); + *(.rtc.coredump .rtc.coredump.*) + _coredump_rtc_end = ABSOLUTE(.); + *(.rtc.data .rtc.data.*) + *(.rtc.rodata .rtc.rodata.*) + + *rtc_wake_stub*.*(.data .rodata .data.* .rodata.*) + + _rtc_data_end = ABSOLUTE(.); + } > rtc_data_location + + /* RTC bss, from any source file named rtc_wake_stub*.c */ + .rtc.bss (NOLOAD) : + { + _rtc_bss_start = ABSOLUTE(.); + + *rtc_wake_stub*.*(.bss .bss.*) + *rtc_wake_stub*.*(COMMON) + + /* part that saves some data for rtc periph module, this part is + only initialized at power on reset */ + _rtc_bss_rtc_start = ABSOLUTE(.); + *(.rtc.bss .rtc.bss.*) + _rtc_bss_rtc_end = ABSOLUTE(.); + + _rtc_bss_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section holds data that should not be initialized at power up + * and will be retained during deep sleep. + * User data marked with RTC_NOINIT_ATTR will be placed + * into this section. See the file "esp_attr.h" for more information. + * The memory location of the data is dependent on + * CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option. + */ + .rtc_noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_noinit_start) + + *(.rtc_noinit .rtc_noinit.*) + + ALIGNED_SYMBOL(4, _rtc_noinit_end) + } > rtc_data_location + + /** + * This section located in RTC SLOW Memory area. + * It holds data marked with RTC_SLOW_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_slow : + { + ALIGNED_SYMBOL(4, _rtc_force_slow_start) + + *(.rtc.force_slow .rtc.force_slow.*) + + ALIGNED_SYMBOL(4, _rtc_force_slow_end) + } > rtc_slow_seg + + /** + * This section holds RTC data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep + * sleep. + */ + .rtc_reserved (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_reserved_start) + + /** + * New data can only be added here to ensure existing data are not moved. + * Because data have adhered to the end of the segment and code is relied + * on it. + * >> put new data here << + */ + + *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) + KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + + _rtc_reserved_end = ABSOLUTE(.); + } > rtc_reserved_seg + + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; + ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), + "RTC reserved segment data does not fit.") + + /* Get size of rtc slow data based on rtc_data_location alias */ + _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_slow_end - _rtc_data_start) + : (_rtc_force_slow_end - _rtc_force_slow_start); + + _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_fast_end - _rtc_fast_start) + : (_rtc_noinit_end - _rtc_fast_start); + + ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), + "RTC_SLOW segment data does not fit.") + + ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), + "RTC_FAST segment data does not fit.") + + /* Send .iram0 code to iram */ + .iram0.vectors : + { + _iram_start = ABSOLUTE(.); + /* Vectors go to IRAM */ + _vector_table = ABSOLUTE(.); + . = 0x0; + KEEP(*(.WindowVectors.text)); + . = 0x180; + KEEP(*(.Level2InterruptVector.text)); + . = 0x1c0; + KEEP(*(.Level3InterruptVector.text)); + . = 0x200; + KEEP(*(.Level4InterruptVector.text)); + . = 0x240; + KEEP(*(.Level5InterruptVector.text)); + . = 0x280; + KEEP(*(.DebugExceptionVector.text)); + . = 0x2c0; + KEEP(*(.NMIExceptionVector.text)); + . = 0x300; + KEEP(*(.KernelExceptionVector.text)); + . = 0x340; + KEEP(*(.UserExceptionVector.text)); + . = 0x3C0; + KEEP(*(.DoubleExceptionVector.text)); + . = 0x400; + _invalid_pc_placeholder = ABSOLUTE(.); + *(.*Vector.literal) + + *(.UserEnter.literal); + *(.UserEnter.text); + . = ALIGN (16); + *(.entry.literal) + *(.entry.text) + *(.init.literal) + *(.init) + + _init_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.text : + { + /* Code marked as running out of IRAM */ + _iram_text_start = ABSOLUTE(.); + + *(.iram1 .iram1.*) + + /* Xtensa basic functionality written in assembler should be placed in IRAM */ + *xtensa/*(.literal .text .literal.* .text.*) + + /* parts of RIOT that should run in IRAM */ + *core/*(.literal .text .literal.* .text.*) + *core_lib/*(.literal .text .literal.* .text.*) + *esp_common_periph/flash.*(.literal .text .literal.* .text.*) + *esp_common/thread_arch.*(.literal .text .literal.* .text.*) + *esp_freertos_common/*(.literal .text .literal.* .text.*) + *isrpipe/*(.literal .text .literal.* .text.*) + *stdio/stdio.*(.literal .text .literal.* .text.*) + *stdio_*/stdio*(.literal .text .literal.* .text.*) + *syscalls.*(.literal .text .literal.* .text.*) + *tsrb/*(.literal .text .literal.* .text.*) + + /* parts of ESP-IDF that should run in IRAM */ + /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ + /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ + *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) + *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) + *components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*) + *components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr) + *components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_get_eof_desc .text.spi_dma_get_eof_desc) + *components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_reset .text.spi_dma_reset) + *components/esp_driver_spi/src/spi_dma.*(.literal.spi_dma_start .text.spi_dma_start) + *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) + *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr) + *components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable) + *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config) + *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) + *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/rtc_wdt.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable) + *components/esp_hw_support/*/systimer.*(.literal .literal.* .text .text.*) + *components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*) + *components/esp_psram/*/esp_psram_impl_*(.literal .literal.* .text .text.*) + *components/esp_psram/mmu_psram_flash*(.literal .literal.* .text .text.*) + *components/esp_ringbuf/*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_systimer.*(.literal .literal.* .text .text.*) + *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) + *components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort) + *components/esp_system/port/image_process.*(.literal .literal.* .text .text.*) + *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) + *components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap) + + *libclang_rt.builtins.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) + *libgcov.a:(.literal .literal.* .text .text.*) + *libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*) + + *components/hal/cache_hal.*(.literal .literal.* .text .text.*) + *components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep) + *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/mmu_hal.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) + *components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value) + *components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*) + *components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs) + *components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block) + *components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block) + *components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock) + *components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock) + *components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free) + *components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock) + *tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead) + *tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size) + *tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free) + *tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool) + *tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc) + *tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign) + *tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs) + *tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc) + *tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size) + *components/log/*/log_lock.*(.literal .literal.* .text .text.*) + *components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write) + + *libnet80211.a:(.wifi0iram .wifi0iram.*) + *libnet80211.a:(.wifirxiram .wifirxiram.*) + *libnet80211.a:(.wifislprxiram .wifislprxiram.*) + + *components/newlib/abort.*(.literal .literal.* .text .text.*) + *components/newlib/assert.*(.literal .literal.* .text .text.*) + *components/newlib/heap.*(.literal .literal.* .text .text.*) + *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) + + *libpp.a:(.wifi0iram .wifi0iram.*) + *libpp.a:(.wifiorslpiram .wifiorslpiram.*) + *libpp.a:(.wifirxiram .wifirxiram.*) + *libpp.a:(.wifislprxiram .wifislprxiram.*) + *librtc.a:(.literal .literal.* .text .text.*) + + *components/soc/lldesc.*(.literal .literal.* .text .text.*) + *components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*) + *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*) + + *libxt_hal.a:(.literal .literal.* .text .text.*) + + *components/xtensa/*(.literal .literal.* .text .text.*) + + /* Padding for possible CPU prefetch + alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + + /* iram_end_test section exists for use by memprot unit tests only */ + *(.iram_end_test) + + _iram_text_end = ABSOLUTE(.); + } > iram0_0_seg + + .dram0_reserved_for_iram (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; + } > dram0_0_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + KEEP (*(SORT(.xfa.*))) + *(.gnu.linkonce.s.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + + *(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*) + *(.data .data.*) + *(.dram1 .dram1.*) + + _coredump_dram_start = ABSOLUTE(.); + *(.dram2.coredump .dram2.coredump.*) + _coredump_dram_end = ABSOLUTE(.); + + *components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _bt_data_start = ABSOLUTE(.); + *libbt.a:(.data .data.*) + . = ALIGN(4); + _bt_data_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_data_start = ABSOLUTE(.); + *libbtdm_app.a:(.data .data.*) + . = ALIGN(4); + _bt_controller_data_end = ABSOLUTE(.); + + + *components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_psram/*/esp_psram_impl_*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_psram/mmu_psram_flash*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *libclang_rt.builtins.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcc.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/hal/cache_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/systimer_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/wdt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/log/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _nimble_data_start = ABSOLUTE(.); + *libnimble.a:(.data .data.*) + . = ALIGN(4); + _nimble_data_end = ABSOLUTE(.); + *libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _data_end = ABSOLUTE(.); + } > dram0_0_seg + + /** + * This section holds data that should not be initialized at power up. + * The section located in Internal SRAM memory region. The macro _NOINIT + * can be used as attribute to place data into this section. + * See the "esp_attr.h" file for more information. + */ + .noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _noinit_start) + + *(.noinit .noinit.*) + + ALIGNED_SYMBOL(4, _noinit_end) + } > dram0_0_seg + +#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY + /* External Memory BSS. (Variables with EXT_RAM_BSS_ATTR attribute). */ + .ext_ram.bss (NOLOAD) : + { + ALIGNED_SYMBOL(4, _ext_ram_bss_start) + + mapping[extern_ram] + + ALIGNED_SYMBOL(4, _ext_ram_bss_end) + } > extern_ram_seg +#endif //CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY + +#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY + /** + * This section holds data that won't be initialised when startup. + * This section locates in External RAM region. + */ + .ext_ram_noinit (NOLOAD) : + { + _ext_ram_noinit_start = ABSOLUTE(.); + + *(.ext_ram_noinit*) + + ALIGNED_SYMBOL(4, _ext_ram_noinit_end) + } > extern_ram_seg +#endif //CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(8, _bss_start) + + /** + * ldgen places all bss-related data to mapping[dram0_bss] + * (See components/esp_system/app.lf). + */ + *(.bss .bss.*) + *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) + *(.ext_ram.bss .ext_ram.bss.*) + *(COMMON) + + . = ALIGN(4); + _bt_bss_start = ABSOLUTE(.); + *libbt.a:(.bss .bss.*) + . = ALIGN(4); + _bt_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_common_start = ABSOLUTE(.); + *libbt.a:(COMMON) + . = ALIGN(4); + _bt_common_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_bss_start = ABSOLUTE(.); + *libbtdm_app.a:(.bss .bss.*) + . = ALIGN(4); + _bt_controller_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_common_start = ABSOLUTE(.); + *libbtdm_app.a:(COMMON) + . = ALIGN(4); + _bt_controller_common_end = ABSOLUTE(.); + _nimble_bss_start = ABSOLUTE(.); + *libnimble.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _nimble_bss_end = ABSOLUTE(.); + + ALIGNED_SYMBOL(8, _bss_end) + } > dram0_0_seg + + .flash.appdesc : ALIGN(0x10) + { + /** + * Mark flash.rodata start. + * This can be used for mmu driver to maintain virtual address + */ + _rodata_reserved_start = ABSOLUTE(.); + _rodata_start = ABSOLUTE(.); + + /* !DO NOT PUT ANYTHING BEFORE THIS! */ + + /* Should be the first. App version info. */ + *(.rodata_desc .rodata_desc.*) + /* Should be the second. Custom app version info. */ + *(.rodata_custom_desc .rodata_custom_desc.*) + + /** + * Create an empty gap within this section. Thanks to this, the end of this + * section will match .flah.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. + */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata) + + .flash.rodata : ALIGN(0x10) + { + _flash_rodata_start = ABSOLUTE(.); + + *(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *(.rodata_wlog_error .rodata_wlog_error.*) + *(.rodata_wlog_info .rodata_wlog_info.*) + *(.rodata_wlog_warning .rodata_wlog_warning.*) + + KEEP (*(SORT(.roxfa.*))) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + + /* C++ exception handlers table. */ + ALIGNED_SYMBOL(4, __XT_EXCEPTION_TABLE_) + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + + ALIGNED_SYMBOL(4, __XT_EXCEPTION_DESCS_) + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + +#if CONFIG_COMPILER_CXX_EXCEPTIONS + ALIGNED_SYMBOL(4, __eh_frame) + KEEP(*(.eh_frame)) + /** + * As we are not linking with crtend.o, which includes the CIE terminator + * (see __FRAME_END__ in libgcc sources), it is manually provided here. + */ + LONG(0); +#endif // CONFIG_COMPILER_CXX_EXCEPTIONS + + /** + * C++ constructor tables. + * + * Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt. + */ + ALIGNED_SYMBOL(4, __init_array_start) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) + __init_array_end = ABSOLUTE(.); + + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + ALIGNED_SYMBOL(4, soc_reserved_memory_region_start) + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + + /* System init functions registered via ESP_SYSTEM_INIT_FN */ + ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start) + KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + _rodata_end = ABSOLUTE(.); + + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + + /* TLS data. */ + ALIGNED_SYMBOL(4, _thread_local_start) + *(.tdata) + *(.tdata.*) + *(.tbss) + *(.tbss.*) + _thread_local_end = ABSOLUTE(.); + } > default_rodata_seg + + _flash_rodata_align = ALIGNOF(.flash.rodata); + + /** + * This section contains all the rodata that is not used + * at runtime, helping to avoid an increase in binary size. + */ + .flash.rodata_noload (NOLOAD) : + { + /** + * This symbol marks the end of flash.rodata. It can be utilized by the MMU + * driver to maintain the virtual address. + * NOLOAD rodata may not be included in this section. + */ + _rodata_reserved_end = ABSOLUTE(.); + + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + _fp_mmu_start = .; + _fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY; + + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + + *(.rodata_wlog_debug .rodata_wlog_debug.*) + *(.rodata_wlog_verbose .rodata_wlog_verbose.*) + } > default_rodata_seg + + .flash.text : + { + _stext = .; + /** + * Mark the start of flash.text. + * This can be used by the MMU driver to maintain the virtual address. + */ + _instruction_reserved_start = ABSOLUTE(.); + _text_start = ABSOLUTE(.); + + *(.literal .literal.* .text .text.*) + *(.wifi0iram.*) + *(.wifiextrairam .wifiextrairam.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(.wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifislprxiram .wifislprxiram.*) + + *(.stub) + *(.gnu.warning) + *(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + + /** + * CPU will try to prefetch up to 16 bytes of of instructions. + * This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, + * add dummy bytes to ensure this. + */ + . += _esp_flash_mmap_prefetch_pad_size; + + _text_end = ABSOLUTE(.); + /** + * Mark the flash.text end. + * This can be used for MMU driver to maintain virtual address. + */ + _instruction_reserved_end = ABSOLUTE(.); + _etext = .; + + /** + * Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + _flash_cache_start = ABSOLUTE(0); + } > default_code_seg + + /* Marks the end of IRAM code segment */ + .iram0.text_end (NOLOAD) : + { + ALIGNED_SYMBOL(4, _iram_end) + } > iram0_0_seg + + /* Marks the end of data, bss and possibly rodata */ + .dram0.heap_start (NOLOAD) : + { + /* Lowest possible start address for the heap */ + ALIGNED_SYMBOL(8, _heap_low_start) + _sheap = ABSOLUTE(.); + } > dram0_0_seg + + + . = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); + _eheap = ABSOLUTE(.); + + . = _heap_end; + +#include "elf_misc.ld.in" +} + +ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), + "IRAM0 segment data does not fit.") + +ASSERT(((_heap_low_start - _data_start) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") diff --git a/cpu/esp32/ld/esp32s3/memory.ld.in b/cpu/esp32/vendor/ld/esp32s3/memory.ld.in similarity index 75% rename from cpu/esp32/ld/esp32s3/memory.ld.in rename to cpu/esp32/vendor/ld/esp32s3/memory.ld.in index 0847903076..ba229c649b 100644 --- a/cpu/esp32/ld/esp32s3/memory.ld.in +++ b/cpu/esp32/vendor/ld/esp32s3/memory.ld.in @@ -14,19 +14,11 @@ #include "sdkconfig.h" #include "ld.common" -#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE) -#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP) -#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE) -#else -#define ESP_BOOTLOADER_RESERVE_RTC 0 -#endif - /* * 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000 * 3FC88000 <- D/IRAM (D) -> 3FCF0000 <- DRAM/DCache -> 3FD00000 * - * Startup code uses the IRAM from 0x403BA000 to 0x403E0000, which is not available for static + * Startup code uses the IRAM from 0x403B9000 to 0x403E0000, which is not available for static * memory, but can only be used after app starts. * * D cache use the memory from high address, so when it's configured to 16K/32K, the region @@ -36,7 +28,7 @@ #define SRAM_IRAM_START 0x40370000 #define SRAM_DIRAM_I_START 0x40378000 -#define SRAM_IRAM_END 0x403BA000 +#define SRAM_IRAM_END 0x403CB700 /* Please refer to ESP32-S3 bootloader.ld for more information on this */ #define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START) #define SRAM_DRAM_START 0x3FC88000 @@ -90,41 +82,49 @@ MEMORY #if CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ -#ifdef MODULE_PERIPH_FLASHPAGE - drom0_0_seg (R) : org = 0x3C000020, - len = 0x800000-0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY - drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), - len = CONFIG_ESP_FLASHPAGE_CAPACITY -#else - drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20 + drom0_0_seg (R) : org = 0x3C000020, len = 0x2000000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ -#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /** * RTC fast memory (executable). Persists over deep sleep. */ - rtc_iram_seg(RWX) : org = 0x600fe000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC + rtc_iram_seg(RWX) : org = 0x600fe000, len = 0x2000 - RESERVE_RTC_MEM - /** - * RTC fast memory (same block as above), viewed from data bus - */ - rtc_data_seg(RW) : org = 0x600fe000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC + /* We reduced the size of rtc_iram_seg by RESERVE_RTC_MEM value. + It reserves the amount of RTC fast memory that we use for this memory segment. + This segment is intended for keeping: + - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). + - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on). + The aim of this is to keep data that will not be moved around and have a fixed address. + */ + rtc_reserved_seg(RW) : org = 0x600fe000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM /** * RTC slow memory (data accessible). Persists over deep sleep. * Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. */ - rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM, - len = 0x2000 - CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM +#if CONFIG_ULP_COPROC_ENABLED + rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM, + len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM +#else + rtc_slow_seg(RW) : org = 0x50000000 , len = 0x2000 +#endif // CONFIG_ULP_COPROC_ENABLED + /** + * `extern_ram_seg` and `drom0_0_seg` share the same bus and the address region. + * A dummy section is used to avoid overlap. See `.ext_ram.dummy` in `sections.ld.in` + */ + extern_ram_seg(RWX) : org = 0x3c000020 , len = 0x2000000-0x20 } +_diram_i_start = SRAM_DIRAM_I_START; + #if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE /* static data ends at defined address */ -_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN; +_heap_start = SRAM_DRAM_ORG + DRAM0_0_SEG_LEN; #else -_static_data_end = _bss_end; +_heap_start = _heap_low_start; #endif // CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE /* Heap ends at top of dram0_0_seg */ @@ -132,6 +132,10 @@ _heap_end = 0x40000000; _data_seg_org = ORIGIN(rtc_data_seg); + +/* RTC fast memory shares the same range for both data and instructions */ +REGION_ALIAS("rtc_data_seg", rtc_iram_seg ); + #if CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM REGION_ALIAS("rtc_data_location", rtc_data_seg ); #else diff --git a/cpu/esp32/vendor/ld/esp32s3/sections.ld.in b/cpu/esp32/vendor/ld/esp32s3/sections.ld.in new file mode 100644 index 0000000000..33bc3dcf38 --- /dev/null +++ b/cpu/esp32/vendor/ld/esp32s3/sections.ld.in @@ -0,0 +1,832 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ld.common" + +/* Default entry point */ +ENTRY(call_start_cpu0); + +SECTIONS +{ + /** + * RTC fast memory holds RTC wake stub code, + * including from any source file named rtc_wake_stub*.c + */ + .rtc.text : + { + ALIGNED_SYMBOL(4, _rtc_fast_start) + ALIGNED_SYMBOL(4, _rtc_text_start) + + *(.rtc.entry.literal .rtc.entry.text) + + *(.rtc.literal .rtc.text .rtc.text.*) + + *rtc_wake_stub*.*(.literal .text .literal.* .text.*) + *(.rtc_text_end_test) + + /* Padding for possible CPU prefetch + alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + + _rtc_text_end = ABSOLUTE(.); + } > rtc_iram_seg + + /** + * This section located in RTC FAST Memory area. + * It holds data marked with RTC_FAST_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_fast : + { + ALIGNED_SYMBOL(4, _rtc_force_fast_start) + + _coredump_rtc_fast_start = ABSOLUTE(.); + *(.rtc.fast.coredump .rtc.fast.coredump.*) + _coredump_rtc_fast_end = ABSOLUTE(.); + + *(.rtc.force_fast .rtc.force_fast.*) + + ALIGNED_SYMBOL(4, _rtc_force_fast_end) + } > rtc_data_seg + + /** + * RTC data section holds RTC wake stub + * data/rodata, including from any source file + * named rtc_wake_stub*.c and the data marked with + * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. + * The memory location of the data is dependent on + * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. + */ + .rtc.data : + { + _rtc_data_start = ABSOLUTE(.); + + _coredump_rtc_start = ABSOLUTE(.); + *(.rtc.coredump .rtc.coredump.*) + _coredump_rtc_end = ABSOLUTE(.); + *(.rtc.data .rtc.data.*) + *(.rtc.rodata .rtc.rodata.*) + + *rtc_wake_stub*.*(.data .rodata .data.* .rodata.*) + + _rtc_data_end = ABSOLUTE(.); + } > rtc_data_location + + /* RTC bss, from any source file named rtc_wake_stub*.c */ + .rtc.bss (NOLOAD) : + { + /* part that is initialized if not waking up from deep sleep */ + _rtc_bss_start = ABSOLUTE(.); + + *rtc_wake_stub*.*(.bss .bss.*) + *rtc_wake_stub*.*(COMMON) + + _rtc_bss_end = ABSOLUTE(.); + /* part that saves some data for rtc periph module, this part is + only initialized at power on reset */ + _rtc_bss_rtc_start = ABSOLUTE(.); + *(.rtc.bss .rtc.bss.*) */ + _rtc_bss_rtc_end = ABSOLUTE(.); + } > rtc_data_location + + /** + * This section holds data that should not be initialized at power up + * and will be retained during deep sleep. + * User data marked with RTC_NOINIT_ATTR will be placed + * into this section. See the file "esp_attr.h" for more information. + * The memory location of the data is dependent on + * CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM option. + */ + .rtc_noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_noinit_start) + + *(.rtc_noinit .rtc_noinit.*) + + ALIGNED_SYMBOL(4, _rtc_noinit_end) + } > rtc_data_location + + /** + * This section located in RTC SLOW Memory area. + * It holds data marked with RTC_SLOW_ATTR attribute. + * See the file "esp_attr.h" for more information. + */ + .rtc.force_slow : + { + ALIGNED_SYMBOL(4, _rtc_force_slow_start) + + *(.rtc.force_slow .rtc.force_slow.*) + + ALIGNED_SYMBOL(4, _rtc_force_slow_end) + } > rtc_slow_seg + + /** + * This section holds RTC data that should have fixed addresses. + * The data are not initialized at power-up and are retained during deep + * sleep. + */ + .rtc_reserved (NOLOAD): + { + ALIGNED_SYMBOL(4, _rtc_reserved_start) + + /** + * New data can only be added here to ensure existing data are not moved. + * Because data have adhered to the end of the segment and code is relied + * on it. + * >> put new data here << + */ + + *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) + KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + + _rtc_reserved_end = ABSOLUTE(.); + } > rtc_reserved_seg + + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; + ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), + "RTC reserved segment data does not fit.") + + /* Get size of rtc slow data based on rtc_data_location alias */ + _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_slow_end - _rtc_data_start) + : (_rtc_force_slow_end - _rtc_force_slow_start); + + _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location)) + ? (_rtc_force_fast_end - _rtc_fast_start) + : (_rtc_noinit_end - _rtc_fast_start); + + ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), + "RTC_SLOW segment data does not fit.") + + ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), + "RTC_FAST segment data does not fit.") + + /* Send .iram0 code to iram */ + .iram0.vectors : + { + _iram_start = ABSOLUTE(.); + /* Vectors go to IRAM */ + _vector_table = ABSOLUTE(.); + . = 0x0; + KEEP(*(.WindowVectors.text)); + . = 0x180; + KEEP(*(.Level2InterruptVector.text)); + . = 0x1c0; + KEEP(*(.Level3InterruptVector.text)); + . = 0x200; + KEEP(*(.Level4InterruptVector.text)); + . = 0x240; + KEEP(*(.Level5InterruptVector.text)); + . = 0x280; + KEEP(*(.DebugExceptionVector.text)); + . = 0x2c0; + KEEP(*(.NMIExceptionVector.text)); + . = 0x300; + KEEP(*(.KernelExceptionVector.text)); + . = 0x340; + KEEP(*(.UserExceptionVector.text)); + . = 0x3C0; + KEEP(*(.DoubleExceptionVector.text)); + . = 0x400; + _invalid_pc_placeholder = ABSOLUTE(.); + *(.*Vector.literal) + + *(.UserEnter.literal); + *(.UserEnter.text); + . = ALIGN (16); + *(.entry.literal) + *(.entry.text) + *(.init.literal) + *(.init) + + _init_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.text : + { + /* Code marked as running out of IRAM */ + _iram_text_start = ABSOLUTE(.); + + *(.iram1 .iram1.*) + + /* Xtensa basic functionality written in assembler should be placed in IRAM */ + *xtensa/*(.literal .text .literal.* .text.*) + /* parts of RIOT that should run in IRAM */ + + *core/*(.literal .text .literal.* .text.*) + *core_lib/*(.literal .text .literal.* .text.*) + *esp_common_periph/flash.*(.literal .text .literal.* .text.*) + *esp_common/thread_arch.*(.literal .text .literal.* .text.*) + *esp_freertos_common/*(.literal .text .literal.* .text.*) + *isrpipe/*(.literal .text .literal.* .text.*) + *stdio/stdio.*(.literal .text .literal.* .text.*) + *stdio_*/stdio*(.literal .text .literal.* .text.*) + *syscalls.*(.literal .text .literal.* .text.*) + *tsrb/*(.literal .text .literal.* .text.*) + + /* parts of ESP-IDF that should run in IRAM */ + /* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */ + /* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */ + *components/app_trace/app_trace.*(.literal .literal.* .text .text.*) + *components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*) + *components/app_trace/port/port_uart.*(.literal .literal.* .text .text.*) + *components/esp_driver_gptimer/src/gptimer.*(.literal.gptimer_default_isr .text.gptimer_default_isr) + *components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post) + *components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_reset .text.esp_cpu_reset) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_stall .text.esp_cpu_stall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_unstall .text.esp_cpu_unstall) + *components/esp_hw_support/cpu.*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr) + *components/esp_hw_support/esp_memory_utils.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/gdma.*(.literal.gdma_append .text.gdma_append) + *components/esp_hw_support/gdma.*(.literal.gdma_default_rx_isr .text.gdma_default_rx_isr) + *components/esp_hw_support/gdma.*(.literal.gdma_default_tx_isr .text.gdma_default_tx_isr) + *components/esp_hw_support/gdma.*(.literal.gdma_reset .text.gdma_reset) + *components/esp_hw_support/gdma.*(.literal.gdma_start .text.gdma_start) + *components/esp_hw_support/gdma.*(.literal.gdma_stop .text.gdma_stop) + *components/esp_hw_support/mspi_timing_by_mspi_delay.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/mspi_timing_config.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/mspi_timing_tuning.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable) + *components/esp_hw_support/periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable) + *components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config) + *components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config) + *components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/sar_periph_ctrl.*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable) + *components/esp_hw_support/sleep_console.*(.literal .literal.* .text .text.*) + *components/esp_hw_support/*/systimer.*(.literal .literal.* .text .text.*) + *components/esp_mm/esp_cache.*(.literal .literal.* .text .text.*) + *components/esp_psram/*/esp_psram_impl_*(.literal .literal.* .text .text.*) + *components/esp_psram/mmu_psram_flash*(.literal .literal.* .text .text.*) + *components/esp_ringbuf/*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_cache_writeback_esp32s3.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_print.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_sys.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_systimer.*(.literal .literal.* .text .text.*) + *components/esp_rom/patches/esp_rom_wdt.*(.literal .literal.* .text .text.*) + *components/esp_system/esp_err.*(.literal .literal.* .text .text.*) + *components/esp_system/port/esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort) + *components/esp_system/port/image_process.*(.literal .literal.* .text .text.*) + *components/esp_system/ubsan.*(.literal .literal.* .text .text.*) + *components/esp_wifi/*/esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive) + *components/esp_wifi/src/wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap) + + *libclang_rt.builtins.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:_divsf3.*(.literal .literal.* .text .text.*) + *libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*) + *libgcov.a:(.literal .literal.* .text .text.*) + *libg_nano.a:libc_a-mem*(.literal .literal.* .text .text.*) + + *components/hal/cache_hal.*(.literal .literal.* .text .text.*) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_append .text.gdma_ahb_hal_append) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_clear_intr .text.gdma_ahb_hal_clear_intr) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_get_eof_desc_addr .text.gdma_ahb_hal_get_eof_desc_addr) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_read_intr_status .text.gdma_ahb_hal_read_intr_status) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_reset .text.gdma_ahb_hal_reset) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_start_with_desc .text.gdma_ahb_hal_start_with_desc) + *components/hal/gdma_hal_ahb_v1.*(.literal.gdma_ahb_hal_stop .text.gdma_ahb_hal_stop) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_append .text.gdma_hal_append) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_clear_intr .text.gdma_hal_clear_intr) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_get_eof_desc_addr .text.gdma_hal_get_eof_desc_addr) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_read_intr_status .text.gdma_hal_read_intr_status) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_reset .text.gdma_hal_reset) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_start_with_desc .text.gdma_hal_start_with_desc) + *components/hal/gdma_hal_top.*(.literal.gdma_hal_stop .text.gdma_hal_stop) + *components/hal/gpio_hal.*(.literal.gpio_hal_isolate_in_sleep .text.gpio_hal_isolate_in_sleep) + *components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/mmu_hal.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*) + *components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*) + *components/hal/systimer_hal.*(.literal .literal.* .text .text.*) + *components/hal/timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value) + *components/heap/multi_heap.*(.literal.assert_valid_block .text.assert_valid_block) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl .text.multi_heap_aligned_alloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_impl_offs .text.multi_heap_aligned_alloc_impl_offs) + *components/heap/multi_heap.*(.literal.multi_heap_aligned_alloc_offs .text.multi_heap_aligned_alloc_offs) + *components/heap/multi_heap.*(.literal.multi_heap_free_impl .text.multi_heap_free_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_allocated_size_impl .text.multi_heap_get_allocated_size_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_block_address_impl .text.multi_heap_get_block_address_impl) + *components/heap/multi_heap.*(.literal.multi_heap_get_first_block .text.multi_heap_get_first_block) + *components/heap/multi_heap.*(.literal.multi_heap_get_next_block .text.multi_heap_get_next_block) + *components/heap/multi_heap.*(.literal.multi_heap_internal_lock .text.multi_heap_internal_lock) + *components/heap/multi_heap.*(.literal.multi_heap_internal_unlock .text.multi_heap_internal_unlock) + *components/heap/multi_heap.*(.literal.multi_heap_is_free .text.multi_heap_is_free) + *components/heap/multi_heap.*(.literal.multi_heap_malloc_impl .text.multi_heap_malloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_realloc_impl .text.multi_heap_realloc_impl) + *components/heap/multi_heap.*(.literal.multi_heap_set_lock .text.multi_heap_set_lock) + *tlsf/tlsf.*(.literal.tlsf_alloc_overhead .text.tlsf_alloc_overhead) + *tlsf/tlsf.*(.literal.tlsf_block_size .text.tlsf_block_size) + *tlsf/tlsf.*(.literal.tlsf_free .text.tlsf_free) + *tlsf/tlsf.*(.literal.tlsf_get_pool .text.tlsf_get_pool) + *tlsf/tlsf.*(.literal.tlsf_malloc .text.tlsf_malloc) + *tlsf/tlsf.*(.literal.tlsf_memalign .text.tlsf_memalign) + *tlsf/tlsf.*(.literal.tlsf_memalign_offs .text.tlsf_memalign_offs) + *tlsf/tlsf.*(.literal.tlsf_realloc .text.tlsf_realloc) + *tlsf/tlsf.*(.literal.tlsf_size .text.tlsf_size) + *components/log/*/log_lock.*(.literal .literal.* .text .text.*) + *components/log/*/log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp) + *components/log/*/log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp) + *components/log/*/log_write.*(.literal.esp_log_write .text.esp_log_write) + + *libnet80211.a:(.wifi0iram .wifi0iram.*) + *libnet80211.a:(.wifirxiram .wifirxiram.*) + *libnet80211.a:(.wifislprxiram .wifislprxiram.*) + + *components/newlib/abort.*(.literal .literal.* .text .text.*) + *components/newlib/assert.*(.literal .literal.* .text .text.*) + *components/newlib/heap.*(.literal .literal.* .text .text.*) + *components/newlib/stdatomic.*(.literal .literal.* .text .text.*) + + *libpp.a:(.wifi0iram .wifi0iram.*) + *libpp.a:(.wifiorslpiram .wifiorslpiram.*) + *libpp.a:(.wifirxiram .wifirxiram.*) + *libpp.a:(.wifislprxiram .wifislprxiram.*) + *librtc.a:(.literal .literal.* .text .text.*) + + *components/soc/lldesc.*(.literal .literal.* .text .text.*) + *components/spi_flash/flash_brownout_hook.*(.literal .literal.* .text .text.*) + *components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_hpm_enable.*(.literal .literal.* .text .text.*) + *components/spi_flash/*/spi_flash_oct_flash_init.*(.literal .literal.* .text .text.*) + *components/spi_flash/spi_flash_wrap.*(.literal .literal.* .text .text.*) + + *libxt_hal.a:(.literal .literal.* .text .text.*) + + *components/xtensa/*(.literal .literal.* .text .text.*) + } > iram0_0_seg + + /** + * This section is required to skip .iram0.text area because iram0_0_seg and + * dram0_0_seg reflect the same address space on different buses. + */ + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0); + } > dram0_0_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + KEEP (*(SORT(.xfa.*))) + *(.gnu.linkonce.s.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .data.*) + + *(.dram1 .dram1.*) + _coredump_dram_start = ABSOLUTE(.); + *(.dram2.coredump .dram2.coredump.*) + _coredump_dram_end = ABSOLUTE(.); + + *components/app_trace/app_trace.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/app_trace_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/app_trace/port/port_uart.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + . = ALIGN(4); + _bt_data_start = ABSOLUTE(.); + *libbt.a:(.data .data.*) + . = ALIGN(4); + _bt_data_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_data_start = ABSOLUTE(.); + *libbtdm_app.a:(.data .data.*) + . = ALIGN(4); + _bt_controller_data_end = ABSOLUTE(.); + + *components/esp_hw_support/esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/mspi_timing_by_mspi_delay.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/mspi_timing_config.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/mspi_timing_tuning.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/rtc_clk.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/sleep_console.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_hw_support/*/systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_mm/esp_cache.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_psram/*/esp_psram_impl_*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_psram/mmu_psram_flash*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_cache_writeback_esp32s3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_print.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_spiflash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_sys.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_systimer.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_rom/patches/esp_rom_wdt.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/esp_err.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/port/image_process.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/esp_system/ubsan.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *libclang_rt.builtins.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcc.a:_divsf3.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libgcov.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/hal/cache_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/i2c_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/ledc_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/mmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_flash_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/spi_slave_hal_iram.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/hal/systimer_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/log/log_lock.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + _nimble_data_start = ABSOLUTE(.); + *libnimble.a:(.data .data.*) + . = ALIGN(4); + _nimble_data_end = ABSOLUTE(.); + *libphy.a:(.rodata .rodata.*) + + *components/newlib/abort.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/assert.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/heap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/newlib/stdatomic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *libphy.a:(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + + *components/soc/lldesc.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/flash_brownout_hook.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/memspi_host_driver.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_mxic*.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_hpm_enable.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_oct_flash_init.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *components/spi_flash/spi_flash_wrap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + _data_end = ABSOLUTE(.); + } > dram0_0_seg + + /** + * This section holds data that should not be initialized at power up. + * The section located in Internal SRAM memory region. The macro _NOINIT + * can be used as attribute to place data into this section. + * See the "esp_attr.h" file for more information. + */ + .noinit (NOLOAD): + { + ALIGNED_SYMBOL(4, _noinit_start) + + *(.noinit .noinit.*) + + ALIGNED_SYMBOL(4, _noinit_end) + } > dram0_0_seg + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(8, _bss_start) + + /** + * ldgen places all bss-related data to mapping[dram0_bss] + * (See components/esp_system/app.lf). + */ + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss EXCLUDE_FILE(*libbt.a *libbtdm_app.a) .bss.*) + *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem) + *(.ext_ram.bss .ext_ram.bss.*) + *(EXCLUDE_FILE(*libbt.a *libbtdm_app.a) COMMON) + . = ALIGN(4); + _bt_bss_start = ABSOLUTE(.); + *libbt.a:(.bss .bss.*) + . = ALIGN(4); + _bt_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_common_start = ABSOLUTE(.); + *libbt.a:(COMMON) + . = ALIGN(4); + _bt_common_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_bss_start = ABSOLUTE(.); + *libbtdm_app.a:(.bss .bss.*) + . = ALIGN(4); + _bt_controller_bss_end = ABSOLUTE(.); + . = ALIGN(4); + _bt_controller_common_start = ABSOLUTE(.); + *libbtdm_app.a:(COMMON) + . = ALIGN(4); + _bt_controller_common_end = ABSOLUTE(.); + + _nimble_bss_start = ABSOLUTE(.); + *libnimble.a:(.bss .bss.* COMMON) + . = ALIGN(4); + _nimble_bss_end = ABSOLUTE(.); + + ALIGNED_SYMBOL(8, _bss_end) + } > dram0_0_seg + + ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") + + .flash.text : + { + _stext = .; + /** + * Mark the start of flash.text. + * This can be used by the MMU driver to maintain the virtual address. + */ + _instruction_reserved_start = ABSOLUTE(.); + _text_start = ABSOLUTE(.); + *(.literal .literal.* .text .text.*) + + *(.wifi0iram .wifi0iram.*) + *(.wifiextrairam .wifiextrairam.*) + *(.wifiorslpiram .wifiorslpiram.*) + *(wifirxiram .wifirxiram.*) + *(.wifislpiram .wifislpiram.*) + *(.wifislprxiram .wifislprxiram.*) + + *(.stub) + *(.gnu.warning) + *(.gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + + /** + * CPU will try to prefetch up to 16 bytes of of instructions. + * This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, add + * dummy bytes to ensure this + */ + . += _esp_flash_mmap_prefetch_pad_size; + + _text_end = ABSOLUTE(.); + /** + * Mark the flash.text end. + * This can be used for MMU driver to maintain virtual address. + */ + _instruction_reserved_end = ABSOLUTE(.); + _etext = .; + + /** + * Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + _flash_cache_start = ABSOLUTE(0); + } > default_code_seg + + /** + * Dummy section represents the .flash.text section but in default_rodata_seg. + * Thus, it must have its alignment and (at least) its size. + */ + .flash_rodata_dummy (NOLOAD): + { + _flash_rodata_dummy_start = ABSOLUTE(.); + + . = ALIGN(ALIGNOF(.flash.text)) + SIZEOF(.flash.text); + + /* Add alignment of MMU page size + 0x20 bytes for the mapping header. */ + . = ALIGN(_esp_mmu_page_size) + 0x20; + } > default_rodata_seg + + .flash.appdesc : ALIGN(0x10) + { + /** + * Mark flash.rodata start. + * This can be used for mmu driver to maintain virtual address + */ + _rodata_reserved_start = ABSOLUTE(.); + _rodata_start = ABSOLUTE(.); + + /* !DO NOT PUT ANYTHING BEFORE THIS! */ + + /* Should be the first. App version info. */ + *(.rodata_desc .rodata_desc.*) + /* Should be the second. Custom app version info. */ + *(.rodata_custom_desc .rodata_custom_desc.*) + + /** + * Create an empty gap within this section. Thanks to this, the end of this + * section will match .flah.rodata's begin address. Thus, both sections + * will be merged when creating the final bin image. + */ + . = ALIGN(ALIGNOF(.flash.rodata)); + } > default_rodata_seg + ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata) + + .flash.rodata : ALIGN(0x10) + { + _flash_rodata_start = ABSOLUTE(.); + + *(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *(.rodata_wlog_error .rodata_wlog_error.*) + *(.rodata_wlog_info .rodata_wlog_info.*) + *(.rodata_wlog_warning .rodata_wlog_warning.*) + + KEEP (*(SORT(.roxfa.*))) + + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + + /* C++ exception handlers table. */ + ALIGNED_SYMBOL(4, __XT_EXCEPTION_TABLE_) + *(.xt_except_table) + *(.gcc_except_table .gcc_except_table.*) + *(.gnu.linkonce.e.*) + + ALIGNED_SYMBOL(4, __XT_EXCEPTION_DESCS_) + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + +#if CONFIG_COMPILER_CXX_EXCEPTIONS + ALIGNED_SYMBOL(4, __eh_frame) + KEEP(*(.eh_frame)) + /** + * As we are not linking with crtend.o, which includes the CIE terminator + * (see __FRAME_END__ in libgcc sources), it is manually provided here. + */ + LONG(0); +#endif // CONFIG_COMPILER_CXX_EXCEPTIONS + + /** + * C++ constructor tables. + * + * Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt. + */ + ALIGNED_SYMBOL(4, __init_array_start) + KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*))) + __init_array_end = ABSOLUTE(.); + + /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */ + ALIGNED_SYMBOL(4, soc_reserved_memory_region_start) + KEEP (*(.reserved_memory_address)) + soc_reserved_memory_region_end = ABSOLUTE(.); + + /* System init functions registered via ESP_SYSTEM_INIT_FN */ + ALIGNED_SYMBOL(4, _esp_system_init_fn_array_start) + KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*))) + _esp_system_init_fn_array_end = ABSOLUTE(.); + + _rodata_end = ABSOLUTE(.); + + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + + /* TLS data. */ + ALIGNED_SYMBOL(4, _thread_local_start) + *(.tdata) + *(.tdata.*) + *(.tbss) + *(.tbss.*) + _thread_local_end = ABSOLUTE(.); + } > default_rodata_seg + + _flash_rodata_align = ALIGNOF(.flash.rodata); + + /** + * This section contains all the rodata that is not used + * at runtime, helping to avoid an increase in binary size. + */ + .flash.rodata_noload (NOLOAD) : + { + /** + * This symbol marks the end of flash.rodata. It can be utilized by the MMU + * driver to maintain the virtual address. + * NOLOAD rodata may not be included in this section. + */ + _rodata_reserved_end = ABSOLUTE(.); + + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + _fp_mmu_start = .; + _fp_mmu_end = . + CONFIG_ESP_FLASHPAGE_CAPACITY; + + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + + *(.rodata_wlog_debug .rodata_wlog_debug.*) + *(.rodata_wlog_verbose .rodata_wlog_verbose.*) + } > default_rodata_seg + + /** + * Dummy section to skip flash rodata sections. + * Because to `extern_ram_seg` and `drom0_0_seg` are on the same bus + */ + .ext_ram.dummy (NOLOAD): + { + . = ORIGIN(extern_ram_seg); + . = . + (_rodata_reserved_end - _flash_rodata_dummy_start); + . = ALIGN (_esp_mmu_page_size); + } > extern_ram_seg + +#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY + /* This section holds .ext_ram.bss data, and will be put in PSRAM */ + .ext_ram.bss (NOLOAD) : + { + _ext_ram_bss_start = ABSOLUTE(.); + + mapping[extern_ram] + + ALIGNED_SYMBOL(4, _ext_ram_bss_end) + } > extern_ram_seg +#endif //CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY + +#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY + /** + * This section holds data that won't be initialised when startup. + * This section locates in External RAM region. + */ + .ext_ram_noinit (NOLOAD) : + { + _ext_ram_noinit_start = ABSOLUTE(.); + + *(.ext_ram_noinit*) + + ALIGNED_SYMBOL(4, _ext_ram_noinit_end) + } > extern_ram_seg +#endif //CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY + + /* Marks the end of IRAM code segment */ + .iram0.text_end (NOLOAD) : + { + /* Padding for possible CPU prefetch + alignment for PMS split lines */ + . += _esp_memprot_prefetch_pad_size; + . = ALIGN(_esp_memprot_align_size); + + /* iram_end_test section exists for use by memprot unit tests only */ + *(.iram_end_test) + + _iram_text_end = ABSOLUTE(.); + } > iram0_0_seg + + .iram0.data : + { + ALIGNED_SYMBOL(4, _iram_data_start) + + *(.iram.data .iram.data.*) + _coredump_iram_start = ABSOLUTE(.); + *(.iram2.coredump .iram2.coredump.*) + _coredump_iram_end = ABSOLUTE(.); + + ALIGNED_SYMBOL(4, _iram_data_end) + } > iram0_0_seg + + .iram0.bss (NOLOAD) : + { + ALIGNED_SYMBOL(4, _iram_bss_start) + + *(.iram.bss .iram.bss.*) + + _iram_bss_end = ABSOLUTE(.); + ALIGNED_SYMBOL(4, _iram_end) + } > iram0_0_seg + + /* Marks the end of data, bss and possibly rodata */ + .dram0.heap_start (NOLOAD) : + { + /* Lowest possible start address for the heap */ + ALIGNED_SYMBOL(8, _heap_low_start) + _sheap = ABSOLUTE(.); + } > dram0_0_seg + + + . = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); + _eheap = ABSOLUTE(.); + + . = _heap_end; + +#include "elf_misc.ld.in" +} + +ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), + "IRAM0 segment data does not fit.") + +ASSERT(((_heap_low_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), + "DRAM segment data does not fit.") diff --git a/cpu/esp32/vendor/ld/ld.common b/cpu/esp32/vendor/ld/ld.common new file mode 100644 index 0000000000..5a71350819 --- /dev/null +++ b/cpu/esp32/vendor/ld/ld.common @@ -0,0 +1,80 @@ +/* + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "sdkconfig.h" + +/* CPU instruction prefetch padding size for flash mmap scenario */ +#define _esp_flash_mmap_prefetch_pad_size 16 + +/* + * PMP region granularity size + * Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones + * to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set, + * the PMP granularity is 2^G+2 bytes. + */ +#ifdef CONFIG_SOC_CPU_PMP_REGION_GRANULARITY +#define _esp_pmp_align_size CONFIG_SOC_CPU_PMP_REGION_GRANULARITY +#else +#define _esp_pmp_align_size 0 +#endif + +/* CPU instruction prefetch padding size for memory protection scenario */ +#ifdef CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE +#define _esp_memprot_prefetch_pad_size CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE +#else +#define _esp_memprot_prefetch_pad_size 0 +#endif + +/* Memory alignment size for PMS */ +#ifdef CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE +#define _esp_memprot_align_size CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE +#else +#define _esp_memprot_align_size 0 +#endif + +#if CONFIG_APP_BUILD_TYPE_RAM +#define _esp_mmu_page_size 0 +#else +#define _esp_mmu_page_size CONFIG_MMU_PAGE_SIZE +#endif + +#define ALIGN_UP(SIZE, AL) (((SIZE) + (AL - 1)) & ~(AL - 1)) + +#if CONFIG_SOC_RTC_MEM_SUPPORTED + #if CONFIG_BOOTLOADER_RESERVE_RTC_MEM + #ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC + #define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE) + #else + #define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE) + #endif // not CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC + #else + #define ESP_BOOTLOADER_RESERVE_RTC 0 + #endif // not CONFIG_BOOTLOADER_RESERVE_RTC_MEM + + /* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */ + #define RTC_TIMER_RESERVE_RTC (24) + + #if CONFIG_IDF_TARGET_ESP32 + #define RESERVE_RTC_MEM (RTC_TIMER_RESERVE_RTC) + #elif CONFIG_ESP_ROM_HAS_LP_ROM && CONFIG_ULP_COPROC_ENABLED + /* RTC Reserved is placed before ULP memory, expand it to make sure the ULP start address + has the required alignment */ + #define ULP_ALIGNMENT_REQ_BYTES 256 + #define RESERVE_RTC_MEM ALIGN_UP(ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC, ULP_ALIGNMENT_REQ_BYTES) + #else + #define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC) + #endif + +#endif // SOC_RTC_MEM_SUPPORTED + +#define QUOTED_STRING(STRING) #STRING +#define ASSERT_SECTIONS_GAP(PREV_SECTION, NEXT_SECTION) \ +ASSERT((ADDR(NEXT_SECTION) == ADDR(PREV_SECTION) + SIZEOF(PREV_SECTION)), \ + QUOTED_STRING(The gap between PREV_SECTION and NEXT_SECTION must not exist to produce the final bin image.)) + +#define ALIGNED_SYMBOL(X, SYMBOL) \ + . = ALIGN(X); \ + SYMBOL = ABSOLUTE(.); diff --git a/cpu/esp8266/freertos/portable.c b/cpu/esp8266/freertos/portable.c index 3e33f6791b..7bd85c597e 100644 --- a/cpu/esp8266/freertos/portable.c +++ b/cpu/esp8266/freertos/portable.c @@ -21,18 +21,8 @@ unsigned _xt_tick_divisor = 0; /* cached number of cycles per tick */ -extern void vTaskEnterCritical( portMUX_TYPE *mux ); -extern void vTaskExitCritical( portMUX_TYPE *mux ); - -void vPortEnterCritical(void) -{ - vTaskEnterCritical(0); -} - -extern void vPortExitCritical(void) -{ - vTaskExitCritical(0); -} +extern void vPortEnterCritical(void); +extern void vPortExitCritical(void); /* source: /path/to/esp8266-rtos-sdk/components/freertos/port/esp8266/port.c */ void IRAM_ATTR vPortETSIntrLock(void) diff --git a/cpu/esp8266/include/uart_ll.h b/cpu/esp8266/include/uart_ll.h new file mode 100644 index 0000000000..4afd1695f3 --- /dev/null +++ b/cpu/esp8266/include/uart_ll.h @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2025 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +#pragma once + +/** + * @ingroup cpu_esp8266 + * @{ + * + * @file + * @brief Low-level UART driver for source code compatibility with ESP-IDF + * @author Gunar Schorcht + */ + +#ifndef DOXYGEN + +#include "esp8266/uart_struct.h" +#include "esp8266/uart_register.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define UART_SCLK_DEFAULT 1 + +#define UART_LL_FIFO_DEF_LEN (128) +#define UART_LL_INTR_MASK ((uint32_t)~0) + +typedef uart_data_bits_t uart_word_length_t; +typedef unsigned int soc_module_clk_t; + +static inline void uart_ll_set_sclk(uart_dev_t *hw, soc_module_clk_t source) +{ + /* dummy function for source code compatibility with ESP32 */ + (void)hw; + (void)source; +} + +static inline void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud, uint32_t sclk_freq) +{ + hw->clk_div.val = (sclk_freq / baud) & 0xFFFFF; +} + +static inline void uart_ll_set_stop_bits(uart_dev_t *hw, uart_stop_bits_t bits) +{ + hw->conf0.stop_bit_num = bits; +} + +static inline void uart_ll_set_data_bit_num(uart_dev_t *hw, uart_word_length_t data_bit) +{ + hw->conf0.bit_num = data_bit; +} + +static inline void uart_ll_set_parity(uart_dev_t *hw, uart_parity_t parity_mode) +{ + hw->conf0.parity = (parity_mode & 0x1); + hw->conf0.parity_en = ((parity_mode >> 1) & 0x1); +} + +static inline uint32_t uart_ll_get_rxfifo_len(uart_dev_t *hw) +{ + return hw->status.rxfifo_cnt; +} + +static inline uint32_t uart_ll_get_txfifo_len(uart_dev_t *hw) +{ + return UART_LL_FIFO_DEF_LEN - hw->status.txfifo_cnt; +} + +static inline void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_t rd_len) +{ + for (int i = 0; i < (int)rd_len; i++) { + buf[i] = hw->fifo.rw_byte; + } +} + +static inline void uart_ll_write_txfifo(uart_dev_t *hw, const uint8_t *buf, uint32_t wr_len) +{ + for (int i = 0; i < (int)wr_len; i++) { + hw->fifo.rw_byte = (int)buf[i]; + } +} + +static inline void uart_ll_rxfifo_rst(uart_dev_t *hw) +{ + hw->conf0.rxfifo_rst = 1; + hw->conf0.rxfifo_rst = 0; +} + +static inline void uart_ll_txfifo_rst(uart_dev_t *hw) +{ + hw->conf0.rxfifo_rst = 1; + hw->conf0.rxfifo_rst = 0; +} + +static inline void uart_ll_set_rxfifo_full_thr(uart_dev_t *hw, uint16_t full_thrhd) +{ + hw->conf1.rxfifo_full_thrhd = full_thrhd; +} + +static inline uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw) +{ + return hw->int_st.val; +} + +static inline void uart_ll_ena_intr_mask(uart_dev_t *hw, uint32_t mask) +{ + hw->int_ena.val = hw->int_ena.val | mask; +} + +static inline void uart_ll_clr_intsts_mask(uart_dev_t *hw, uint32_t mask) +{ + hw->int_clr.val = mask; +} + +static inline uint32_t uart_ll_get_intr_ena_status(uart_dev_t *hw) +{ + return hw->int_ena.val; +} + +#ifdef __cplusplus +} +#endif + +#endif /* DOXYGEN */ +/** @} */ diff --git a/cpu/esp_common/Makefile.dep b/cpu/esp_common/Makefile.dep index 346861af49..e90aefbd88 100644 --- a/cpu/esp_common/Makefile.dep +++ b/cpu/esp_common/Makefile.dep @@ -95,6 +95,7 @@ endif ifneq (,$(filter esp_wifi_any,$(USEMODULE))) USEMODULE += netopt USEMODULE += ztimer_msec + USEMODULE += ztimer_sec endif ifneq (,$(filter esp_eth esp_wifi esp_now,$(USEMODULE))) diff --git a/cpu/esp_common/Makefile.include b/cpu/esp_common/Makefile.include index dfac223566..45006f1843 100644 --- a/cpu/esp_common/Makefile.include +++ b/cpu/esp_common/Makefile.include @@ -38,6 +38,12 @@ ifeq (xtensa,$(CPU_ARCH)) CFLAGS += -mlongcalls -mtext-section-literals endif +# Since there is not yet a working mechanism on ESPs to get the caller address +# within a function, `assert` always outputs 0x0 as the caller address. +# This makes absolutely no sense and makes debugging more difficult. +# `DEBUG_ASSERT_VERBOSE` is therefore enabled by default on ESPs. +CFLAGS += -DDEBUG_ASSERT_VERBOSE + OPTIONAL_CFLAGS_BLACKLIST += -Wformat-overflow OPTIONAL_CFLAGS_BLACKLIST += -Wformat-truncation OPTIONAL_CFLAGS_BLACKLIST += -gz diff --git a/cpu/esp_common/esp-now/esp_now_netdev.c b/cpu/esp_common/esp-now/esp_now_netdev.c index 881f4d7b1b..c074846ad7 100644 --- a/cpu/esp_common/esp-now/esp_now_netdev.c +++ b/cpu/esp_common/esp-now/esp_now_netdev.c @@ -32,6 +32,8 @@ #include "esp_event_loop.h" #else #include "esp_event.h" +#include "esp_event_legacy.h" +#include "esp_mac.h" #endif #include "esp_now.h" #include "esp_system.h" @@ -201,7 +203,11 @@ static const uint8_t _esp_now_mac[6] = { 0x82, 0x73, 0x79, 0x84, 0x79, 0x83 }; / static bool _in_recv_cb = false; +#ifdef CPU_ESP8266 static IRAM_ATTR void esp_now_recv_cb(const uint8_t *mac, const uint8_t *data, int len) +#else +static IRAM_ATTR void esp_now_recv_cb(const esp_now_recv_info_t *mac, const uint8_t *data, int len) +#endif { #if ESP_NOW_UNICAST if (!_esp_now_scan_peers_done) { @@ -241,7 +247,11 @@ static IRAM_ATTR void esp_now_recv_cb(const uint8_t *mac, const uint8_t *data, i return; } +#ifdef CPU_ESP8266 _esp_now_dev.rx_mac = (uint8_t*)mac; +#else + _esp_now_dev.rx_mac = mac->src_addr; +#endif _esp_now_dev.rx_data = (uint8_t*)data; _esp_now_dev.rx_len = len; @@ -275,7 +285,7 @@ static void IRAM_ATTR esp_now_send_cb(const uint8_t *mac, esp_now_send_status_t */ static esp_err_t IRAM_ATTR _esp_system_event_handler(void *ctx, system_event_t *event) { - switch(event->event_id) { + switch (event->event_id) { case SYSTEM_EVENT_STA_START: DEBUG("%s WiFi started\n", __func__); break; @@ -322,14 +332,14 @@ esp_now_netdev_t *netdev_esp_now_setup(void) esp_err_t result; -#if CONFIG_ESP32_WIFI_NVS_ENABLED +#if CONFIG_ESP_WIFI_NVS_ENABLED result = nvs_flash_init(); if (result != ESP_OK) { LOG_TAG_ERROR("esp_now", "nfs_flash_init failed with return value %d\n", result); return NULL; } -#endif /* CONFIG_ESP32_WIFI_NVS_ENABLED */ +#endif /* CONFIG_ESP_WIFI_NVS_ENABLED */ /* initialize the WiFi driver with default configuration */ wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); diff --git a/cpu/esp_common/esp-riscv/irq_arch.c b/cpu/esp_common/esp-riscv/irq_arch.c index 1f152d4aa8..4a04cc025d 100644 --- a/cpu/esp_common/esp-riscv/irq_arch.c +++ b/cpu/esp_common/esp-riscv/irq_arch.c @@ -21,8 +21,7 @@ #include "irq_arch.h" #include "esp_attr.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" +#include "esp_cpu.h" #include "soc/periph_defs.h" #define ENABLE_DEBUG 0 diff --git a/cpu/esp_common/esp-wifi/Makefile b/cpu/esp_common/esp-wifi/Makefile index c92f98eb6d..be4d47aeac 100644 --- a/cpu/esp_common/esp-wifi/Makefile +++ b/cpu/esp_common/esp-wifi/Makefile @@ -4,6 +4,8 @@ ifeq (esp8266,$(CPU)) # we have to do it in that way to avoid that pkg/lwip is found first CFLAGS += -I$(ESP8266_RTOS_SDK_DIR)/components/lwip/lwip/src/include CFLAGS += -I$(ESP8266_RTOS_SDK_DIR)/components/lwip/port/esp8266/include/ +else + INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_partition/include endif include $(RIOTBASE)/Makefile.base diff --git a/cpu/esp_common/esp-wifi/esp_wifi_netdev.c b/cpu/esp_common/esp-wifi/esp_wifi_netdev.c index 50a0ba1de4..ec98c8f0a2 100644 --- a/cpu/esp_common/esp-wifi/esp_wifi_netdev.c +++ b/cpu/esp_common/esp-wifi/esp_wifi_netdev.c @@ -32,6 +32,7 @@ #include "esp_event_loop.h" #else #include "esp_event.h" +#include "esp_event_legacy.h" #endif #ifndef MODULE_ESP_WIFI_AP #include "esp_now.h" @@ -47,7 +48,7 @@ #include "nvs_flash.h" #ifdef MODULE_ESP_WIFI_ENTERPRISE -#include "esp_wpa2.h" +#include "esp_eap_client.h" #endif #include "esp_wifi_params.h" @@ -927,13 +928,13 @@ void esp_wifi_setup (esp_wifi_netdev_t* dev) mutex_init(&g_intr_lock_mux); #endif -#if CONFIG_ESP32_WIFI_NVS_ENABLED +#if CONFIG_ESP_WIFI_NVS_ENABLED result = nvs_flash_init(); if (result != ESP_OK) { ESP_WIFI_LOG_ERROR("nfs_flash_init failed with return value %d", result); return; } -#endif /* CONFIG_ESP32_WIFI_NVS_ENABLED */ +#endif /* CONFIG_ESP_WIFI_NVS_ENABLED */ wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); result = esp_wifi_init(&cfg); @@ -1010,20 +1011,20 @@ void esp_wifi_setup (esp_wifi_netdev_t* dev) #endif #ifdef WIFI_EAP_ID - esp_wifi_sta_wpa2_ent_set_identity((const unsigned char *)WIFI_EAP_ID, - strlen(WIFI_EAP_ID)); + esp_eap_client_set_identity((const unsigned char *)WIFI_EAP_ID, + strlen(WIFI_EAP_ID)); #endif /* WIFI_EAP_ID */ #if defined(WIFI_EAP_USER) && defined(WIFI_EAP_PASS) ESP_WIFI_DEBUG("eap_user=%s eap_pass=%s\n", WIFI_EAP_USER, WIFI_EAP_PASS); - esp_wifi_sta_wpa2_ent_set_username((const unsigned char *)WIFI_EAP_USER, - strlen(WIFI_EAP_USER)); - esp_wifi_sta_wpa2_ent_set_password((const unsigned char *)WIFI_EAP_PASS, - strlen(WIFI_EAP_PASS)); + esp_eap_client_set_username((const unsigned char *)WIFI_EAP_USER, + strlen(WIFI_EAP_USER)); + esp_eap_client_set_password((const unsigned char *)WIFI_EAP_PASS, + strlen(WIFI_EAP_PASS)); #else /* defined(WIFI_EAP_USER) && defined(WIFI_EAP_PASS) */ #error "WIFI_EAP_USER and WIFI_EAP_PASS have to be defined for EAP phase 2 authentication" #endif /* defined(WIFI_EAP_USER) && defined(WIFI_EAP_PASS) */ - esp_wifi_sta_wpa2_ent_enable(); + esp_wifi_sta_enterprise_enable(); #endif /* defined(MODULE_ESP_WIFI_ENTERPRISE) && !defined(MODULE_ESP_WIFI_AP) */ /* start the WiFi driver */ diff --git a/cpu/esp_common/esp-xtensa/thread_arch.c b/cpu/esp_common/esp-xtensa/thread_arch.c index 59ab91d57b..c37ea4685c 100644 --- a/cpu/esp_common/esp-xtensa/thread_arch.c +++ b/cpu/esp_common/esp-xtensa/thread_arch.c @@ -286,6 +286,9 @@ void IRAM_ATTR thread_yield_higher(void) ets_soft_int_type = ETS_SOFT_INT_YIELD; WSR(BIT(ETS_SOFT_INUM), interrupt); critical_exit(); +#elif defined(__XTENSA__) + /* generate the software interrupt to switch the context */ + WSR(BIT(CPU_INUM_SOFTWARE), interrupt); #elif defined(DPORT_CPU_INTR_FROM_CPU_0_REG) /* generate the software interrupt to switch the context */ DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0); diff --git a/cpu/esp_common/freertos/portable.c b/cpu/esp_common/freertos/portable.c index 22a524d4ca..a4f1107839 100644 --- a/cpu/esp_common/freertos/portable.c +++ b/cpu/esp_common/freertos/portable.c @@ -47,4 +47,14 @@ bool xPortCanYield(void) return irq_is_enabled(); } +void vPortEnterCritical(void) +{ + vTaskEnterCritical(0); +} + +void vPortExitCritical(void) +{ + vTaskExitCritical(0); +} + #endif /* DOXYGEN */ diff --git a/cpu/esp_common/freertos/queue.c b/cpu/esp_common/freertos/queue.c index 4305858a67..2c92b741dc 100644 --- a/cpu/esp_common/freertos/queue.c +++ b/cpu/esp_common/freertos/queue.c @@ -35,24 +35,57 @@ #include "freertos/semphr.h" #include "freertos/task.h" -/* - * In FreeRTOS different types of semaphores, mutexes and queues are all - * mapped to a single generic queue type. With all these different types, - * single functions for send, receive, give and take are then used. To be - * able to dsitinguish between these different types in RIOT, we need typed - * objects. - */ -typedef struct { - uint8_t type; /* type of the queue, MUST be the first element */ - list_node_t sending; /* threads that are waiting to send */ - list_node_t receiving; /* threads that are waiting to receive */ - uint8_t* queue; /* the queue of waiting items */ - uint32_t item_size; /* size of each item in the queue */ - uint32_t item_num; /* num of items that can be stored in queue */ - uint32_t item_front; /* first item in queue */ - uint32_t item_tail; /* last item in queue */ - uint32_t item_level; /* num of items stored in queue */ -} _queue_t; +QueueHandle_t xQueueCreateStatic( const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + uint8_t *pucQueueStorageBuffer, + StaticQueue_t *pxQueueBuffer ) + +{ + DEBUG("%s pid=%d len=%u size=%u storage=%p buffer=%p\n", __func__, + thread_getpid(), + uxQueueLength, uxItemSize, pucQueueStorageBuffer, pxQueueBuffer); + + _queue_t *queue = (_queue_t *)pxQueueBuffer; + uint32_t queue_size = uxQueueLength * uxItemSize; + + assert(queue != NULL); + memset(queue, 0, sizeof(_queue_t)); + + if (uxItemSize) { + assert(pucQueueStorageBuffer != NULL); + memset(pucQueueStorageBuffer, 0, uxQueueLength * uxItemSize); + } + + queue->type = queueQUEUE_TYPE_BASE; + queue->stat = true; + queue->receiving.next = NULL; + queue->sending.next = NULL; + queue->queue = (queue_size) ? pucQueueStorageBuffer : NULL; + queue->item_num = uxQueueLength; + queue->item_size = uxItemSize; + queue->item_front = 0; + queue->item_tail = 0; + queue->item_level = 0; + + return queue; +} + +BaseType_t xQueueGetStaticBuffers( QueueHandle_t xQueue, + uint8_t **ppucQueueStorage, + StaticQueue_t **ppxStaticQueue ) +{ + _queue_t *queue = (_queue_t *)xQueue; + + assert(queue != NULL); + assert(ppxStaticQueue != NULL); + + if (ppucQueueStorage) { + *ppucQueueStorage = queue->queue; + } + *ppxStaticQueue = queue; + + return pdTRUE; +} QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, @@ -62,24 +95,19 @@ QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, thread_getpid(), uxQueueLength, uxItemSize, ucQueueType); uint32_t queue_size = uxQueueLength * uxItemSize; - _queue_t* queue = malloc(sizeof(_queue_t) + queue_size); + _queue_t *queue = malloc(sizeof(_queue_t) + queue_size); assert(queue != NULL); - memset(queue, 0, sizeof(_queue_t) + queue_size); + QueueHandle_t handle; + handle = xQueueCreateStatic(uxQueueLength, uxItemSize, + (uint8_t*)queue + sizeof(_queue_t), queue); queue->type = ucQueueType; - queue->receiving.next = NULL; - queue->sending.next = NULL; - queue->queue = (queue_size) ? (uint8_t*)queue + sizeof(_queue_t) : NULL; - queue->item_num = uxQueueLength; - queue->item_size = uxItemSize; - queue->item_front = 0; - queue->item_tail = 0; - queue->item_level = 0; + queue->stat = false; DEBUG("queue=%p\n", queue); - return queue; + return handle; } #define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 ) @@ -106,12 +134,49 @@ QueueHandle_t xQueueCreateCountingSemaphore (const UBaseType_t uxMaxCount, return queue; } +QueueHandle_t xQueueCreateCountingSemaphoreStatic(const UBaseType_t uxMaxCount, + const UBaseType_t uxInitialCount, + StaticQueue_t *pxStaticQueue) +{ + assert(pxStaticQueue); + assert(uxMaxCount != 0); + assert(uxInitialCount <= uxMaxCount); + + _queue_t *queue = (_queue_t *)pxStaticQueue; + + DEBUG("%s pid=%d queue=%p max=%d initial=%d\n", __func__, + thread_getpid(), queue, uxMaxCount, uxInitialCount); + + if (xQueueCreateStatic(uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, + NULL, pxStaticQueue) == NULL) { + return NULL; + } + + queue->type = queueQUEUE_TYPE_COUNTING_SEMAPHORE; + queue->item_level = uxInitialCount; + queue->item_tail = (queue->item_front + queue->item_level) % queue->item_num; + + return queue; +} + +QueueHandle_t xQueueCreateWithCaps(const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + const UBaseType_t uxMemoryCaps) +{ + (void)uxMemoryCaps; + return xQueueGenericCreate(uxQueueLength, uxItemSize, queueQUEUE_TYPE_BASE); +} + void vQueueDelete( QueueHandle_t xQueue ) { DEBUG("%s pid=%d queue=%p\n", __func__, thread_getpid(), xQueue); assert(xQueue != NULL); - free(xQueue); + + _queue_t* queue = (_queue_t*)xQueue; + if (!(queue->stat)) { + free(queue); + } } BaseType_t IRAM_ATTR xQueueReset( QueueHandle_t xQueue ) diff --git a/cpu/esp_common/freertos/task.c b/cpu/esp_common/freertos/task.c index b0af92d702..ef4026cae3 100644 --- a/cpu/esp_common/freertos/task.c +++ b/cpu/esp_common/freertos/task.c @@ -148,6 +148,14 @@ void vTaskSuspend(TaskHandle_t xTaskToSuspend) } } +void vTaskSuspendAll(void) +{ + /* TODO: + * It has to be implemented once there is a mechanism in RIOT to suspend + * the scheduler without disabling interrupts. At the moment it is a + * placeholder to make the linker happy. */ +} + void vTaskResume(TaskHandle_t xTaskToResume) { extern volatile thread_t *sched_active_thread; @@ -158,6 +166,12 @@ void vTaskResume(TaskHandle_t xTaskToResume) thread_wakeup (pid); } +BaseType_t xTaskResumeAll(void) +{ + /* TODO */ + return pdFALSE; +} + void vTaskDelay(const TickType_t xTicksToDelay) { DEBUG("%s xTicksToDelay=%"PRIu32"\n", __func__, xTicksToDelay); diff --git a/cpu/esp_common/include/freertos/FreeRTOS.h b/cpu/esp_common/include/freertos/FreeRTOS.h index 48788173a5..ac1642f4ac 100644 --- a/cpu/esp_common/include/freertos/FreeRTOS.h +++ b/cpu/esp_common/include/freertos/FreeRTOS.h @@ -21,6 +21,10 @@ extern "C" { #define configTASK_NOTIFICATION_ARRAY_ENTRIES 1 #define configMAX_PRIORITIES SCHED_PRIO_LEVELS +#ifndef configSTACK_DEPTH_TYPE +#define configSTACK_DEPTH_TYPE uint32_t +#endif + #ifndef configASSERT #define configASSERT assert #endif diff --git a/cpu/esp_common/include/freertos/idf_additions.h b/cpu/esp_common/include/freertos/idf_additions.h new file mode 100644 index 0000000000..f10cb9152b --- /dev/null +++ b/cpu/esp_common/include/freertos/idf_additions.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2024 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + * + * FreeRTOS to RIOT-OS adaption module for source code compatibility + */ + +#pragma once + +#ifndef DOXYGEN + +#include "freertos/FreeRTOS.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* DOXYGEN */ diff --git a/cpu/esp_common/include/freertos/portmacro.h b/cpu/esp_common/include/freertos/portmacro.h index 40431e9277..40e02a8647 100644 --- a/cpu/esp_common/include/freertos/portmacro.h +++ b/cpu/esp_common/include/freertos/portmacro.h @@ -18,6 +18,7 @@ #ifndef CPU_ESP8266 #include "esp_heap_caps.h" #include "esp_timer.h" +#include "soc/soc.h" #endif #include "mutex.h" diff --git a/cpu/esp_common/include/freertos/queue.h b/cpu/esp_common/include/freertos/queue.h index a7fc66e2c0..f44ee0461e 100644 --- a/cpu/esp_common/include/freertos/queue.h +++ b/cpu/esp_common/include/freertos/queue.h @@ -13,6 +13,7 @@ #ifndef DOXYGEN #include "freertos/FreeRTOS.h" +#include "list.h" #ifdef __cplusplus extern "C" { @@ -22,15 +23,57 @@ extern "C" { typedef void* QueueHandle_t; +/* + * In FreeRTOS different types of semaphores, mutexes and queues are all + * mapped to a single generic queue type. With all these different types, + * single functions for send, receive, give and take are then used. To be + * able to distinguish between these different types in RIOT, we need typed + * objects. + */ +typedef struct { + uint8_t type; /* type of the queue, MUST be the first element */ + bool stat; /* statically allocated queue memory */ + list_node_t sending; /* threads that are waiting to send */ + list_node_t receiving; /* threads that are waiting to receive */ + uint8_t* queue; /* the queue of waiting items */ + uint32_t item_size; /* size of each item in the queue */ + uint32_t item_num; /* num of items that can be stored in queue */ + uint32_t item_front; /* first item in queue */ + uint32_t item_tail; /* last item in queue */ + uint32_t item_level; /* num of items stored in queue */ +} _queue_t; + +typedef _queue_t StaticQueue_t; +typedef _queue_t StaticSemaphore_t; + QueueHandle_t xQueueGenericCreate (const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType); +QueueHandle_t xQueueCreateStatic( const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + uint8_t *pucQueueStorageBuffer, + StaticQueue_t *pxQueueBuffer ); + +BaseType_t xQueueGetStaticBuffers( QueueHandle_t xQueue, + uint8_t ** ppucQueueStorage, + StaticQueue_t ** ppxStaticQueue ); + QueueHandle_t xQueueCreateCountingSemaphore (const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount); +QueueHandle_t xQueueCreateCountingSemaphoreStatic(const UBaseType_t uxMaxCount, + const UBaseType_t uxInitialCount, + StaticQueue_t *pxStaticQueue); + +QueueHandle_t xQueueCreateWithCaps(const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + const UBaseType_t uxMemoryCaps); + void vQueueDelete (QueueHandle_t xQueue); +#define vQueueDeleteWithCaps vQueueDelete + BaseType_t xQueueReset (QueueHandle_t xQueue); BaseType_t xQueueGenericReceive (QueueHandle_t xQueue, diff --git a/cpu/esp_common/include/freertos/semphr.h b/cpu/esp_common/include/freertos/semphr.h index 351b794532..fe234f2d83 100644 --- a/cpu/esp_common/include/freertos/semphr.h +++ b/cpu/esp_common/include/freertos/semphr.h @@ -75,6 +75,10 @@ void vPortCPUReleaseMutex (portMUX_TYPE *mux); xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), \ ( pxHigherPriorityTaskWoken ) ) +#define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) \ + xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), \ + ( pxSemaphoreBuffer ) ) + #ifdef __cplusplus } #endif diff --git a/cpu/esp_common/periph/flash.c b/cpu/esp_common/periph/flash.c index d760b07129..ed86512f45 100644 --- a/cpu/esp_common/periph/flash.c +++ b/cpu/esp_common/periph/flash.c @@ -31,18 +31,18 @@ #include "mtd.h" -#include "esp_partition.h" - #ifndef CPU_ESP8266 +#include "esp_flash.h" +#include "esp_flash_internal.h" #include "esp_flash_partitions.h" -#include "esp_spi_flash.h" #include "rom/cache.h" -#include "rom/spi_flash.h" +#include "esp_rom_spiflash.h" #include "soc/soc.h" #else /* !CPU_ESP8266 */ +#include "esp_partition.h" #include "esp_flash_data_types.h" #include "rom_functions.h" #include "spi_flash.h" @@ -78,6 +78,35 @@ VFS_AUTO_MOUNT(littlefs2, { .dev = &_flash_dev }, VFS_DEFAULT_NVM(0), 0); extern esp_spi_flash_chip_t flashchip; extern uint32_t spi_flash_get_id(void); +#else + +static inline esp_err_t spi_flash_erase_range(size_t start_address, size_t size) +{ + esp_err_t res; + uint32_t state = irq_disable(); + res = esp_flash_erase_region(esp_flash_default_chip, start_address, size); + irq_restore(state); + return res; +} + +static inline esp_err_t spi_flash_write(size_t dest_addr, const void *src, size_t size) +{ + esp_err_t res; + uint32_t state = irq_disable(); + res = esp_flash_write(esp_flash_default_chip, src, dest_addr, size); + irq_restore(state); + return res; +} + +static inline esp_err_t spi_flash_read(size_t src_addr, void *dest, size_t size) +{ + esp_err_t res; + uint32_t state = irq_disable(); + res = esp_flash_read(esp_flash_default_chip, dest, src_addr, size); + irq_restore(state); + return res; +} + #endif /* CPU_ESP8266 */ /* forward declaration of mtd functions */ @@ -149,7 +178,7 @@ void spi_flash_drive_init(void) esp_partition_info_t* part = (esp_partition_info_t*)(uintptr_t)part_buf; while (part_read && part_addr < ESP_PART_TABLE_ADDR + ESP_PART_TABLE_SIZE) { - spi_flash_read (part_addr, (void*)part_buf, ESP_PART_ENTRY_SIZE); + spi_flash_read(part_addr, (void*)part_buf, ESP_PART_ENTRY_SIZE); if (part->magic == ESP_PART_ENTRY_MAGIC) { DEBUG("%s partition @%08"PRIx32" size=%08"PRIx32" label=%s\n", __func__, diff --git a/cpu/esp_common/periph/i2c_sw.c b/cpu/esp_common/periph/i2c_sw.c index 51acce914e..6fa71cfc2c 100644 --- a/cpu/esp_common/periph/i2c_sw.c +++ b/cpu/esp_common/periph/i2c_sw.c @@ -424,9 +424,9 @@ static inline void _i2c_delay(_i2c_bus_t* bus) __asm__ __volatile__("rsr %0,ccount":"=a" (ccount)); } #else - uint32_t start = cpu_hal_get_cycle_count(); + uint32_t start = esp_cpu_get_cycle_count(); uint32_t wait_until = start + cycles; - while (cpu_hal_get_cycle_count() < wait_until) { } + while (esp_cpu_get_cycle_count() < wait_until) { } #endif } } diff --git a/cpu/esp_common/periph/uart.c b/cpu/esp_common/periph/uart.c index 117aa91180..a515509b8f 100644 --- a/cpu/esp_common/periph/uart.c +++ b/cpu/esp_common/periph/uart.c @@ -47,7 +47,7 @@ #if defined(CPU_ESP8266) #include "esp/iomux_regs.h" -#include "esp8266/uart_struct.h" +#include "uart_ll.h" #ifdef MODULE_ESP_QEMU #include "esp/uart_regs.h" @@ -59,11 +59,12 @@ #else /* defined(CPU_ESP8266) */ -#include "driver/periph_ctrl.h" +#include "esp_cpu.h" +#include "esp_private/periph_ctrl.h" #include "esp_rom_gpio.h" #include "esp_rom_uart.h" -#include "hal/interrupt_controller_types.h" -#include "hal/interrupt_controller_ll.h" +#include "hal/uart_ll.h" +#include "soc/clk_tree_defs.h" #include "soc/gpio_reg.h" #include "soc/gpio_sig_map.h" #include "soc/gpio_struct.h" @@ -71,9 +72,13 @@ #include "soc/rtc.h" #include "soc/soc_caps.h" #include "soc/uart_pins.h" -#include "soc/uart_reg.h" -#include "soc/uart_struct.h" +/* UART_CLK_FREQ corresponds to APB_CLK_FREQ for ESP32, ESP32-S2, ESP32-S3, + * ESP32-C2 and ESP32-C3, which is a fixed frequency of 80 MHz. However, + * this only applies to CPU clock frequencies of 80 MHz and above. + * For lower CPU clock frequencies, the APB clock corresponds to the CPU clock + * frequency. Therefore, we need to determine the actual UART clock frequency + * from the actual APB clock frequency. */ #undef UART_CLK_FREQ #define UART_CLK_FREQ rtc_clk_apb_freq_get() /* APB_CLK is used */ @@ -189,7 +194,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) gpio_set_pin_usage(uart_config[uart].txd, _UART); gpio_set_pin_usage(uart_config[uart].rxd, _UART); - esp_rom_uart_tx_wait_idle(uart); + esp_rom_output_tx_wait_idle(uart); esp_rom_gpio_connect_out_signal(uart_config[uart].txd, _uarts[uart].signal_txd, false, false); esp_rom_gpio_connect_in_signal(uart_config[uart].rxd, @@ -250,7 +255,7 @@ void uart_system_init(void) { for (unsigned uart = 0; uart < UART_NUMOF; uart++) { /* reset all UART interrupt status registers */ - _uarts[uart].regs->int_clr.val = ~0; + uart_ll_clr_intsts_mask(_uarts[uart].regs, UART_LL_INTR_MASK); } #ifndef CPU_ESP8266 /* reset the pin usage of the default UART0 pins to GPIO to allow @@ -276,7 +281,7 @@ void uart_print_config(void) static void IRAM _uart_intr_handler(void *arg) { - /* to satisfy the compiler */ + /* to satisfy the compiler */ (void)arg; irq_isr_enter(); @@ -285,14 +290,10 @@ static void IRAM _uart_intr_handler(void *arg) interrupt, so we have to use the status to distinguish interruptees */ for (unsigned uart = 0; uart < UART_NUMOF; uart++) { if (_uarts[uart].used) { - DEBUG("%s uart=%d int_st=%08x\n", __func__, - uart, (unsigned)_uarts[uart].regs->int_st.val); + uint32_t int_st = uart_ll_get_intsts_mask(_uarts[uart].regs); + DEBUG("%s uart=%d int_st=%08"PRIx32"\n", __func__, uart, int_st); -#ifdef CPU_FAM_ESP32S3 - if (_uarts[uart].used && _uarts[uart].regs->int_st.rxfifo_full_int_st) { -#else - if (_uarts[uart].used && _uarts[uart].regs->int_st.rxfifo_full) { -#endif + if (_uarts[uart].used && (int_st & UART_RXFIFO_FULL_INT_ST)) { /* read one byte of data */ uint8_t data = _uart_rx_one_char(uart); /* if registered, call the RX callback function */ @@ -300,28 +301,21 @@ static void IRAM _uart_intr_handler(void *arg) _uarts[uart].isr_ctx.rx_cb(_uarts[uart].isr_ctx.arg, data); } /* clear interrupt flag */ -#ifdef CPU_FAM_ESP32S3 - _uarts[uart].regs->int_clr.rxfifo_full_int_clr = 1; -#else - _uarts[uart].regs->int_clr.rxfifo_full = 1; -#endif + uart_ll_clr_intsts_mask(_uarts[uart].regs, UART_RXFIFO_FULL_INT_ST); } /* TODO handle other types of interrupts, for the moment just clear them */ - _uarts[uart].regs->int_clr.val = ~0x0; + uart_ll_clr_intsts_mask(_uarts[uart].regs, UART_LL_INTR_MASK); } } irq_isr_exit(); } -/* RX/TX FIFO capacity is 128 byte */ -#define UART_FIFO_MAX 128 - /* receive one data byte with wait */ static uint8_t IRAM _uart_rx_one_char(uart_t uart) { -#if defined(MODULE_ESP_QEMU) && defined(CPU_ESP8266) +#if defined(CPU_ESP8266) && defined(MODULE_ESP_QEMU) /* wait until at least von byte is in RX FIFO */ while (!FIELD2VAL(UART_STATUS_RXFIFO_COUNT, UART(uart).STATUS)) {} @@ -329,54 +323,37 @@ static uint8_t IRAM _uart_rx_one_char(uart_t uart) return UART(uart).FIFO & 0xff; /* only bit 0 ... 7 */ #else /* wait until at least von byte is in RX FIFO */ - while (!_uarts[uart].regs->status.rxfifo_cnt) {} + while (uart_ll_get_rxfifo_len(_uarts[uart].regs) == 0) {} -#if defined(CPU_FAM_ESP32) || defined(CPU_ESP8266) - /* read the lowest byte from RX FIFO register */ - return _uarts[uart].regs->fifo.rw_byte; -#elif defined(CPU_FAM_ESP32S3) - /* read the lowest byte from RX FIFO register */ - return _uarts[uart].regs->fifo.rxfifo_rd_byte; -#elif defined(CPU_FAM_ESP32S2) - return READ_PERI_REG(UART_FIFO_AHB_REG(uart)); -#else - /* read the lowest byte from RX FIFO register */ - return _uarts[uart].regs->ahb_fifo.rw_byte; -#endif -#endif + uint8_t data; + uart_ll_read_rxfifo(_uarts[uart].regs, &data, 1); + return data; +#endif } /* send one data byte with wait */ static void _uart_tx_one_char(uart_t uart, uint8_t data) { /* wait until at least one byte is available in the TX FIFO */ - while (_uarts[uart].regs->status.txfifo_cnt >= UART_FIFO_MAX) {} + while (!uart_ll_get_txfifo_len(_uarts[uart].regs)) {} /* send the byte by placing it in the TX FIFO using MPU */ -#ifdef CPU_ESP8266 -#ifdef MODULE_ESP_QEMU +#if defined(CPU_ESP8266) && defined(MODULE_ESP_QEMU) UART(uart).FIFO = data; -#else /* MODULE_ESP_QEMU */ - _uarts[uart].regs->fifo.rw_byte = data; -#endif /* MODULE_ESP_QEMU */ -#else /* CPU_ESP8266 */ - WRITE_PERI_REG(UART_FIFO_AHB_REG(uart), data); -#endif /* CPU_ESP8266 */ +#else + uart_ll_write_txfifo(_uarts[uart].regs, &data, 1); +#endif } static void _uart_intr_enable(uart_t uart) { -#ifdef CPU_FAM_ESP32S3 - _uarts[uart].regs->int_ena.rxfifo_full_int_ena = 1; - _uarts[uart].regs->int_clr.rxfifo_full_int_clr = 1; -#else - _uarts[uart].regs->int_ena.rxfifo_full = 1; - _uarts[uart].regs->int_clr.rxfifo_full = 1; -#endif + uart_ll_ena_intr_mask(_uarts[uart].regs, UART_RXFIFO_FULL_INT_RAW); + uart_ll_clr_intsts_mask(_uarts[uart].regs, UART_RXFIFO_FULL_INT_RAW); + _uarts[uart].used = true; - DEBUG("%s %08x\n", __func__, (unsigned)_uarts[uart].regs->int_ena.val); + DEBUG("%s %08"PRIx32"\n", __func__, uart_ll_get_intr_ena_status(_uarts[uart].regs)); } static void _uart_config(uart_t uart) @@ -395,15 +372,13 @@ static void _uart_config(uart_t uart) } /* reset the FIFOs */ - _uarts[uart].regs->conf0.rxfifo_rst = 1; - _uarts[uart].regs->conf0.rxfifo_rst = 0; - _uarts[uart].regs->conf0.txfifo_rst = 1; - _uarts[uart].regs->conf0.txfifo_rst = 0; + uart_ll_rxfifo_rst(_uarts[uart].regs); + uart_ll_txfifo_rst(_uarts[uart].regs); if (_uarts[uart].isr_ctx.rx_cb) { /* since reading can only be done byte by byte, we set UART_RXFIFO_FULL_THRHD interrupt level to 1 byte */ - _uarts[uart].regs->conf1.rxfifo_full_thrhd = 1; + uart_ll_set_rxfifo_full_thr(_uarts[uart].regs, 1); /* enable the RX FIFO FULL interrupt */ _uart_intr_enable(uart); @@ -416,11 +391,11 @@ static void _uart_config(uart_t uart) /* route all UART interrupt sources to same the CPU interrupt */ intr_matrix_set(PRO_CPU_NUM, _uarts[uart].int_src, CPU_INUM_UART); /* we have to enable therefore the CPU interrupt here */ - intr_cntrl_ll_set_int_handler(CPU_INUM_UART, _uart_intr_handler, NULL); - intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_UART)); + esp_cpu_intr_set_handler(CPU_INUM_UART, _uart_intr_handler, NULL); + esp_cpu_intr_enable(BIT(CPU_INUM_UART)); #ifdef SOC_CPU_HAS_FLEXIBLE_INTC /* set interrupt level */ - intr_cntrl_ll_set_int_level(CPU_INUM_UART, 1); + esp_cpu_intr_set_priority(CPU_INUM_UART, 1); #endif #endif /* CPU_ESP8266 */ } @@ -433,39 +408,14 @@ static int _uart_set_baudrate(uart_t uart, uint32_t baudrate) assert(uart < UART_NUMOF); /* wait until TX FIFO is empty */ - while (_uarts[uart].regs->status.txfifo_cnt != 0) { } + while (uart_ll_get_txfifo_len(_uarts[uart].regs) < UART_LL_FIFO_DEF_LEN) { } critical_enter(); _uarts[uart].baudrate = baudrate; -#ifdef CPU_ESP8266 - - /* compute and set clock divider */ - uint32_t clk_div = UART_CLK_FREQ / _uarts[uart].baudrate; - _uarts[uart].regs->clk_div.val = clk_div & 0xFFFFF; - -#else - -/* TODO look for an HAL/LL API function */ -#ifdef CPU_FAM_ESP32 - /* use APB_CLK */ - _uarts[uart].regs->conf0.tick_ref_always_on = 1; -#endif -#if defined(CPU_FAM_ESP32C3) || defined(CPU_FAM_ESP32S3) - _uarts[uart].regs->clk_conf.sclk_sel = 1; /* APB clock used instead of XTAL */ -#endif - /* compute and set the integral and the decimal part */ - uint32_t clk_div = (UART_CLK_FREQ << 4) / _uarts[uart].baudrate; -#ifdef CPU_FAM_ESP32S3 - _uarts[uart].regs->clkdiv.clkdiv = clk_div >> 4; - _uarts[uart].regs->clkdiv.clkdiv_frag = clk_div & 0xf; -#else - _uarts[uart].regs->clk_div.div_int = clk_div >> 4; - _uarts[uart].regs->clk_div.div_frag = clk_div & 0xf; -#endif /* CPU_FAM_ESP32S3 */ - -#endif + uart_ll_set_sclk(_uarts[uart].regs, (soc_module_clk_t)UART_SCLK_DEFAULT); + uart_ll_set_baudrate(_uarts[uart].regs, _uarts[uart].baudrate, UART_CLK_FREQ); critical_exit(); @@ -484,58 +434,43 @@ static int _uart_set_mode(uart_t uart, uart_data_bits_t data_bits, /* set number of data bits */ switch (data_bits) { - case UART_DATA_BITS_5: _uarts[uart].regs->conf0.bit_num = 0; break; - case UART_DATA_BITS_6: _uarts[uart].regs->conf0.bit_num = 1; break; - case UART_DATA_BITS_7: _uarts[uart].regs->conf0.bit_num = 2; break; - case UART_DATA_BITS_8: _uarts[uart].regs->conf0.bit_num = 3; break; + case UART_DATA_BITS_5: break; + case UART_DATA_BITS_6: break; + case UART_DATA_BITS_7: break; + case UART_DATA_BITS_8: break; default: LOG_TAG_ERROR("uart", "invalid number of data bits\n"); critical_exit(); return UART_NOMODE; } + uart_ll_set_data_bit_num(_uarts[uart].regs, (uart_word_length_t)data_bits); + /* store changed number of data bits in configuration */ _uarts[uart].data = data_bits; /* set number of stop bits */ -#ifdef CPU_ESP8266 switch (stop_bits) { - case UART_STOP_BITS_1: _uarts[uart].regs->conf0.stop_bit_num = 1; break; - case UART_STOP_BITS_2: _uarts[uart].regs->conf0.stop_bit_num = 3; break; + case UART_STOP_BITS_1: break; + case UART_STOP_BITS_2: break; default: LOG_TAG_ERROR("uart", "invalid number of stop bits\n"); critical_exit(); return UART_NOMODE; } -#else - /* workaround for hardware bug when stop bits are set to 2-bit mode. */ - switch (stop_bits) { - case UART_STOP_BITS_1: _uarts[uart].regs->conf0.stop_bit_num = 1; - _uarts[uart].regs->rs485_conf.dl1_en = 0; - break; - case UART_STOP_BITS_2: _uarts[uart].regs->conf0.stop_bit_num = 1; - _uarts[uart].regs->rs485_conf.dl1_en = 1; - break; - default: LOG_TAG_ERROR("uart", "invalid number of stop bits\n"); - critical_exit(); - return UART_NOMODE; - } -#endif + uart_ll_set_stop_bits(_uarts[uart].regs, stop_bits); /* store changed number of stop bits in configuration */ _uarts[uart].stop = stop_bits; /* set parity mode */ switch (parity) { - case UART_PARITY_NONE: _uarts[uart].regs->conf0.parity_en = 0; - break; - case UART_PARITY_EVEN: _uarts[uart].regs->conf0.parity = 0; - _uarts[uart].regs->conf0.parity_en = 1; - break; - case UART_PARITY_ODD: _uarts[uart].regs->conf0.parity = 1; - _uarts[uart].regs->conf0.parity_en = 1; - break; + case UART_PARITY_NONE: break; + case UART_PARITY_EVEN: break; + case UART_PARITY_ODD: break; default: LOG_TAG_ERROR("uart", "invalid or unsupported parity mode\n"); critical_exit(); return UART_NOMODE; } + uart_ll_set_parity(_uarts[uart].regs, parity); + /* store changed parity in configuration */ _uarts[uart].parity = parity; diff --git a/cpu/esp_common/syscalls.c b/cpu/esp_common/syscalls.c index ff61b80bfa..a1a5cea848 100644 --- a/cpu/esp_common/syscalls.c +++ b/cpu/esp_common/syscalls.c @@ -33,9 +33,16 @@ #include "syscalls.h" #ifdef MODULE_ESP_IDF_HEAP -#include "esp_heap_caps.h" +# include "esp_heap_caps.h" + +# ifndef CPU_ESP8266 /* for all ESP32x SoCs */ +# define MULTI_HEAP_FREERTOS /* allow multi-heap */ +# include "heap/multi_heap_platform.h" /* use multi-heap and */ +# include "heap/heap_private.h" /* use the `heaps_cap_*_default` functions */ +# endif + #else -#include "malloc.h" +# include "malloc.h" #endif #define ENABLE_DEBUG 0 @@ -90,6 +97,10 @@ static _lock_t *__malloc_static_object = NULL; #define _lock_critical_enter() uint32_t __lock_state = irq_disable(); #define _lock_critical_exit() irq_restore(__lock_state); +/* check whether `struct __lock` is large enough to hold a recursive mutex */ +static_assert(sizeof(struct __lock) >= sizeof(rmutex_t), + "struct __lock is too small to hold a recursive mutex of type rmutex_t"); + #endif void IRAM_ATTR _lock_init(_lock_t *lock) @@ -318,74 +329,25 @@ void IRAM_ATTR _lock_release_recursive(_lock_t *lock) _lock_critical_exit(); } -#if defined(_RETARGETABLE_LOCKING) - -/* check whether `struct __lock` is large enough to hold a recursive mutex */ -static_assert(sizeof(struct __lock) >= sizeof(rmutex_t), - "struct __lock is too small to hold a recursive mutex of type rmutex_t"); - -/* map newlib's `__retarget_*` functions to the existing `_lock_*` functions */ - -void __retarget_lock_init(_LOCK_T *lock) -{ - _lock_init(lock); -} - -extern void __retarget_lock_init_recursive(_LOCK_T *lock) -{ - _lock_init_recursive(lock); -} - -void __retarget_lock_close(_LOCK_T lock) -{ - _lock_close(&lock); -} - -void __retarget_lock_close_recursive(_LOCK_T lock) -{ - _lock_close_recursive(&lock); -} - -void __retarget_lock_acquire(_LOCK_T lock) -{ - _lock_acquire(&lock); -} - -void __retarget_lock_acquire_recursive(_LOCK_T lock) -{ - _lock_acquire_recursive(&lock); -} - -int __retarget_lock_try_acquire(_LOCK_T lock) -{ - return _lock_try_acquire(&lock); -} - -int __retarget_lock_try_acquire_recursive(_LOCK_T lock) -{ - return _lock_try_acquire_recursive(&lock); -} - -void __retarget_lock_release(_LOCK_T lock) -{ - _lock_release(&lock); -} - -void __retarget_lock_release_recursive(_LOCK_T lock) -{ - _lock_release(&lock); -} - -#endif /* _RETARGETABLE_LOCKING */ - /** * @name Memory allocation functions */ #ifdef MODULE_ESP_IDF_HEAP -#define heap_caps_malloc_default(s) heap_caps_malloc(s, MALLOC_CAP_DEFAULT) -#define heap_caps_realloc_default(p, s) heap_caps_realloc(p, s, MALLOC_CAP_DEFAULT) +/* For ESP8266, the `heap_caps_*_default` functions are simply mapped to the + * corresponding `heap_caps_*` functions because SPI RAM is not supported. + * But for ESP32x, where SPI RAM might be enabled, the implementation of the + * `heap_caps_*_default` functions of the ESP-IDF must be used, as these try + * to allocate memory blocks smaller than `CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL` + * from the internal memory first. This is important for some control data + * structures that must be located in the internal memory, such as the NVS + * partition table, in order to avoid access conflicts between SPI RAM and + * SPI flash memory. */ +# ifdef CPU_ESP8266 +# define heap_caps_malloc_default(s) heap_caps_malloc(s, MALLOC_CAP_DEFAULT) +# define heap_caps_realloc_default(p, s) heap_caps_realloc(p, s, MALLOC_CAP_DEFAULT) +# endif void* IRAM_ATTR __wrap__malloc_r(struct _reent *r, size_t size) { diff --git a/drivers/include/sdmmc/sdmmc.h b/drivers/include/sdmmc/sdmmc.h index f8e4f8671c..1381039732 100644 --- a/drivers/include/sdmmc/sdmmc.h +++ b/drivers/include/sdmmc/sdmmc.h @@ -269,7 +269,7 @@ typedef enum { [48 bit (16 bit RCA, 16 bit not defined) */ SDMMC_R6 = 6 | SDMMC_RESP_CRC, /**< Published RCA Response [48 bit (16 bit RCA, 16 bit card status) */ - SDMMC_R7 = 7 | SDMMC_RESP_CRC, /**< Card Interface Condition [48 bit] (32 bit data, + SDMMC_R7 = 7 | SDMMC_RESP_CRC, /**< Card Interface Condition [48 bit (32 bit data)], see section 4.9.6) */ } sdmmc_resp_t; /** @} */ diff --git a/drivers/sdmmc/sdmmc.c b/drivers/sdmmc/sdmmc.c index 26378c485a..fbee6f134d 100644 --- a/drivers/sdmmc/sdmmc.c +++ b/drivers/sdmmc/sdmmc.c @@ -462,7 +462,12 @@ int sdmmc_card_init(sdmmc_dev_t *dev) /* the card is either SD card, Combo card or MMC */ do { - _ZTIMER_SLEEP_MS(100); + /* According to the Physical Layer Simplified Specification + * Version 9.00 [[sdcard.org](https://www.sdcard.org)] section 4.4 + * "Clock Control", the polling interval for ACMD41 must be less than + * 50 ms, if the clock is stopped by the host and not continuous + * during ACMD41 polling until the card becomes ready. */ + _ZTIMER_SLEEP_MS(10); DEBUG("[sdmmc] send %s %s to test whether card is SDSC/SDXC or MMC card\n", cmd == SDMMC_ACMD41 ? "ACMD41" : "CMD1", arg & SDMMC_ACMD41_HCS ? "HCS=1" : "HCS=0"); @@ -540,8 +545,8 @@ int sdmmc_card_init(sdmmc_dev_t *dev) } else { DEBUG("[sdmmc] send CMD3 to get RCA\n"); - /* for SD cards, the card selects RCA and sends it back in R3 */ - res = _send_cmd(dev, SDMMC_CMD3, SDMMC_CMD_NO_ARG, SDMMC_R3, response); + /* for SD cards, the card selects RCA and sends it back in R6 */ + res = _send_cmd(dev, SDMMC_CMD3, SDMMC_CMD_NO_ARG, SDMMC_R6, response); dev->rca = response[0] >> 16; } if (res) { @@ -917,7 +922,7 @@ int sdmmc_read_sds(sdmmc_dev_t *dev, sdmmc_sd_status_t *sds) static int _send_cmd(sdmmc_dev_t *dev, sdmmc_cmd_t cmd_idx, uint32_t arg, sdmmc_resp_t resp_type, uint32_t *resp) { - DEBUG("[sdmmc] %s dev=%p cmd_idx=%u arg=%"PRIu32" resp_type=%u resp=%p\n", + DEBUG("[sdmmc] %s dev=%p cmd_idx=%u arg=0x%"PRIx32" resp_type=0x%x resp=%p\n", __func__, dev, cmd_idx, arg, resp_type, resp); #if !IS_USED(MODULE_PERIPH_SDMMC_AUTO_CLK) @@ -928,7 +933,25 @@ static int _send_cmd(sdmmc_dev_t *dev, sdmmc_cmd_t cmd_idx, uint32_t arg, } #endif - return dev->driver->send_cmd(dev, cmd_idx, arg, resp_type, resp); + int res = dev->driver->send_cmd(dev, cmd_idx, arg, resp_type, resp); + +#if ENABLE_DEBUG + if (!resp) { + return res; + } + + if (resp_type == SDMMC_R2) { + DEBUG("[sdmmc] %s dev=%p cmd_idx=%u " + "r[0]=0x%08"PRIx32" r[2]=0x%08"PRIx32" r[1]=0x%08"PRIx32" r[3]=0x%08"PRIx32"\n", + __func__, dev, cmd_idx, resp[0], resp[1], resp[2], resp[3]); + } + else if (resp_type != SDMMC_NO_R) { + DEBUG("[sdmmc] %s dev=%p cmd_idx=%u r=0x%08"PRIx32"\n", + __func__, dev, cmd_idx, *resp); + } +#endif + + return res; } static int _send_acmd(sdmmc_dev_t *dev, sdmmc_cmd_t cmd_idx, uint32_t arg, @@ -937,7 +960,7 @@ static int _send_acmd(sdmmc_dev_t *dev, sdmmc_cmd_t cmd_idx, uint32_t arg, uint32_t response; int res; - DEBUG("[sdmmc] %s dev=%p cmd_idx=%u arg=%"PRIu32" resp_type=%u resp=%p\n", + DEBUG("[sdmmc] %s dev=%p cmd_idx=%u arg=0x%"PRIx32" resp_type=0x%x resp=%p\n", __func__, dev, cmd_idx, arg, resp_type, resp); assert(cmd_idx & SDMMC_ACMD_PREFIX); diff --git a/drivers/ws281x/esp32.c b/drivers/ws281x/esp32.c index 4785cba9b0..e93f8b6f36 100644 --- a/drivers/ws281x/esp32.c +++ b/drivers/ws281x/esp32.c @@ -39,7 +39,8 @@ #ifdef MODULE_WS281X_ESP32_HW #include "esp_intr_alloc.h" -#include "driver/rmt.h" +#include "driver/rmt_encoder.h" +#include "driver/rmt_tx.h" #include "hal/rmt_types.h" #include "hal/rmt_ll.h" #include "soc/rmt_struct.h" @@ -50,12 +51,11 @@ #ifdef MODULE_WS281X_ESP32_HW -static uint32_t _ws281x_one_on; -static uint32_t _ws281x_one_off; -static uint32_t _ws281x_zero_on; -static uint32_t _ws281x_zero_off; static uint8_t channel; +static rmt_channel_handle_t ws821x_rmt_chn = NULL; +static rmt_encoder_handle_t ws821x_rmt_enc = NULL; + static uint8_t _rmt_channel(ws281x_t *dev) { for (unsigned i = 0; i < RMT_CH_NUMOF; i++) { @@ -72,7 +72,14 @@ void ws281x_write_buffer(ws281x_t *dev, const void *buf, size_t size) assert(dev); #ifdef MODULE_WS281X_ESP32_HW - rmt_write_sample(channel, (const uint8_t *)buf, size, false); + + rmt_transmit_config_t tx_config = { + .loop_count = 0, + .flags = { .eot_level = 0, .queue_nonblocking = 1, }, + }; + + rmt_transmit(ws821x_rmt_chn, ws821x_rmt_enc, buf, size, &tx_config); + #else const uint8_t *pos = buf; const uint8_t *end = pos + size; @@ -81,7 +88,7 @@ void ws281x_write_buffer(ws281x_t *dev, const void *buf, size_t size) uint32_t total_cycles, one_on, one_off, zero_on, zero_off, on_wait, off_wait; /* Current frequency */ - rtc_cpu_freq_t freq = esp_clk_cpu_freq(); + int freq = esp_clk_cpu_freq(); total_cycles = freq / (NS_PER_SEC / WS281X_T_DATA_NS); one_on = freq / (NS_PER_SEC / WS281X_T_DATA_ONE_NS); @@ -107,60 +114,89 @@ void ws281x_write_buffer(ws281x_t *dev, const void *buf, size_t size) off_wait = zero_off; } data <<= 1; - while (cpu_hal_get_cycle_count() < current_wait) { } + while (esp_cpu_get_cycle_count() < current_wait) { } /* end of LOW phase and start of HIGH phase */ - start = cpu_hal_get_cycle_count(); + start = esp_cpu_get_cycle_count(); gpio_set(dev->params.pin); current_wait = start + on_wait; - while (cpu_hal_get_cycle_count() < current_wait) { } + while (esp_cpu_get_cycle_count() < current_wait) { } /* end of HIGH phase and start of HIGH phase */ - start = cpu_hal_get_cycle_count(); + start = esp_cpu_get_cycle_count(); gpio_clear(dev->params.pin); current_wait = start + off_wait; } pos++; } /* final LOW phase */ - current_wait = cpu_hal_get_cycle_count(); + current_wait = esp_cpu_get_cycle_count(); /* end of final LOW phase */ #endif } #ifdef MODULE_WS281X_ESP32_HW -static void IRAM_ATTR ws2812_rmt_adapter(const void *src, - rmt_item32_t *dest, - size_t src_size, - size_t wanted_num, - size_t *translated_size, - size_t *item_num) { - if ((src == NULL) || (dest == NULL)) { - *translated_size = 0; - *item_num = 0; - return; + +#define WS281x_RMT_FREQ (40 * MHZ) +#define WS281x_RMT_CYCLES (WS281x_RMT_FREQ / (NS_PER_SEC / WS281X_T_DATA_NS)) + +#define WS281X_RMT_ZERO_ON (WS281x_RMT_FREQ / (NS_PER_SEC / WS281X_T_DATA_ZERO_NS)) +#define WS281X_RMT_ZERO_OFF (WS281x_RMT_CYCLES - WS281X_RMT_ZERO_ON) + +#define WS281X_RMT_ONE_ON (WS281x_RMT_FREQ / (NS_PER_SEC / WS281X_T_DATA_ONE_NS)) +#define WS281X_RMT_ONE_OFF (WS281x_RMT_CYCLES - WS281X_RMT_ONE_ON) + +#define WS281X_RMT_RST_ON ((WS281x_RMT_CYCLES * 50) >> 1) +#define WS281X_RMT_RST_OFF ((WS281x_RMT_CYCLES * 50) >> 1) + +#define WS2812_RMT_ZERO (rmt_symbol_word_t){ .level0 = 1, .duration0 = WS281X_RMT_ZERO_ON, \ + .level1 = 0, .duration1 = WS281X_RMT_ZERO_OFF, } +#define WS2812_RMT_ONE (rmt_symbol_word_t){ .level0 = 1, .duration0 = WS281X_RMT_ONE_ON, \ + .level1 = 0, .duration1 = WS281X_RMT_ONE_OFF, } +#define WS2812_RMT_RST (rmt_symbol_word_t){ .level0 = 1, .duration0 = WS281X_RMT_RST_ON, \ + .level1 = 0, .duration1 = WS281X_RMT_RST_OFF, } + +static size_t IRAM_ATTR ws2812_rmt_encoder_cb(const void *data, size_t data_size, + size_t symbols_written, + size_t symbols_free, + rmt_symbol_word_t *symbols, + bool *done, void *arg) +{ + assert(data != NULL); + assert(symbols != NULL); + assert(done != NULL); + + if (symbols_free < 8) { + /* 8 symbols are required to encode one byte */ + return 0; } - const rmt_item32_t bit0 = {{{ _ws281x_zero_on, 1, _ws281x_zero_off, 0 }}}; - const rmt_item32_t bit1 = {{{ _ws281x_one_on, 1, _ws281x_one_off, 0 }}}; + uint8_t *data_bytes = (uint8_t *)data; + size_t data_pos = symbols_written >> 3; /* current byte position in data */ + size_t symbol_num = 0; - size_t size = 0; - size_t num = 0; - uint8_t *psrc = (uint8_t *)src; - - while ((size < src_size) && (num < wanted_num)) { - uint8_t data = *psrc; + while ((data_pos < data_size) && (symbols_free >= 8)) { + /* write one byte */ + uint8_t byte = data_bytes[data_pos]; for (uint8_t cnt = 8; cnt > 0; cnt--) { - dest->val = (data & 0b10000000) ? bit1.val : bit0.val; - dest++; - num++; - data <<= 1; + /* write one symbol for the current bit of current data byte */ + *symbols = (byte & 0b10000000) ? WS2812_RMT_ONE : WS2812_RMT_ZERO; + symbols++; /* next symbol in symbol memory */ + symbol_num++; /* number of symbols written */ + symbols_free--; + byte <<= 1; } - size++; - psrc++; + data_pos++; } - *translated_size = size; - *item_num = num; + + if (data_pos == data_size) { + *symbols = WS2812_RMT_RST; + symbol_num++; + *done = true; + } + + return symbol_num; } -#endif + +#endif /* MODULE_WS281X_ESP32_HW */ int ws281x_init(ws281x_t *dev, const ws281x_params_t *params) { @@ -172,36 +208,34 @@ int ws281x_init(ws281x_t *dev, const ws281x_params_t *params) dev->params = *params; #ifdef MODULE_WS281X_ESP32_HW + const rmt_tx_channel_config_t ws821x_rmt_chn_config = { + .clk_src = RMT_CLK_SRC_DEFAULT, + .resolution_hz = WS281x_RMT_FREQ, + .gpio_num = params->pin, + .trans_queue_depth = 4, +#if 0 /* SOC_RMT_SUPPORT_DMA - does not work out-of-the-box with DMA */ + .flags.with_dma = true, + .mem_block_symbols = 64, /* can be 1.024 symbols (4 kByte) */ +#else + .flags.with_dma = false, + .mem_block_symbols = 64, /* at least 48, increase by multiples of 48 */ +#endif /* SOC_RMT_SUPPORT_DMA */ + }; + + const rmt_simple_encoder_config_t ws821x_rmt_enc_config = { + .callback = ws2812_rmt_encoder_cb, + .min_chunk_size = 64, + }; + static_assert(RMT_CH_NUMOF <= RMT_CH_NUMOF_MAX, "[ws281x_esp32] RMT configuration problem"); /* determine used RMT channel from configured GPIO */ channel = _rmt_channel(dev); - rmt_config_t cfg = RMT_DEFAULT_CONFIG_TX(params->pin, channel); - cfg.clk_div = 2; - - if ((rmt_config(&cfg) != ESP_OK) || - (rmt_driver_install(channel, 0, 0) != ESP_OK) || - (rmt_translator_init(channel, ws2812_rmt_adapter) != ESP_OK)) { - LOG_ERROR("[ws281x_esp32] RMT initialization failed\n"); - return -EIO; - } - - /* determine the current clock frequency */ - uint32_t freq; - if (rmt_get_counter_clock(channel, &freq) != ESP_OK) { - LOG_ERROR("[ws281x_esp32] Could not get RMT counter clock\n"); - return -EIO; - } - - /* compute phase times used in ws2812_rmt_adapter */ - uint32_t total_cycles = freq / (NS_PER_SEC / WS281X_T_DATA_NS); - _ws281x_one_on = freq / (NS_PER_SEC / WS281X_T_DATA_ONE_NS); - _ws281x_one_off = total_cycles - _ws281x_one_on; - _ws281x_zero_on = freq / (NS_PER_SEC / WS281X_T_DATA_ZERO_NS); - _ws281x_zero_off = total_cycles - _ws281x_zero_on; - + rmt_new_tx_channel(&ws821x_rmt_chn_config, &ws821x_rmt_chn); + rmt_new_simple_encoder(&ws821x_rmt_enc_config, &ws821x_rmt_enc); + rmt_enable(ws821x_rmt_chn); #else if (gpio_init(dev->params.pin, GPIO_OUT)) { return -EIO; diff --git a/pkg/esp32_sdk/Makefile b/pkg/esp32_sdk/Makefile index d3698fafa8..5f4d25e6c2 100644 --- a/pkg/esp32_sdk/Makefile +++ b/pkg/esp32_sdk/Makefile @@ -1,7 +1,7 @@ PKG_NAME=esp32_sdk PKG_URL=https://github.com/espressif/esp-idf -# v4.4.1 -PKG_VERSION=1329b19fe494500aeb79d19b27cfd99b40c37aec +# v5.4 +PKG_VERSION=c8bb53292d08d6449a09823cf554e62ac839cd8c PKG_LICENSE=Apache-2.0 include $(RIOTBASE)/pkg/pkg.mk diff --git a/pkg/esp32_sdk/patches/0001-compilation-avoid-multiple-definitions-of-macros.patch b/pkg/esp32_sdk/patches/0001-compilation-avoid-multiple-definitions-of-macros.patch new file mode 100644 index 0000000000..e26c26560f --- /dev/null +++ b/pkg/esp32_sdk/patches/0001-compilation-avoid-multiple-definitions-of-macros.patch @@ -0,0 +1,30 @@ +From b21ceb6f079a63d05552831d372de5d8bbda1173 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Mon, 20 Jan 2025 21:49:10 +0100 +Subject: [PATCH 01/28] compilation: avoid multiple definitions of macros + +--- + components/xtensa/include/xtensa/xtruntime-frames.h | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/components/xtensa/include/xtensa/xtruntime-frames.h b/components/xtensa/include/xtensa/xtruntime-frames.h +index b78095e0dd..4a5b4d356a 100644 +--- a/components/xtensa/include/xtensa/xtruntime-frames.h ++++ b/components/xtensa/include/xtensa/xtruntime-frames.h +@@ -29,6 +29,13 @@ + + #include + ++#ifdef STRUCT_BEGIN ++#undef STRUCT_BEGIN ++#undef STRUCT_FIELD ++#undef STRUCT_AFIELD ++#undef STRUCT_END ++#endif ++ + /* Macros that help define structures for both C and assembler: */ + #if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__) + +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0001-esp_hw_support-rename-rtc_init.patch b/pkg/esp32_sdk/patches/0001-esp_hw_support-rename-rtc_init.patch deleted file mode 100644 index b8a3b6dc2f..0000000000 --- a/pkg/esp32_sdk/patches/0001-esp_hw_support-rename-rtc_init.patch +++ /dev/null @@ -1,222 +0,0 @@ -From f3c3f97504da7d0bf25fa1e59d0350d130ca6eec Mon Sep 17 00:00:00 2001 -From: Benjamin Valentin -Date: Fri, 3 Jun 2022 00:02:07 +0200 -Subject: [PATCH] esp_hw_support: rename rtc_init - -Rename `rtc_init` to `rtc_init_module` due to name conflicts with RIOT `periph/rtc` module. ---- - components/esp_hw_support/port/esp32/rtc_init.c | 2 +- - components/esp_hw_support/port/esp32c3/rtc_init.c | 2 +- - components/esp_hw_support/port/esp32h2/rtc_init.c | 2 +- - components/esp_hw_support/port/esp32s2/rtc_init.c | 2 +- - components/esp_hw_support/port/esp32s3/rtc_init.c | 2 +- - components/esp_system/port/soc/esp32/clk.c | 2 +- - components/esp_system/port/soc/esp32c3/clk.c | 2 +- - components/esp_system/port/soc/esp32h2/clk.c | 2 +- - components/esp_system/port/soc/esp32s2/clk.c | 2 +- - components/esp_system/port/soc/esp32s3/clk.c | 2 +- - components/soc/esp32/include/soc/rtc.h | 2 +- - components/soc/esp32c3/include/soc/rtc.h | 2 +- - components/soc/esp32h2/include/soc/rtc.h | 2 +- - components/soc/esp32s2/include/soc/rtc.h | 2 +- - components/soc/esp32s3/include/soc/rtc.h | 2 +- - 15 files changed, 15 insertions(+), 15 deletions(-) - -diff --git a/components/esp_hw_support/port/esp32/rtc_init.c b/components/esp_hw_support/port/esp32/rtc_init.c -index e66a493b..7f1d1915 100644 ---- a/components/esp_hw_support/port/esp32/rtc_init.c -+++ b/components/esp_hw_support/port/esp32/rtc_init.c -@@ -14,7 +14,7 @@ - #include "soc/gpio_periph.h" - - --void rtc_init(rtc_config_t cfg) -+void rtc_init_module(rtc_config_t cfg) - { - CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU | RTC_CNTL_TXRF_I2C_PU | - RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU); -diff --git a/components/esp_hw_support/port/esp32c3/rtc_init.c b/components/esp_hw_support/port/esp32c3/rtc_init.c -index 388399f1..f6fdc692 100644 ---- a/components/esp_hw_support/port/esp32c3/rtc_init.c -+++ b/components/esp_hw_support/port/esp32c3/rtc_init.c -@@ -25,7 +25,7 @@ static void set_ocode_by_efuse(int calib_version); - static void calibrate_ocode(void); - static void set_rtc_dig_dbias(void); - --void rtc_init(rtc_config_t cfg) -+void rtc_init_module(rtc_config_t cfg) - { - REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0); - REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0); -diff --git a/components/esp_hw_support/port/esp32h2/rtc_init.c b/components/esp_hw_support/port/esp32h2/rtc_init.c -index 7b684d3d..ff0b5f49 100644 ---- a/components/esp_hw_support/port/esp32h2/rtc_init.c -+++ b/components/esp_hw_support/port/esp32h2/rtc_init.c -@@ -27,7 +27,7 @@ void pmu_ctl(void); - void dcdc_ctl(uint32_t mode); - void regulator_slt(regulator_config_t regula_cfg); - --void rtc_init(rtc_config_t cfg) -+void rtc_init_module(rtc_config_t cfg) - { - CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU); - REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); -diff --git a/components/esp_hw_support/port/esp32s2/rtc_init.c b/components/esp_hw_support/port/esp32s2/rtc_init.c -index 7932a89a..8910f7a2 100644 ---- a/components/esp_hw_support/port/esp32s2/rtc_init.c -+++ b/components/esp_hw_support/port/esp32s2/rtc_init.c -@@ -24,7 +24,7 @@ __attribute__((unused)) static const char *TAG = "rtc_init"; - static void set_ocode_by_efuse(int calib_version); - static void calibrate_ocode(void); - --void rtc_init(rtc_config_t cfg) -+void rtc_init_module(rtc_config_t cfg) - { - CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU); - REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); -diff --git a/components/esp_hw_support/port/esp32s3/rtc_init.c b/components/esp_hw_support/port/esp32s3/rtc_init.c -index ed44fd7b..f0b7f5c8 100644 ---- a/components/esp_hw_support/port/esp32s3/rtc_init.c -+++ b/components/esp_hw_support/port/esp32s3/rtc_init.c -@@ -31,7 +31,7 @@ static const char *TAG = "rtcinit"; - static void set_ocode_by_efuse(int calib_version); - static void calibrate_ocode(void); - --void rtc_init(rtc_config_t cfg) -+void rtc_init_module(rtc_config_t cfg) - { - REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0); - REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0); -diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c -index 3b3f2b73..c891224a 100644 ---- a/components/esp_system/port/soc/esp32/clk.c -+++ b/components/esp_system/port/soc/esp32/clk.c -@@ -115,7 +115,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) - __attribute__((weak)) void esp_clk_init(void) - { - rtc_config_t cfg = RTC_CONFIG_DEFAULT(); -- rtc_init(cfg); -+ rtc_init_module(cfg); - - #if (CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS || CONFIG_ESP32_APP_INIT_CLK) - /* Check the bootloader set the XTAL frequency. -diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c -index d2181b58..36ab8a40 100644 ---- a/components/esp_system/port/soc/esp32c3/clk.c -+++ b/components/esp_system/port/soc/esp32c3/clk.c -@@ -72,7 +72,7 @@ static const char *TAG = "clk"; - if (rst_reas == RESET_REASON_CHIP_POWER_ON) { - cfg.cali_ocode = 1; - } -- rtc_init(cfg); -+ rtc_init_module(cfg); - - assert(rtc_clk_xtal_freq_get() == RTC_XTAL_FREQ_40M); - -diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c -index 7ea2dde1..0061e39b 100644 ---- a/components/esp_system/port/soc/esp32h2/clk.c -+++ b/components/esp_system/port/soc/esp32h2/clk.c -@@ -71,7 +71,7 @@ static const char *TAG = "clk"; - if (rst_reas == RESET_REASON_CHIP_POWER_ON) { - cfg.cali_ocode = 1; - } -- rtc_init(cfg); -+ rtc_init_module(cfg); - - assert(rtc_clk_xtal_freq_get() == RTC_XTAL_FREQ_32M); - -diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c -index 68ad39c1..4fa1aac0 100644 ---- a/components/esp_system/port/soc/esp32s2/clk.c -+++ b/components/esp_system/port/soc/esp32s2/clk.c -@@ -72,7 +72,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk); - if (rst_reas == RESET_REASON_CHIP_POWER_ON) { - cfg.cali_ocode = 1; - } -- rtc_init(cfg); -+ rtc_init_module(cfg); - - rtc_clk_fast_freq_set(RTC_FAST_FREQ_8M); - -diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c -index 15610ae9..a5b2ddf3 100644 ---- a/components/esp_system/port/soc/esp32s3/clk.c -+++ b/components/esp_system/port/soc/esp32s3/clk.c -@@ -73,7 +73,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk); - if (rst_reas == RESET_REASON_CHIP_POWER_ON) { - cfg.cali_ocode = 1; - } -- rtc_init(cfg); -+ rtc_init_module(cfg); - - assert(rtc_clk_xtal_freq_get() == RTC_XTAL_FREQ_40M); - -diff --git a/components/soc/esp32/include/soc/rtc.h b/components/soc/esp32/include/soc/rtc.h -index bbbf3c75..3b983466 100644 ---- a/components/soc/esp32/include/soc/rtc.h -+++ b/components/soc/esp32/include/soc/rtc.h -@@ -685,7 +685,7 @@ typedef struct rtc_config_s { - * Initialize RTC clock and power control related functions - * @param cfg configuration options as rtc_config_t - */ --void rtc_init(rtc_config_t cfg); -+void rtc_init_module(rtc_config_t cfg); - - #define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO - #define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO -diff --git a/components/soc/esp32c3/include/soc/rtc.h b/components/soc/esp32c3/include/soc/rtc.h -index dccd7a07..f4b4aa44 100644 ---- a/components/soc/esp32c3/include/soc/rtc.h -+++ b/components/soc/esp32c3/include/soc/rtc.h -@@ -831,7 +831,7 @@ typedef struct { - * Initialize RTC clock and power control related functions - * @param cfg configuration options as rtc_config_t - */ --void rtc_init(rtc_config_t cfg); -+void rtc_init_module(rtc_config_t cfg); - - /** - * Structure describing vddsdio configuration -diff --git a/components/soc/esp32h2/include/soc/rtc.h b/components/soc/esp32h2/include/soc/rtc.h -index 5585986e..7a1dd718 100644 ---- a/components/soc/esp32h2/include/soc/rtc.h -+++ b/components/soc/esp32h2/include/soc/rtc.h -@@ -925,7 +925,7 @@ typedef struct { - * Initialize RTC clock and power control related functions - * @param cfg configuration options as rtc_config_t - */ --void rtc_init(rtc_config_t cfg); -+void rtc_init_module(rtc_config_t cfg); - - /** - * Structure describing vddsdio configuration -diff --git a/components/soc/esp32s2/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h -index 11b13fb6..73caf339 100644 ---- a/components/soc/esp32s2/include/soc/rtc.h -+++ b/components/soc/esp32s2/include/soc/rtc.h -@@ -854,7 +854,7 @@ typedef struct { - * Initialize RTC clock and power control related functions - * @param cfg configuration options as rtc_config_t - */ --void rtc_init(rtc_config_t cfg); -+void rtc_init_module(rtc_config_t cfg); - - /** - * Structure describing vddsdio configuration -diff --git a/components/soc/esp32s3/include/soc/rtc.h b/components/soc/esp32s3/include/soc/rtc.h -index aa09874f..eb8bbed6 100644 ---- a/components/soc/esp32s3/include/soc/rtc.h -+++ b/components/soc/esp32s3/include/soc/rtc.h -@@ -849,7 +849,7 @@ typedef struct { - * Initialize RTC clock and power control related functions - * @param cfg configuration options as rtc_config_t - */ --void rtc_init(rtc_config_t cfg); -+void rtc_init_module(rtc_config_t cfg); - - /** - * Structure describing vddsdio configuration --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0002-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch b/pkg/esp32_sdk/patches/0002-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch index f860b42c8d..e6a0ad9da1 100644 --- a/pkg/esp32_sdk/patches/0002-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch +++ b/pkg/esp32_sdk/patches/0002-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch @@ -1,43 +1,354 @@ -From a8a3c2c751dda987fb94a1afbd771134bcbd7f04 Mon Sep 17 00:00:00 2001 +From 28a7af35dd12aa6ab3b195cc62610124e39ff306 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht -Date: Sun, 30 Jan 2022 08:07:23 +0100 -Subject: [PATCH 02/12] wpa_supplicant: add prefix wpa_ to crypto functions +Date: Sat, 1 Mar 2025 17:24:40 +0100 +Subject: [PATCH 02/28] wpa_supplicant: add prefix wpa_ to crypto functions -Prefix `_wpa` added to crypto functions of `wpa_suppplicant` to avoid name conflicts with RIOT modules `crypto` and `hashes`. +Prefix `wpa_` added to crypto functions of `wpa_suppplicant` to avoid name conflicts with RIOT modules `crypto` and `hashes`. --- - components/wpa_supplicant/src/common/dpp.c | 2 +- - components/wpa_supplicant/src/common/sae.c | 2 +- - .../wpa_supplicant/src/common/wpa_common.c | 2 +- - components/wpa_supplicant/src/crypto/aes-cbc.c | 4 ++-- - components/wpa_supplicant/src/crypto/aes-ccm.c | 18 +++++++++--------- - components/wpa_supplicant/src/crypto/aes-ctr.c | 2 +- - components/wpa_supplicant/src/crypto/aes-gcm.c | 6 +++--- - .../src/crypto/aes-internal-dec.c | 2 +- - .../src/crypto/aes-internal-enc.c | 2 +- - .../wpa_supplicant/src/crypto/aes-omac1.c | 6 +++--- - .../wpa_supplicant/src/crypto/aes-unwrap.c | 2 +- - .../wpa_supplicant/src/crypto/aes-wrap.c | 2 +- - components/wpa_supplicant/src/crypto/aes.h | 4 ++-- - components/wpa_supplicant/src/crypto/crypto.h | 4 ++-- - .../src/crypto/crypto_internal-cipher.c | 4 ++-- - .../src/crypto/crypto_internal.c | 8 ++++---- - .../wpa_supplicant/src/crypto/crypto_mbedtls.c | 6 +++--- - .../wpa_supplicant/src/crypto/crypto_ops.c | 4 ++-- - .../src/crypto/sha256-internal.c | 4 ++-- - .../wpa_supplicant/src/crypto/sha256-tlsprf.c | 2 +- - components/wpa_supplicant/src/crypto/sha256.c | 2 +- - components/wpa_supplicant/src/crypto/sha256.h | 2 +- - .../wpa_supplicant/src/crypto/sha256_i.h | 2 +- - .../wpa_supplicant/src/wps/wps_attr_build.c | 2 +- - .../wpa_supplicant/src/wps/wps_attr_process.c | 2 +- - components/wpa_supplicant/src/wps/wps_common.c | 4 ++-- - 26 files changed, 50 insertions(+), 50 deletions(-) + .../src/crypto/crypto_mbedtls.c | 28 ++++++------ + .../wpa_supplicant/src/ap/comeback_token.c | 6 +-- + components/wpa_supplicant/src/ap/wpa_auth.c | 6 +-- + components/wpa_supplicant/src/common/dpp.c | 14 +++--- + .../wpa_supplicant/src/common/dpp_crypto.c | 44 +++++++++---------- + components/wpa_supplicant/src/common/sae.c | 14 +++--- + components/wpa_supplicant/src/common/sae_pk.c | 6 +-- + .../wpa_supplicant/src/common/wpa_common.c | 40 ++++++++--------- + .../wpa_supplicant/src/crypto/aes-cbc.c | 12 ++--- + .../wpa_supplicant/src/crypto/aes-ccm.c | 26 +++++------ + .../wpa_supplicant/src/crypto/aes-ctr.c | 6 +-- + .../wpa_supplicant/src/crypto/aes-gcm.c | 12 ++--- + .../src/crypto/aes-internal-dec.c | 8 ++-- + .../src/crypto/aes-internal-enc.c | 8 ++-- + .../wpa_supplicant/src/crypto/aes-internal.c | 2 +- + .../wpa_supplicant/src/crypto/aes-omac1.c | 10 ++--- + .../wpa_supplicant/src/crypto/aes-unwrap.c | 6 +-- + .../wpa_supplicant/src/crypto/aes-wrap.c | 6 +-- + components/wpa_supplicant/src/crypto/aes.h | 12 ++--- + components/wpa_supplicant/src/crypto/aes_i.h | 2 +- + components/wpa_supplicant/src/crypto/crypto.h | 40 ++++++++--------- + .../src/crypto/crypto_internal-cipher.c | 14 +++--- + .../src/crypto/crypto_internal.c | 38 ++++++++-------- + .../wpa_supplicant/src/crypto/crypto_ops.c | 4 +- + .../wpa_supplicant/src/crypto/ms_funcs.c | 10 ++--- + .../wpa_supplicant/src/crypto/sha1-internal.c | 2 +- + .../wpa_supplicant/src/crypto/sha1-pbkdf2.c | 4 +- + .../wpa_supplicant/src/crypto/sha1-prf.c | 6 +-- + .../wpa_supplicant/src/crypto/sha1-tlsprf.c | 6 +-- + .../wpa_supplicant/src/crypto/sha1-tprf.c | 4 +- + components/wpa_supplicant/src/crypto/sha1.c | 12 ++--- + components/wpa_supplicant/src/crypto/sha1.h | 8 ++-- + .../src/crypto/sha256-internal.c | 24 +++++----- + .../wpa_supplicant/src/crypto/sha256-kdf.c | 6 +-- + .../wpa_supplicant/src/crypto/sha256-prf.c | 10 ++--- + .../wpa_supplicant/src/crypto/sha256-tlsprf.c | 6 +-- + components/wpa_supplicant/src/crypto/sha256.c | 12 ++--- + components/wpa_supplicant/src/crypto/sha256.h | 10 ++--- + .../wpa_supplicant/src/crypto/sha256_i.h | 6 +-- + .../src/crypto/sha384-internal.c | 18 ++++---- + .../wpa_supplicant/src/crypto/sha384-prf.c | 10 ++--- + .../wpa_supplicant/src/crypto/sha384-tlsprf.c | 6 +-- + components/wpa_supplicant/src/crypto/sha384.h | 10 ++--- + .../wpa_supplicant/src/crypto/sha384_i.h | 6 +-- + .../src/crypto/sha512-internal.c | 24 +++++----- + .../wpa_supplicant/src/crypto/sha512_i.h | 6 +-- + .../wpa_supplicant/src/eap_peer/eap_fast.c | 6 +-- + .../src/eap_peer/eap_fast_common.c | 6 +-- + .../wpa_supplicant/src/eap_peer/eap_peap.c | 4 +- + .../src/eap_peer/eap_peap_common.c | 2 +- + .../src/eap_server/eap_server.c | 16 +++---- + components/wpa_supplicant/src/rsn_supp/wpa.c | 6 +-- + components/wpa_supplicant/src/tls/pkcs5.c | 4 +- + .../src/tls/tlsv1_client_ocsp.c | 10 ++--- + .../src/tls/tlsv1_client_read.c | 4 +- + .../wpa_supplicant/src/tls/tlsv1_cred.c | 8 ++-- + components/wpa_supplicant/src/tls/x509v3.c | 8 ++-- + components/wpa_supplicant/src/utils/base64.c | 12 ++--- + components/wpa_supplicant/src/utils/base64.h | 14 +++--- + components/wpa_supplicant/src/utils/json.c | 4 +- + .../wpa_supplicant/src/wps/wps_attr_build.c | 6 +-- + .../wpa_supplicant/src/wps/wps_attr_process.c | 4 +- + .../wpa_supplicant/src/wps/wps_common.c | 10 ++--- + .../wpa_supplicant/src/wps/wps_enrollee.c | 10 ++--- + .../wpa_supplicant/src/wps/wps_registrar.c | 12 ++--- + 65 files changed, 358 insertions(+), 358 deletions(-) +diff --git a/components/wpa_supplicant/esp_supplicant/src/crypto/crypto_mbedtls.c b/components/wpa_supplicant/esp_supplicant/src/crypto/crypto_mbedtls.c +index b2679a04ea..61d320d396 100644 +--- a/components/wpa_supplicant/esp_supplicant/src/crypto/crypto_mbedtls.c ++++ b/components/wpa_supplicant/esp_supplicant/src/crypto/crypto_mbedtls.c +@@ -84,25 +84,25 @@ cleanup: + + } + +-int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { + return digest_vector(MBEDTLS_MD_SHA256, num_elem, addr, len, mac); + } + +-int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { + return digest_vector(MBEDTLS_MD_SHA384, num_elem, addr, len, mac); + } + +-int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { + return digest_vector(MBEDTLS_MD_SHA512, num_elem, addr, len, mac); + } + +-int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac) ++int wpa_sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac) + { + return digest_vector(MBEDTLS_MD_SHA1, num_elem, addr, len, mac); + } +@@ -323,30 +323,30 @@ static int hmac_vector(mbedtls_md_type_t md_type, + return ret; + } + +-int hmac_sha384_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha384_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac) + { + return hmac_vector(MBEDTLS_MD_SHA384, key, key_len, num_elem, addr, + len, mac); + } + +-int hmac_sha384(const u8 *key, size_t key_len, const u8 *data, ++int wpa_hmac_sha384(const u8 *key, size_t key_len, const u8 *data, + size_t data_len, u8 *mac) + { +- return hmac_sha384_vector(key, key_len, 1, &data, &data_len, mac); ++ return wpa_hmac_sha384_vector(key, key_len, 1, &data, &data_len, mac); + } + +-int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac) + { + return hmac_vector(MBEDTLS_MD_SHA256, key, key_len, num_elem, addr, + len, mac); + } + +-int hmac_sha256(const u8 *key, size_t key_len, const u8 *data, ++int wpa_hmac_sha256(const u8 *key, size_t key_len, const u8 *data, + size_t data_len, u8 *mac) + { +- return hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); ++ return wpa_hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); + } + + int hmac_md5_vector(const u8 *key, size_t key_len, size_t num_elem, +@@ -362,17 +362,17 @@ int hmac_md5(const u8 *key, size_t key_len, const u8 *data, size_t data_len, + return hmac_md5_vector(key, key_len, 1, &data, &data_len, mac); + } + +-int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac) + { + return hmac_vector(MBEDTLS_MD_SHA1, key, key_len, num_elem, addr, + len, mac); + } + +-int hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len, ++int wpa_hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len, + u8 *mac) + { +- return hmac_sha1_vector(key, key_len, 1, &data, &data_len, mac); ++ return wpa_hmac_sha1_vector(key, key_len, 1, &data, &data_len, mac); + } + + static void *aes_crypt_init(int mode, const u8 *key, size_t len) +@@ -416,7 +416,7 @@ void *aes_encrypt_init(const u8 *key, size_t len) + return aes_crypt_init(MBEDTLS_AES_ENCRYPT, key, len); + } + +-int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt) ++int wpa_aes_encrypt(void *ctx, const u8 *plain, u8 *crypt) + { + return aes_crypt(ctx, MBEDTLS_AES_ENCRYPT, plain, crypt); + } +diff --git a/components/wpa_supplicant/src/ap/comeback_token.c b/components/wpa_supplicant/src/ap/comeback_token.c +index f6693e8a51..22e826749a 100644 +--- a/components/wpa_supplicant/src/ap/comeback_token.c ++++ b/components/wpa_supplicant/src/ap/comeback_token.c +@@ -21,7 +21,7 @@ int comeback_token_hash(const u8 *comeback_key, const u8 *addr, u8 *idx) + { + u8 hash[SHA256_MAC_LEN]; + +- if (hmac_sha256(comeback_key, COMEBACK_KEY_SIZE, ++ if (wpa_hmac_sha256(comeback_key, COMEBACK_KEY_SIZE, + addr, ETH_ALEN, hash) < 0) + return -1; + *idx = hash[0]; +@@ -56,7 +56,7 @@ int check_comeback_token(const u8 *comeback_key, + len[0] = ETH_ALEN; + addrs[1] = token; + len[1] = 2; +- if (hmac_sha256_vector(comeback_key, COMEBACK_KEY_SIZE, ++ if (wpa_hmac_sha256_vector(comeback_key, COMEBACK_KEY_SIZE, + 2, addrs, len, mac) < 0 || + os_memcmp_const(token + 2, &mac[2], SHA256_MAC_LEN - 2) != 0) { + return -1; +@@ -129,7 +129,7 @@ auth_build_token_req(struct os_reltime *last_comeback_key_update, + len[0] = ETH_ALEN; + addrs[1] = idx; + len[1] = sizeof(idx); +- if (hmac_sha256_vector(comeback_key, COMEBACK_KEY_SIZE, ++ if (wpa_hmac_sha256_vector(comeback_key, COMEBACK_KEY_SIZE, + 2, addrs, len, token) < 0) { + wpabuf_free(buf); + return NULL; +diff --git a/components/wpa_supplicant/src/ap/wpa_auth.c b/components/wpa_supplicant/src/ap/wpa_auth.c +index 58748a85ff..dedd74f41b 100644 +--- a/components/wpa_supplicant/src/ap/wpa_auth.c ++++ b/components/wpa_supplicant/src/ap/wpa_auth.c +@@ -301,7 +301,7 @@ static int wpa_group_init_gmk_and_counter(struct wpa_authenticator *wpa_auth, + if (os_get_random(rkey, sizeof(rkey)) < 0) + return -1; + +- if (sha1_prf(rkey, sizeof(rkey), "Init Counter", buf, sizeof(buf), ++ if (wpa_sha1_prf(rkey, sizeof(rkey), "Init Counter", buf, sizeof(buf), + group->Counter, WPA_NONCE_LEN) < 0) + return -1; + wpa_hexdump_key(MSG_DEBUG, "Key Counter", +@@ -993,9 +993,9 @@ static int wpa_gmk_to_gtk(const u8 *gmk, const char *label, const u8 *addr, + ret = -1; + + #ifdef CONFIG_IEEE80211W +- sha256_prf(gmk, WPA_GMK_LEN, label, data, sizeof(data), gtk, gtk_len); ++ wpa_sha256_prf(gmk, WPA_GMK_LEN, label, data, sizeof(data), gtk, gtk_len); + #else /* CONFIG_IEEE80211W */ +- if (sha1_prf(gmk, WPA_GMK_LEN, label, data, sizeof(data), gtk, gtk_len) < 0) ++ if (wpa_sha1_prf(gmk, WPA_GMK_LEN, label, data, sizeof(data), gtk, gtk_len) < 0) + ret = -1; + #endif /* CONFIG_IEEE80211W */ + diff --git a/components/wpa_supplicant/src/common/dpp.c b/components/wpa_supplicant/src/common/dpp.c -index 899e0c06c4..c97399d88c 100644 +index 7fa67d10fa..b979870a54 100644 --- a/components/wpa_supplicant/src/common/dpp.c +++ b/components/wpa_supplicant/src/common/dpp.c -@@ -153,7 +153,7 @@ static int dpp_hmac(size_t hash_len, const u8 *key, size_t key_len, +@@ -3246,7 +3246,7 @@ int dpp_get_config_obj_hash(char *signed1, size_t signed1_len, + len[1] = 1; + addr[2] = (unsigned char *)signed2; + len[2] = signed2_len; +- ret = sha256_vector(3, addr, len, hash); ++ ret = wpa_sha256_vector(3, addr, len, hash); + + return ret; + } +@@ -3358,11 +3358,11 @@ skip_groups: + json_value_sep(jws_prot_hdr); + json_add_string(jws_prot_hdr, "alg", curve->jws_alg); + json_end_object(jws_prot_hdr); +- signed1 = base64_url_encode(wpabuf_head(jws_prot_hdr), ++ signed1 = wpa_base64_url_encode(wpabuf_head(jws_prot_hdr), + wpabuf_len(jws_prot_hdr), + &signed1_len); + wpabuf_free(jws_prot_hdr); +- signed2 = base64_url_encode(wpabuf_head(dppcon), wpabuf_len(dppcon), ++ signed2 = wpa_base64_url_encode(wpabuf_head(dppcon), wpabuf_len(dppcon), + &signed2_len); + if (!signed1 || !signed2) + goto fail; +@@ -3389,7 +3389,7 @@ skip_groups: + signature_len = 2 * curve->prime_len; + wpa_hexdump(MSG_DEBUG, "DPP: signedConnector ECDSA signature (raw r,s)", + signature, signature_len); +- signed3 = base64_url_encode(signature, signature_len, &signed3_len); ++ signed3 = wpa_base64_url_encode(signature, signature_len, &signed3_len); + if (!signed3) + goto fail; + +@@ -4609,13 +4609,13 @@ dpp_keygen_configurator(const char *curve, u8 *privkey, + /* kid = SHA256(ANSI X9.63 uncompressed C-sign-key) */ + addr[0] = wpabuf_head(csign_pub); + len[0] = wpabuf_len(csign_pub); +- if (sha256_vector(1, addr, len, kid_hash) < 0) { ++ if (wpa_sha256_vector(1, addr, len, kid_hash) < 0) { + wpa_printf(MSG_DEBUG, + "DPP: Failed to derive kid for C-sign-key"); + goto fail; + } + +- conf->kid = base64_url_encode(kid_hash, sizeof(kid_hash), NULL); ++ conf->kid = wpa_base64_url_encode(kid_hash, sizeof(kid_hash), NULL); + if (!conf->kid) + goto fail; + out: +@@ -4771,7 +4771,7 @@ struct json_token * dpp_parse_own_connector(const char *own_connector) + wpa_printf(MSG_DEBUG, "DPP: Own connector is missing second dot (.)"); + return NULL; + } +- own_conn = base64_url_decode(pos, end - pos, &own_conn_len); ++ own_conn = wpa_base64_url_decode(pos, end - pos, &own_conn_len); + if (!own_conn) { + wpa_printf(MSG_DEBUG, + "DPP: Failed to base64url decode own signedConnectior JWS Payload"); +diff --git a/components/wpa_supplicant/src/common/dpp_crypto.c b/components/wpa_supplicant/src/common/dpp_crypto.c +index b95584e8e1..67eb811936 100644 +--- a/components/wpa_supplicant/src/common/dpp_crypto.c ++++ b/components/wpa_supplicant/src/common/dpp_crypto.c +@@ -90,12 +90,12 @@ int dpp_hash_vector(const struct dpp_curve_params *curve, + u8 *mac) + { + if (curve->hash_len == 32) +- return sha256_vector(num_elem, addr, len, mac); ++ return wpa_sha256_vector(num_elem, addr, len, mac); + #ifndef ESP_SUPPLICANT + if (curve->hash_len == 48) +- return sha384_vector(num_elem, addr, len, mac); ++ return wpa_sha384_vector(num_elem, addr, len, mac); + if (curve->hash_len == 64) +- return sha512_vector(num_elem, addr, len, mac); ++ return wpa_sha512_vector(num_elem, addr, len, mac); + #endif + return -1; + } +@@ -105,16 +105,16 @@ int dpp_hkdf_expand(size_t hash_len, const u8 *secret, size_t secret_len, + const char *label, u8 *out, size_t outlen) + { + if (hash_len == 32) +- return hmac_sha256_kdf(secret, secret_len, NULL, ++ return wpa_hmac_sha256_kdf(secret, secret_len, NULL, + (const u8 *) label, os_strlen(label), + out, outlen); + #ifndef ESP_SUPPLICANT + if (hash_len == 48) +- return hmac_sha384_kdf(secret, secret_len, NULL, ++ return wpa_hmac_sha384_kdf(secret, secret_len, NULL, + (const u8 *) label, os_strlen(label), + out, outlen); + if (hash_len == 64) +- return hmac_sha512_kdf(secret, secret_len, NULL, ++ return wpa_hmac_sha512_kdf(secret, secret_len, NULL, + (const u8 *) label, os_strlen(label), + out, outlen); + #endif +@@ -127,14 +127,14 @@ int dpp_hmac_vector(size_t hash_len, const u8 *key, size_t key_len, + u8 *mac) + { + if (hash_len == 32) +- return hmac_sha256_vector(key, key_len, num_elem, addr, len, ++ return wpa_hmac_sha256_vector(key, key_len, num_elem, addr, len, + mac); + #ifndef ESP_SUPPLICANT + if (hash_len == 48) +- return hmac_sha384_vector(key, key_len, num_elem, addr, len, ++ return wpa_hmac_sha384_vector(key, key_len, num_elem, addr, len, + mac); + if (hash_len == 64) +- return hmac_sha512_vector(key, key_len, num_elem, addr, len, ++ return wpa_hmac_sha512_vector(key, key_len, num_elem, addr, len, + mac); + #endif + return -1; +@@ -145,12 +145,12 @@ int dpp_hmac(size_t hash_len, const u8 *key, size_t key_len, const u8 *data, size_t data_len, u8 *mac) { if (hash_len == 32) @@ -45,25 +356,272 @@ index 899e0c06c4..c97399d88c 100644 + return wpa_hmac_sha256(key, key_len, data, data_len, mac); #ifndef ESP_SUPPLICANT if (hash_len == 48) - return hmac_sha384(key, key_len, data, data_len, mac); +- return hmac_sha384(key, key_len, data, data_len, mac); ++ return wpa_hmac_sha384(key, key_len, data, data_len, mac); + if (hash_len == 64) +- return hmac_sha512(key, key_len, data, data_len, mac); ++ return wpa_hmac_sha512(key, key_len, data, data_len, mac); + #endif + return -1; + } +@@ -226,7 +226,7 @@ int dpp_bi_pubkey_hash(struct dpp_bootstrap_info *bi, + + addr[0] = data; + len[0] = data_len; +- if (sha256_vector(1, addr, len, bi->pubkey_hash) < 0) ++ if (wpa_sha256_vector(1, addr, len, bi->pubkey_hash) < 0) + return -1; + wpa_hexdump(MSG_DEBUG, "DPP: Public key hash", + bi->pubkey_hash, SHA256_MAC_LEN); +@@ -235,7 +235,7 @@ int dpp_bi_pubkey_hash(struct dpp_bootstrap_info *bi, + len[0] = 5; + addr[1] = data; + len[1] = data_len; +- if (sha256_vector(2, addr, len, bi->pubkey_hash_chirp) < 0) ++ if (wpa_sha256_vector(2, addr, len, bi->pubkey_hash_chirp) < 0) + return -1; + wpa_hexdump(MSG_DEBUG, "DPP: Public key hash (chirp)", + bi->pubkey_hash_chirp, SHA256_MAC_LEN); +@@ -614,7 +614,7 @@ int dpp_check_pubkey_match(struct crypto_ec_key *pub, struct wpabuf *r_hash) + len[0] = wpabuf_len(uncomp); + wpa_hexdump(MSG_DEBUG, "DPP: Uncompressed public key", + addr[0], len[0]); +- res = sha256_vector(1, addr, len, hash); ++ res = wpa_sha256_vector(1, addr, len, hash); + wpabuf_free(uncomp); + if (res < 0) + return -1; +@@ -655,7 +655,7 @@ dpp_process_signed_connector(struct dpp_signed_connector_info *info, + ret = DPP_STATUS_INVALID_CONNECTOR; + goto fail; + } +- prot_hdr = base64_url_decode(pos, end - pos, &prot_hdr_len); ++ prot_hdr = wpa_base64_url_decode(pos, end - pos, &prot_hdr_len); + if (!prot_hdr) { + wpa_printf(MSG_DEBUG, + "DPP: Failed to base64url decode signedConnector JWS Protected Header"); +@@ -687,7 +687,7 @@ dpp_process_signed_connector(struct dpp_signed_connector_info *info, + goto fail; + } + signed_end = end - 1; +- info->payload = base64_url_decode(pos, end - pos, &info->payload_len); ++ info->payload = wpa_base64_url_decode(pos, end - pos, &info->payload_len); + if (!info->payload) { + wpa_printf(MSG_DEBUG, + "DPP: Failed to base64url decode signedConnector JWS Payload"); +@@ -698,7 +698,7 @@ dpp_process_signed_connector(struct dpp_signed_connector_info *info, + "DPP: signedConnector - JWS Payload", + (u8 *)info->payload, info->payload_len); + pos = end + 1; +- signature = base64_url_decode(pos, os_strlen(pos), &signature_len); ++ signature = wpa_base64_url_decode(pos, os_strlen(pos), &signature_len); + if (!signature) { + wpa_printf(MSG_DEBUG, + "DPP: Failed to base64url decode signedConnector signature"); +@@ -729,7 +729,7 @@ dpp_process_signed_connector(struct dpp_signed_connector_info *info, + } + + if (hash_func == CRYPTO_HASH_ALG_SHA256) { +- if ((sha256_vector(1, (const u8 **) &signed_start, &signed_len, hash)) != 0) { ++ if ((wpa_sha256_vector(1, (const u8 **) &signed_start, &signed_len, hash)) != 0) { + goto fail; + } + } else { +@@ -1115,7 +1115,7 @@ int dpp_derive_pmkid(const struct dpp_curve_params *curve, + } + wpa_hexdump(MSG_DEBUG, "DPP: PMKID hash payload 1", addr[0], len[0]); + wpa_hexdump(MSG_DEBUG, "DPP: PMKID hash payload 2", addr[1], len[1]); +- res = sha256_vector(2, addr, len, hash); ++ res = wpa_sha256_vector(2, addr, len, hash); + if (res < 0) + goto fail; + wpa_hexdump(MSG_DEBUG, "DPP: PMKID hash output", hash, SHA256_MAC_LEN); +@@ -1157,7 +1157,7 @@ char * dpp_corrupt_connector_signature(const char *connector) + + wpa_printf(MSG_DEBUG, "DPP: Original base64url encoded signature: %s", + pos); +- signature = base64_url_decode(pos, os_strlen(pos), &signature_len); ++ signature = wpa_base64_url_decode(pos, os_strlen(pos), &signature_len); + if (!signature || signature_len == 0) + goto fail; + wpa_hexdump(MSG_DEBUG, "DPP: Original Connector signature", +@@ -1165,7 +1165,7 @@ char * dpp_corrupt_connector_signature(const char *connector) + signature[signature_len - 1] ^= 0x01; + wpa_hexdump(MSG_DEBUG, "DPP: Corrupted Connector signature", + signature, signature_len); +- signed3 = base64_url_encode(signature, signature_len, &signed3_len); ++ signed3 = wpa_base64_url_encode(signature, signature_len, &signed3_len); + if (!signed3) + goto fail; + os_memcpy(pos, signed3, signed3_len); diff --git a/components/wpa_supplicant/src/common/sae.c b/components/wpa_supplicant/src/common/sae.c -index ec65605337..00eb2f6c21 100644 +index 363aa0c4fe..afb2db7b0d 100644 --- a/components/wpa_supplicant/src/common/sae.c +++ b/components/wpa_supplicant/src/common/sae.c -@@ -827,7 +827,7 @@ static int sae_derive_keys(struct sae_data *sae, const u8 *k) - */ +@@ -146,7 +146,7 @@ static int sae_test_pwd_seed_ecc(struct sae_data *sae, const u8 *pwd_seed, - os_memset(null_key, 0, sizeof(null_key)); -- hmac_sha256(null_key, sizeof(null_key), k, sae->tmp->prime_len, -+ wpa_hmac_sha256(null_key, sizeof(null_key), k, sae->tmp->prime_len, - keyseed); - wpa_hexdump_key(MSG_DEBUG, "SAE: keyseed", keyseed, sizeof(keyseed)); + /* pwd-value = KDF-z(pwd-seed, "SAE Hunting and Pecking", p) */ + bits = crypto_ec_prime_len_bits(sae->tmp->ec); +- if (sha256_prf_bits(pwd_seed, SHA256_MAC_LEN, "SAE Hunting and Pecking", ++ if (wpa_sha256_prf_bits(pwd_seed, SHA256_MAC_LEN, "SAE Hunting and Pecking", + prime, sae->tmp->prime_len, pwd_value, bits) < 0) + return ESP_FAIL; + if (bits % 8) +@@ -196,7 +196,7 @@ static int sae_test_pwd_seed_ffc(struct sae_data *sae, const u8 *pwd_seed, + wpa_hexdump_key(MSG_DEBUG, "SAE: pwd-seed", pwd_seed, SHA256_MAC_LEN); + /* pwd-value = KDF-z(pwd-seed, "SAE Hunting and Pecking", p) */ +- if (sha256_prf_bits(pwd_seed, SHA256_MAC_LEN, "SAE Hunting and Pecking", ++ if (wpa_sha256_prf_bits(pwd_seed, SHA256_MAC_LEN, "SAE Hunting and Pecking", + sae->tmp->dh->prime, sae->tmp->prime_len, pwd_value, + bits) < 0) + return ESP_FAIL; +@@ -350,7 +350,7 @@ static int sae_derive_pwe_ecc(struct sae_data *sae, const u8 *addr1, + wpa_printf(MSG_MSGDUMP, "SAE: counter = %03u", counter); + const_time_select_bin(found, stub_password, password, + password_len, tmp_password); +- if (hmac_sha256_vector(addrs, sizeof(addrs), 2, ++ if (wpa_hmac_sha256_vector(addrs, sizeof(addrs), 2, + addr, len, pwd_seed) < 0) + break; + +@@ -489,7 +489,7 @@ static int sae_derive_pwe_ffc(struct sae_data *sae, const u8 *addr1, + } + + wpa_printf(MSG_DEBUG, "SAE: counter = %02u", counter); +- if (hmac_sha256_vector(addrs, sizeof(addrs), 2, ++ if (wpa_hmac_sha256_vector(addrs, sizeof(addrs), 2, + addr, len, pwd_seed) < 0) + break; + res = sae_test_pwd_seed_ffc(sae, pwd_seed, pwe); +@@ -527,7 +527,7 @@ static int hkdf_extract(size_t hash_len, const u8 *salt, size_t salt_len, + u8 *prk) + { + if (hash_len == 32) +- return hmac_sha256_vector(salt, salt_len, num_elem, addr, len, ++ return wpa_hmac_sha256_vector(salt, salt_len, num_elem, addr, len, + prk); + return -1; + } +@@ -539,7 +539,7 @@ static int hkdf_expand(size_t hash_len, const u8 *prk, size_t prk_len, + size_t info_len = os_strlen(info); + + if (hash_len == 32) +- return hmac_sha256_kdf(prk, prk_len, NULL, ++ return wpa_hmac_sha256_kdf(prk, prk_len, NULL, + (const u8 *) info, info_len, + okm, okm_len); + return -1; +@@ -1455,7 +1455,7 @@ static int sae_kdf_hash(size_t hash_len, const u8 *k, const char *label, + u8 *out, size_t out_len) + { + if (hash_len == 32) +- return sha256_prf(k, hash_len, label, ++ return wpa_sha256_prf(k, hash_len, label, + context, context_len, out, out_len); + return -1; + } +diff --git a/components/wpa_supplicant/src/common/sae_pk.c b/components/wpa_supplicant/src/common/sae_pk.c +index 472ef03d2c..1baba9ff6c 100644 +--- a/components/wpa_supplicant/src/common/sae_pk.c ++++ b/components/wpa_supplicant/src/common/sae_pk.c +@@ -462,16 +462,16 @@ static size_t sae_group_2_hash_len(int group) + int sae_hash(size_t hash_len, const u8 *data, size_t len, u8 *hash) + { + if (hash_len == 32) { +- return sha256_vector(1, &data, &len, hash); ++ return wpa_sha256_vector(1, &data, &len, hash); + } + #ifdef CONFIG_SHA384 + if (hash_len == 48) { +- return sha384_vector(1, &data, &len, hash); ++ return wpa_sha384_vector(1, &data, &len, hash); + } + #endif /* CONFIG_SHA384 */ + #ifdef CONFIG_SHA512 + if (hash_len == 64) { +- return sha512_vector(1, &data, &len, hash); ++ return wpa_sha512_vector(1, &data, &len, hash); + } + #endif /* CONFIG_SHA512 */ + return -1; diff --git a/components/wpa_supplicant/src/common/wpa_common.c b/components/wpa_supplicant/src/common/wpa_common.c -index 070ba0887e..36b230a9cc 100644 +index faa0be573c..a8181a1e12 100644 --- a/components/wpa_supplicant/src/common/wpa_common.c +++ b/components/wpa_supplicant/src/common/wpa_common.c -@@ -467,7 +467,7 @@ int wpa_eapol_key_mic(const u8 *key, size_t key_len, int akmp, int ver, +@@ -705,7 +705,7 @@ void wpa_derive_pmk_r0(const u8 *xxkey, size_t xxkey_len, + os_memcpy(pos, s0kh_id, ETH_ALEN); + pos += ETH_ALEN; + +- sha256_prf(xxkey, xxkey_len, "FT-R0", buf, pos - buf, ++ wpa_sha256_prf(xxkey, xxkey_len, "FT-R0", buf, pos - buf, + r0_key_data, sizeof(r0_key_data)); + os_memcpy(pmk_r0, r0_key_data, PMK_LEN); + +@@ -717,7 +717,7 @@ void wpa_derive_pmk_r0(const u8 *xxkey, size_t xxkey_len, + addr[1] = r0_key_data + PMK_LEN; + len[1] = 16; + +- sha256_vector(2, addr, len, hash); ++ wpa_sha256_vector(2, addr, len, hash); + os_memcpy(pmk_r0_name, hash, WPA_PMK_NAME_LEN); + } + +@@ -747,7 +747,7 @@ void wpa_derive_pmk_r1_name(const u8 *pmk_r0_name, const u8 *r1kh_id, + addr[3] = s1kh_id; + len[3] = ETH_ALEN; + +- sha256_vector(4, addr, len, hash); ++ wpa_sha256_vector(4, addr, len, hash); + os_memcpy(pmk_r1_name, hash, WPA_PMK_NAME_LEN); + } + +@@ -771,7 +771,7 @@ void wpa_derive_pmk_r1(const u8 *pmk_r0, const u8 *pmk_r0_name, + os_memcpy(pos, s1kh_id, ETH_ALEN); + pos += ETH_ALEN; + +- sha256_prf(pmk_r0, PMK_LEN, "FT-R1", buf, pos - buf, pmk_r1, PMK_LEN); ++ wpa_sha256_prf(pmk_r0, PMK_LEN, "FT-R1", buf, pos - buf, pmk_r1, PMK_LEN); + + wpa_derive_pmk_r1_name(pmk_r0_name, r1kh_id, s1kh_id, pmk_r1_name); + } +@@ -813,7 +813,7 @@ int wpa_pmk_r1_to_ptk(const u8 *pmk_r1, const u8 *snonce, const u8 *anonce, + ptk->tk_len = wpa_cipher_key_len(cipher); + ptk_len = ptk->kck_len + ptk->kek_len + ptk->tk_len; + +- sha256_prf(pmk_r1, PMK_LEN, "FT-PTK", buf, pos - buf, tmp, ptk_len); ++ wpa_sha256_prf(pmk_r1, PMK_LEN, "FT-PTK", buf, pos - buf, tmp, ptk_len); + + /* + * PTKName = Truncate-128(SHA-256(PMKR1Name || "FT-PTKN" || SNonce || +@@ -832,7 +832,7 @@ int wpa_pmk_r1_to_ptk(const u8 *pmk_r1, const u8 *snonce, const u8 *anonce, + addr[5] = sta_addr; + len[5] = ETH_ALEN; + +- sha256_vector(6, addr, len, hash); ++ wpa_sha256_vector(6, addr, len, hash); + os_memcpy(ptk_name, hash, WPA_PMK_NAME_LEN); + + os_memcpy(ptk->kck, tmp, ptk->kck_len); +@@ -916,7 +916,7 @@ int wpa_eapol_key_mic(const u8 *key, size_t key_len, int akmp, int ver, + case WPA_KEY_INFO_TYPE_HMAC_MD5_RC4: + return hmac_md5(key, key_len, buf, len, mic); + case WPA_KEY_INFO_TYPE_HMAC_SHA1_AES: +- if (hmac_sha1(key, key_len, buf, len, hash)) ++ if (wpa_hmac_sha1(key, key_len, buf, len, hash)) + return -1; + os_memcpy(mic, hash, MD5_MAC_LEN); + break; +@@ -933,7 +933,7 @@ int wpa_eapol_key_mic(const u8 *key, size_t key_len, int akmp, int ver, + "WPA: EAPOL-Key MIC using HMAC-SHA%u (AKM-defined - SAE-EXT-KEY)", + (unsigned int) key_len * 8 * 2); + if (key_len == 128 / 8) { +- if (hmac_sha256(key, key_len, buf, len, hash)) ++ if (wpa_hmac_sha256(key, key_len, buf, len, hash)) + return -1; + } else { + wpa_printf(MSG_INFO, +@@ -946,14 +946,14 @@ int wpa_eapol_key_mic(const u8 *key, size_t key_len, int akmp, int ver, #endif /* CONFIG_WPA3_SAE */ #ifdef CONFIG_SUITEB case WPA_KEY_MGMT_IEEE8021X_SUITE_B: @@ -72,30 +630,151 @@ index 070ba0887e..36b230a9cc 100644 return -1; os_memcpy(mic, hash, MD5_MAC_LEN); break; + #endif /* CONFIG_SUITEB */ + #ifdef CONFIG_SUITEB192 + case WPA_KEY_MGMT_IEEE8021X_SUITE_B_192: +- if (hmac_sha384(key, key_len, buf, len, hash)) ++ if (wpa_hmac_sha384(key, key_len, buf, len, hash)) + return -1; + os_memcpy(mic, hash, 24); + break; +@@ -964,7 +964,7 @@ int wpa_eapol_key_mic(const u8 *key, size_t key_len, int akmp, int ver, + "WPA: EAPOL-Key MIC using HMAC-SHA%u (AKM-defined - OWE)", + (unsigned int) key_len * 8 * 2); + if (key_len == 128 / 8) { +- if (hmac_sha256(key, key_len, buf, len, hash)) ++ if (wpa_hmac_sha256(key, key_len, buf, len, hash)) + return -1; + } else { + wpa_printf(MSG_INFO,"OWE: Unsupported KCK length: %u", +@@ -981,7 +981,7 @@ int wpa_eapol_key_mic(const u8 *key, size_t key_len, int akmp, int ver, + "WPA: EAPOL-Key MIC using HMAC-SHA%u (AKM-defined - DPP)", + (unsigned int) key_len * 8 * 2); + if (key_len == 128 / 8) { +- if (hmac_sha256(key, key_len, buf, len, hash)) ++ if (wpa_hmac_sha256(key, key_len, buf, len, hash)) + return -1; + } else { + wpa_printf(MSG_INFO, +@@ -1099,7 +1099,7 @@ int rsn_pmkid_suite_b(const u8 *kck, size_t kck_len, const u8 *aa, + addr[1] = aa; + addr[2] = spa; + +- if (hmac_sha256_vector(kck, kck_len, 3, addr, len, hash) < 0) ++ if (wpa_hmac_sha256_vector(kck, kck_len, 3, addr, len, hash) < 0) + return -1; + os_memcpy(pmkid, hash, PMKID_LEN); + return 0; +@@ -1131,7 +1131,7 @@ int rsn_pmkid_suite_b_192(const u8 *kck, size_t kck_len, const u8 *aa, + addr[1] = aa; + addr[2] = spa; + +- if (hmac_sha384_vector(kck, kck_len, 3, addr, len, hash) < 0) ++ if (wpa_hmac_sha384_vector(kck, kck_len, 3, addr, len, hash) < 0) + return -1; + os_memcpy(pmkid, hash, PMKID_LEN); + return 0; +@@ -1230,20 +1230,20 @@ int wpa_pmk_to_ptk(const u8 *pmk, size_t pmk_len, const char *label, + #if defined(CONFIG_SUITEB192) + if (wpa_key_mgmt_sha384(akmp)) { + wpa_printf(MSG_DEBUG, "WPA: PTK derivation using PRF(SHA384)"); +- if (sha384_prf(pmk, pmk_len, label, data, data_len, ++ if (wpa_sha384_prf(pmk, pmk_len, label, data, data_len, + tmp, ptk_len) < 0) + return -1; + } else + #endif + if (wpa_key_mgmt_sha256(akmp)) { +- sha256_prf(pmk, pmk_len, label, data, data_len, ++ wpa_sha256_prf(pmk, pmk_len, label, data, data_len, + tmp, ptk_len); + #ifdef CONFIG_WPA3_SAE + } else if (wpa_key_mgmt_sae_ext_key(akmp)) { + if (pmk_len == 32) { + wpa_printf(MSG_DEBUG, + "SAE: PTK derivation using PRF(SHA256)"); +- if (sha256_prf(pmk, pmk_len, label, data, data_len, ++ if (wpa_sha256_prf(pmk, pmk_len, label, data, data_len, + tmp, ptk_len) < 0) + return -1; + } else { +@@ -1253,7 +1253,7 @@ int wpa_pmk_to_ptk(const u8 *pmk, size_t pmk_len, const char *label, + } + #endif /* CONFIG_WPA3_SAE */ + } else { +- sha1_prf(pmk, pmk_len, label, data, data_len, tmp, ptk_len); ++ wpa_sha1_prf(pmk, pmk_len, label, data, data_len, tmp, ptk_len); + } + wpa_printf(MSG_DEBUG, "WPA: PTK derivation - A1=" MACSTR " A2=" MACSTR"\n", + MAC2STR(addr1), MAC2STR(addr2)); +@@ -1301,12 +1301,12 @@ void rsn_pmkid(const u8 *pmk, size_t pmk_len, const u8 *aa, const u8 *spa, + #ifdef CONFIG_IEEE80211W + if (wpa_key_mgmt_sha256(akmp)) { + wpa_printf(MSG_DEBUG, "RSN: Derive PMKID using HMAC-SHA-256"); +- hmac_sha256_vector(pmk, pmk_len, 3, addr, len, hash); ++ wpa_hmac_sha256_vector(pmk, pmk_len, 3, addr, len, hash); + } else + #endif /* CONFIG_IEEE80211W */ + { + wpa_printf(MSG_DEBUG, "RSN: Derive PMKID using HMAC-SHA-1"); +- hmac_sha1_vector(pmk, pmk_len, 3, addr, len, hash); ++ wpa_hmac_sha1_vector(pmk, pmk_len, 3, addr, len, hash); + } + os_memcpy(pmkid, hash, PMKID_LEN); + } diff --git a/components/wpa_supplicant/src/crypto/aes-cbc.c b/components/wpa_supplicant/src/crypto/aes-cbc.c -index 0835f2cfb7..fa01d4083a 100644 +index 0835f2cfb7..c5ce6f2bf7 100644 --- a/components/wpa_supplicant/src/crypto/aes-cbc.c +++ b/components/wpa_supplicant/src/crypto/aes-cbc.c -@@ -40,7 +40,7 @@ int aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len) +@@ -31,7 +31,7 @@ int aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len) + if (TEST_FAIL()) + return -1; + +- ctx = aes_encrypt_init(key, 16); ++ ctx = wpa_aes_encrypt_init(key, 16); + if (ctx == NULL) + return -1; + os_memcpy(cbc, iv, AES_BLOCK_SIZE); +@@ -40,11 +40,11 @@ int aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len) for (i = 0; i < blocks; i++) { for (j = 0; j < AES_BLOCK_SIZE; j++) cbc[j] ^= pos[j]; - aes_encrypt(ctx, cbc, cbc); -+ wpa_aes_encrypt(ctx, cbc, cbc); ++ wpa_aes_encrypt(ctx, cbc, cbc); os_memcpy(pos, cbc, AES_BLOCK_SIZE); pos += AES_BLOCK_SIZE; } -@@ -75,7 +75,7 @@ int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len) +- aes_encrypt_deinit(ctx); ++ wpa_aes_encrypt_deinit(ctx); + return 0; + } + +@@ -67,7 +67,7 @@ int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len) + if (TEST_FAIL()) + return -1; + +- ctx = aes_decrypt_init(key, 16); ++ ctx = wpa_aes_decrypt_init(key, 16); + if (ctx == NULL) + return -1; + os_memcpy(cbc, iv, AES_BLOCK_SIZE); +@@ -75,12 +75,12 @@ int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data, size_t data_len) blocks = data_len / AES_BLOCK_SIZE; for (i = 0; i < blocks; i++) { os_memcpy(tmp, pos, AES_BLOCK_SIZE); - aes_decrypt(ctx, pos, pos); -+ wpa_aes_decrypt(ctx, pos, pos); ++ wpa_aes_decrypt(ctx, pos, pos); for (j = 0; j < AES_BLOCK_SIZE; j++) pos[j] ^= cbc[j]; os_memcpy(cbc, tmp, AES_BLOCK_SIZE); + pos += AES_BLOCK_SIZE; + } +- aes_decrypt_deinit(ctx); ++ wpa_aes_decrypt_deinit(ctx); + return 0; + } diff --git a/components/wpa_supplicant/src/crypto/aes-ccm.c b/components/wpa_supplicant/src/crypto/aes-ccm.c -index e5bb94ca08..2a837463be 100644 +index e5bb94ca08..bd0ba71ba3 100644 --- a/components/wpa_supplicant/src/crypto/aes-ccm.c +++ b/components/wpa_supplicant/src/crypto/aes-ccm.c @@ -42,7 +42,7 @@ static void aes_ccm_auth_start(void *aes, size_t M, size_t L, const u8 *nonce, @@ -103,7 +782,7 @@ index e5bb94ca08..2a837463be 100644 wpa_hexdump_key(MSG_DEBUG, "CCM B_0", b, AES_BLOCK_SIZE); - aes_encrypt(aes, b, x); /* X_1 = E(K, B_0) */ -+ wpa_aes_encrypt(aes, b, x); /* X_1 = E(K, B_0) */ ++ wpa_aes_encrypt(aes, b, x); /* X_1 = E(K, B_0) */ if (!aad_len) return; @@ -112,13 +791,13 @@ index e5bb94ca08..2a837463be 100644 xor_aes_block(aad_buf, x); - aes_encrypt(aes, aad_buf, x); /* X_2 = E(K, X_1 XOR B_1) */ -+ wpa_aes_encrypt(aes, aad_buf, x); /* X_2 = E(K, X_1 XOR B_1) */ ++ wpa_aes_encrypt(aes, aad_buf, x); /* X_2 = E(K, X_1 XOR B_1) */ if (aad_len > AES_BLOCK_SIZE - 2) { xor_aes_block(&aad_buf[AES_BLOCK_SIZE], x); /* X_3 = E(K, X_2 XOR B_2) */ - aes_encrypt(aes, &aad_buf[AES_BLOCK_SIZE], x); -+ wpa_aes_encrypt(aes, &aad_buf[AES_BLOCK_SIZE], x); ++ wpa_aes_encrypt(aes, &aad_buf[AES_BLOCK_SIZE], x); } } @@ -127,14 +806,14 @@ index e5bb94ca08..2a837463be 100644 xor_aes_block(x, data); data += AES_BLOCK_SIZE; - aes_encrypt(aes, x, x); -+ wpa_aes_encrypt(aes, x, x); ++ wpa_aes_encrypt(aes, x, x); } if (last) { /* XOR zero-padded last block */ for (i = 0; i < last; i++) x[i] ^= *data++; - aes_encrypt(aes, x, x); -+ wpa_aes_encrypt(aes, x, x); ++ wpa_aes_encrypt(aes, x, x); } } @@ -143,7 +822,7 @@ index e5bb94ca08..2a837463be 100644 WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], i); /* S_i = E(K, A_i) */ - aes_encrypt(aes, a, out); -+ wpa_aes_encrypt(aes, a, out); ++ wpa_aes_encrypt(aes, a, out); xor_aes_block(out, in); out += AES_BLOCK_SIZE; in += AES_BLOCK_SIZE; @@ -151,7 +830,7 @@ index e5bb94ca08..2a837463be 100644 if (last) { WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], i); - aes_encrypt(aes, a, out); -+ wpa_aes_encrypt(aes, a, out); ++ wpa_aes_encrypt(aes, a, out); /* XOR zero-padded last block */ for (i = 0; i < last; i++) *out++ ^= *in++; @@ -160,7 +839,7 @@ index e5bb94ca08..2a837463be 100644 /* U = T XOR S_0; S_0 = E(K, A_0) */ WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], 0); - aes_encrypt(aes, a, tmp); -+ wpa_aes_encrypt(aes, a, tmp); ++ wpa_aes_encrypt(aes, a, tmp); for (i = 0; i < M; i++) auth[i] = x[i] ^ tmp[i]; wpa_hexdump_key(MSG_DEBUG, "CCM U", auth, M); @@ -169,25 +848,77 @@ index e5bb94ca08..2a837463be 100644 /* U = T XOR S_0; S_0 = E(K, A_0) */ WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], 0); - aes_encrypt(aes, a, tmp); -+ wpa_aes_encrypt(aes, a, tmp); ++ wpa_aes_encrypt(aes, a, tmp); for (i = 0; i < M; i++) t[i] = auth[i] ^ tmp[i]; wpa_hexdump_key(MSG_DEBUG, "CCM T", t, M); +@@ -157,7 +157,7 @@ int aes_ccm_ae(const u8 *key, size_t key_len, const u8 *nonce, + if (aad_len > 30 || M > AES_BLOCK_SIZE) + return -1; + +- aes = aes_encrypt_init(key, key_len); ++ aes = wpa_aes_encrypt_init(key, key_len); + if (aes == NULL) + return -1; + +@@ -169,7 +169,7 @@ int aes_ccm_ae(const u8 *key, size_t key_len, const u8 *nonce, + aes_ccm_encr(aes, L, plain, plain_len, crypt, a); + aes_ccm_encr_auth(aes, M, x, a, auth); + +- aes_encrypt_deinit(aes); ++ wpa_aes_encrypt_deinit(aes); + + return 0; + } +@@ -188,7 +188,7 @@ int aes_ccm_ad(const u8 *key, size_t key_len, const u8 *nonce, + if (aad_len > 30 || M > AES_BLOCK_SIZE) + return -1; + +- aes = aes_encrypt_init(key, key_len); ++ aes = wpa_aes_encrypt_init(key, key_len); + if (aes == NULL) + return -1; + +@@ -202,7 +202,7 @@ int aes_ccm_ad(const u8 *key, size_t key_len, const u8 *nonce, + aes_ccm_auth_start(aes, M, L, nonce, aad, aad_len, crypt_len, x); + aes_ccm_auth(aes, plain, crypt_len, x); + +- aes_encrypt_deinit(aes); ++ wpa_aes_encrypt_deinit(aes); + + if (os_memcmp_const(x, t, M) != 0) { + wpa_printf(MSG_DEBUG, "CCM: Auth mismatch"); diff --git a/components/wpa_supplicant/src/crypto/aes-ctr.c b/components/wpa_supplicant/src/crypto/aes-ctr.c -index 8ce05b894d..0647706306 100644 +index 8ce05b894d..88d64e5841 100644 --- a/components/wpa_supplicant/src/crypto/aes-ctr.c +++ b/components/wpa_supplicant/src/crypto/aes-ctr.c -@@ -37,7 +37,7 @@ int aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce, +@@ -31,13 +31,13 @@ int aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce, + u8 *pos = data; + u8 counter[AES_BLOCK_SIZE], buf[AES_BLOCK_SIZE]; + +- ctx = aes_encrypt_init(key, key_len); ++ ctx = wpa_aes_encrypt_init(key, key_len); + if (ctx == NULL) + return -1; os_memcpy(counter, nonce, AES_BLOCK_SIZE); while (left > 0) { - aes_encrypt(ctx, counter, buf); -+ wpa_aes_encrypt(ctx, counter, buf); ++ wpa_aes_encrypt(ctx, counter, buf); len = (left < AES_BLOCK_SIZE) ? left : AES_BLOCK_SIZE; for (j = 0; j < len; j++) +@@ -51,7 +51,7 @@ int aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce, + break; + } + } +- aes_encrypt_deinit(ctx); ++ wpa_aes_encrypt_deinit(ctx); + return 0; + } + diff --git a/components/wpa_supplicant/src/crypto/aes-gcm.c b/components/wpa_supplicant/src/crypto/aes-gcm.c -index 84294d2d10..9b2f18df02 100644 +index 84294d2d10..6420c67edf 100644 --- a/components/wpa_supplicant/src/crypto/aes-gcm.c +++ b/components/wpa_supplicant/src/crypto/aes-gcm.c @@ -155,7 +155,7 @@ static void aes_gctr(void *aes, const u8 *icb, const u8 *x, size_t xlen, u8 *y) @@ -195,7 +926,7 @@ index 84294d2d10..9b2f18df02 100644 /* Full blocks */ for (i = 0; i < n; i++) { - aes_encrypt(aes, cb, ypos); -+ wpa_aes_encrypt(aes, cb, ypos); ++ wpa_aes_encrypt(aes, cb, ypos); xor_block(ypos, xpos); xpos += AES_BLOCK_SIZE; ypos += AES_BLOCK_SIZE; @@ -204,23 +935,66 @@ index 84294d2d10..9b2f18df02 100644 if (last) { /* Last, partial block */ - aes_encrypt(aes, cb, tmp); -+ wpa_aes_encrypt(aes, cb, tmp); ++ wpa_aes_encrypt(aes, cb, tmp); for (i = 0; i < last; i++) *ypos++ = *xpos++ ^ tmp[i]; } -@@ -182,7 +182,7 @@ static void * aes_gcm_init_hash_subkey(const u8 *key, size_t key_len, u8 *H) +@@ -176,13 +176,13 @@ static void * aes_gcm_init_hash_subkey(const u8 *key, size_t key_len, u8 *H) + { + void *aes; + +- aes = aes_encrypt_init(key, key_len); ++ aes = wpa_aes_encrypt_init(key, key_len); + if (aes == NULL) + return NULL; /* Generate hash subkey H = AES_K(0^128) */ os_memset(H, 0, AES_BLOCK_SIZE); - aes_encrypt(aes, H, H); -+ wpa_aes_encrypt(aes, H, H); ++ wpa_aes_encrypt(aes, H, H); wpa_hexdump_key(MSG_EXCESSIVE, "Hash subkey H for GHASH", H, AES_BLOCK_SIZE); return aes; +@@ -276,7 +276,7 @@ int aes_gcm_ae(const u8 *key, size_t key_len, const u8 *iv, size_t iv_len, + + /* Return (C, T) */ + +- aes_encrypt_deinit(aes); ++ wpa_aes_encrypt_deinit(aes); + + return 0; + } +@@ -308,7 +308,7 @@ int aes_gcm_ad(const u8 *key, size_t key_len, const u8 *iv, size_t iv_len, + /* T' = MSB_t(GCTR_K(J_0, S)) */ + aes_gctr(aes, J0, S, sizeof(S), T); + +- aes_encrypt_deinit(aes); ++ wpa_aes_encrypt_deinit(aes); + + if (os_memcmp_const(tag, T, 16) != 0) { + wpa_printf(MSG_EXCESSIVE, "GCM: Tag mismatch"); diff --git a/components/wpa_supplicant/src/crypto/aes-internal-dec.c b/components/wpa_supplicant/src/crypto/aes-internal-dec.c -index 7482295949..f72742cf59 100644 +index 7482295949..5c5171123e 100644 --- a/components/wpa_supplicant/src/crypto/aes-internal-dec.c +++ b/components/wpa_supplicant/src/crypto/aes-internal-dec.c +@@ -31,7 +31,7 @@ static int rijndaelKeySetupDec(u32 rk[], const u8 cipherKey[], int keyBits) + u32 temp; + + /* expand the cipher key: */ +- Nr = rijndaelKeySetupEnc(rk, cipherKey, keyBits); ++ Nr = wpa_rijndaelKeySetupEnc(rk, cipherKey, keyBits); + if (Nr < 0) + return Nr; + /* invert the order of the round keys: */ +@@ -56,7 +56,7 @@ static int rijndaelKeySetupDec(u32 rk[], const u8 cipherKey[], int keyBits) + return Nr; + } + +-void * aes_decrypt_init(const u8 *key, size_t len) ++void * wpa_aes_decrypt_init(const u8 *key, size_t len) + { + u32 *rk; + int res; @@ -148,7 +148,7 @@ d##3 = TD0(s##3) ^ TD1(s##2) ^ TD2(s##1) ^ TD3(s##0) ^ rk[4 * i + 3] } @@ -230,10 +1004,37 @@ index 7482295949..f72742cf59 100644 { u32 *rk = ctx; rijndaelDecrypt(ctx, rk[AES_PRIV_NR_POS], crypt, plain); +@@ -156,7 +156,7 @@ int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain) + } + + +-void aes_decrypt_deinit(void *ctx) ++void wpa_aes_decrypt_deinit(void *ctx) + { + os_memset(ctx, 0, AES_PRIV_SIZE); + os_free(ctx); diff --git a/components/wpa_supplicant/src/crypto/aes-internal-enc.c b/components/wpa_supplicant/src/crypto/aes-internal-enc.c -index baeffcaf63..a856dc9f3f 100644 +index baeffcaf63..2e00ba9a6e 100644 --- a/components/wpa_supplicant/src/crypto/aes-internal-enc.c +++ b/components/wpa_supplicant/src/crypto/aes-internal-enc.c +@@ -95,7 +95,7 @@ d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3] + } + + +-void * aes_encrypt_init(const u8 *key, size_t len) ++void * wpa_aes_encrypt_init(const u8 *key, size_t len) + { + u32 *rk; + int res; +@@ -106,7 +106,7 @@ void * aes_encrypt_init(const u8 *key, size_t len) + rk = os_malloc(AES_PRIV_SIZE); + if (rk == NULL) + return NULL; +- res = rijndaelKeySetupEnc(rk, key, len * 8); ++ res = wpa_rijndaelKeySetupEnc(rk, key, len * 8); + if (res < 0) { + os_free(rk); + return NULL; @@ -116,7 +116,7 @@ void * aes_encrypt_init(const u8 *key, size_t len) } @@ -243,82 +1044,220 @@ index baeffcaf63..a856dc9f3f 100644 { u32 *rk = ctx; rijndaelEncrypt(ctx, rk[AES_PRIV_NR_POS], plain, crypt); +@@ -124,7 +124,7 @@ int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt) + } + + +-void aes_encrypt_deinit(void *ctx) ++void wpa_aes_encrypt_deinit(void *ctx) + { + os_memset(ctx, 0, AES_PRIV_SIZE); + os_free(ctx); +diff --git a/components/wpa_supplicant/src/crypto/aes-internal.c b/components/wpa_supplicant/src/crypto/aes-internal.c +index bd4535d209..6b646027c8 100644 +--- a/components/wpa_supplicant/src/crypto/aes-internal.c ++++ b/components/wpa_supplicant/src/crypto/aes-internal.c +@@ -776,7 +776,7 @@ const u8 rcons[] = { + * + * @return the number of rounds for the given cipher key size. + */ +-int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits) ++int wpa_rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits) + { + int i; + u32 temp; diff --git a/components/wpa_supplicant/src/crypto/aes-omac1.c b/components/wpa_supplicant/src/crypto/aes-omac1.c -index 8642516340..21ba314ae0 100644 +index 8642516340..bfc118afca 100644 --- a/components/wpa_supplicant/src/crypto/aes-omac1.c +++ b/components/wpa_supplicant/src/crypto/aes-omac1.c +@@ -51,7 +51,7 @@ int omac1_aes_vector(const u8 *key, size_t key_len, size_t num_elem, + if (TEST_FAIL()) + return -1; + +- ctx = aes_encrypt_init(key, key_len); ++ ctx = wpa_aes_encrypt_init(key, key_len); + if (ctx == NULL) + return -1; + os_memset(cbc, 0, AES_BLOCK_SIZE); @@ -82,12 +82,12 @@ int omac1_aes_vector(const u8 *key, size_t key_len, size_t num_elem, } } if (left > AES_BLOCK_SIZE) - aes_encrypt(ctx, cbc, cbc); -+ wpa_aes_encrypt(ctx, cbc, cbc); ++ wpa_aes_encrypt(ctx, cbc, cbc); left -= AES_BLOCK_SIZE; } os_memset(pad, 0, AES_BLOCK_SIZE); - aes_encrypt(ctx, pad, pad); -+ wpa_aes_encrypt(ctx, pad, pad); ++ wpa_aes_encrypt(ctx, pad, pad); gf_mulx(pad); if (left || total_len == 0) { -@@ -111,7 +111,7 @@ int omac1_aes_vector(const u8 *key, size_t key_len, size_t num_elem, +@@ -111,8 +111,8 @@ int omac1_aes_vector(const u8 *key, size_t key_len, size_t num_elem, for (i = 0; i < AES_BLOCK_SIZE; i++) pad[i] ^= cbc[i]; - aes_encrypt(ctx, pad, mac); -+ wpa_aes_encrypt(ctx, pad, mac); - aes_encrypt_deinit(ctx); +- aes_encrypt_deinit(ctx); ++ wpa_aes_encrypt(ctx, pad, mac); ++ wpa_aes_encrypt_deinit(ctx); return 0; } + diff --git a/components/wpa_supplicant/src/crypto/aes-unwrap.c b/components/wpa_supplicant/src/crypto/aes-unwrap.c -index ec793d9dbf..08aedc12de 100644 +index ec793d9dbf..704f62cb0a 100644 --- a/components/wpa_supplicant/src/crypto/aes-unwrap.c +++ b/components/wpa_supplicant/src/crypto/aes-unwrap.c -@@ -58,7 +58,7 @@ int aes_unwrap(const u8 *kek, size_t kek_len, int n, const u8 *cipher, +@@ -36,7 +36,7 @@ int aes_unwrap(const u8 *kek, size_t kek_len, int n, const u8 *cipher, + r = plain; + os_memcpy(r, cipher + 8, 8 * n); + +- ctx = aes_decrypt_init(kek, kek_len); ++ ctx = wpa_aes_decrypt_init(kek, kek_len); + if (ctx == NULL) + return -1; + +@@ -58,13 +58,13 @@ int aes_unwrap(const u8 *kek, size_t kek_len, int n, const u8 *cipher, b[4] ^= t >> 24; os_memcpy(b + 8, r, 8); - aes_decrypt(ctx, b, b); -+ wpa_aes_decrypt(ctx, b, b); ++ wpa_aes_decrypt(ctx, b, b); os_memcpy(a, b, 8); os_memcpy(r, b + 8, 8); r -= 8; + } + } +- aes_decrypt_deinit(ctx); ++ wpa_aes_decrypt_deinit(ctx); + + /* 3) Output results. + * diff --git a/components/wpa_supplicant/src/crypto/aes-wrap.c b/components/wpa_supplicant/src/crypto/aes-wrap.c -index 7ed34e803e..49621d2231 100644 +index 7ed34e803e..fec086c815 100644 --- a/components/wpa_supplicant/src/crypto/aes-wrap.c +++ b/components/wpa_supplicant/src/crypto/aes-wrap.c +@@ -37,7 +37,7 @@ int aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain, u8 *cipher) + os_memset(a, 0xa6, 8); + os_memcpy(r, plain, 8 * n); + +- ctx = aes_encrypt_init(kek, kek_len); ++ ctx = wpa_aes_encrypt_init(kek, kek_len); + if (ctx == NULL) + return -1; + @@ -53,7 +53,7 @@ int aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain, u8 *cipher) for (i = 1; i <= n; i++) { os_memcpy(b, a, 8); os_memcpy(b + 8, r, 8); - aes_encrypt(ctx, b, b); -+ wpa_aes_encrypt(ctx, b, b); ++ wpa_aes_encrypt(ctx, b, b); os_memcpy(a, b, 8); t = n * j + i; a[7] ^= t; +@@ -64,7 +64,7 @@ int aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain, u8 *cipher) + r += 8; + } + } +- aes_encrypt_deinit(ctx); ++ wpa_aes_encrypt_deinit(ctx); + + /* 3) Output the results. + * diff --git a/components/wpa_supplicant/src/crypto/aes.h b/components/wpa_supplicant/src/crypto/aes.h -index 8ab3de2ee8..fe04fc4b2b 100644 +index 8ab3de2ee8..3352e345dd 100644 --- a/components/wpa_supplicant/src/crypto/aes.h +++ b/components/wpa_supplicant/src/crypto/aes.h -@@ -12,10 +12,10 @@ +@@ -11,11 +11,11 @@ + #define AES_BLOCK_SIZE 16 - void * aes_encrypt_init(const u8 *key, size_t len); +-void * aes_encrypt_init(const u8 *key, size_t len); -int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt); -+int wpa_aes_encrypt(void *ctx, const u8 *plain, u8 *crypt); - void aes_encrypt_deinit(void *ctx); - void * aes_decrypt_init(const u8 *key, size_t len); +-void aes_encrypt_deinit(void *ctx); +-void * aes_decrypt_init(const u8 *key, size_t len); -int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain); +-void aes_decrypt_deinit(void *ctx); ++void * wpa_aes_encrypt_init(const u8 *key, size_t len); ++int wpa_aes_encrypt(void *ctx, const u8 *plain, u8 *crypt); ++void wpa_aes_encrypt_deinit(void *ctx); ++void * wpa_aes_decrypt_init(const u8 *key, size_t len); +int wpa_aes_decrypt(void *ctx, const u8 *crypt, u8 *plain); - void aes_decrypt_deinit(void *ctx); ++void wpa_aes_decrypt_deinit(void *ctx); #endif /* AES_H */ +diff --git a/components/wpa_supplicant/src/crypto/aes_i.h b/components/wpa_supplicant/src/crypto/aes_i.h +index b20ec92203..52f4c82cc0 100644 +--- a/components/wpa_supplicant/src/crypto/aes_i.h ++++ b/components/wpa_supplicant/src/crypto/aes_i.h +@@ -120,6 +120,6 @@ static inline u32 rotr(u32 val, int bits) + #define AES_PRIV_SIZE (4 * 4 * 15 + 4) + #define AES_PRIV_NR_POS (4 * 15) + +-int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); ++int wpa_rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); + + #endif /* AES_I_H */ diff --git a/components/wpa_supplicant/src/crypto/crypto.h b/components/wpa_supplicant/src/crypto/crypto.h -index 9a43c9bfd9..f87a21872b 100644 +index 183cbf590f..780478e828 100644 --- a/components/wpa_supplicant/src/crypto/crypto.h +++ b/components/wpa_supplicant/src/crypto/crypto.h -@@ -125,7 +125,7 @@ void * aes_encrypt_init(const u8 *key, size_t len); +@@ -51,7 +51,7 @@ int md5_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac); + * @mac: Buffer for the hash + * Returns: 0 on success, -1 on failure + */ +-int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac); + + /** +@@ -77,7 +77,7 @@ int __must_check fips186_2_prf(const u8 *seed, size_t seed_len, u8 *x, + * @mac: Buffer for the hash + * Returns: 0 on success, -1 on failure + */ +-int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac); + + /** +@@ -88,7 +88,7 @@ int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, + * @mac: Buffer for the hash + * Returns: 0 on success, -1 on failure + */ +-int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac); + + /** +@@ -99,7 +99,7 @@ int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, + * @mac: Buffer for the hash + * Returns: 0 on success, -1 on failure + */ +-int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac); + + /** +@@ -112,50 +112,50 @@ int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, + int des_encrypt(const u8 *clear, const u8 *key, u8 *cypher); + + /** +- * aes_encrypt_init - Initialize AES for encryption ++ * wpa_aes_encrypt_init - Initialize AES for encryption + * @key: Encryption key + * @len: Key length in bytes (usually 16, i.e., 128 bits) + * Returns: Pointer to context data or %NULL on failure + */ +-void * aes_encrypt_init(const u8 *key, size_t len); ++void * wpa_aes_encrypt_init(const u8 *key, size_t len); + + /** +- * aes_encrypt - Encrypt one AES block +- * @ctx: Context pointer from aes_encrypt_init() ++ * wpa_aes_encrypt - Encrypt one AES block ++ * @ctx: Context pointer from wpa_aes_encrypt_init() + * @plain: Plaintext data to be encrypted (16 bytes) * @crypt: Buffer for the encrypted data (16 bytes) * Returns: 0 on success, -1 on failure */ @@ -326,8 +1265,30 @@ index 9a43c9bfd9..f87a21872b 100644 +int wpa_aes_encrypt(void *ctx, const u8 *plain, u8 *crypt); /** - * aes_encrypt_deinit - Deinitialize AES encryption -@@ -148,7 +148,7 @@ void * aes_decrypt_init(const u8 *key, size_t len); +- * aes_encrypt_deinit - Deinitialize AES encryption +- * @ctx: Context pointer from aes_encrypt_init() ++ * wpa_aes_encrypt_deinit - Deinitialize AES encryption ++ * @ctx: Context pointer from wpa_aes_encrypt_init() + */ +-void aes_encrypt_deinit(void *ctx); ++void wpa_aes_encrypt_deinit(void *ctx); + + /** +- * aes_decrypt_init - Initialize AES for decryption ++ * wpa_aes_decrypt_init - Initialize AES for decryption + * @key: Decryption key + * @len: Key length in bytes (usually 16, i.e., 128 bits) + * Returns: Pointer to context data or %NULL on failure + */ +-void * aes_decrypt_init(const u8 *key, size_t len); ++void * wpa_aes_decrypt_init(const u8 *key, size_t len); + + /** +- * aes_decrypt - Decrypt one AES block +- * @ctx: Context pointer from aes_encrypt_init() ++ * wpa_aes_decrypt - Decrypt one AES block ++ * @ctx: Context pointer from wpa_aes_encrypt_init() + * @crypt: Encrypted data (16 bytes) * @plain: Buffer for the decrypted data (16 bytes) * Returns: 0 on success, -1 on failure */ @@ -335,17 +1296,44 @@ index 9a43c9bfd9..f87a21872b 100644 +int wpa_aes_decrypt(void *ctx, const u8 *crypt, u8 *plain); /** - * aes_decrypt_deinit - Deinitialize AES decryption +- * aes_decrypt_deinit - Deinitialize AES decryption +- * @ctx: Context pointer from aes_encrypt_init() ++ * wpa_aes_decrypt_deinit - Deinitialize AES decryption ++ * @ctx: Context pointer from wpa_aes_encrypt_init() + */ +-void aes_decrypt_deinit(void *ctx); ++void wpa_aes_decrypt_deinit(void *ctx); + + + enum crypto_hash_alg { diff --git a/components/wpa_supplicant/src/crypto/crypto_internal-cipher.c b/components/wpa_supplicant/src/crypto/crypto_internal-cipher.c -index ad0930a5a9..4887fd36c6 100644 +index ad0930a5a9..e3f5794cf7 100644 --- a/components/wpa_supplicant/src/crypto/crypto_internal-cipher.c +++ b/components/wpa_supplicant/src/crypto/crypto_internal-cipher.c +@@ -62,14 +62,14 @@ struct crypto_cipher * crypto_cipher_init(enum crypto_cipher_alg alg, + os_memcpy(ctx->u.rc4.key, key, key_len); + break; + case CRYPTO_CIPHER_ALG_AES: +- ctx->u.aes.ctx_enc = aes_encrypt_init(key, key_len); ++ ctx->u.aes.ctx_enc = wpa_aes_encrypt_init(key, key_len); + if (ctx->u.aes.ctx_enc == NULL) { + os_free(ctx); + return NULL; + } +- ctx->u.aes.ctx_dec = aes_decrypt_init(key, key_len); ++ ctx->u.aes.ctx_dec = wpa_aes_decrypt_init(key, key_len); + if (ctx->u.aes.ctx_dec == NULL) { +- aes_encrypt_deinit(ctx->u.aes.ctx_enc); ++ wpa_aes_encrypt_deinit(ctx->u.aes.ctx_enc); + os_free(ctx); + return NULL; + } @@ -120,7 +120,7 @@ int crypto_cipher_encrypt(struct crypto_cipher *ctx, const u8 *plain, for (i = 0; i < blocks; i++) { for (j = 0; j < AES_BLOCK_SIZE; j++) ctx->u.aes.cbc[j] ^= plain[j]; - aes_encrypt(ctx->u.aes.ctx_enc, ctx->u.aes.cbc, -+ wpa_aes_encrypt(ctx->u.aes.ctx_enc, ctx->u.aes.cbc, ++ wpa_aes_encrypt(ctx->u.aes.ctx_enc, ctx->u.aes.cbc, ctx->u.aes.cbc); os_memcpy(crypt, ctx->u.aes.cbc, AES_BLOCK_SIZE); plain += AES_BLOCK_SIZE; @@ -354,15 +1342,26 @@ index ad0930a5a9..4887fd36c6 100644 for (i = 0; i < blocks; i++) { os_memcpy(tmp, crypt, AES_BLOCK_SIZE); - aes_decrypt(ctx->u.aes.ctx_dec, crypt, plain); -+ wpa_aes_decrypt(ctx->u.aes.ctx_dec, crypt, plain); ++ wpa_aes_decrypt(ctx->u.aes.ctx_dec, crypt, plain); for (j = 0; j < AES_BLOCK_SIZE; j++) plain[j] ^= ctx->u.aes.cbc[j]; os_memcpy(ctx->u.aes.cbc, tmp, AES_BLOCK_SIZE); +@@ -231,8 +231,8 @@ void crypto_cipher_deinit(struct crypto_cipher *ctx) + { + switch (ctx->alg) { + case CRYPTO_CIPHER_ALG_AES: +- aes_encrypt_deinit(ctx->u.aes.ctx_enc); +- aes_decrypt_deinit(ctx->u.aes.ctx_dec); ++ wpa_aes_encrypt_deinit(ctx->u.aes.ctx_enc); ++ wpa_aes_decrypt_deinit(ctx->u.aes.ctx_dec); + break; + case CRYPTO_CIPHER_ALG_3DES: + break; diff --git a/components/wpa_supplicant/src/crypto/crypto_internal.c b/components/wpa_supplicant/src/crypto/crypto_internal.c -index 3d14babe5a..d1426a8feb 100644 +index aad40af16e..ed74dd2a4f 100644 --- a/components/wpa_supplicant/src/crypto/crypto_internal.c +++ b/components/wpa_supplicant/src/crypto/crypto_internal.c -@@ -57,7 +57,7 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, +@@ -59,17 +59,17 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, break; #ifdef CONFIG_SHA256 case CRYPTO_HASH_ALG_SHA256: @@ -371,96 +1370,399 @@ index 3d14babe5a..d1426a8feb 100644 break; #endif /* CONFIG_SHA256 */ #ifdef CONFIG_INTERNAL_SHA384 -@@ -111,7 +111,7 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, + case CRYPTO_HASH_ALG_SHA384: +- sha384_init(&ctx->u.sha384); ++ wpa_sha384_init(&ctx->u.sha384); + break; + #endif /* CONFIG_INTERNAL_SHA384 */ + #ifdef CONFIG_INTERNAL_SHA512 + case CRYPTO_HASH_ALG_SHA512: +- sha512_init(&ctx->u.sha512); ++ wpa_sha512_init(&ctx->u.sha512); + break; + #endif /* CONFIG_INTERNAL_SHA512 */ + case CRYPTO_HASH_ALG_HMAC_MD5: +@@ -113,9 +113,9 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, #ifdef CONFIG_SHA256 case CRYPTO_HASH_ALG_HMAC_SHA256: if (key_len > sizeof(k_pad)) { - sha256_init(&ctx->u.sha256); +- sha256_process(&ctx->u.sha256, key, key_len); +- sha256_done(&ctx->u.sha256, tk); + wpa_sha256_init(&ctx->u.sha256); - sha256_process(&ctx->u.sha256, key, key_len); - sha256_done(&ctx->u.sha256, tk); ++ wpa_sha256_process(&ctx->u.sha256, key, key_len); ++ wpa_sha256_done(&ctx->u.sha256, tk); key = tk; -@@ -125,7 +125,7 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, + key_len = 32; + } +@@ -127,8 +127,8 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, os_memset(k_pad + key_len, 0, sizeof(k_pad) - key_len); for (i = 0; i < sizeof(k_pad); i++) k_pad[i] ^= 0x36; - sha256_init(&ctx->u.sha256); +- sha256_process(&ctx->u.sha256, k_pad, sizeof(k_pad)); + wpa_sha256_init(&ctx->u.sha256); - sha256_process(&ctx->u.sha256, k_pad, sizeof(k_pad)); ++ wpa_sha256_process(&ctx->u.sha256, k_pad, sizeof(k_pad)); break; #endif /* CONFIG_SHA256 */ -@@ -295,7 +295,7 @@ int crypto_hash_finish(struct crypto_hash *ctx, u8 *mac, size_t *len) + default: +@@ -157,17 +157,17 @@ void crypto_hash_update(struct crypto_hash *ctx, const u8 *data, size_t len) + #ifdef CONFIG_SHA256 + case CRYPTO_HASH_ALG_SHA256: + case CRYPTO_HASH_ALG_HMAC_SHA256: +- sha256_process(&ctx->u.sha256, data, len); ++ wpa_sha256_process(&ctx->u.sha256, data, len); + break; + #endif /* CONFIG_SHA256 */ + #ifdef CONFIG_INTERNAL_SHA384 + case CRYPTO_HASH_ALG_SHA384: +- sha384_process(&ctx->u.sha384, data, len); ++ wpa_sha384_process(&ctx->u.sha384, data, len); + break; + #endif /* CONFIG_INTERNAL_SHA384 */ + #ifdef CONFIG_INTERNAL_SHA512 + case CRYPTO_HASH_ALG_SHA512: +- sha512_process(&ctx->u.sha512, data, len); ++ wpa_sha512_process(&ctx->u.sha512, data, len); + break; + #endif /* CONFIG_INTERNAL_SHA512 */ + default: +@@ -216,7 +216,7 @@ int crypto_hash_finish(struct crypto_hash *ctx, u8 *mac, size_t *len) + return -1; + } + *len = 32; +- sha256_done(&ctx->u.sha256, mac); ++ wpa_sha256_done(&ctx->u.sha256, mac); + break; + #endif /* CONFIG_SHA256 */ + #ifdef CONFIG_INTERNAL_SHA384 +@@ -227,7 +227,7 @@ int crypto_hash_finish(struct crypto_hash *ctx, u8 *mac, size_t *len) + return -1; + } + *len = 48; +- sha384_done(&ctx->u.sha384, mac); ++ wpa_sha384_done(&ctx->u.sha384, mac); + break; + #endif /* CONFIG_INTERNAL_SHA384 */ + #ifdef CONFIG_INTERNAL_SHA512 +@@ -238,7 +238,7 @@ int crypto_hash_finish(struct crypto_hash *ctx, u8 *mac, size_t *len) + return -1; + } + *len = 64; +- sha512_done(&ctx->u.sha512, mac); ++ wpa_sha512_done(&ctx->u.sha512, mac); + break; + #endif /* CONFIG_INTERNAL_SHA512 */ + case CRYPTO_HASH_ALG_HMAC_MD5: +@@ -290,17 +290,17 @@ int crypto_hash_finish(struct crypto_hash *ctx, u8 *mac, size_t *len) + } + *len = 32; + +- sha256_done(&ctx->u.sha256, mac); ++ wpa_sha256_done(&ctx->u.sha256, mac); + + os_memcpy(k_pad, ctx->key, ctx->key_len); + os_memset(k_pad + ctx->key_len, 0, sizeof(k_pad) - ctx->key_len); for (i = 0; i < sizeof(k_pad); i++) k_pad[i] ^= 0x5c; - sha256_init(&ctx->u.sha256); +- sha256_process(&ctx->u.sha256, k_pad, sizeof(k_pad)); +- sha256_process(&ctx->u.sha256, mac, 32); +- sha256_done(&ctx->u.sha256, mac); + wpa_sha256_init(&ctx->u.sha256); - sha256_process(&ctx->u.sha256, k_pad, sizeof(k_pad)); - sha256_process(&ctx->u.sha256, mac, 32); - sha256_done(&ctx->u.sha256, mac); -diff --git a/components/wpa_supplicant/src/crypto/crypto_mbedtls.c b/components/wpa_supplicant/src/crypto/crypto_mbedtls.c -index d640a64189..d32321657a 100644 ---- a/components/wpa_supplicant/src/crypto/crypto_mbedtls.c -+++ b/components/wpa_supplicant/src/crypto/crypto_mbedtls.c -@@ -239,7 +239,7 @@ int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, - len, mac); - } - --int hmac_sha256(const u8 *key, size_t key_len, const u8 *data, -+int wpa_hmac_sha256(const u8 *key, size_t key_len, const u8 *data, - size_t data_len, u8 *mac) - { - return hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); -@@ -312,7 +312,7 @@ void *aes_encrypt_init(const u8 *key, size_t len) - return aes_crypt_init(MBEDTLS_AES_ENCRYPT, key, len); - } - --int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt) -+int wpa_aes_encrypt(void *ctx, const u8 *plain, u8 *crypt) - { - return aes_crypt(ctx, MBEDTLS_AES_ENCRYPT, plain, crypt); - } -@@ -327,7 +327,7 @@ void * aes_decrypt_init(const u8 *key, size_t len) - return aes_crypt_init(MBEDTLS_AES_DECRYPT, key, len); - } - --int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain) -+int wpa_aes_decrypt(void *ctx, const u8 *crypt, u8 *plain) - { - return aes_crypt(ctx, MBEDTLS_AES_DECRYPT, crypt, plain); - } ++ wpa_sha256_process(&ctx->u.sha256, k_pad, sizeof(k_pad)); ++ wpa_sha256_process(&ctx->u.sha256, mac, 32); ++ wpa_sha256_done(&ctx->u.sha256, mac); + break; + #endif /* CONFIG_SHA256 */ + default: diff --git a/components/wpa_supplicant/src/crypto/crypto_ops.c b/components/wpa_supplicant/src/crypto/crypto_ops.c -index d4aff08787..16b1364373 100644 +index 0346d17f5c..88af2421dd 100644 --- a/components/wpa_supplicant/src/crypto/crypto_ops.c +++ b/components/wpa_supplicant/src/crypto/crypto_ops.c -@@ -28,12 +28,12 @@ static int esp_aes_unwrap(const u8 *kek, int n, const u8 *cipher, u8 *plain) +@@ -36,7 +36,7 @@ static int esp_aes_gmac(const u8 *key, size_t key_len, const u8 *iv, size_t iv_l + const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs = { + .size = sizeof(wpa_crypto_funcs_t), + .version = ESP_WIFI_CRYPTO_VERSION, +- .hmac_sha256_vector = (esp_hmac_sha256_vector_t)hmac_sha256_vector, ++ .hmac_sha256_vector = (esp_hmac_sha256_vector_t)wpa_hmac_sha256_vector, + .pbkdf2_sha1 = (esp_pbkdf2_sha1_t)pbkdf2_sha1, + .aes_128_encrypt = (esp_aes_128_encrypt_t)aes_128_cbc_encrypt, + .aes_128_decrypt = (esp_aes_128_decrypt_t)aes_128_cbc_decrypt, +@@ -44,7 +44,7 @@ const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs = { + .ccmp_decrypt = (esp_ccmp_decrypt_t)ccmp_decrypt, + .ccmp_encrypt = (esp_ccmp_encrypt_t)ccmp_encrypt, + .aes_gmac = (esp_aes_gmac_t)esp_aes_gmac, +- .sha256_vector = (esp_sha256_vector_t)sha256_vector, ++ .sha256_vector = (esp_sha256_vector_t)wpa_sha256_vector, + }; - static void esp_aes_encrypt(void *ctx, const u8 *plain, u8 *crypt) - { -- aes_encrypt(ctx, plain, crypt); -+ wpa_aes_encrypt(ctx, plain, crypt); + const mesh_crypto_funcs_t g_wifi_default_mesh_crypto_funcs = { +diff --git a/components/wpa_supplicant/src/crypto/ms_funcs.c b/components/wpa_supplicant/src/crypto/ms_funcs.c +index aff7d33f4e..a2e1ce799a 100644 +--- a/components/wpa_supplicant/src/crypto/ms_funcs.c ++++ b/components/wpa_supplicant/src/crypto/ms_funcs.c +@@ -92,7 +92,7 @@ int challenge_hash(const u8 *peer_challenge, const u8 *auth_challenge, + addr[2] = username; + len[2] = username_len; + +- if (sha1_vector(3, addr, len, hash)) ++ if (wpa_sha1_vector(3, addr, len, hash)) + return -1; + os_memcpy(challenge, hash, 8); + return 0; +@@ -259,11 +259,11 @@ int generate_authenticator_response_pwhash( + addr2[2] = magic2; + + if (hash_nt_password_hash(password_hash, password_hash_hash) || +- sha1_vector(3, addr1, len1, response) || ++ wpa_sha1_vector(3, addr1, len1, response) || + challenge_hash(peer_challenge, auth_challenge, username, + username_len, challenge)) + return -1; +- return sha1_vector(3, addr2, len2, response); ++ return wpa_sha1_vector(3, addr2, len2, response); } - static void esp_aes_decrypt(void *ctx, const u8 *crypt, u8 *plain) - { -- aes_decrypt(ctx, crypt, plain); -+ wpa_aes_decrypt(ctx, crypt, plain); - } - static int esp_aes_gmac(const u8 *key, size_t key_len, const u8 *iv, size_t iv_len, +@@ -338,7 +338,7 @@ int get_master_key(const u8 *password_hash_hash, const u8 *nt_response, + addr[1] = nt_response; + addr[2] = magic1; + +- if (sha1_vector(3, addr, len, hash)) ++ if (wpa_sha1_vector(3, addr, len, hash)) + return -1; + os_memcpy(master_key, hash, 16); + return 0; +@@ -406,7 +406,7 @@ int get_asymetric_start_key(const u8 *master_key, u8 *session_key, + } + addr[3] = shs_pad2; + +- if (sha1_vector(4, addr, len, digest)) ++ if (wpa_sha1_vector(4, addr, len, digest)) + return -1; + + if (session_key_len > SHA1_MAC_LEN) +diff --git a/components/wpa_supplicant/src/crypto/sha1-internal.c b/components/wpa_supplicant/src/crypto/sha1-internal.c +index ffa04df017..f792cad221 100644 +--- a/components/wpa_supplicant/src/crypto/sha1-internal.c ++++ b/components/wpa_supplicant/src/crypto/sha1-internal.c +@@ -28,7 +28,7 @@ void SHA1Transform(u32 state[5], const unsigned char buffer[64]); + * @mac: Buffer for the hash + * Returns: 0 on success, -1 of failure + */ +-int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac) ++int wpa_sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac) + { + SHA1_CTX ctx; + size_t i; +diff --git a/components/wpa_supplicant/src/crypto/sha1-pbkdf2.c b/components/wpa_supplicant/src/crypto/sha1-pbkdf2.c +index 8effe2fe06..d3e86f0d5f 100644 +--- a/components/wpa_supplicant/src/crypto/sha1-pbkdf2.c ++++ b/components/wpa_supplicant/src/crypto/sha1-pbkdf2.c +@@ -37,13 +37,13 @@ static int pbkdf2_sha1_f(const char *passphrase, const u8 *ssid, + count_buf[1] = (count >> 16) & 0xff; + count_buf[2] = (count >> 8) & 0xff; + count_buf[3] = count & 0xff; +- if (hmac_sha1_vector((u8 *) passphrase, passphrase_len, 2, addr, len, ++ if (wpa_hmac_sha1_vector((u8 *) passphrase, passphrase_len, 2, addr, len, + tmp)) + return -1; + os_memcpy(digest, tmp, SHA1_MAC_LEN); + + for (i = 1; i < iterations; i++) { +- if (hmac_sha1((u8 *) passphrase, passphrase_len, tmp, ++ if (wpa_hmac_sha1((u8 *) passphrase, passphrase_len, tmp, + SHA1_MAC_LEN, tmp2)) + return -1; + os_memcpy(tmp, tmp2, SHA1_MAC_LEN); +diff --git a/components/wpa_supplicant/src/crypto/sha1-prf.c b/components/wpa_supplicant/src/crypto/sha1-prf.c +index 13851494fb..3b44d9a26e 100644 +--- a/components/wpa_supplicant/src/crypto/sha1-prf.c ++++ b/components/wpa_supplicant/src/crypto/sha1-prf.c +@@ -27,7 +27,7 @@ + * This function is used to derive new, cryptographically separate keys from a + * given key (e.g., PMK in IEEE 802.11i). + */ +-int sha1_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha1_prf(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, size_t buf_len) + { + u8 counter = 0; +@@ -48,12 +48,12 @@ int sha1_prf(const u8 *key, size_t key_len, const char *label, + while (pos < buf_len) { + plen = buf_len - pos; + if (plen >= SHA1_MAC_LEN) { +- if (hmac_sha1_vector(key, key_len, 3, addr, len, ++ if (wpa_hmac_sha1_vector(key, key_len, 3, addr, len, + &buf[pos])) + return -1; + pos += SHA1_MAC_LEN; + } else { +- if (hmac_sha1_vector(key, key_len, 3, addr, len, ++ if (wpa_hmac_sha1_vector(key, key_len, 3, addr, len, + hash)) + return -1; + os_memcpy(&buf[pos], hash, plen); +diff --git a/components/wpa_supplicant/src/crypto/sha1-tlsprf.c b/components/wpa_supplicant/src/crypto/sha1-tlsprf.c +index 5e8d15920c..c5a04b2b2a 100644 +--- a/components/wpa_supplicant/src/crypto/sha1-tlsprf.c ++++ b/components/wpa_supplicant/src/crypto/sha1-tlsprf.c +@@ -69,7 +69,7 @@ int tls_prf_sha1_md5(const u8 *secret, size_t secret_len, const char *label, + } + + hmac_md5_vector(S1, L_S1, 2, &MD5_addr[1], &MD5_len[1], A_MD5); +- hmac_sha1_vector(S2, L_S2, 2, &SHA1_addr[1], &SHA1_len[1], A_SHA1); ++ wpa_hmac_sha1_vector(S2, L_S2, 2, &SHA1_addr[1], &SHA1_len[1], A_SHA1); + + MD5_pos = MD5_MAC_LEN; + SHA1_pos = SHA1_MAC_LEN; +@@ -80,10 +80,10 @@ int tls_prf_sha1_md5(const u8 *secret, size_t secret_len, const char *label, + hmac_md5(S1, L_S1, A_MD5, MD5_MAC_LEN, A_MD5); + } + if (SHA1_pos == SHA1_MAC_LEN) { +- hmac_sha1_vector(S2, L_S2, 3, SHA1_addr, SHA1_len, ++ wpa_hmac_sha1_vector(S2, L_S2, 3, SHA1_addr, SHA1_len, + P_SHA1); + SHA1_pos = 0; +- hmac_sha1(S2, L_S2, A_SHA1, SHA1_MAC_LEN, A_SHA1); ++ wpa_hmac_sha1(S2, L_S2, A_SHA1, SHA1_MAC_LEN, A_SHA1); + } + + out[i] = P_MD5[MD5_pos] ^ P_SHA1[SHA1_pos]; +diff --git a/components/wpa_supplicant/src/crypto/sha1-tprf.c b/components/wpa_supplicant/src/crypto/sha1-tprf.c +index c3acf19750..d0518e1eaa 100644 +--- a/components/wpa_supplicant/src/crypto/sha1-tprf.c ++++ b/components/wpa_supplicant/src/crypto/sha1-tprf.c +@@ -26,7 +26,7 @@ + * This function is used to derive new, cryptographically separate keys from a + * given key for EAP-FAST. T-PRF is defined in RFC 4851, Section 5.5. + */ +-int sha1_t_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha1_t_prf(const u8 *key, size_t key_len, const char *label, + const u8 *seed, size_t seed_len, u8 *buf, size_t buf_len) + { + unsigned char counter = 0; +@@ -54,7 +54,7 @@ int sha1_t_prf(const u8 *key, size_t key_len, const char *label, + while (pos < buf_len) { + counter++; + plen = buf_len - pos; +- if (hmac_sha1_vector(key, key_len, 5, addr, len, hash)) ++ if (wpa_hmac_sha1_vector(key, key_len, 5, addr, len, hash)) + return -1; + if (plen >= SHA1_MAC_LEN) { + os_memcpy(&buf[pos], hash, SHA1_MAC_LEN); +diff --git a/components/wpa_supplicant/src/crypto/sha1.c b/components/wpa_supplicant/src/crypto/sha1.c +index 76d7a68f26..127aa9cc1c 100644 +--- a/components/wpa_supplicant/src/crypto/sha1.c ++++ b/components/wpa_supplicant/src/crypto/sha1.c +@@ -23,7 +23,7 @@ + * @mac: Buffer for the hash (20 bytes) + * Returns: 0 on success, -1 on failure + */ +-int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac) + { + unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ +@@ -42,7 +42,7 @@ int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + + /* if key is longer than 64 bytes reset it to key = SHA1(key) */ + if (key_len > 64) { +- if (sha1_vector(1, &key, &key_len, tk)) ++ if (wpa_sha1_vector(1, &key, &key_len, tk)) + return -1; + key = tk; + key_len = 20; +@@ -71,7 +71,7 @@ int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + _addr[i + 1] = addr[i]; + _len[i + 1] = len[i]; + } +- if (sha1_vector(1 + num_elem, _addr, _len, mac)) ++ if (wpa_sha1_vector(1 + num_elem, _addr, _len, mac)) + return -1; + + os_memset(k_pad, 0, sizeof(k_pad)); +@@ -85,7 +85,7 @@ int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + _len[0] = 64; + _addr[1] = mac; + _len[1] = SHA1_MAC_LEN; +- ret = sha1_vector(2, _addr, _len, mac); ++ ret = wpa_sha1_vector(2, _addr, _len, mac); + forced_memzero(k_pad, sizeof(k_pad)); + forced_memzero(tk, sizeof(tk)); + return ret; +@@ -101,8 +101,8 @@ int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + * @mac: Buffer for the hash (20 bytes) + * Returns: 0 on success, -1 of failure + */ +-int hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len, ++int wpa_hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len, + u8 *mac) + { +- return hmac_sha1_vector(key, key_len, 1, &data, &data_len, mac); ++ return wpa_hmac_sha1_vector(key, key_len, 1, &data, &data_len, mac); + } +diff --git a/components/wpa_supplicant/src/crypto/sha1.h b/components/wpa_supplicant/src/crypto/sha1.h +index 933cd81b95..cdf39f840a 100644 +--- a/components/wpa_supplicant/src/crypto/sha1.h ++++ b/components/wpa_supplicant/src/crypto/sha1.h +@@ -11,13 +11,13 @@ + + #define SHA1_MAC_LEN 20 + +-int hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha1_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac); +-int hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len, ++int wpa_hmac_sha1(const u8 *key, size_t key_len, const u8 *data, size_t data_len, + u8 *mac); +-int sha1_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha1_prf(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, size_t buf_len); +-int sha1_t_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha1_t_prf(const u8 *key, size_t key_len, const char *label, + const u8 *seed, size_t seed_len, u8 *buf, size_t buf_len); + int __must_check tls_prf_sha1_md5(const u8 *secret, size_t secret_len, + const char *label, const u8 *seed, diff --git a/components/wpa_supplicant/src/crypto/sha256-internal.c b/components/wpa_supplicant/src/crypto/sha256-internal.c -index ff1e2ba168..d763fa6f06 100644 +index ff1e2ba168..bc9370d0a7 100644 --- a/components/wpa_supplicant/src/crypto/sha256-internal.c +++ b/components/wpa_supplicant/src/crypto/sha256-internal.c -@@ -31,7 +31,7 @@ int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, +@@ -22,7 +22,7 @@ + * @mac: Buffer for the hash + * Returns: 0 on success, -1 of failure + */ +-int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { + struct sha256_state ctx; +@@ -31,11 +31,11 @@ int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, if (TEST_FAIL()) return -1; - sha256_init(&ctx); + wpa_sha256_init(&ctx); for (i = 0; i < num_elem; i++) - if (sha256_process(&ctx, addr[i], len[i])) +- if (sha256_process(&ctx, addr[i], len[i])) ++ if (wpa_sha256_process(&ctx, addr[i], len[i])) return -1; +- if (sha256_done(&ctx, mac)) ++ if (wpa_sha256_done(&ctx, mac)) + return -1; + return 0; + } +@@ -81,7 +81,7 @@ static const unsigned long K[64] = { + #endif + + /* compress 512-bits */ +-static int sha256_compress(struct sha256_state *md, unsigned char *buf) ++static int wpa_sha256_compress(struct sha256_state *md, unsigned char *buf) + { + u32 S[8], W[64], t0, t1; + u32 t; @@ -124,7 +124,7 @@ static int sha256_compress(struct sha256_state *md, unsigned char *buf) @@ -470,13 +1772,148 @@ index ff1e2ba168..d763fa6f06 100644 { md->curlen = 0; md->length = 0; +@@ -145,7 +145,7 @@ void sha256_init(struct sha256_state *md) + @param inlen The length of the data (octets) + @return CRYPT_OK if successful + */ +-int sha256_process(struct sha256_state *md, const unsigned char *in, ++int wpa_sha256_process(struct sha256_state *md, const unsigned char *in, + unsigned long inlen) + { + unsigned long n; +@@ -155,7 +155,7 @@ int sha256_process(struct sha256_state *md, const unsigned char *in, + + while (inlen > 0) { + if (md->curlen == 0 && inlen >= SHA256_BLOCK_SIZE) { +- if (sha256_compress(md, (unsigned char *) in) < 0) ++ if (wpa_sha256_compress(md, (unsigned char *) in) < 0) + return -1; + md->length += SHA256_BLOCK_SIZE * 8; + in += SHA256_BLOCK_SIZE; +@@ -167,7 +167,7 @@ int sha256_process(struct sha256_state *md, const unsigned char *in, + in += n; + inlen -= n; + if (md->curlen == SHA256_BLOCK_SIZE) { +- if (sha256_compress(md, md->buf) < 0) ++ if (wpa_sha256_compress(md, md->buf) < 0) + return -1; + md->length += 8 * SHA256_BLOCK_SIZE; + md->curlen = 0; +@@ -185,7 +185,7 @@ int sha256_process(struct sha256_state *md, const unsigned char *in, + @param out [out] The destination of the hash (32 bytes) + @return CRYPT_OK if successful + */ +-int sha256_done(struct sha256_state *md, unsigned char *out) ++int wpa_sha256_done(struct sha256_state *md, unsigned char *out) + { + int i; + +@@ -206,7 +206,7 @@ int sha256_done(struct sha256_state *md, unsigned char *out) + while (md->curlen < SHA256_BLOCK_SIZE) { + md->buf[md->curlen++] = (unsigned char) 0; + } +- sha256_compress(md, md->buf); ++ wpa_sha256_compress(md, md->buf); + md->curlen = 0; + } + +@@ -217,7 +217,7 @@ int sha256_done(struct sha256_state *md, unsigned char *out) + + /* store length */ + WPA_PUT_BE64(md->buf + 56, md->length); +- sha256_compress(md, md->buf); ++ wpa_sha256_compress(md, md->buf); + + /* copy output */ + for (i = 0; i < 8; i++) +diff --git a/components/wpa_supplicant/src/crypto/sha256-kdf.c b/components/wpa_supplicant/src/crypto/sha256-kdf.c +index 5a6b744552..271981157c 100644 +--- a/components/wpa_supplicant/src/crypto/sha256-kdf.c ++++ b/components/wpa_supplicant/src/crypto/sha256-kdf.c +@@ -29,7 +29,7 @@ + * with label = NULL and seed = info, this matches HKDF-Expand() defined in + * RFC 5869, Chapter 2.3. + */ +-int hmac_sha256_kdf(const u8 *secret, size_t secret_len, ++int wpa_hmac_sha256_kdf(const u8 *secret, size_t secret_len, + const char *label, const u8 *seed, size_t seed_len, + u8 *out, size_t outlen) + { +@@ -53,7 +53,7 @@ int hmac_sha256_kdf(const u8 *secret, size_t secret_len, + addr[3] = &iter; + len[3] = 1; + +- if (hmac_sha256_vector(secret, secret_len, 3, &addr[1], &len[1], T) < 0) ++ if (wpa_hmac_sha256_vector(secret, secret_len, 3, &addr[1], &len[1], T) < 0) + return -1; + + pos = 0; +@@ -74,7 +74,7 @@ int hmac_sha256_kdf(const u8 *secret, size_t secret_len, + } + iter++; + +- if (hmac_sha256_vector(secret, secret_len, 4, addr, len, T) < 0) ++ if (wpa_hmac_sha256_vector(secret, secret_len, 4, addr, len, T) < 0) + { + os_memset(out, 0, outlen); + forced_memzero(T, SHA256_MAC_LEN); +diff --git a/components/wpa_supplicant/src/crypto/sha256-prf.c b/components/wpa_supplicant/src/crypto/sha256-prf.c +index d665a9983c..99371a92a0 100644 +--- a/components/wpa_supplicant/src/crypto/sha256-prf.c ++++ b/components/wpa_supplicant/src/crypto/sha256-prf.c +@@ -27,10 +27,10 @@ + * This function is used to derive new, cryptographically separate keys from a + * given key. + */ +-int sha256_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha256_prf(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, size_t buf_len) + { +- return sha256_prf_bits(key, key_len, label, data, data_len, buf, ++ return wpa_sha256_prf_bits(key, key_len, label, data, data_len, buf, + buf_len * 8); + } + +@@ -51,7 +51,7 @@ int sha256_prf(const u8 *key, size_t key_len, const char *label, + * significant 1-7 bits of the last octet in the output are not part of the + * requested output. + */ +-int sha256_prf_bits(const u8 *key, size_t key_len, const char *label, ++int wpa_sha256_prf_bits(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, + size_t buf_len_bits) + { +@@ -78,12 +78,12 @@ int sha256_prf_bits(const u8 *key, size_t key_len, const char *label, + plen = buf_len - pos; + WPA_PUT_LE16(counter_le, counter); + if (plen >= SHA256_MAC_LEN) { +- if (hmac_sha256_vector(key, key_len, 4, addr, len, ++ if (wpa_hmac_sha256_vector(key, key_len, 4, addr, len, + &buf[pos]) < 0) + return -1; + pos += SHA256_MAC_LEN; + } else { +- if (hmac_sha256_vector(key, key_len, 4, addr, len, ++ if (wpa_hmac_sha256_vector(key, key_len, 4, addr, len, + hash) < 0) + return -1; + os_memcpy(&buf[pos], hash, plen); diff --git a/components/wpa_supplicant/src/crypto/sha256-tlsprf.c b/components/wpa_supplicant/src/crypto/sha256-tlsprf.c -index 9045cd36b4..4d0c57e79e 100644 +index 9045cd36b4..0848667c41 100644 --- a/components/wpa_supplicant/src/crypto/sha256-tlsprf.c +++ b/components/wpa_supplicant/src/crypto/sha256-tlsprf.c -@@ -57,7 +57,7 @@ int tls_prf_sha256(const u8 *secret, size_t secret_len, const char *label, +@@ -50,14 +50,14 @@ int tls_prf_sha256(const u8 *secret, size_t secret_len, const char *label, + * PRF(secret, label, seed) = P_SHA256(secret, label + seed) + */ + +- if (hmac_sha256_vector(secret, secret_len, 2, &addr[1], &len[1], A) < 0) ++ if (wpa_hmac_sha256_vector(secret, secret_len, 2, &addr[1], &len[1], A) < 0) + return -1; + + pos = 0; while (pos < outlen) { - if (hmac_sha256_vector(secret, secret_len, 3, addr, len, P) < +- if (hmac_sha256_vector(secret, secret_len, 3, addr, len, P) < ++ if (wpa_hmac_sha256_vector(secret, secret_len, 3, addr, len, P) < 0 || - hmac_sha256(secret, secret_len, A, SHA256_MAC_LEN, A) < 0) + wpa_hmac_sha256(secret, secret_len, A, SHA256_MAC_LEN, A) < 0) @@ -484,10 +1921,46 @@ index 9045cd36b4..4d0c57e79e 100644 clen = outlen - pos; diff --git a/components/wpa_supplicant/src/crypto/sha256.c b/components/wpa_supplicant/src/crypto/sha256.c -index 17af964ad0..0fac0dd52d 100644 +index 17af964ad0..72f88b0501 100644 --- a/components/wpa_supplicant/src/crypto/sha256.c +++ b/components/wpa_supplicant/src/crypto/sha256.c -@@ -97,7 +97,7 @@ int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, +@@ -23,7 +23,7 @@ + * @mac: Buffer for the hash (32 bytes) + * Returns: 0 on success, -1 on failure + */ +-int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac) + { + unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ +@@ -41,7 +41,7 @@ int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, + + /* if key is longer than 64 bytes reset it to key = SHA256(key) */ + if (key_len > 64) { +- if (sha256_vector(1, &key, &key_len, tk) < 0) ++ if (wpa_sha256_vector(1, &key, &key_len, tk) < 0) + return -1; + key = tk; + key_len = 32; +@@ -70,7 +70,7 @@ int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, + _addr[i + 1] = addr[i]; + _len[i + 1] = len[i]; + } +- if (sha256_vector(1 + num_elem, _addr, _len, mac) < 0) ++ if (wpa_sha256_vector(1 + num_elem, _addr, _len, mac) < 0) + return -1; + + os_memset(k_pad, 0, sizeof(k_pad)); +@@ -84,7 +84,7 @@ int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, + _len[0] = 64; + _addr[1] = mac; + _len[1] = SHA256_MAC_LEN; +- return sha256_vector(2, _addr, _len, mac); ++ return wpa_sha256_vector(2, _addr, _len, mac); + } + + +@@ -97,8 +97,8 @@ int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, * @mac: Buffer for the hash (32 bytes) * Returns: 0 on success, -1 on failure */ @@ -495,76 +1968,1014 @@ index 17af964ad0..0fac0dd52d 100644 +int wpa_hmac_sha256(const u8 *key, size_t key_len, const u8 *data, size_t data_len, u8 *mac) { - return hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); +- return hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); ++ return wpa_hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); + } diff --git a/components/wpa_supplicant/src/crypto/sha256.h b/components/wpa_supplicant/src/crypto/sha256.h -index 8054bbe5c5..7ce7ddebe9 100644 +index 8054bbe5c5..4f9b652aac 100644 --- a/components/wpa_supplicant/src/crypto/sha256.h +++ b/components/wpa_supplicant/src/crypto/sha256.h -@@ -13,7 +13,7 @@ +@@ -11,19 +11,19 @@ - int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, + #define SHA256_MAC_LEN 32 + +-int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac); -int hmac_sha256(const u8 *key, size_t key_len, const u8 *data, +int wpa_hmac_sha256(const u8 *key, size_t key_len, const u8 *data, size_t data_len, u8 *mac); - int sha256_prf(const u8 *key, size_t key_len, const char *label, +-int sha256_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha256_prf(const u8 *key, size_t key_len, const char *label, const u8 *data, size_t data_len, u8 *buf, size_t buf_len); +-int sha256_prf_bits(const u8 *key, size_t key_len, const char *label, ++int wpa_sha256_prf_bits(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, + size_t buf_len_bits); + int tls_prf_sha256(const u8 *secret, size_t secret_len, + const char *label, const u8 *seed, size_t seed_len, + u8 *out, size_t outlen); +-int hmac_sha256_kdf(const u8 *secret, size_t secret_len, ++int wpa_hmac_sha256_kdf(const u8 *secret, size_t secret_len, + const char *label, const u8 *seed, size_t seed_len, + u8 *out, size_t outlen); + diff --git a/components/wpa_supplicant/src/crypto/sha256_i.h b/components/wpa_supplicant/src/crypto/sha256_i.h -index a502d2ba5d..c53558abd8 100644 +index a502d2ba5d..84b1ccce1a 100644 --- a/components/wpa_supplicant/src/crypto/sha256_i.h +++ b/components/wpa_supplicant/src/crypto/sha256_i.h -@@ -17,7 +17,7 @@ struct sha256_state { +@@ -17,9 +17,9 @@ struct sha256_state { u8 buf[SHA256_BLOCK_SIZE]; }; -void sha256_init(struct sha256_state *md); +-int sha256_process(struct sha256_state *md, const unsigned char *in, +void wpa_sha256_init(struct sha256_state *md); - int sha256_process(struct sha256_state *md, const unsigned char *in, ++int wpa_sha256_process(struct sha256_state *md, const unsigned char *in, unsigned long inlen); - int sha256_done(struct sha256_state *md, unsigned char *out); -diff --git a/components/wpa_supplicant/src/wps/wps_attr_build.c b/components/wpa_supplicant/src/wps/wps_attr_build.c -index c61114bdb2..ce74875dab 100644 ---- a/components/wpa_supplicant/src/wps/wps_attr_build.c -+++ b/components/wpa_supplicant/src/wps/wps_attr_build.c -@@ -324,7 +324,7 @@ int wps_build_key_wrap_auth(struct wps_data *wps, struct wpabuf *msg) - u8 hash[SHA256_MAC_LEN]; +-int sha256_done(struct sha256_state *md, unsigned char *out); ++int wpa_sha256_done(struct sha256_state *md, unsigned char *out); - wpa_printf(MSG_DEBUG, "WPS: * Key Wrap Authenticator"); -- hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, wpabuf_head(msg), -+ wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, wpabuf_head(msg), - wpabuf_len(msg), hash); - wpabuf_put_be16(msg, ATTR_KEY_WRAP_AUTH); - wpabuf_put_be16(msg, WPS_KWA_LEN); -diff --git a/components/wpa_supplicant/src/wps/wps_attr_process.c b/components/wpa_supplicant/src/wps/wps_attr_process.c -index c298df3f69..880cacd8ae 100644 ---- a/components/wpa_supplicant/src/wps/wps_attr_process.c -+++ b/components/wpa_supplicant/src/wps/wps_attr_process.c -@@ -68,7 +68,7 @@ int wps_process_key_wrap_auth(struct wps_data *wps, struct wpabuf *msg, + #endif /* SHA256_I_H */ +diff --git a/components/wpa_supplicant/src/crypto/sha384-internal.c b/components/wpa_supplicant/src/crypto/sha384-internal.c +index 646f72979c..8577897d41 100644 +--- a/components/wpa_supplicant/src/crypto/sha384-internal.c ++++ b/components/wpa_supplicant/src/crypto/sha384-internal.c +@@ -21,17 +21,17 @@ + * @mac: Buffer for the hash + * Returns: 0 on success, -1 of failure + */ +-int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { + struct sha384_state ctx; + size_t i; + +- sha384_init(&ctx); ++ wpa_sha384_init(&ctx); + for (i = 0; i < num_elem; i++) +- if (sha384_process(&ctx, addr[i], len[i])) ++ if (wpa_sha384_process(&ctx, addr[i], len[i])) + return -1; +- if (sha384_done(&ctx, mac)) ++ if (wpa_sha384_done(&ctx, mac)) + return -1; + return 0; + } +@@ -49,7 +49,7 @@ int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, + @param md The hash state you wish to initialize + @return CRYPT_OK if successful + */ +-void sha384_init(struct sha384_state *md) ++void wpa_sha384_init(struct sha384_state *md) + { + md->curlen = 0; + md->length = 0; +@@ -63,10 +63,10 @@ void sha384_init(struct sha384_state *md) + md->state[7] = CONST64(0x47b5481dbefa4fa4); + } + +-int sha384_process(struct sha384_state *md, const unsigned char *in, ++int wpa_sha384_process(struct sha384_state *md, const unsigned char *in, + unsigned long inlen) + { +- return sha512_process(md, in, inlen); ++ return wpa_sha512_process(md, in, inlen); + } + + /** +@@ -75,14 +75,14 @@ int sha384_process(struct sha384_state *md, const unsigned char *in, + @param out [out] The destination of the hash (48 bytes) + @return CRYPT_OK if successful + */ +-int sha384_done(struct sha384_state *md, unsigned char *out) ++int wpa_sha384_done(struct sha384_state *md, unsigned char *out) + { + unsigned char buf[64]; + + if (md->curlen >= sizeof(md->buf)) + return -1; + +- if (sha512_done(md, buf) != 0) ++ if (wpa_sha512_done(md, buf) != 0) + return -1; + + os_memcpy(out, buf, 48); +diff --git a/components/wpa_supplicant/src/crypto/sha384-prf.c b/components/wpa_supplicant/src/crypto/sha384-prf.c +index 420e78c380..4f1b6d555a 100644 +--- a/components/wpa_supplicant/src/crypto/sha384-prf.c ++++ b/components/wpa_supplicant/src/crypto/sha384-prf.c +@@ -27,10 +27,10 @@ + * This function is used to derive new, cryptographically separate keys from a + * given key. + */ +-int sha384_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha384_prf(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, size_t buf_len) + { +- return sha384_prf_bits(key, key_len, label, data, data_len, buf, ++ return wpa_sha384_prf_bits(key, key_len, label, data, data_len, buf, + buf_len * 8); + } + +@@ -51,7 +51,7 @@ int sha384_prf(const u8 *key, size_t key_len, const char *label, + * significant 1-7 bits of the last octet in the output are not part of the + * requested output. + */ +-int sha384_prf_bits(const u8 *key, size_t key_len, const char *label, ++int wpa_sha384_prf_bits(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, + size_t buf_len_bits) + { +@@ -78,12 +78,12 @@ int sha384_prf_bits(const u8 *key, size_t key_len, const char *label, + plen = buf_len - pos; + WPA_PUT_LE16(counter_le, counter); + if (plen >= SHA384_MAC_LEN) { +- if (hmac_sha384_vector(key, key_len, 4, addr, len, ++ if (wpa_hmac_sha384_vector(key, key_len, 4, addr, len, + &buf[pos]) < 0) + return -1; + pos += SHA384_MAC_LEN; + } else { +- if (hmac_sha384_vector(key, key_len, 4, addr, len, ++ if (wpa_hmac_sha384_vector(key, key_len, 4, addr, len, + hash) < 0) + return -1; + os_memcpy(&buf[pos], hash, plen); +diff --git a/components/wpa_supplicant/src/crypto/sha384-tlsprf.c b/components/wpa_supplicant/src/crypto/sha384-tlsprf.c +index 9ff96ac2c7..a45d529c63 100644 +--- a/components/wpa_supplicant/src/crypto/sha384-tlsprf.c ++++ b/components/wpa_supplicant/src/crypto/sha384-tlsprf.c +@@ -50,14 +50,14 @@ int tls_prf_sha384(const u8 *secret, size_t secret_len, const char *label, + * PRF(secret, label, seed) = P_SHA384(secret, label + seed) + */ + +- if (hmac_sha384_vector(secret, secret_len, 2, &addr[1], &len[1], A) < 0) ++ if (wpa_hmac_sha384_vector(secret, secret_len, 2, &addr[1], &len[1], A) < 0) + return -1; + + pos = 0; + while (pos < outlen) { +- if (hmac_sha384_vector(secret, secret_len, 3, addr, len, P) < ++ if (wpa_hmac_sha384_vector(secret, secret_len, 3, addr, len, P) < + 0 || +- hmac_sha384(secret, secret_len, A, SHA384_MAC_LEN, A) < 0) ++ wpa_hmac_sha384(secret, secret_len, A, SHA384_MAC_LEN, A) < 0) + return -1; + + clen = outlen - pos; +diff --git a/components/wpa_supplicant/src/crypto/sha384.h b/components/wpa_supplicant/src/crypto/sha384.h +index 1a2c1edffb..1259540534 100644 +--- a/components/wpa_supplicant/src/crypto/sha384.h ++++ b/components/wpa_supplicant/src/crypto/sha384.h +@@ -12,19 +12,19 @@ + #define SHA384_MAC_LEN 48 + #define SHA512_MAC_LEN 64 + +-int hmac_sha384_vector(const u8 *key, size_t key_len, size_t num_elem, ++int wpa_hmac_sha384_vector(const u8 *key, size_t key_len, size_t num_elem, + const u8 *addr[], const size_t *len, u8 *mac); +-int hmac_sha384(const u8 *key, size_t key_len, const u8 *data, ++int wpa_hmac_sha384(const u8 *key, size_t key_len, const u8 *data, + size_t data_len, u8 *mac); +-int sha384_prf(const u8 *key, size_t key_len, const char *label, ++int wpa_sha384_prf(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, size_t buf_len); +-int sha384_prf_bits(const u8 *key, size_t key_len, const char *label, ++int wpa_sha384_prf_bits(const u8 *key, size_t key_len, const char *label, + const u8 *data, size_t data_len, u8 *buf, + size_t buf_len_bits); + int tls_prf_sha384(const u8 *secret, size_t secret_len, + const char *label, const u8 *seed, size_t seed_len, + u8 *out, size_t outlen); +-int hmac_sha384_kdf(const u8 *secret, size_t secret_len, ++int wpa_hmac_sha384_kdf(const u8 *secret, size_t secret_len, + const char *label, const u8 *seed, size_t seed_len, + u8 *out, size_t outlen); + +diff --git a/components/wpa_supplicant/src/crypto/sha384_i.h b/components/wpa_supplicant/src/crypto/sha384_i.h +index a00253ff2c..a56c9656dc 100644 +--- a/components/wpa_supplicant/src/crypto/sha384_i.h ++++ b/components/wpa_supplicant/src/crypto/sha384_i.h +@@ -15,9 +15,9 @@ + + #define sha384_state sha512_state + +-void sha384_init(struct sha384_state *md); +-int sha384_process(struct sha384_state *md, const unsigned char *in, ++void wpa_sha384_init(struct sha384_state *md); ++int wpa_sha384_process(struct sha384_state *md, const unsigned char *in, + unsigned long inlen); +-int sha384_done(struct sha384_state *md, unsigned char *out); ++int wpa_sha384_done(struct sha384_state *md, unsigned char *out); + + #endif /* SHA384_I_H */ +diff --git a/components/wpa_supplicant/src/crypto/sha512-internal.c b/components/wpa_supplicant/src/crypto/sha512-internal.c +index c0263941c1..b8fb97ddfe 100644 +--- a/components/wpa_supplicant/src/crypto/sha512-internal.c ++++ b/components/wpa_supplicant/src/crypto/sha512-internal.c +@@ -21,17 +21,17 @@ + * @mac: Buffer for the hash + * Returns: 0 on success, -1 of failure + */ +-int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, ++int wpa_sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { + struct sha512_state ctx; + size_t i; + +- sha512_init(&ctx); ++ wpa_sha512_init(&ctx); + for (i = 0; i < num_elem; i++) +- if (sha512_process(&ctx, addr[i], len[i])) ++ if (wpa_sha512_process(&ctx, addr[i], len[i])) + return -1; +- if (sha512_done(&ctx, mac)) ++ if (wpa_sha512_done(&ctx, mac)) + return -1; + return 0; + } +@@ -107,7 +107,7 @@ static const u64 K[80] = { + CONST64(0xFFFFFFFFFFFFFFFF)) + + /* compress 1024-bits */ +-static int sha512_compress(struct sha512_state *md, unsigned char *buf) ++static int wpa_sha512_compress(struct sha512_state *md, unsigned char *buf) + { + u64 S[8], t0, t1; + u64 *W; +@@ -161,7 +161,7 @@ static int sha512_compress(struct sha512_state *md, unsigned char *buf) + @param md The hash state you wish to initialize + @return CRYPT_OK if successful + */ +-void sha512_init(struct sha512_state *md) ++void wpa_sha512_init(struct sha512_state *md) + { + md->curlen = 0; + md->length = 0; +@@ -183,7 +183,7 @@ void sha512_init(struct sha512_state *md) + @param inlen The length of the data (octets) + @return CRYPT_OK if successful + */ +-int sha512_process(struct sha512_state *md, const unsigned char *in, ++int wpa_sha512_process(struct sha512_state *md, const unsigned char *in, + unsigned long inlen) + { + unsigned long n; +@@ -193,7 +193,7 @@ int sha512_process(struct sha512_state *md, const unsigned char *in, + + while (inlen > 0) { + if (md->curlen == 0 && inlen >= SHA512_BLOCK_SIZE) { +- if (sha512_compress(md, (unsigned char *) in) < 0) ++ if (wpa_sha512_compress(md, (unsigned char *) in) < 0) + return -1; + md->length += SHA512_BLOCK_SIZE * 8; + in += SHA512_BLOCK_SIZE; +@@ -205,7 +205,7 @@ int sha512_process(struct sha512_state *md, const unsigned char *in, + in += n; + inlen -= n; + if (md->curlen == SHA512_BLOCK_SIZE) { +- if (sha512_compress(md, md->buf) < 0) ++ if (wpa_sha512_compress(md, md->buf) < 0) + return -1; + md->length += 8 * SHA512_BLOCK_SIZE; + md->curlen = 0; +@@ -223,7 +223,7 @@ int sha512_process(struct sha512_state *md, const unsigned char *in, + @param out [out] The destination of the hash (64 bytes) + @return CRYPT_OK if successful + */ +-int sha512_done(struct sha512_state *md, unsigned char *out) ++int wpa_sha512_done(struct sha512_state *md, unsigned char *out) + { + int i; + +@@ -244,7 +244,7 @@ int sha512_done(struct sha512_state *md, unsigned char *out) + while (md->curlen < 128) { + md->buf[md->curlen++] = (unsigned char) 0; + } +- sha512_compress(md, md->buf); ++ wpa_sha512_compress(md, md->buf); + md->curlen = 0; + } + +@@ -258,7 +258,7 @@ int sha512_done(struct sha512_state *md, unsigned char *out) + + /* store length */ + WPA_PUT_BE64(md->buf + 120, md->length); +- sha512_compress(md, md->buf); ++ wpa_sha512_compress(md, md->buf); + + /* copy output */ + for (i = 0; i < 8; i++) +diff --git a/components/wpa_supplicant/src/crypto/sha512_i.h b/components/wpa_supplicant/src/crypto/sha512_i.h +index 108958911e..1100b8eae8 100644 +--- a/components/wpa_supplicant/src/crypto/sha512_i.h ++++ b/components/wpa_supplicant/src/crypto/sha512_i.h +@@ -17,9 +17,9 @@ struct sha512_state { + u8 buf[SHA512_BLOCK_SIZE]; + }; + +-void sha512_init(struct sha512_state *md); +-int sha512_process(struct sha512_state *md, const unsigned char *in, ++void wpa_sha512_init(struct sha512_state *md); ++int wpa_sha512_process(struct sha512_state *md, const unsigned char *in, + unsigned long inlen); +-int sha512_done(struct sha512_state *md, unsigned char *out); ++int wpa_sha512_done(struct sha512_state *md, unsigned char *out); + + #endif /* SHA512_I_H */ +diff --git a/components/wpa_supplicant/src/eap_peer/eap_fast.c b/components/wpa_supplicant/src/eap_peer/eap_fast.c +index 2031c53933..833c487d7e 100644 +--- a/components/wpa_supplicant/src/eap_peer/eap_fast.c ++++ b/components/wpa_supplicant/src/eap_peer/eap_fast.c +@@ -630,7 +630,7 @@ static void eap_fast_write_crypto_binding( + rbind->subtype = EAP_TLV_CRYPTO_BINDING_SUBTYPE_RESPONSE; + os_memcpy(rbind->nonce, _bind->nonce, sizeof(_bind->nonce)); + inc_byte_array(rbind->nonce, sizeof(rbind->nonce)); +- hmac_sha1(cmk, EAP_FAST_CMK_LEN, (u8 *) rbind, sizeof(*rbind), ++ wpa_hmac_sha1(cmk, EAP_FAST_CMK_LEN, (u8 *) rbind, sizeof(*rbind), + rbind->compound_mac); + + wpa_printf(MSG_DEBUG, "EAP-FAST: Reply Crypto-Binding TLV: Version %d " +@@ -709,7 +709,7 @@ static int eap_fast_get_cmk(struct eap_sm *sm, struct eap_fast_data *data, + if (eap_fast_get_phase2_key(sm, data, isk, sizeof(isk)) < 0) + return -1; + wpa_hexdump_key(MSG_MSGDUMP, "EAP-FAST: ISK[j]", isk, sizeof(isk)); +- if (sha1_t_prf(data->simck, EAP_FAST_SIMCK_LEN, ++ if (wpa_sha1_t_prf(data->simck, EAP_FAST_SIMCK_LEN, + "Inner Methods Compound Keys", + isk, sizeof(isk), imck, sizeof(imck)) < 0) + return -1; +@@ -771,7 +771,7 @@ static struct wpabuf * eap_fast_process_crypto_binding( + os_memset(_bind->compound_mac, 0, sizeof(cmac)); + wpa_hexdump(MSG_MSGDUMP, "EAP-FAST: Crypto-Binding TLV for Compound " + "MAC calculation", (u8 *) _bind, bind_len); +- hmac_sha1(cmk, EAP_FAST_CMK_LEN, (u8 *) _bind, bind_len, ++ wpa_hmac_sha1(cmk, EAP_FAST_CMK_LEN, (u8 *) _bind, bind_len, + _bind->compound_mac); + res = os_memcmp_const(cmac, _bind->compound_mac, sizeof(cmac)); + wpa_hexdump(MSG_DEBUG, "EAP-FAST: Received Compound MAC", +diff --git a/components/wpa_supplicant/src/eap_peer/eap_fast_common.c b/components/wpa_supplicant/src/eap_peer/eap_fast_common.c +index bb64ca750b..675f16dac5 100644 +--- a/components/wpa_supplicant/src/eap_peer/eap_fast_common.c ++++ b/components/wpa_supplicant/src/eap_peer/eap_fast_common.c +@@ -84,7 +84,7 @@ void eap_fast_derive_master_secret(const u8 *pac_key, const u8 *server_random, + */ + os_memcpy(seed, server_random, TLS_RANDOM_LEN); + os_memcpy(seed + TLS_RANDOM_LEN, client_random, TLS_RANDOM_LEN); +- sha1_t_prf(pac_key, EAP_FAST_PAC_KEY_LEN, ++ wpa_sha1_t_prf(pac_key, EAP_FAST_PAC_KEY_LEN, + "PAC to master secret label hash", + seed, sizeof(seed), master_secret, TLS_MASTER_SECRET_LEN); + +@@ -117,7 +117,7 @@ int eap_fast_derive_eap_msk(const u8 *simck, u8 *msk) + * MSK = T-PRF(S-IMCK[j], "Session Key Generating Function", 64) + */ + +- if (sha1_t_prf(simck, EAP_FAST_SIMCK_LEN, ++ if (wpa_sha1_t_prf(simck, EAP_FAST_SIMCK_LEN, + "Session Key Generating Function", (u8 *) "", 0, + msk, EAP_FAST_KEY_LEN) < 0) + return -1; +@@ -135,7 +135,7 @@ int eap_fast_derive_eap_emsk(const u8 *simck, u8 *emsk) + * "Extended Session Key Generating Function", 64) + */ + +- if (sha1_t_prf(simck, EAP_FAST_SIMCK_LEN, ++ if (wpa_sha1_t_prf(simck, EAP_FAST_SIMCK_LEN, + "Extended Session Key Generating Function", (u8 *) "", 0, + emsk, EAP_EMSK_LEN) < 0) + return -1; +diff --git a/components/wpa_supplicant/src/eap_peer/eap_peap.c b/components/wpa_supplicant/src/eap_peer/eap_peap.c +index 312536a880..1c7075e6c0 100644 +--- a/components/wpa_supplicant/src/eap_peer/eap_peap.c ++++ b/components/wpa_supplicant/src/eap_peer/eap_peap.c +@@ -363,7 +363,7 @@ eap_tlv_add_cryptobinding(struct eap_sm *sm, + addr[0], len[0]); + wpa_hexdump(MSG_MSGDUMP, "EAP-PEAP: Compound_MAC data 2", + addr[1], len[1]); +- hmac_sha1_vector(data->cmk, 20, 2, addr, len, mac); ++ wpa_hmac_sha1_vector(data->cmk, 20, 2, addr, len, mac); + wpa_hexdump(MSG_MSGDUMP, "EAP-PEAP: Compound_MAC", mac, SHA1_MAC_LEN); + data->crypto_binding_used = 1; + +@@ -458,7 +458,7 @@ eap_tlv_validate_cryptobinding(struct eap_sm *sm, + buf[60] = EAP_TYPE_PEAP; + wpa_hexdump(MSG_DEBUG, "EAP-PEAP: Compound_MAC data", + buf, sizeof(buf)); +- hmac_sha1(data->cmk, 20, buf, sizeof(buf), mac); ++ wpa_hmac_sha1(data->cmk, 20, buf, sizeof(buf), mac); + + if (os_memcmp(mac, pos, SHA1_MAC_LEN) != 0) { + wpa_printf(MSG_DEBUG, "EAP-PEAP: Invalid Compound_MAC in " +diff --git a/components/wpa_supplicant/src/eap_peer/eap_peap_common.c b/components/wpa_supplicant/src/eap_peer/eap_peap_common.c +index 2cafe71975..2d078ceb89 100644 +--- a/components/wpa_supplicant/src/eap_peer/eap_peap_common.c ++++ b/components/wpa_supplicant/src/eap_peer/eap_peap_common.c +@@ -72,7 +72,7 @@ peap_prfplus(int version, const u8 *key, size_t key_len, + while (pos < buf_len) { + counter++; + plen = buf_len - pos; +- if (hmac_sha1_vector(key, key_len, 5, addr, len, hash) < 0) ++ if (wpa_hmac_sha1_vector(key, key_len, 5, addr, len, hash) < 0) + return -1; + if (plen >= SHA1_MAC_LEN) { + os_memcpy(&buf[pos], hash, SHA1_MAC_LEN); +diff --git a/components/wpa_supplicant/src/eap_server/eap_server.c b/components/wpa_supplicant/src/eap_server/eap_server.c +index a0aaf8e652..a6ba3c3ee5 100644 +--- a/components/wpa_supplicant/src/eap_server/eap_server.c ++++ b/components/wpa_supplicant/src/eap_server/eap_server.c +@@ -462,7 +462,7 @@ static void eap_server_erp_init(struct eap_sm *sm) + wpa_hexdump_key(MSG_DEBUG, "EAP: EMSK", emsk, emsk_len); + + WPA_PUT_BE16(len, EAP_EMSK_NAME_LEN); +- if (hmac_sha256_kdf(sm->eap_if.eapSessionId, sm->eap_if.eapSessionIdLen, ++ if (wpa_hmac_sha256_kdf(sm->eap_if.eapSessionId, sm->eap_if.eapSessionIdLen, + "EMSK", len, sizeof(len), + EMSKname, EAP_EMSK_NAME_LEN) < 0) { + wpa_printf(MSG_DEBUG, "EAP: Could not derive EMSKname"); +@@ -476,7 +476,7 @@ static void eap_server_erp_init(struct eap_sm *sm) + os_memcpy(&erp->keyname_nai[pos + 1], domain, domain_len); + + WPA_PUT_BE16(len, emsk_len); +- if (hmac_sha256_kdf(emsk, emsk_len, ++ if (wpa_hmac_sha256_kdf(emsk, emsk_len, + "EAP Re-authentication Root Key@ietf.org", + len, sizeof(len), erp->rRK, emsk_len) < 0) { + wpa_printf(MSG_DEBUG, "EAP: Could not derive rRK for ERP"); +@@ -487,7 +487,7 @@ static void eap_server_erp_init(struct eap_sm *sm) + + ctx[0] = EAP_ERP_CS_HMAC_SHA256_128; + WPA_PUT_BE16(&ctx[1], erp->rRK_len); +- if (hmac_sha256_kdf(erp->rRK, erp->rRK_len, ++ if (wpa_hmac_sha256_kdf(erp->rRK, erp->rRK_len, + "Re-authentication Integrity Key@ietf.org", + ctx, sizeof(ctx), erp->rIK, erp->rRK_len) < 0) { + wpa_printf(MSG_DEBUG, "EAP: Could not derive rIK for ERP"); +@@ -743,7 +743,7 @@ static void erp_send_finish_reauth(struct eap_sm *sm, + + if (erp) { + wpabuf_put_u8(msg, erp->cryptosuite); +- if (hmac_sha256(erp->rIK, erp->rIK_len, ++ if (wpa_hmac_sha256(erp->rIK, erp->rIK_len, + wpabuf_head(msg), wpabuf_len(msg), hash) < 0) { + wpabuf_free(msg); + return; +@@ -776,7 +776,7 @@ static void erp_send_finish_reauth(struct eap_sm *sm, + + WPA_PUT_BE16(seed, seq); + WPA_PUT_BE16(&seed[2], erp->rRK_len); +- if (hmac_sha256_kdf(erp->rRK, erp->rRK_len, ++ if (wpa_hmac_sha256_kdf(erp->rRK, erp->rRK_len, + "Re-authentication Master Session Key@ietf.org", + seed, sizeof(seed), + sm->eap_if.eapKeyData, erp->rRK_len) < 0) { +@@ -928,7 +928,7 @@ SM_STATE(EAP, INITIATE_RECEIVED) + } + + if (hash_len) { +- if (hmac_sha256(erp->rIK, erp->rIK_len, hdr, ++ if (wpa_hmac_sha256(erp->rIK, erp->rIK_len, hdr, + end - hdr - hash_len, hash) < 0) + goto fail; + if (os_memcmp(end - hash_len, hash, hash_len) != 0) { +@@ -941,7 +941,7 @@ SM_STATE(EAP, INITIATE_RECEIVED) + /* Check if any supported CS results in matching tag */ + if (!hash_len && max_len >= 1 + 32 && + end[-33] == EAP_ERP_CS_HMAC_SHA256_256) { +- if (hmac_sha256(erp->rIK, erp->rIK_len, hdr, ++ if (wpa_hmac_sha256(erp->rIK, erp->rIK_len, hdr, + end - hdr - 32, hash) < 0) + goto fail; + if (os_memcmp(end - 32, hash, 32) == 0) { +@@ -953,7 +953,7 @@ SM_STATE(EAP, INITIATE_RECEIVED) + } + + if (!hash_len && end[-17] == EAP_ERP_CS_HMAC_SHA256_128) { +- if (hmac_sha256(erp->rIK, erp->rIK_len, hdr, ++ if (wpa_hmac_sha256(erp->rIK, erp->rIK_len, hdr, + end - hdr - 16, hash) < 0) + goto fail; + if (os_memcmp(end - 16, hash, 16) == 0) { +diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.c b/components/wpa_supplicant/src/rsn_supp/wpa.c +index aef17fc9c0..0ead21a2c8 100644 +--- a/components/wpa_supplicant/src/rsn_supp/wpa.c ++++ b/components/wpa_supplicant/src/rsn_supp/wpa.c +@@ -2945,7 +2945,7 @@ int owe_process_assoc_resp(const u8 *rsn_ie, size_t rsn_len, const uint8_t *dh_i + addr[1] = dh_ie + 2; + len[1] = dh_len - 2; + +- int res = sha256_vector(2, addr, len, pmkid); ++ int res = wpa_sha256_vector(2, addr, len, pmkid); + if (res < 0 ) { + goto fail; + } +@@ -2969,7 +2969,7 @@ int owe_process_assoc_resp(const u8 *rsn_ie, size_t rsn_len, const uint8_t *dh_i + wpabuf_put_data(hkey, dh_ie + 2, dh_len - 2); /* A */ + wpabuf_put_le16(hkey, sm->owe_group); /* group */ + +- res = hmac_sha256(wpabuf_head(hkey), wpabuf_len(hkey), wpabuf_head(sh_secret), wpabuf_len(sh_secret), prk); ++ res = wpa_hmac_sha256(wpabuf_head(hkey), wpabuf_len(hkey), wpabuf_head(sh_secret), wpabuf_len(sh_secret), prk); + if (res < 0 ) { + goto fail; + } +@@ -2982,7 +2982,7 @@ int owe_process_assoc_resp(const u8 *rsn_ie, size_t rsn_len, const uint8_t *dh_i + wpa_hexdump_key(MSG_DEBUG, "OWE: prk", prk, hash_len); + + /* PMK = HKDF-expand(prk, "OWE Key Generation", n) */ +- res = hmac_sha256_kdf(prk, hash_len, NULL, (const u8 *)info, ++ res = wpa_hmac_sha256_kdf(prk, hash_len, NULL, (const u8 *)info, + os_strlen(info), pmk, hash_len); + if (res < 0 ) { + goto fail; +diff --git a/components/wpa_supplicant/src/tls/pkcs5.c b/components/wpa_supplicant/src/tls/pkcs5.c +index 7bef89b4fd..ccee6d78e6 100644 +--- a/components/wpa_supplicant/src/tls/pkcs5.c ++++ b/components/wpa_supplicant/src/tls/pkcs5.c +@@ -444,13 +444,13 @@ static int pkcs12_key_gen(const u8 *pw, size_t pw_len, const u8 *salt, + len[0] = v; + addr[1] = I; + len[1] = S_len + P_len; +- if (sha1_vector(2, addr, len, hash) < 0) ++ if (wpa_sha1_vector(2, addr, len, hash) < 0) + goto done; + + addr[0] = hash; + len[0] = SHA1_MAC_LEN; + for (i = 1; i < iter; i++) { +- if (sha1_vector(1, addr, len, hash) < 0) ++ if (wpa_sha1_vector(1, addr, len, hash) < 0) + goto done; + } + +diff --git a/components/wpa_supplicant/src/tls/tlsv1_client_ocsp.c b/components/wpa_supplicant/src/tls/tlsv1_client_ocsp.c +index 128f4b5b9e..c4d06c3de9 100644 +--- a/components/wpa_supplicant/src/tls/tlsv1_client_ocsp.c ++++ b/components/wpa_supplicant/src/tls/tlsv1_client_ocsp.c +@@ -55,7 +55,7 @@ static int ocsp_responder_id_match(struct x509_certificate *signer, + const u8 *addr[1] = { signer->public_key }; + size_t len[1] = { signer->public_key_len }; + +- if (sha1_vector(1, addr, len, hash) < 0) ++ if (wpa_sha1_vector(1, addr, len, hash) < 0) + return 0; + return os_memcmp(hash, key_hash, SHA1_MAC_LEN) == 0; + } +@@ -72,28 +72,28 @@ static unsigned int ocsp_hash_data(struct asn1_oid *alg, const u8 *data, + char buf[100]; + + if (x509_sha1_oid(alg)) { +- if (sha1_vector(1, addr, len, hash) < 0) ++ if (wpa_sha1_vector(1, addr, len, hash) < 0) + return 0; + wpa_hexdump(MSG_MSGDUMP, "OCSP: Hash (SHA1)", hash, 20); + return 20; + } + + if (x509_sha256_oid(alg)) { +- if (sha256_vector(1, addr, len, hash) < 0) ++ if (wpa_sha256_vector(1, addr, len, hash) < 0) + return 0; + wpa_hexdump(MSG_MSGDUMP, "OCSP: Hash (SHA256)", hash, 32); + return 32; + } + + if (x509_sha384_oid(alg)) { +- if (sha384_vector(1, addr, len, hash) < 0) ++ if (wpa_sha384_vector(1, addr, len, hash) < 0) + return 0; + wpa_hexdump(MSG_MSGDUMP, "OCSP: Hash (SHA384)", hash, 48); + return 48; + } + + if (x509_sha512_oid(alg)) { +- if (sha512_vector(1, addr, len, hash) < 0) ++ if (wpa_sha512_vector(1, addr, len, hash) < 0) + return 0; + wpa_hexdump(MSG_MSGDUMP, "OCSP: Hash (SHA512)", hash, 64); + return 64; +diff --git a/components/wpa_supplicant/src/tls/tlsv1_client_read.c b/components/wpa_supplicant/src/tls/tlsv1_client_read.c +index 3394873655..e13a7fc8dc 100644 +--- a/components/wpa_supplicant/src/tls/tlsv1_client_read.c ++++ b/components/wpa_supplicant/src/tls/tlsv1_client_read.c +@@ -304,7 +304,7 @@ static void tls_peer_cert_event(struct tlsv1_client *conn, int depth, + size_t len[1]; + addr[0] = wpabuf_head(cert_buf); + len[0] = wpabuf_len(cert_buf); +- if (sha256_vector(1, addr, len, hash) == 0) { ++ if (wpa_sha256_vector(1, addr, len, hash) == 0) { + ev.peer_cert.hash = hash; + ev.peer_cert.hash_len = sizeof(hash); + } +@@ -519,7 +519,7 @@ static int tls_process_certificate(struct tlsv1_client *conn, u8 ct, + "TLSv1: Validate server certificate hash"); + x509_name_string(&chain->subject, buf, sizeof(buf)); + wpa_printf(MSG_DEBUG, "TLSv1: 0: %s", buf); +- if (sha256_vector(1, &chain->cert_start, &chain->cert_len, ++ if (wpa_sha256_vector(1, &chain->cert_start, &chain->cert_len, + hash) < 0 || + os_memcmp(conn->cred->srv_cert_hash, hash, + SHA256_MAC_LEN) != 0) { +diff --git a/components/wpa_supplicant/src/tls/tlsv1_cred.c b/components/wpa_supplicant/src/tls/tlsv1_cred.c +index 1310f4e10e..0cee09749d 100644 +--- a/components/wpa_supplicant/src/tls/tlsv1_cred.c ++++ b/components/wpa_supplicant/src/tls/tlsv1_cred.c +@@ -130,7 +130,7 @@ static int tlsv1_add_cert(struct x509_certificate **chain, + return -1; + } + +- der = base64_decode((const char *) pos, end - pos, &der_len); ++ der = wpa_base64_decode((const char *) pos, end - pos, &der_len); + if (der == NULL) { + wpa_printf(MSG_INFO, "TLSv1: Could not decode PEM " + "certificate"); +@@ -293,7 +293,7 @@ static struct crypto_private_key * tlsv1_set_key_pem(const u8 *key, size_t len) + } + } + +- der = base64_decode((const char *) pos, end - pos, &der_len); ++ der = wpa_base64_decode((const char *) pos, end - pos, &der_len); + if (!der) + return NULL; + pkey = crypto_private_key_import(der, der_len, NULL); +@@ -321,7 +321,7 @@ static struct crypto_private_key * tlsv1_set_key_enc_pem(const u8 *key, + if (!end) + return NULL; + +- der = base64_decode((const char *) pos, end - pos, &der_len); ++ der = wpa_base64_decode((const char *) pos, end - pos, &der_len); + if (!der) + return NULL; + pkey = crypto_private_key_import(der, der_len, passwd); +@@ -1158,7 +1158,7 @@ static int tlsv1_set_dhparams_blob(struct tlsv1_credentials *cred, return -1; } -- hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, head, len, hash); -+ wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, head, len, hash); - if (os_memcmp(hash, key_wrap_auth, WPS_KWA_LEN) != 0) { - wpa_printf(MSG_DEBUG, "WPS: Invalid KWA"); +- der = base64_decode((const char *) pos, end - pos, &der_len); ++ der = wpa_base64_decode((const char *) pos, end - pos, &der_len); + if (der == NULL) { + wpa_printf(MSG_INFO, "TLSv1: Could not decode PEM dhparams"); + return -1; +diff --git a/components/wpa_supplicant/src/tls/x509v3.c b/components/wpa_supplicant/src/tls/x509v3.c +index 1bbd80ade8..4057e40b03 100644 +--- a/components/wpa_supplicant/src/tls/x509v3.c ++++ b/components/wpa_supplicant/src/tls/x509v3.c +@@ -2047,25 +2047,25 @@ skip_digest_oid: + hash, hash_len); + break; + case 5: /* sha-1WithRSAEncryption */ +- sha1_vector(1, addr, len, hash); ++ wpa_sha1_vector(1, addr, len, hash); + hash_len = 20; + wpa_hexdump(MSG_MSGDUMP, "X509: Certificate hash (SHA1)", + hash, hash_len); + break; + case 11: /* sha256WithRSAEncryption */ +- sha256_vector(1, addr, len, hash); ++ wpa_sha256_vector(1, addr, len, hash); + hash_len = 32; + wpa_hexdump(MSG_MSGDUMP, "X509: Certificate hash (SHA256)", + hash, hash_len); + break; + case 12: /* sha384WithRSAEncryption */ +- sha384_vector(1, addr, len, hash); ++ wpa_sha384_vector(1, addr, len, hash); + hash_len = 48; + wpa_hexdump(MSG_MSGDUMP, "X509: Certificate hash (SHA384)", + hash, hash_len); + break; + case 13: /* sha512WithRSAEncryption */ +- sha512_vector(1, addr, len, hash); ++ wpa_sha512_vector(1, addr, len, hash); + hash_len = 64; + wpa_hexdump(MSG_MSGDUMP, "X509: Certificate hash (SHA512)", + hash, hash_len); +diff --git a/components/wpa_supplicant/src/utils/base64.c b/components/wpa_supplicant/src/utils/base64.c +index a17d2d36dc..ac347ce00f 100644 +--- a/components/wpa_supplicant/src/utils/base64.c ++++ b/components/wpa_supplicant/src/utils/base64.c +@@ -151,7 +151,7 @@ static unsigned char * base64_gen_decode(const char *src, size_t len, + + + /** +- * base64_encode - Base64 encode ++ * wpa_base64_encode - Base64 encode + * @src: Data to be encoded + * @len: Length of the data to be encoded + * @out_len: Pointer to output length variable, or %NULL if not used +@@ -162,20 +162,20 @@ static unsigned char * base64_gen_decode(const char *src, size_t len, + * nul terminated to make it easier to use as a C string. The nul terminator is + * not included in out_len. + */ +-char * base64_encode(const void *src, size_t len, size_t *out_len) ++char * wpa_base64_encode(const void *src, size_t len, size_t *out_len) + { + return base64_gen_encode(src, len, out_len, base64_table, 1); + } + + +-char * base64_url_encode(const void *src, size_t len, size_t *out_len) ++char * wpa_base64_url_encode(const void *src, size_t len, size_t *out_len) + { + return base64_gen_encode(src, len, out_len, base64_url_table, 0); + } + + + /** +- * base64_decode - Base64 decode ++ * wpa_base64_decode - Base64 decode + * @src: Data to be decoded + * @len: Length of the data to be decoded + * @out_len: Pointer to output length variable +@@ -184,13 +184,13 @@ char * base64_url_encode(const void *src, size_t len, size_t *out_len) + * + * Caller is responsible for freeing the returned buffer. + */ +-unsigned char * base64_decode(const char *src, size_t len, size_t *out_len) ++unsigned char * wpa_base64_decode(const char *src, size_t len, size_t *out_len) + { + return base64_gen_decode(src, len, out_len, base64_table); + } + + +-unsigned char * base64_url_decode(const char *src, size_t len, size_t *out_len) ++unsigned char * wpa_base64_url_decode(const char *src, size_t len, size_t *out_len) + { + return base64_gen_decode(src, len, out_len, base64_url_table); + } +diff --git a/components/wpa_supplicant/src/utils/base64.h b/components/wpa_supplicant/src/utils/base64.h +index 6216f44e55..be380ee1ca 100644 +--- a/components/wpa_supplicant/src/utils/base64.h ++++ b/components/wpa_supplicant/src/utils/base64.h +@@ -6,12 +6,12 @@ + * See README for more details. + */ + +-#ifndef BASE64_H +-#define BASE64_H ++#ifndef WPA_BASE64_H ++#define WPA_BASE64_H + +-char * base64_encode(const void *src, size_t len, size_t *out_len); +-unsigned char * base64_decode(const char *src, size_t len, size_t *out_len); +-char * base64_url_encode(const void *src, size_t len, size_t *out_len); +-unsigned char * base64_url_decode(const char *src, size_t len, size_t *out_len); ++char * wpa_base64_encode(const void *src, size_t len, size_t *out_len); ++unsigned char * wpa_base64_decode(const char *src, size_t len, size_t *out_len); ++char * wpa_base64_url_encode(const void *src, size_t len, size_t *out_len); ++unsigned char * wpa_base64_url_decode(const char *src, size_t len, size_t *out_len); + +-#endif /* BASE64_H */ ++#endif /* WPA_BASE64_H */ +diff --git a/components/wpa_supplicant/src/utils/json.c b/components/wpa_supplicant/src/utils/json.c +index 5a0edf2114..58093c6b8e 100644 +--- a/components/wpa_supplicant/src/utils/json.c ++++ b/components/wpa_supplicant/src/utils/json.c +@@ -516,7 +516,7 @@ struct wpabuf * json_get_member_base64url(struct json_token *json, + token = json_get_member(json, name); + if (!token || token->type != JSON_STRING) + return NULL; +- buf = base64_url_decode(token->string, os_strlen(token->string), ++ buf = wpa_base64_url_decode(token->string, os_strlen(token->string), + &buflen); + if (!buf) + return NULL; +@@ -611,7 +611,7 @@ int json_add_base64url(struct wpabuf *json, const char *name, const void *val, + { + char *b64; + +- b64 = base64_url_encode(val, len, NULL); ++ b64 = wpa_base64_url_encode(val, len, NULL); + if (!b64) + return -1; + json_add_string(json, name, b64); +diff --git a/components/wpa_supplicant/src/wps/wps_attr_build.c b/components/wpa_supplicant/src/wps/wps_attr_build.c +index c7d739a0c3..b4609ec647 100644 +--- a/components/wpa_supplicant/src/wps/wps_attr_build.c ++++ b/components/wpa_supplicant/src/wps/wps_attr_build.c +@@ -181,7 +181,7 @@ int wps_build_authenticator(struct wps_data *wps, struct wpabuf *msg) + len[0] = wpabuf_len(wps->last_msg); + addr[1] = wpabuf_head(msg); + len[1] = wpabuf_len(msg); +- if (hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 2, addr, len, ++ if (wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 2, addr, len, + hash) < 0) + return -1; + +@@ -385,7 +385,7 @@ int wps_build_key_wrap_auth(struct wps_data *wps, struct wpabuf *msg) + u8 hash[SHA256_MAC_LEN]; + + wpa_printf(MSG_DEBUG, "WPS: * Key Wrap Authenticator"); +- if (hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, wpabuf_head(msg), ++ if (wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, wpabuf_head(msg), + wpabuf_len(msg), hash) < 0) + return -1; + +@@ -438,7 +438,7 @@ int wps_build_oob_dev_pw(struct wpabuf *msg, u16 dev_pw_id, + dev_pw_id); + addr[0] = wpabuf_head(pubkey); + hash_len = wpabuf_len(pubkey); +- if (sha256_vector(1, addr, &hash_len, pubkey_hash) < 0) ++ if (wpa_sha256_vector(1, addr, &hash_len, pubkey_hash) < 0) + return -1; + #ifdef CONFIG_WPS_TESTING + if (wps_corrupt_pkhash) { +diff --git a/components/wpa_supplicant/src/wps/wps_attr_process.c b/components/wpa_supplicant/src/wps/wps_attr_process.c +index 44436a4862..9eca971ae9 100644 +--- a/components/wpa_supplicant/src/wps/wps_attr_process.c ++++ b/components/wpa_supplicant/src/wps/wps_attr_process.c +@@ -40,7 +40,7 @@ int wps_process_authenticator(struct wps_data *wps, const u8 *authenticator, + addr[1] = wpabuf_head(msg); + len[1] = wpabuf_len(msg) - 4 - WPS_AUTHENTICATOR_LEN; + +- if (hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 2, addr, len, ++ if (wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 2, addr, len, + hash) < 0 || + os_memcmp_const(hash, authenticator, WPS_AUTHENTICATOR_LEN) != 0) { + wpa_printf(MSG_DEBUG, "WPS: Incorrect Authenticator"); +@@ -71,7 +71,7 @@ int wps_process_key_wrap_auth(struct wps_data *wps, struct wpabuf *msg, + return -1; + } + +- if (hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, head, len, hash) < 0 || ++ if (wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, head, len, hash) < 0 || + os_memcmp_const(hash, key_wrap_auth, WPS_KWA_LEN) != 0) { + wpa_printf(MSG_DEBUG, "WPS: Invalid KWA"); return -1; diff --git a/components/wpa_supplicant/src/wps/wps_common.c b/components/wpa_supplicant/src/wps/wps_common.c -index ead31af3e0..dcbf39aff8 100644 +index 7d4288c7c6..89fe937d68 100644 --- a/components/wpa_supplicant/src/wps/wps_common.c +++ b/components/wpa_supplicant/src/wps/wps_common.c -@@ -139,10 +139,10 @@ void wps_derive_psk(struct wps_data *wps, const u8 *dev_passwd, +@@ -48,7 +48,7 @@ void wps_kdf(const u8 *key, const u8 *label_prefix, size_t label_prefix_len, + + for (i = 1; i <= iter; i++) { + WPA_PUT_BE32(i_buf, i); +- hmac_sha256_vector(key, SHA256_MAC_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(key, SHA256_MAC_LEN, 4, addr, len, hash); + if (i < iter) { + os_memcpy(opos, hash, SHA256_MAC_LEN); + opos += SHA256_MAC_LEN; +@@ -104,7 +104,7 @@ int wps_derive_keys(struct wps_data *wps) + /* DHKey = SHA-256(g^AB mod p) */ + addr[0] = wpabuf_head(dh_shared); + len[0] = wpabuf_len(dh_shared); +- sha256_vector(1, addr, len, dhkey); ++ wpa_sha256_vector(1, addr, len, dhkey); + wpa_hexdump_key(MSG_DEBUG, "WPS: DHKey", dhkey, sizeof(dhkey)); + wpabuf_clear_free(dh_shared); + +@@ -115,7 +115,7 @@ int wps_derive_keys(struct wps_data *wps) + len[1] = ETH_ALEN; + addr[2] = wps->nonce_r; + len[2] = WPS_NONCE_LEN; +- hmac_sha256_vector(dhkey, sizeof(dhkey), 3, addr, len, kdk); ++ wpa_hmac_sha256_vector(dhkey, sizeof(dhkey), 3, addr, len, kdk); + wpa_hexdump_key(MSG_DEBUG, "WPS: KDK", kdk, sizeof(kdk)); + + wps_kdf(kdk, NULL, 0, "Wi-Fi Easy and Secure Key Derivation", +@@ -140,11 +140,11 @@ int wps_derive_psk(struct wps_data *wps, const u8 *dev_passwd, { u8 hash[SHA256_MAC_LEN]; -- hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, dev_passwd, -+ wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, dev_passwd, - (dev_passwd_len + 1) / 2, hash); +- if (hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, dev_passwd, ++ if (wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, dev_passwd, + (dev_passwd_len + 1) / 2, hash) < 0) + return -1; os_memcpy(wps->psk1, hash, WPS_PSK_LEN); -- hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, -+ wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, - dev_passwd + (dev_passwd_len + 1) / 2, - dev_passwd_len / 2, hash); - os_memcpy(wps->psk2, hash, WPS_PSK_LEN); +- if (hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, ++ if (wpa_hmac_sha256(wps->authkey, WPS_AUTHKEY_LEN, + dev_passwd + (dev_passwd_len + 1) / 2, + dev_passwd_len / 2, hash) < 0) + return -1; +diff --git a/components/wpa_supplicant/src/wps/wps_enrollee.c b/components/wpa_supplicant/src/wps/wps_enrollee.c +index 2f8e1aacfd..973c939733 100644 +--- a/components/wpa_supplicant/src/wps/wps_enrollee.c ++++ b/components/wpa_supplicant/src/wps/wps_enrollee.c +@@ -65,7 +65,7 @@ static int wps_build_e_hash(struct wps_data *wps, struct wpabuf *msg) + len[2] = wpabuf_len(wps->dh_pubkey_e); + addr[3] = wpabuf_head(wps->dh_pubkey_r); + len[3] = wpabuf_len(wps->dh_pubkey_r); +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + wpa_hexdump(MSG_DEBUG, "WPS: E-Hash1", hash, SHA256_MAC_LEN); + + wpa_printf(MSG_DEBUG, "WPS: * E-Hash2"); +@@ -75,7 +75,7 @@ static int wps_build_e_hash(struct wps_data *wps, struct wpabuf *msg) + /* E-Hash2 = HMAC_AuthKey(E-S2 || PSK2 || PK_E || PK_R) */ + addr[0] = wps->snonce + WPS_SECRET_NONCE_LEN; + addr[1] = wps->psk2; +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + wpa_hexdump(MSG_DEBUG, "WPS: E-Hash2", hash, SHA256_MAC_LEN); + + return 0; +@@ -576,7 +576,7 @@ static int wps_process_pubkey(struct wps_data *wps, const u8 *pk, + + if (wps->peer_pubkey_hash_set) { + u8 hash[WPS_HASH_LEN]; +- sha256_vector(1, &pk, &pk_len, hash); ++ wpa_sha256_vector(1, &pk, &pk_len, hash); + if (os_memcmp_const(hash, wps->peer_pubkey_hash, + WPS_OOB_PUBKEY_HASH_LEN) != 0) { + wpa_printf(MSG_ERROR, "WPS: Public Key hash mismatch"); +@@ -655,7 +655,7 @@ static int wps_process_r_snonce1(struct wps_data *wps, const u8 *r_snonce1) + len[2] = wpabuf_len(wps->dh_pubkey_e); + addr[3] = wpabuf_head(wps->dh_pubkey_r); + len[3] = wpabuf_len(wps->dh_pubkey_r); +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + + if (os_memcmp_const(wps->peer_hash1, hash, WPS_HASH_LEN) != 0) { + wpa_printf(MSG_DEBUG, "WPS: R-Hash1 derived from R-S1 does " +@@ -695,7 +695,7 @@ static int wps_process_r_snonce2(struct wps_data *wps, const u8 *r_snonce2) + len[2] = wpabuf_len(wps->dh_pubkey_e); + addr[3] = wpabuf_head(wps->dh_pubkey_r); + len[3] = wpabuf_len(wps->dh_pubkey_r); +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + + if (os_memcmp_const(wps->peer_hash2, hash, WPS_HASH_LEN) != 0) { + wpa_printf(MSG_DEBUG, "WPS: R-Hash2 derived from R-S2 does " +diff --git a/components/wpa_supplicant/src/wps/wps_registrar.c b/components/wpa_supplicant/src/wps/wps_registrar.c +index a7edf79ff6..4424e9ba45 100644 +--- a/components/wpa_supplicant/src/wps/wps_registrar.c ++++ b/components/wpa_supplicant/src/wps/wps_registrar.c +@@ -1499,7 +1499,7 @@ static int wps_build_r_hash(struct wps_data *wps, struct wpabuf *msg) + len[2] = wpabuf_len(wps->dh_pubkey_e); + addr[3] = wpabuf_head(wps->dh_pubkey_r); + len[3] = wpabuf_len(wps->dh_pubkey_r); +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + wpa_hexdump(MSG_DEBUG, "WPS: R-Hash1", hash, SHA256_MAC_LEN); + + wpa_printf(MSG_DEBUG, "WPS: * R-Hash2"); +@@ -1509,7 +1509,7 @@ static int wps_build_r_hash(struct wps_data *wps, struct wpabuf *msg) + /* R-Hash2 = HMAC_AuthKey(R-S2 || PSK2 || PK_E || PK_R) */ + addr[0] = wps->snonce + WPS_SECRET_NONCE_LEN; + addr[1] = wps->psk2; +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + wpa_hexdump(MSG_DEBUG, "WPS: R-Hash2", hash, SHA256_MAC_LEN); + + return 0; +@@ -1748,7 +1748,7 @@ int wps_build_cred(struct wps_data *wps, struct wpabuf *msg) + return -1; + } + os_free(wps->new_psk); +- wps->new_psk = (u8 *) base64_encode(r, sizeof(r), ++ wps->new_psk = (u8 *) wpa_base64_encode(r, sizeof(r), + &wps->new_psk_len); + if (wps->new_psk == NULL) + return -1; +@@ -2329,7 +2329,7 @@ static int wps_process_e_snonce1(struct wps_data *wps, const u8 *e_snonce1) + len[2] = wpabuf_len(wps->dh_pubkey_e); + addr[3] = wpabuf_head(wps->dh_pubkey_r); + len[3] = wpabuf_len(wps->dh_pubkey_r); +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + + if (os_memcmp_const(wps->peer_hash1, hash, WPS_HASH_LEN) != 0) { + wpa_printf(MSG_DEBUG, "WPS: E-Hash1 derived from E-S1 does " +@@ -2369,7 +2369,7 @@ static int wps_process_e_snonce2(struct wps_data *wps, const u8 *e_snonce2) + len[2] = wpabuf_len(wps->dh_pubkey_e); + addr[3] = wpabuf_head(wps->dh_pubkey_r); + len[3] = wpabuf_len(wps->dh_pubkey_r); +- hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); ++ wpa_hmac_sha256_vector(wps->authkey, WPS_AUTHKEY_LEN, 4, addr, len, hash); + + if (os_memcmp_const(wps->peer_hash2, hash, WPS_HASH_LEN) != 0) { + wpa_printf(MSG_DEBUG, "WPS: E-Hash2 derived from E-S2 does " +@@ -2721,7 +2721,7 @@ static enum wps_process_res wps_process_m1(struct wps_data *wps, + + addr[0] = attr->public_key; + len = attr->public_key_len; +- sha256_vector(1, addr, &len, hash); ++ wpa_sha256_vector(1, addr, &len, hash); + if (os_memcmp_const(hash, + wps->nfc_pw_token->pubkey_hash, + WPS_OOB_PUBKEY_HASH_LEN) != 0) { -- -2.17.1 +2.34.1 diff --git a/pkg/esp32_sdk/patches/0003-wpa_supplicant-declare-variables-in-header-files-as-.patch b/pkg/esp32_sdk/patches/0003-wpa_supplicant-declare-variables-in-header-files-as-.patch deleted file mode 100644 index 9071bcef4b..0000000000 --- a/pkg/esp32_sdk/patches/0003-wpa_supplicant-declare-variables-in-header-files-as-.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 8b8faf52093843560c029759722e3f290aa57084 Mon Sep 17 00:00:00 2001 -From: Benjamin Valentin -Date: Thu, 2 Jun 2022 23:42:40 +0200 -Subject: [PATCH] wpa_supplicant: declare variables in header files as extern - -The definition of variables in header files lead to multiple defined -symbols if these header files are included multiple times. -Variables in header files are therefore declared as extern. ---- - .../esp_supplicant/include/esp_wpa.h | 4 +- - components/wpa_supplicant/src/eap_peer/eap.h | 42 +++++++++---------- - 2 files changed, 23 insertions(+), 23 deletions(-) - -diff --git a/components/wpa_supplicant/esp_supplicant/include/esp_wpa.h b/components/wpa_supplicant/esp_supplicant/include/esp_wpa.h -index f448b737..cdfd7abc 100644 ---- a/components/wpa_supplicant/esp_supplicant/include/esp_wpa.h -+++ b/components/wpa_supplicant/esp_supplicant/include/esp_wpa.h -@@ -42,9 +42,9 @@ extern "C" { - * @{ - */ - /* Crypto callback functions */ --const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs; -+extern const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs; - /* Mesh crypto callback functions */ --const mesh_crypto_funcs_t g_wifi_default_mesh_crypto_funcs; -+extern const mesh_crypto_funcs_t g_wifi_default_mesh_crypto_funcs; - - /** - * @brief Supplicant initialization -diff --git a/components/wpa_supplicant/src/eap_peer/eap.h b/components/wpa_supplicant/src/eap_peer/eap.h -index f787e35d..90d1f845 100644 ---- a/components/wpa_supplicant/src/eap_peer/eap.h -+++ b/components/wpa_supplicant/src/eap_peer/eap.h -@@ -19,33 +19,33 @@ struct eap_method_type { - EapType method; - }; - --u8 *g_wpa_anonymous_identity; --int g_wpa_anonymous_identity_len; --u8 *g_wpa_username; --int g_wpa_username_len; --const u8 *g_wpa_client_cert; --int g_wpa_client_cert_len; --const u8 *g_wpa_private_key; --int g_wpa_private_key_len; --const u8 *g_wpa_private_key_passwd; --int g_wpa_private_key_passwd_len; -+extern u8 *g_wpa_anonymous_identity; -+extern int g_wpa_anonymous_identity_len; -+extern u8 *g_wpa_username; -+extern int g_wpa_username_len; -+extern const u8 *g_wpa_client_cert; -+extern int g_wpa_client_cert_len; -+extern const u8 *g_wpa_private_key; -+extern int g_wpa_private_key_len; -+extern const u8 *g_wpa_private_key_passwd; -+extern int g_wpa_private_key_passwd_len; - --const u8 *g_wpa_ca_cert; --int g_wpa_ca_cert_len; -+extern const u8 *g_wpa_ca_cert; -+extern int g_wpa_ca_cert_len; - --u8 *g_wpa_password; --int g_wpa_password_len; -+extern u8 *g_wpa_password; -+extern int g_wpa_password_len; - --u8 *g_wpa_new_password; --int g_wpa_new_password_len; -+extern u8 *g_wpa_new_password; -+extern int g_wpa_new_password_len; - --char *g_wpa_ttls_phase2_type; --char *g_wpa_phase1_options; -+extern char *g_wpa_ttls_phase2_type; -+extern char *g_wpa_phase1_options; - --u8 *g_wpa_pac_file; --int g_wpa_pac_file_len; -+extern u8 *g_wpa_pac_file; -+extern int g_wpa_pac_file_len; - --bool g_wpa_suiteb_certification; -+extern bool g_wpa_suiteb_certification; - - const u8 * eap_get_eapKeyData(struct eap_sm *sm, size_t *len); - void eap_deinit_prev_method(struct eap_sm *sm, const char *txt); --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0003-wpa_supplicant-use-ztimer_sleep-in-os_sleep.patch b/pkg/esp32_sdk/patches/0003-wpa_supplicant-use-ztimer_sleep-in-os_sleep.patch new file mode 100644 index 0000000000..34913e30ae --- /dev/null +++ b/pkg/esp32_sdk/patches/0003-wpa_supplicant-use-ztimer_sleep-in-os_sleep.patch @@ -0,0 +1,38 @@ +From 76a15bfad81c3cd6b31222f8afdc050a69276170 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:32:12 +0100 +Subject: [PATCH 03/28] wpa_supplicant: use ztimer_sleep in os_sleep + +--- + components/wpa_supplicant/port/os_xtensa.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/components/wpa_supplicant/port/os_xtensa.c b/components/wpa_supplicant/port/os_xtensa.c +index 7a2309e8b5..57e16ddc6a 100644 +--- a/components/wpa_supplicant/port/os_xtensa.c ++++ b/components/wpa_supplicant/port/os_xtensa.c +@@ -30,6 +30,8 @@ + #include "utils/common.h" + #include "mbedtls/platform_util.h" + ++#include "ztimer.h" ++ + int os_get_time(struct os_time *t) + { + struct timeval tv; +@@ -53,10 +55,10 @@ int os_get_random(unsigned char *buf, size_t len) + void os_sleep(os_time_t sec, os_time_t usec) + { + if (sec) { +- sleep(sec); ++ ztimer_sleep(ZTIMER_SEC, sec); + } + if (usec) { +- usleep(usec); ++ ztimer_sleep(ZTIMER_USEC, usec); + } + } + +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0005-wpa_supplicant-do-not-require-mbedtls.patch b/pkg/esp32_sdk/patches/0004-wpa_supplicant-conditional-include-for-mbedtls.patch similarity index 58% rename from pkg/esp32_sdk/patches/0005-wpa_supplicant-do-not-require-mbedtls.patch rename to pkg/esp32_sdk/patches/0004-wpa_supplicant-conditional-include-for-mbedtls.patch index dcddb22c75..83a6e8d519 100644 --- a/pkg/esp32_sdk/patches/0005-wpa_supplicant-do-not-require-mbedtls.patch +++ b/pkg/esp32_sdk/patches/0004-wpa_supplicant-conditional-include-for-mbedtls.patch @@ -1,26 +1,26 @@ -From f935f3912142ca013e0dc9c6e14aab3d16664874 Mon Sep 17 00:00:00 2001 +From cd2cadff0a0a1fcb4cfdbd802989934d3b15a22e Mon Sep 17 00:00:00 2001 From: Gunar Schorcht -Date: Sun, 30 Jan 2022 17:01:16 +0100 -Subject: [PATCH 05/12] wpa_supplicant: do not require mbedtls +Date: Sat, 1 Mar 2025 17:33:00 +0100 +Subject: [PATCH 04/28] wpa_supplicant: conditional include for mbedtls --- components/wpa_supplicant/port/os_xtensa.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/components/wpa_supplicant/port/os_xtensa.c b/components/wpa_supplicant/port/os_xtensa.c -index cf92aeb5e4..a384a97d2e 100644 +index 57e16ddc6a..7e5d78bd70 100644 --- a/components/wpa_supplicant/port/os_xtensa.c +++ b/components/wpa_supplicant/port/os_xtensa.c -@@ -29,7 +29,9 @@ +@@ -28,7 +28,9 @@ #include - #include "esp_system.h" + #include "esp_random.h" #include "utils/common.h" -+#ifdef USE_MBEDTLS_CRYPTO ++#if USE_MBEDTLS_CRYPTO #include "mbedtls/platform_util.h" +#endif - int os_get_time(struct os_time *t) - { + #include "ztimer.h" + -- -2.17.1 +2.34.1 diff --git a/pkg/esp32_sdk/patches/0004-wpa_supplicant-replace-obsolete-c-functions.patch b/pkg/esp32_sdk/patches/0004-wpa_supplicant-replace-obsolete-c-functions.patch deleted file mode 100644 index 0686a138f1..0000000000 --- a/pkg/esp32_sdk/patches/0004-wpa_supplicant-replace-obsolete-c-functions.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 2d1c948beb9411128674a76cc5d8054476da1c7c Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 30 Jan 2022 10:36:17 +0100 -Subject: [PATCH 04/12] wpa_supplicant: replace obsolete c functions - ---- - components/wpa_supplicant/port/include/os.h | 2 +- - components/wpa_supplicant/port/os_xtensa.c | 3 ++- - 2 files changed, 3 insertions(+), 2 deletions(-) - -diff --git a/components/wpa_supplicant/port/include/os.h b/components/wpa_supplicant/port/include/os.h -index 74e1e349e9..823eb0d35d 100644 ---- a/components/wpa_supplicant/port/include/os.h -+++ b/components/wpa_supplicant/port/include/os.h -@@ -221,7 +221,7 @@ char * os_readfile(const char *name, size_t *len); - #endif - - #ifndef os_bzero --#define os_bzero(s, n) bzero(s, n) -+#define os_bzero(s, n) memset(s, 0, n) - #endif - - -diff --git a/components/wpa_supplicant/port/os_xtensa.c b/components/wpa_supplicant/port/os_xtensa.c -index 53ed080ca8..cf92aeb5e4 100644 ---- a/components/wpa_supplicant/port/os_xtensa.c -+++ b/components/wpa_supplicant/port/os_xtensa.c -@@ -57,7 +57,8 @@ void os_sleep(os_time_t sec, os_time_t usec) - sleep(sec); - } - if (usec) { -- usleep(usec); -+ struct timespec delay = { 0, usec * 1000 }; -+ nanosleep(&delay, NULL); - } - } - --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0005-wpa_suppplicant-avoid-conflicts-for-ARRAY_SIZE-macro.patch b/pkg/esp32_sdk/patches/0005-wpa_suppplicant-avoid-conflicts-for-ARRAY_SIZE-macro.patch new file mode 100644 index 0000000000..4d423951aa --- /dev/null +++ b/pkg/esp32_sdk/patches/0005-wpa_suppplicant-avoid-conflicts-for-ARRAY_SIZE-macro.patch @@ -0,0 +1,27 @@ +From e3f73720b24abaa73b6f818c954b6dbdc0d879b3 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:38:43 +0100 +Subject: [PATCH 05/28] wpa_suppplicant: avoid conflicts for ARRAY_SIZE macro + +--- + components/wpa_supplicant/src/utils/common.h | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/components/wpa_supplicant/src/utils/common.h b/components/wpa_supplicant/src/utils/common.h +index 998870e90f..8f01822939 100644 +--- a/components/wpa_supplicant/src/utils/common.h ++++ b/components/wpa_supplicant/src/utils/common.h +@@ -449,7 +449,10 @@ struct wpa_freq_range_list { + unsigned int num; + }; + ++#ifndef ARRAY_SIZE + #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) ++#endif ++ + #ifndef TEST_FAIL + #define TEST_FAIL() 0 + #endif +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0006-bootloader-allow-compilation-for-RIOT-OS.patch b/pkg/esp32_sdk/patches/0006-bootloader-allow-compilation-for-RIOT-OS.patch new file mode 100644 index 0000000000..2a1bf773c0 --- /dev/null +++ b/pkg/esp32_sdk/patches/0006-bootloader-allow-compilation-for-RIOT-OS.patch @@ -0,0 +1,375 @@ +From 2273125f8cc71c1e03be9f199dfba6d94a82aeb5 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:38:07 +0100 +Subject: [PATCH 06/28] bootloader: allow compilation for RIOT-OS + +--- + .../subproject/main/ld/esp32/bootloader.ld | 58 ++++++++--------- + .../subproject/main/ld/esp32c3/bootloader.ld | 58 ++++++++--------- + .../subproject/main/ld/esp32s2/bootloader.ld | 62 +++++++++---------- + .../subproject/main/ld/esp32s3/bootloader.ld | 60 +++++++++--------- + components/log/include/esp_log.h | 4 ++ + components/log/include/esp_log_buffer.h | 4 ++ + components/log/include/esp_log_color.h | 2 + + 7 files changed, 129 insertions(+), 119 deletions(-) + +diff --git a/components/bootloader/subproject/main/ld/esp32/bootloader.ld b/components/bootloader/subproject/main/ld/esp32/bootloader.ld +index d5fb575ddd..97bb99b8a6 100644 +--- a/components/bootloader/subproject/main/ld/esp32/bootloader.ld ++++ b/components/bootloader/subproject/main/ld/esp32/bootloader.ld +@@ -41,38 +41,38 @@ SECTIONS + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ +- *liblog.a:(.literal .text .literal.* .text.*) ++ *components/log/*(.literal .text .literal.* .text.*) + /* we use either libgcc or compiler-rt, so put similar entries for them here */ + *libgcc.a:(.literal .text .literal.* .text.*) + *libclang_rt.builtins.a:(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) +- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) +- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) +- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) +- *libspi_flash.a:*.*(.literal .text .literal.* .text.*) +- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) +- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) +- *libefuse.a:*.*(.literal .text .literal.* .text.*) +- *libesp_rom.a:*.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_clock_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_common_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_flash.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) ++ *components/esp_system/fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) ++ *components/bootloader_support/*/bootloader_efuse.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_utility.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_sha.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_console_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_panic.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_soc.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/esp_image_format.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encrypt.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encryption_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_partitions.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) ++ *components/*/micro-ecc/*(.literal .text .literal.* .text.*) ++ *components/spi_flash/*(.literal .text .literal.* .text.*) ++ *components/hal/wdt_hal_iram.*(.literal .text .literal.* .text.*) ++ *components/hal/mmu_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/efuse_hal.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_clk.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_time.*(.literal .text .literal.* .text.*) ++ *components/efuse/*(.literal .text .literal.* .text.*) ++ *components/esp_rom/*/*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) +diff --git a/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld b/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld +index 21f19c14fe..0a7a2d32dc 100644 +--- a/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld ++++ b/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld +@@ -62,38 +62,38 @@ SECTIONS + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ +- *liblog.a:(.literal .text .literal.* .text.*) ++ *components/log/*(.literal .text .literal.* .text.*) + /* we use either libgcc or compiler-rt, so put similar entries for them here */ + *libgcc.a:(.literal .text .literal.* .text.*) + *libclang_rt.builtins.a:(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) +- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) +- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) +- *libspi_flash.a:*.*(.literal .text .literal.* .text.*) +- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) +- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) +- *libefuse.a:*.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_clock_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_common_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_flash.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) ++ *components/bootloader_support/*/bootloader_efuse.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_utility.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_sha.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_console_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_panic.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_soc.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/esp_image_format.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encrypt.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encryption_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_partitions.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) ++ *components/*/micro-ecc/*(.literal .text .literal.* .text.*) ++ *components/spi_flash/*(.literal .text .literal.* .text.*) ++ *components/hal/wdt_hal_iram.*(.literal .text .literal.* .text.*) ++ *components/hal/mmu_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/cache_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/efuse_hal.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_clk.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_time.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/regi2c_ctrl.*(.literal .text .literal.* .text.*) ++ *components/efuse/*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) +diff --git a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld +index f2c4ede304..d26362429e 100644 +--- a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld ++++ b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld +@@ -28,40 +28,40 @@ SECTIONS + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ +- *liblog.a:(.literal .text .literal.* .text.*) ++ *components/log/*(.literal .text .literal.* .text.*) + /* we use either libgcc or compiler-rt, so put similar entries for them here */ + *libgcc.a:(.literal .text .literal.* .text.*) + *libclang_rt.builtins.a:(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) +- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) +- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) +- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) +- *libspi_flash.a:*.*(.literal .text .literal.* .text.*) +- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) +- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) +- *libefuse.a:*.*(.literal .text .literal.* .text.*) +- *libesp_rom.a:esp_rom_regi2c.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_clock_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_common_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_flash.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) ++ *components/esp_system/fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) ++ *components/bootloader_support/*/bootloader_efuse.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_utility.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_sha.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_console_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_panic.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_soc.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/esp_image_format.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encrypt.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encryption_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_partitions.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) ++ *components/*/micro-ecc/*(.literal .text .literal.* .text.*) ++ *components/spi_flash/*(.literal .text .literal.* .text.*) ++ *components/hal/wdt_hal_iram.*(.literal .text .literal.* .text.*) ++ *components/hal/mmu_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/cache_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/efuse_hal.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_clk.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_time.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/regi2c_ctrl.*(.literal .text .literal.* .text.*) ++ *components/efuse/*(.literal .text .literal.* .text.*) ++ *components/esp_rom/*/esp_rom_regi2c.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) +diff --git a/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld +index c0f4702a01..e57c49c434 100644 +--- a/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld ++++ b/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld +@@ -63,39 +63,39 @@ SECTIONS + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ +- *liblog.a:(.literal .text .literal.* .text.*) ++ *components/log/*(.literal .text .literal.* .text.*) + /* we use either libgcc or compiler-rt, so put similar entries for them here */ + *libgcc.a:(.literal .text .literal.* .text.*) + *libclang_rt.builtins.a:(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) +- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) +- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) +- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) +- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) +- *libspi_flash.a:*.*(.literal .text .literal.* .text.*) +- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) +- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) +- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) +- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) +- *libefuse.a:*.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_clock_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_common_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_flash.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) ++ *components/esp_system/fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) ++ *components/bootloader_support/*/bootloader_efuse.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_utility.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_sha.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_console_loader.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_panic.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/bootloader_soc.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/esp_image_format.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encrypt.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_encryption_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/flash_partitions.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_secure_features.*(.literal .text .literal.* .text.*) ++ *components/bootloader_support/*/secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) ++ *components/*/micro-ecc/*(.literal .text .literal.* .text.*) ++ *components/spi_flash/*(.literal .text .literal.* .text.*) ++ *components/hal/wdt_hal_iram.*(.literal .text .literal.* .text.*) ++ *components/hal/mmu_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/cache_hal.*(.literal .text .literal.* .text.*) ++ *components/hal/efuse_hal.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_clk.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/*/rtc_time.*(.literal .text .literal.* .text.*) ++ *components/esp_hw_support/regi2c_ctrl.*(.literal .text .literal.* .text.*) ++ *components/efuse/*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) +diff --git a/components/log/include/esp_log.h b/components/log/include/esp_log.h +index e2cb068f43..eb6d94acad 100644 +--- a/components/log/include/esp_log.h ++++ b/components/log/include/esp_log.h +@@ -59,6 +59,8 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, + + /** @cond */ + ++#if !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) ++ + #define LOG_FORMAT(letter, format) LOG_COLOR_ ## letter #letter " (%" PRIu32 ") %s: " format LOG_RESET_COLOR "\n" + #define LOG_SYSTEM_TIME_FORMAT(letter, format) LOG_COLOR_ ## letter #letter " (%s) %s: " format LOG_RESET_COLOR "\n" + +@@ -259,6 +261,8 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, + #endif // !(defined(__cplusplus) && (__cplusplus > 201703L)) + /** @endcond */ + ++#endif /* !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) */ ++ + #ifdef __cplusplus + } + #endif +diff --git a/components/log/include/esp_log_buffer.h b/components/log/include/esp_log_buffer.h +index 5453061403..603a3c5b3b 100644 +--- a/components/log/include/esp_log_buffer.h ++++ b/components/log/include/esp_log_buffer.h +@@ -63,6 +63,8 @@ void esp_log_buffer_char_internal(const char *tag, const void *buffer, uint16_t + */ + void esp_log_buffer_hexdump_internal(const char *tag, const void *buffer, uint16_t buff_len, esp_log_level_t log_level); + ++#if !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) ++ + /** + * @brief Log a buffer of hex bytes at specified level, separated into 16 bytes each line. + * +@@ -173,6 +175,8 @@ static inline void esp_log_buffer_char(const char *tag, const void *buffer, uint + } + /** @endcond */ + ++#endif /* !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) */ ++ + #endif // !NON_OS_BUILD || __DOXYGEN__ + + #ifdef __cplusplus +diff --git a/components/log/include/esp_log_color.h b/components/log/include/esp_log_color.h +index 483d634ea6..dde406a526 100644 +--- a/components/log/include/esp_log_color.h ++++ b/components/log/include/esp_log_color.h +@@ -94,12 +94,14 @@ extern "C" { + #define LOG_COLOR_D "" + #define LOG_COLOR_V "" + #else ++#if !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) + #define LOG_RESET_COLOR "" + #define LOG_COLOR_E "" + #define LOG_COLOR_W "" + #define LOG_COLOR_I "" + #define LOG_COLOR_D "" + #define LOG_COLOR_V "" ++#endif /* !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) */ + #endif + /** @endcond */ + +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0006-compilation-include-missing-header-files.patch b/pkg/esp32_sdk/patches/0006-compilation-include-missing-header-files.patch deleted file mode 100644 index 8e0e7d13e0..0000000000 --- a/pkg/esp32_sdk/patches/0006-compilation-include-missing-header-files.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 0647c9d01c3e433d1b3abaf4774523ac0ef90a3c Mon Sep 17 00:00:00 2001 -From: Benjamin Valentin -Date: Thu, 2 Jun 2022 23:45:01 +0200 -Subject: [PATCH] compilation: include missing header files - ---- - components/efuse/src/esp_efuse_api.c | 1 + - components/esp_hw_support/regi2c_ctrl.c | 1 + - components/esp_hw_support/sleep_modes.c | 1 + - components/nvs_flash/src/nvs_encrypted_partition.cpp | 1 + - 4 files changed, 4 insertions(+) - -diff --git a/components/efuse/src/esp_efuse_api.c b/components/efuse/src/esp_efuse_api.c -index a89205fc..1b90deaf 100644 ---- a/components/efuse/src/esp_efuse_api.c -+++ b/components/efuse/src/esp_efuse_api.c -@@ -19,6 +19,7 @@ const static char *TAG = "efuse"; - #else - #include "freertos/FreeRTOS.h" - #include "freertos/task.h" -+#include - #include - static _lock_t s_efuse_lock; - #define EFUSE_LOCK_ACQUIRE_RECURSIVE() _lock_acquire_recursive(&s_efuse_lock) -diff --git a/components/esp_hw_support/regi2c_ctrl.c b/components/esp_hw_support/regi2c_ctrl.c -index 6ce93cc5..a40b821e 100644 ---- a/components/esp_hw_support/regi2c_ctrl.c -+++ b/components/esp_hw_support/regi2c_ctrl.c -@@ -4,6 +4,7 @@ - * SPDX-License-Identifier: Apache-2.0 - */ - -+#include "esp_attr.h" - #include "regi2c_ctrl.h" - #include "esp_attr.h" - #include -diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c -index f5a6b292..6f9fd2b1 100644 ---- a/components/esp_hw_support/sleep_modes.c -+++ b/components/esp_hw_support/sleep_modes.c -@@ -26,6 +26,7 @@ - #include "driver/uart.h" - - #include "soc/cpu.h" -+#include "soc/soc_memory_types.h" - #include "soc/rtc.h" - #include "soc/soc_caps.h" - #include "regi2c_ctrl.h" -diff --git a/components/nvs_flash/src/nvs_encrypted_partition.cpp b/components/nvs_flash/src/nvs_encrypted_partition.cpp -index 26e8a331..4de077b9 100644 ---- a/components/nvs_flash/src/nvs_encrypted_partition.cpp -+++ b/components/nvs_flash/src/nvs_encrypted_partition.cpp -@@ -13,6 +13,7 @@ - // limitations under the License. - - #include -+#include "nvs.hpp" - #include "nvs_encrypted_partition.hpp" - #include "nvs_types.hpp" - --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0007-compilation-avoid-multiple-definitions-of-macros.patch b/pkg/esp32_sdk/patches/0007-compilation-avoid-multiple-definitions-of-macros.patch deleted file mode 100644 index cb31528bfd..0000000000 --- a/pkg/esp32_sdk/patches/0007-compilation-avoid-multiple-definitions-of-macros.patch +++ /dev/null @@ -1,46 +0,0 @@ -From effe2aba65640d2906991341b0a080b568c8e77a Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 30 Jan 2022 08:17:13 +0100 -Subject: [PATCH 07/12] compilation: avoid multiple definitions of macros - ---- - components/wpa_supplicant/src/utils/common.h | 3 +++ - components/xtensa/include/xtensa/xtruntime-frames.h | 7 +++++++ - 2 files changed, 10 insertions(+) - -diff --git a/components/wpa_supplicant/src/utils/common.h b/components/wpa_supplicant/src/utils/common.h -index 0596b6ab4f..f6dd346e44 100644 ---- a/components/wpa_supplicant/src/utils/common.h -+++ b/components/wpa_supplicant/src/utils/common.h -@@ -440,7 +440,10 @@ struct wpa_freq_range_list { - unsigned int num; - }; - -+#ifndef ARRAY_SIZE - #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) -+#endif -+ - #ifndef TEST_FAIL - #define TEST_FAIL() 0 - #endif -diff --git a/components/xtensa/include/xtensa/xtruntime-frames.h b/components/xtensa/include/xtensa/xtruntime-frames.h -index d0eb368735..de5aab9e41 100644 ---- a/components/xtensa/include/xtensa/xtruntime-frames.h -+++ b/components/xtensa/include/xtensa/xtruntime-frames.h -@@ -29,6 +29,13 @@ - - #include - -+#ifdef STRUCT_BEGIN -+#undef STRUCT_BEGIN -+#undef STRUCT_FIELD -+#undef STRUCT_AFIELD -+#undef STRUCT_END -+#endif -+ - /* Macros that help define structures for both C and assembler: */ - #if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__) - #define STRUCT_BEGIN .pushsection .text; .struct 0 --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0007-sdmmc-avoid-type-definition-conflicts.patch b/pkg/esp32_sdk/patches/0007-sdmmc-avoid-type-definition-conflicts.patch new file mode 100644 index 0000000000..b9d371cf88 --- /dev/null +++ b/pkg/esp32_sdk/patches/0007-sdmmc-avoid-type-definition-conflicts.patch @@ -0,0 +1,50 @@ +From b63a8db9ecc824fd05ab19b51fbc7c217234e582 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:40:10 +0100 +Subject: [PATCH 07/28] sdmmc: avoid type definition conflicts + +--- + components/sdmmc/include/sd_protocol_types.h | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/components/sdmmc/include/sd_protocol_types.h b/components/sdmmc/include/sd_protocol_types.h +index 70cdf76d12..41fac5d339 100644 +--- a/components/sdmmc/include/sd_protocol_types.h ++++ b/components/sdmmc/include/sd_protocol_types.h +@@ -34,6 +34,7 @@ + extern "C" { + #endif + ++#if !defined(RIOT_VERSION) + /** + * Decoded values from SD card Card Specific Data register + */ +@@ -96,6 +97,8 @@ typedef struct { + uint8_t sec_feature; /*!< secure data management features supported by the card */ + } sdmmc_ext_csd_t; + ++#endif /* !defined(RIOT_VERSION) */ ++ + /** + * SD/MMC command response buffer + */ +@@ -245,6 +248,7 @@ typedef struct { + esp_err_t (*is_slot_set_to_uhs1)(int slot, bool *is_uhs1); /*!< host slot is set to uhs1 or not*/ + } sdmmc_host_t; + ++#if !defined(RIOT_VERSION) + /** + * SD/MMC card information structure + */ +@@ -273,6 +277,8 @@ typedef struct { + uint32_t reserved : 22; /*!< Reserved for future expansion */ + } sdmmc_card_t; + ++#endif /* !defined(RIOT_VERSION) */ ++ + /** + * SD/MMC erase command(38) arguments + * SD: +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0008-esp_log-use-RIOT-version-of-log-module.patch b/pkg/esp32_sdk/patches/0008-esp_log-use-RIOT-version-of-log-module.patch deleted file mode 100644 index 13bba49ac8..0000000000 --- a/pkg/esp32_sdk/patches/0008-esp_log-use-RIOT-version-of-log-module.patch +++ /dev/null @@ -1,34 +0,0 @@ -From e24009b2ff743a90d123816280437ecc0a755847 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 30 Jan 2022 08:17:34 +0100 -Subject: [PATCH 08/12] esp_log: use RIOT version of log module - ---- - components/log/include/esp_log.h | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/components/log/include/esp_log.h b/components/log/include/esp_log.h -index 0e3148f62d..5419a623e2 100644 ---- a/components/log/include/esp_log.h -+++ b/components/log/include/esp_log.h -@@ -155,6 +155,8 @@ void esp_log_write(esp_log_level_t level, const char* tag, const char* format, . - */ - void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, va_list args); - -+#if !defined(RIOT_VERSION) -+ - /** @cond */ - - #include "esp_log_internal.h" -@@ -498,6 +500,8 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, - #endif // !(defined(__cplusplus) && (__cplusplus > 201703L)) - /** @endcond */ - -+#endif /* !defined(RIOT_VERSION) */ -+ - #ifdef __cplusplus - } - #endif --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0008-sdmmc-fix-byte-wise-writing-to-CMD-register.patch b/pkg/esp32_sdk/patches/0008-sdmmc-fix-byte-wise-writing-to-CMD-register.patch new file mode 100644 index 0000000000..9e07813cd6 --- /dev/null +++ b/pkg/esp32_sdk/patches/0008-sdmmc-fix-byte-wise-writing-to-CMD-register.patch @@ -0,0 +1,40 @@ +From 97e5f240e60ca9d7806f9e4ed53ac1c025e8ce87 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:55:31 +0100 +Subject: [PATCH 08/28] sdmmc: fix byte-wise writing to CMD register + +Writing the 32-bit CMD register using memcpy results in the register being written byte by byte in any order. If the start bit in the CMD register is set before all bytes have been written, a wrong command is executed. Writing to the 32-bit CMD register must be performed as a single word register copy instruction which is guaranteed by the assignment. +--- + components/hal/esp32/include/hal/sdmmc_ll.h | 2 +- + components/hal/esp32s3/include/hal/sdmmc_ll.h | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/components/hal/esp32/include/hal/sdmmc_ll.h b/components/hal/esp32/include/hal/sdmmc_ll.h +index 0f5a62ea37..feecb231e5 100644 +--- a/components/hal/esp32/include/hal/sdmmc_ll.h ++++ b/components/hal/esp32/include/hal/sdmmc_ll.h +@@ -491,7 +491,7 @@ static inline void sdmmc_ll_poll_demand(sdmmc_dev_t *hw) + */ + static inline void sdmmc_ll_set_command(sdmmc_dev_t *hw, sdmmc_hw_cmd_t cmd) + { +- memcpy((void *)&hw->cmd, &cmd, sizeof(sdmmc_hw_cmd_t)); ++ hw->cmd = cmd; + } + + /** +diff --git a/components/hal/esp32s3/include/hal/sdmmc_ll.h b/components/hal/esp32s3/include/hal/sdmmc_ll.h +index 2747905931..60cd5923bd 100644 +--- a/components/hal/esp32s3/include/hal/sdmmc_ll.h ++++ b/components/hal/esp32s3/include/hal/sdmmc_ll.h +@@ -527,7 +527,7 @@ static inline void sdmmc_ll_poll_demand(sdmmc_dev_t *hw) + */ + static inline void sdmmc_ll_set_command(sdmmc_dev_t *hw, sdmmc_hw_cmd_t cmd) + { +- memcpy((void *)&hw->cmd, &cmd, sizeof(sdmmc_hw_cmd_t)); ++ hw->cmd = cmd; + } + + /** +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0009-bt-controller-fix-printf-format-string.patch b/pkg/esp32_sdk/patches/0009-bt-controller-fix-printf-format-string.patch new file mode 100644 index 0000000000..6019a62425 --- /dev/null +++ b/pkg/esp32_sdk/patches/0009-bt-controller-fix-printf-format-string.patch @@ -0,0 +1,25 @@ +From 321ef67c4675f566dcbe885558ece59e3a4f3845 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:56:30 +0100 +Subject: [PATCH 09/28] bt/controller: fix printf format string + +--- + components/bt/controller/esp32/bt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/components/bt/controller/esp32/bt.c b/components/bt/controller/esp32/bt.c +index d94c9c0507..6a20c2b1b7 100644 +--- a/components/bt/controller/esp32/bt.c ++++ b/components/bt/controller/esp32/bt.c +@@ -1273,7 +1273,7 @@ static void btdm_controller_mem_init(void) + { + /* initialise .data section */ + memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm); +- ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom); ++ ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08"PRIx32"] <== [0x%08"PRIx32"]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom); + + //initial em, .bss section + for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) { +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0009-hal-conditional-definition-of-gpio_mode_t.patch b/pkg/esp32_sdk/patches/0009-hal-conditional-definition-of-gpio_mode_t.patch deleted file mode 100644 index e0aa90b8c6..0000000000 --- a/pkg/esp32_sdk/patches/0009-hal-conditional-definition-of-gpio_mode_t.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 360ab12956685b45ea0720f44d193224db12afed Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 30 Jan 2022 08:36:34 +0100 -Subject: [PATCH 09/12] hal: conditional definition of gpio_mode_t - -Define type `gpio_mode_t` only if it is not yet defined by RIOT `periph/gpio`. When this header is used during the compilation of RIOT source, this type definition isn't required and leads to name conflicts with RIOT's `gpio_mode_t` definition. The definition of `gpio_mode_t` in this header is only required when ESP-IDF source code is compiled. In that case RIOT's `gpio_mode_t` isn't defined. ---- - components/hal/include/hal/gpio_types.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/components/hal/include/hal/gpio_types.h b/components/hal/include/hal/gpio_types.h -index a9b56f7c6a..8a15b8e396 100644 ---- a/components/hal/include/hal/gpio_types.h -+++ b/components/hal/include/hal/gpio_types.h -@@ -369,6 +369,7 @@ typedef enum { - #define GPIO_MODE_DEF_OD (BIT2) ///< bit mask for OD mode - /** @endcond */ - -+#ifndef HAVE_GPIO_MODE_T - typedef enum { - GPIO_MODE_DISABLE = GPIO_MODE_DEF_DISABLE, /*!< GPIO mode : disable input and output */ - GPIO_MODE_INPUT = GPIO_MODE_DEF_INPUT, /*!< GPIO mode : input only */ -@@ -377,6 +378,7 @@ typedef enum { - GPIO_MODE_INPUT_OUTPUT_OD = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT) | (GPIO_MODE_DEF_OD)), /*!< GPIO mode : output and input with open-drain mode*/ - GPIO_MODE_INPUT_OUTPUT = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT)), /*!< GPIO mode : output and input mode */ - } gpio_mode_t; -+#endif - - typedef enum { - GPIO_PULLUP_DISABLE = 0x0, /*!< Disable GPIO pull-up resistor */ --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0010-bt-controller-add-missing-includes.patch b/pkg/esp32_sdk/patches/0010-bt-controller-add-missing-includes.patch new file mode 100644 index 0000000000..3c141b6c8a --- /dev/null +++ b/pkg/esp32_sdk/patches/0010-bt-controller-add-missing-includes.patch @@ -0,0 +1,25 @@ +From b0a8bfb89d5f80f951cfa9f57e128c90940d0523 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:57:00 +0100 +Subject: [PATCH 10/28] bt/controller: add missing includes + +--- + components/bt/controller/esp32c3/bt.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c +index 19eea2ee87..90123c47cd 100644 +--- a/components/bt/controller/esp32c3/bt.c ++++ b/components/bt/controller/esp32c3/bt.c +@@ -30,6 +30,8 @@ + #include "esp_err.h" + #include "esp_log.h" + #include "esp_pm.h" ++#include "esp_intr_types.h" ++#include "esp_intr_alloc.h" + #include "esp_ipc.h" + #include "esp_private/periph_ctrl.h" + #include "esp_private/esp_clk.h" +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0010-spi_flash-disable-functions-not-required-or-not-supp.patch b/pkg/esp32_sdk/patches/0010-spi_flash-disable-functions-not-required-or-not-supp.patch deleted file mode 100644 index 71ad55cb4b..0000000000 --- a/pkg/esp32_sdk/patches/0010-spi_flash-disable-functions-not-required-or-not-supp.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 5285a8f5898074d38d71054010cf912c2d7ffb2d Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 30 Jan 2022 09:50:50 +0100 -Subject: [PATCH 10/12] spi_flash: disable functions not required or not - supported - -- Various cache utility functions are neither required nor can they be supported by the means of RIOT. For example, it is not possible to change the priority of a thread. They have to be therefore disabled in RIOT. -- Add alternative implementations for `spi_flash_disable_interrupts_caches_and_other_cpu` and `spi_flash_enable_interrupts_caches_and_other_cpu` if compiled for RIOT ---- - components/spi_flash/cache_utils.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c -index 7715900055..d7d750abdd 100644 ---- a/components/spi_flash/cache_utils.c -+++ b/components/spi_flash/cache_utils.c -@@ -67,6 +67,8 @@ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_sta - - static uint32_t s_flash_op_cache_state[2]; - -+#ifndef RIOT_VERSION -+ - #ifndef CONFIG_FREERTOS_UNICORE - static SemaphoreHandle_t s_flash_op_mutex; - static volatile bool s_flash_op_can_start = false; -@@ -293,6 +295,22 @@ void IRAM_ATTR spi_flash_enable_interrupts_caches_no_os(void) - - #endif // CONFIG_FREERTOS_UNICORE - -+#else /* RIOT_VERSION */ -+ -+void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void) -+{ -+ irq_disable(); -+ spi_flash_disable_cache(0, &s_flash_op_cache_state[0]); -+} -+ -+void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void) -+{ -+ spi_flash_restore_cache(0, s_flash_op_cache_state[0]); -+ irq_enable(); -+} -+ -+#endif /* RIOT_VERSION */ -+ - /** - * The following two functions are replacements for Cache_Read_Disable and Cache_Read_Enable - * function in ROM. They are used to work around a bug where Cache_Read_Disable requires a call to --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0011-esp_system-conditional-compilation-of-functions.patch b/pkg/esp32_sdk/patches/0011-esp_system-conditional-compilation-of-functions.patch deleted file mode 100644 index f87c4a3957..0000000000 --- a/pkg/esp32_sdk/patches/0011-esp_system-conditional-compilation-of-functions.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 51ef344603e2f1bfdaf8da49d6c4e0384f242a5e Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 30 Jan 2022 11:27:00 +0100 -Subject: [PATCH 11/12] esp_system: conditional compilation of functions - -These functions are either not required in RIOT or should only be compiled in if module `esp_idf_heap` is usd. ---- - components/esp_system/esp_system.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/components/esp_system/esp_system.c b/components/esp_system/esp_system.c -index 8d2457b2c0..abdc3f558c 100644 ---- a/components/esp_system/esp_system.c -+++ b/components/esp_system/esp_system.c -@@ -103,6 +103,7 @@ void IRAM_ATTR esp_restart(void) - esp_restart_noos(); - } - -+#ifdef MODULE_ESP_IDF_HEAP - uint32_t esp_get_free_heap_size( void ) - { - return heap_caps_get_free_size( MALLOC_CAP_DEFAULT ); -@@ -112,6 +113,7 @@ uint32_t esp_get_free_internal_heap_size( void ) - { - return heap_caps_get_free_size( MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL ); - } -+#endif - - uint32_t esp_get_minimum_free_heap_size( void ) - { -@@ -123,7 +125,9 @@ const char *esp_get_idf_version(void) - return IDF_VER; - } - -+#ifndef RIOT_VERSION - void __attribute__((noreturn)) esp_system_abort(const char *details) - { - panic_abort(details); - } -+#endif --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0011-esp_wifi-add-missing-includes.patch b/pkg/esp32_sdk/patches/0011-esp_wifi-add-missing-includes.patch new file mode 100644 index 0000000000..25cdab24ee --- /dev/null +++ b/pkg/esp32_sdk/patches/0011-esp_wifi-add-missing-includes.patch @@ -0,0 +1,63 @@ +From fb8d63941e9ae075cdcd9dddab01716b01e54ee8 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:57:26 +0100 +Subject: [PATCH 11/28] esp_wifi: add missing includes + +--- + components/esp_wifi/esp32/esp_adapter.c | 1 + + components/esp_wifi/esp32c3/esp_adapter.c | 1 + + components/esp_wifi/esp32s2/esp_adapter.c | 1 + + components/esp_wifi/esp32s3/esp_adapter.c | 1 + + 4 files changed, 4 insertions(+) + +diff --git a/components/esp_wifi/esp32/esp_adapter.c b/components/esp_wifi/esp32/esp_adapter.c +index 3d69706012..92795986d8 100644 +--- a/components/esp_wifi/esp32/esp_adapter.c ++++ b/components/esp_wifi/esp32/esp_adapter.c +@@ -32,6 +32,7 @@ + #include "esp_cpu.h" + #include "esp_private/wifi_os_adapter.h" + #include "esp_private/wifi.h" ++#include "esp_system.h" + #ifdef CONFIG_ESP_PHY_ENABLED + #include "esp_phy_init.h" + #include "phy_init_data.h" +diff --git a/components/esp_wifi/esp32c3/esp_adapter.c b/components/esp_wifi/esp32c3/esp_adapter.c +index 7c72f19c9f..59e69b3d78 100644 +--- a/components/esp_wifi/esp32c3/esp_adapter.c ++++ b/components/esp_wifi/esp32c3/esp_adapter.c +@@ -31,6 +31,7 @@ + #include "esp_timer.h" + #include "esp_private/wifi_os_adapter.h" + #include "esp_private/wifi.h" ++#include "esp_system.h" + #ifdef CONFIG_ESP_PHY_ENABLED + #include "esp_phy_init.h" + #include "phy_init_data.h" +diff --git a/components/esp_wifi/esp32s2/esp_adapter.c b/components/esp_wifi/esp32s2/esp_adapter.c +index 725a553dba..7358e324d6 100644 +--- a/components/esp_wifi/esp32s2/esp_adapter.c ++++ b/components/esp_wifi/esp32s2/esp_adapter.c +@@ -32,6 +32,7 @@ + #include "esp_cpu.h" + #include "esp_private/wifi_os_adapter.h" + #include "esp_private/wifi.h" ++#include "esp_system.h" + #ifdef CONFIG_ESP_PHY_ENABLED + #include "esp_phy_init.h" + #include "phy_init_data.h" +diff --git a/components/esp_wifi/esp32s3/esp_adapter.c b/components/esp_wifi/esp32s3/esp_adapter.c +index 1e00fbbedb..faa5da1018 100644 +--- a/components/esp_wifi/esp32s3/esp_adapter.c ++++ b/components/esp_wifi/esp32s3/esp_adapter.c +@@ -32,6 +32,7 @@ + #include "esp_cpu.h" + #include "esp_private/wifi_os_adapter.h" + #include "esp_private/wifi.h" ++#include "esp_system.h" + #ifdef CONFIG_ESP_PHY_ENABLED + #include "esp_phy_init.h" + #include "phy_init_data.h" +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0012-bootloader-allow-compilation-by-RIOT.patch b/pkg/esp32_sdk/patches/0012-bootloader-allow-compilation-by-RIOT.patch deleted file mode 100644 index 0a996dcec4..0000000000 --- a/pkg/esp32_sdk/patches/0012-bootloader-allow-compilation-by-RIOT.patch +++ /dev/null @@ -1,99 +0,0 @@ -From d508afaa544cfc5750ed6b3e81e78c02988f97ad Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Mon, 31 Jan 2022 17:34:19 +0100 -Subject: [PATCH 12/12] bootloader: allow compilation by RIOT - ---- - .../subproject/main/ld/esp32/bootloader.ld | 52 +++++++++---------- - components/log/include/esp_log.h | 4 +- - 2 files changed, 28 insertions(+), 28 deletions(-) - -diff --git a/components/bootloader/subproject/main/ld/esp32/bootloader.ld b/components/bootloader/subproject/main/ld/esp32/bootloader.ld -index 30e5a79c45..b235f0438a 100644 ---- a/components/bootloader/subproject/main/ld/esp32/bootloader.ld -+++ b/components/bootloader/subproject/main/ld/esp32/bootloader.ld -@@ -36,33 +36,33 @@ SECTIONS - _loader_text_start = ABSOLUTE(.); - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ -- *liblog.a:(.literal .text .literal.* .text.*) -+ *components/log/*(.literal .text .literal.* .text.*) - *libgcc.a:(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) -- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) -- *libbootloader_support.a:bootloader_efuse_esp32.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) -- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) -- *libspi_flash.a:*.*(.literal .text .literal.* .text.*) -- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) -- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) -- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) -- *libefuse.a:*.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_clock_loader.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_common_loader.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_flash.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_random.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) -+ *components/esp_common/src/fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) -+ *components/bootloader_support/*/bootloader_efuse_esp32.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_utility.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_sha.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_console_loader.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_panic.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_soc.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/esp_image_format.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/flash_encrypt.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/flash_encryption_secure_features.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/flash_partitions.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/secure_boot.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/secure_boot_secure_features.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) -+ *components/*/micro-ecc/*(.literal .text .literal.* .text.*) -+ *components/spi_flash/*(.literal .text .literal.* .text.*) -+ *components/hal/wdt_hal_iram.*(.literal .text .literal.* .text.*) -+ *components/esp_hw_support/*/rtc_clk.*(.literal .text .literal.* .text.*) -+ *components/esp_hw_support/*/rtc_time.*(.literal .text .literal.* .text.*) -+ *components/efuse/*(.literal .text .literal.* .text.*) - *(.fini.literal) - *(.fini) - *(.gnu.version) -diff --git a/components/log/include/esp_log.h b/components/log/include/esp_log.h -index 5419a623e2..f2b30d7c4c 100644 ---- a/components/log/include/esp_log.h -+++ b/components/log/include/esp_log.h -@@ -155,7 +155,7 @@ void esp_log_write(esp_log_level_t level, const char* tag, const char* format, . - */ - void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, va_list args); - --#if !defined(RIOT_VERSION) -+#if !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) - - /** @cond */ - -@@ -500,7 +500,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format, - #endif // !(defined(__cplusplus) && (__cplusplus > 201703L)) - /** @endcond */ - --#endif /* !defined(RIOT_VERSION) */ -+#endif /* !defined(RIOT_VERSION) || defined(BOOTLOADER_BUILD) */ - - #ifdef __cplusplus - } --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0012-esp_eth-add-missing-includes.patch b/pkg/esp32_sdk/patches/0012-esp_eth-add-missing-includes.patch new file mode 100644 index 0000000000..cded91b164 --- /dev/null +++ b/pkg/esp32_sdk/patches/0012-esp_eth-add-missing-includes.patch @@ -0,0 +1,24 @@ +From f230a2601a0ff9cb47fe128015e6ef8e61baab1e Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:58:33 +0100 +Subject: [PATCH 12/28] esp_eth: add missing includes + +--- + components/esp_eth/include/esp_eth_mac_esp.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/components/esp_eth/include/esp_eth_mac_esp.h b/components/esp_eth/include/esp_eth_mac_esp.h +index f18bf4d75c..1cbcc52730 100644 +--- a/components/esp_eth/include/esp_eth_mac_esp.h ++++ b/components/esp_eth/include/esp_eth_mac_esp.h +@@ -5,6 +5,7 @@ + */ + #pragma once + ++#include + #include + #include "soc/soc_caps.h" + #include "esp_eth_com.h" +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0013-esp_hw_support-add-missing-includes.patch b/pkg/esp32_sdk/patches/0013-esp_hw_support-add-missing-includes.patch new file mode 100644 index 0000000000..e4160e245c --- /dev/null +++ b/pkg/esp32_sdk/patches/0013-esp_hw_support-add-missing-includes.patch @@ -0,0 +1,24 @@ +From 83210f57c6d79b124b0644969f6aec92f04c1189 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:59:14 +0100 +Subject: [PATCH 13/28] esp_hw_support: add missing includes + +--- + components/esp_hw_support/sleep_modes.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c +index 3a5944bc23..207c173449 100644 +--- a/components/esp_hw_support/sleep_modes.c ++++ b/components/esp_hw_support/sleep_modes.c +@@ -11,6 +11,7 @@ + #include + + #include "esp_attr.h" ++#include "esp_cpu.h" + #include "esp_rom_caps.h" + #include "esp_macros.h" + #include "esp_memory_utils.h" +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0014-esp_phy-add-missing-includes.patch b/pkg/esp32_sdk/patches/0014-esp_phy-add-missing-includes.patch new file mode 100644 index 0000000000..0fb14a9139 --- /dev/null +++ b/pkg/esp32_sdk/patches/0014-esp_phy-add-missing-includes.patch @@ -0,0 +1,24 @@ +From a1a7998e4905862ed8a9e22c4bc704877bbf23ac Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 18:02:34 +0100 +Subject: [PATCH 14/28] esp_phy: add missing includes + +--- + components/esp_phy/src/phy_init.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c +index bc8d28bf3f..5d6d3cc525 100644 +--- a/components/esp_phy/src/phy_init.c ++++ b/components/esp_phy/src/phy_init.c +@@ -32,6 +32,7 @@ + #include "esp_private/wifi.h" + #include "esp_rom_crc.h" + #include "esp_rom_sys.h" ++#include "esp_system.h" + + #include "soc/rtc_periph.h" + +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0014-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch b/pkg/esp32_sdk/patches/0014-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch deleted file mode 100644 index 7ccdbefe77..0000000000 --- a/pkg/esp32_sdk/patches/0014-wpa_supplicant-add-prefix-wpa_-to-crypto-functions.patch +++ /dev/null @@ -1,54 +0,0 @@ -From bff534413fa6a09e8363b914ca8f12df73c93b2c Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 8 Mar 2022 11:27:40 +0100 -Subject: [PATCH 14/17] wpa_supplicant: add prefix wpa_ to crypto functions - -Prefix `_wpa` added to further crypto functions of `wpa_suppplicant` to avoid name conflicts with RIOT modules `crypto` and `hashes`. ---- - components/wpa_supplicant/src/crypto/aes-internal-dec.c | 2 +- - components/wpa_supplicant/src/crypto/aes-internal-enc.c | 2 +- - components/wpa_supplicant/src/crypto/aes-internal.c | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/components/wpa_supplicant/src/crypto/aes-internal-dec.c b/components/wpa_supplicant/src/crypto/aes-internal-dec.c -index f72742cf590..70a40696943 100644 ---- a/components/wpa_supplicant/src/crypto/aes-internal-dec.c -+++ b/components/wpa_supplicant/src/crypto/aes-internal-dec.c -@@ -31,7 +31,7 @@ static int rijndaelKeySetupDec(u32 rk[], const u8 cipherKey[], int keyBits) - u32 temp; - - /* expand the cipher key: */ -- Nr = rijndaelKeySetupEnc(rk, cipherKey, keyBits); -+ Nr = wpa_rijndaelKeySetupEnc(rk, cipherKey, keyBits); - if (Nr < 0) - return Nr; - /* invert the order of the round keys: */ -diff --git a/components/wpa_supplicant/src/crypto/aes-internal-enc.c b/components/wpa_supplicant/src/crypto/aes-internal-enc.c -index a856dc9f3f8..1bedc885368 100644 ---- a/components/wpa_supplicant/src/crypto/aes-internal-enc.c -+++ b/components/wpa_supplicant/src/crypto/aes-internal-enc.c -@@ -106,7 +106,7 @@ void * aes_encrypt_init(const u8 *key, size_t len) - rk = os_malloc(AES_PRIV_SIZE); - if (rk == NULL) - return NULL; -- res = rijndaelKeySetupEnc(rk, key, len * 8); -+ res = wpa_rijndaelKeySetupEnc(rk, key, len * 8); - if (res < 0) { - os_free(rk); - return NULL; -diff --git a/components/wpa_supplicant/src/crypto/aes-internal.c b/components/wpa_supplicant/src/crypto/aes-internal.c -index bd4535d2096..6b646027c8c 100644 ---- a/components/wpa_supplicant/src/crypto/aes-internal.c -+++ b/components/wpa_supplicant/src/crypto/aes-internal.c -@@ -776,7 +776,7 @@ const u8 rcons[] = { - * - * @return the number of rounds for the given cipher key size. - */ --int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits) -+int wpa_rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits) - { - int i; - u32 temp; --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0015-driver-i2c-remove-the-include-gpio.h-in-i2c.h-header.patch b/pkg/esp32_sdk/patches/0015-driver-i2c-remove-the-include-gpio.h-in-i2c.h-header.patch deleted file mode 100644 index 53355e6112..0000000000 --- a/pkg/esp32_sdk/patches/0015-driver-i2c-remove-the-include-gpio.h-in-i2c.h-header.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 25509b8b61b329d3c4ae5b3874704dae55d62ccd Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 8 Mar 2022 11:34:13 +0100 -Subject: [PATCH 15/17] driver/i2c: remove the include gpio.h in i2c.h header - -Including driver/i2c.h by RIOT code leads to type conflicts with RIOT gpio_t type. ---- - components/driver/i2c.c | 1 + - components/driver/include/driver/i2c.h | 1 - - 2 files changed, 1 insertion(+), 1 deletion(-) - -diff --git a/components/driver/i2c.c b/components/driver/i2c.c -index 438d1efc12d..be26fdeffc3 100644 ---- a/components/driver/i2c.c -+++ b/components/driver/i2c.c -@@ -21,6 +21,7 @@ - #include "hal/i2c_hal.h" - #include "hal/gpio_hal.h" - #include "soc/i2c_periph.h" -+#include "driver/gpio.h" - #include "driver/i2c.h" - #include "driver/periph_ctrl.h" - #include "esp_rom_gpio.h" -diff --git a/components/driver/include/driver/i2c.h b/components/driver/include/driver/i2c.h -index 22dcc8ab241..e668bba2acd 100644 ---- a/components/driver/include/driver/i2c.h -+++ b/components/driver/include/driver/i2c.h -@@ -19,7 +19,6 @@ extern "C" { - #include "freertos/task.h" - #include "freertos/queue.h" - #include "freertos/ringbuf.h" --#include "driver/gpio.h" - #include "soc/soc_caps.h" - #include "hal/i2c_types.h" - --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0015-hal-fix-signed-unsigned-comparison.patch b/pkg/esp32_sdk/patches/0015-hal-fix-signed-unsigned-comparison.patch new file mode 100644 index 0000000000..4c6831b581 --- /dev/null +++ b/pkg/esp32_sdk/patches/0015-hal-fix-signed-unsigned-comparison.patch @@ -0,0 +1,39 @@ +From f504db165a55f83e9d253194a1b880b2a5f746c4 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 18:03:20 +0100 +Subject: [PATCH 15/28] hal: fix signed/unsigned comparison + +--- + components/hal/esp32c3/include/hal/gpspi_flash_ll.h | 2 +- + components/hal/esp32c3/include/hal/spimem_flash_ll.h | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/components/hal/esp32c3/include/hal/gpspi_flash_ll.h b/components/hal/esp32c3/include/hal/gpspi_flash_ll.h +index 18465d85f1..2d2934b97d 100644 +--- a/components/hal/esp32c3/include/hal/gpspi_flash_ll.h ++++ b/components/hal/esp32c3/include/hal/gpspi_flash_ll.h +@@ -85,7 +85,7 @@ static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, + } else { + // Otherwise, slow(er) path copies word by word + int copy_len = read_len; +- for (int i = 0; i < (read_len + 3) / 4; i++) { ++ for (uint32_t i = 0; i < (read_len + 3) / 4; i++) { + int word_len = MIN(sizeof(uint32_t), copy_len); + uint32_t word = dev->data_buf[i]; + memcpy(buffer, &word, word_len); +diff --git a/components/hal/esp32c3/include/hal/spimem_flash_ll.h b/components/hal/esp32c3/include/hal/spimem_flash_ll.h +index fd9bc38ed9..c643919bb0 100644 +--- a/components/hal/esp32c3/include/hal/spimem_flash_ll.h ++++ b/components/hal/esp32c3/include/hal/spimem_flash_ll.h +@@ -332,7 +332,7 @@ static inline void spimem_flash_ll_get_buffer_data(spi_mem_dev_t *dev, void *buf + } else { + // Otherwise, slow(er) path copies word by word + int copy_len = read_len; +- for (int i = 0; i < (read_len + 3) / 4; i++) { ++ for (uint32_t i = 0; i < (read_len + 3) / 4; i++) { + int word_len = MIN(sizeof(uint32_t), copy_len); + uint32_t word = dev->data_buf[i]; + memcpy(buffer, &word, word_len); +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0016-driver-i2c.h-expose-i2c_hw_fsm_reset-to-RIOT-code.patch b/pkg/esp32_sdk/patches/0016-driver-i2c.h-expose-i2c_hw_fsm_reset-to-RIOT-code.patch deleted file mode 100644 index bd10337ca0..0000000000 --- a/pkg/esp32_sdk/patches/0016-driver-i2c.h-expose-i2c_hw_fsm_reset-to-RIOT-code.patch +++ /dev/null @@ -1,34 +0,0 @@ -From cd8688a55e62094cb6605ee8594985f862d57a95 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 8 Mar 2022 11:35:11 +0100 -Subject: [PATCH 16/17] driver/i2c.h: expose i2c_hw_fsm_reset to RIOT code - ---- - components/driver/i2c.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/components/driver/i2c.c b/components/driver/i2c.c -index be26fdeffc3..cff410b9d1b 100644 ---- a/components/driver/i2c.c -+++ b/components/driver/i2c.c -@@ -209,7 +209,7 @@ static i2c_clk_alloc_t i2c_clk_alloc[I2C_SCLK_MAX] = { - static i2c_obj_t *p_i2c_obj[I2C_NUM_MAX] = {0}; - static void i2c_isr_handler_default(void *arg); - static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num); --static esp_err_t IRAM_ATTR i2c_hw_fsm_reset(i2c_port_t i2c_num); -+esp_err_t IRAM_ATTR i2c_hw_fsm_reset(i2c_port_t i2c_num); - - static void i2c_hw_disable(i2c_port_t i2c_num) - { -@@ -595,7 +595,7 @@ static esp_err_t i2c_master_clear_bus(i2c_port_t i2c_num) - * If we remove the power supply for the slave during I2C is reading, or directly connect SDA or SCL to ground, - * this would cause the I2C FSM get stuck in wrong state, all we can do is to reset the I2C hardware in this case. - **/ --static esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num) -+esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num) - { - #if !SOC_I2C_SUPPORT_HW_FSM_RST - int scl_low_period, scl_high_period; --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0016-hal-gpio_types-avoid-type-conflicts-with-RIOT-gpio-t.patch b/pkg/esp32_sdk/patches/0016-hal-gpio_types-avoid-type-conflicts-with-RIOT-gpio-t.patch new file mode 100644 index 0000000000..912abe3087 --- /dev/null +++ b/pkg/esp32_sdk/patches/0016-hal-gpio_types-avoid-type-conflicts-with-RIOT-gpio-t.patch @@ -0,0 +1,61 @@ +From 9220ae3c3d5bf30804f6741c43b753317d3486ef Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 18:04:05 +0100 +Subject: [PATCH 16/28] hal/gpio_types: avoid type conflicts with RIOT gpio + types + +--- + components/hal/include/hal/gpio_types.h | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/components/hal/include/hal/gpio_types.h b/components/hal/include/hal/gpio_types.h +index d785ec491a..1a60a4181c 100644 +--- a/components/hal/include/hal/gpio_types.h ++++ b/components/hal/include/hal/gpio_types.h +@@ -14,10 +14,12 @@ + extern "C" { + #endif + ++#ifndef HAVE_GPIO_PORT_T + typedef enum { + GPIO_PORT_0 = 0, + GPIO_PORT_MAX, + } gpio_port_t; ++#endif + + #define GPIO_PIN_REG_0 IO_MUX_GPIO0_REG + #define GPIO_PIN_REG_1 IO_MUX_GPIO1_REG +@@ -92,6 +94,7 @@ typedef enum { + #define GPIO_MODE_DEF_OD (BIT2) ///< bit mask for OD mode + /** @endcond */ + ++#ifndef HAVE_GPIO_MODE_T + typedef enum { + GPIO_MODE_DISABLE = GPIO_MODE_DEF_DISABLE, /*!< GPIO mode : disable input and output */ + GPIO_MODE_INPUT = GPIO_MODE_DEF_INPUT, /*!< GPIO mode : input only */ +@@ -100,6 +103,7 @@ typedef enum { + GPIO_MODE_INPUT_OUTPUT_OD = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT) | (GPIO_MODE_DEF_OD)), /*!< GPIO mode : output and input with open-drain mode*/ + GPIO_MODE_INPUT_OUTPUT = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT)), /*!< GPIO mode : output and input mode */ + } gpio_mode_t; ++#endif + + typedef enum { + GPIO_PULLUP_DISABLE = 0x0, /*!< Disable GPIO pull-up resistor */ +@@ -111,12 +115,14 @@ typedef enum { + GPIO_PULLDOWN_ENABLE = 0x1, /*!< Enable GPIO pull-down resistor */ + } gpio_pulldown_t; + ++#ifndef HAVE_GPIO_PULL_T + typedef enum { + GPIO_PULLUP_ONLY, /*!< Pad pull up */ + GPIO_PULLDOWN_ONLY, /*!< Pad pull down */ + GPIO_PULLUP_PULLDOWN, /*!< Pad pull up + pull down*/ + GPIO_FLOATING, /*!< Pad floating */ + } gpio_pull_mode_t; ++#endif + + typedef enum { + GPIO_DRIVE_CAP_0 = 0, /*!< Pad drive capability: weak */ +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0017-esp_phy-add-missing-header-includes.patch b/pkg/esp32_sdk/patches/0017-esp_phy-add-missing-header-includes.patch deleted file mode 100644 index 5bc20be8da..0000000000 --- a/pkg/esp32_sdk/patches/0017-esp_phy-add-missing-header-includes.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 15b1302039495a979c749fbdc464960901c68684 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 8 Mar 2022 11:36:06 +0100 -Subject: [PATCH 17/17] esp_phy: add missing header includes - ---- - components/esp_phy/src/phy_init.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c -index 7fd5b2c1247..f915b0e1b8f 100644 ---- a/components/esp_phy/src/phy_init.c -+++ b/components/esp_phy/src/phy_init.c -@@ -11,6 +11,7 @@ - #include - - #include "soc/rtc.h" -+#include "soc/soc_caps.h" - #include "esp_err.h" - #include "esp_phy_init.h" - #include "esp_system.h" --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0017-hal-avoid-conflicts-for-ARRAY_SIZE-macro.patch b/pkg/esp32_sdk/patches/0017-hal-avoid-conflicts-for-ARRAY_SIZE-macro.patch new file mode 100644 index 0000000000..b3a8e0d028 --- /dev/null +++ b/pkg/esp32_sdk/patches/0017-hal-avoid-conflicts-for-ARRAY_SIZE-macro.patch @@ -0,0 +1,27 @@ +From d1d459905d7152eb1ff065ea80dd73e384c7ff7b Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 18:04:52 +0100 +Subject: [PATCH 17/28] hal: avoid conflicts for ARRAY_SIZE macro + +--- + components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h b/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h +index 9ba2778472..c740e8d0cf 100644 +--- a/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h ++++ b/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h +@@ -25,7 +25,10 @@ + extern "C" { + #endif + ++#ifndef ARRAY_SIZE + #define ARRAY_SIZE(arr) (sizeof((arr))/sizeof(*(arr))) ++#endif ++ + #define MSPI_TIMING_LL_FLASH_OCT_MASK (SPI_MEM_FCMD_OCT | SPI_MEM_FADDR_OCT | SPI_MEM_FDIN_OCT | SPI_MEM_FDOUT_OCT) + #define MSPI_TIMING_LL_FLASH_QUAD_MASK (SPI_MEM_FASTRD_MODE | SPI_MEM_FREAD_DUAL | SPI_MEM_FREAD_DIO | SPI_MEM_FREAD_QUAD | SPI_MEM_FREAD_QIO) + #define MSPI_TIMING_LL_FLASH_QIO_MODE_MASK (SPI_MEM_FREAD_QIO | SPI_MEM_FASTRD_MODE) +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0018-bootloader-changes-for-esp32c3.patch b/pkg/esp32_sdk/patches/0018-bootloader-changes-for-esp32c3.patch deleted file mode 100644 index 5f82ba45be..0000000000 --- a/pkg/esp32_sdk/patches/0018-bootloader-changes-for-esp32c3.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 2ed829c7fdd2f31290094c1fe83267c7ca82330c Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Thu, 10 Mar 2022 12:38:51 +0100 -Subject: [PATCH 18/20] bootloader: changes for esp32c3 - -Since RIOT directly links compiled objects, the archive/object file references must be replaced with the corresponding object file paths. ---- - .../subproject/main/ld/esp32c3/bootloader.ld | 55 ++++++++++--------- - 1 file changed, 28 insertions(+), 27 deletions(-) - -diff --git a/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld b/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld -index c9b2da7612c..18b939322ba 100644 ---- a/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld -+++ b/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld -@@ -23,34 +23,35 @@ SECTIONS - _loader_text_start = ABSOLUTE(.); - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ -- *liblog.a:(.literal .text .literal.* .text.*) -+ *components/log/*(.literal .text .literal.* .text.*) - *libgcc.a:(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) -- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) -- *libbootloader_support.a:bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) -- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) -- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) -- *libspi_flash.a:*.*(.literal .text .literal.* .text.*) -- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) -- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) -- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) -- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) -- *libefuse.a:*.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_clock_loader.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_common_loader.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_flash.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_random.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) -+ *components/bootloader_support/*/bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) -+ *components/esp_common/src/fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) -+ *components/bootloader_support/*/bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_utility.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_sha.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_console_loader.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_panic.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/bootloader_soc.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/esp_image_format.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/flash_encrypt.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/flash_encryption_secure_features.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/flash_partitions.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/secure_boot.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/secure_boot_secure_features.*(.literal .text .literal.* .text.*) -+ *components/bootloader_support/*/secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) -+ *components/*/micro-ecc/*(.literal .text .literal.* .text.*) -+ *components/spi_flash/*(.literal .text .literal.* .text.*) -+ *components/hal/wdt_hal_iram.*(.literal .text .literal.* .text.*) -+ *components/esp_hw_support/*/rtc_clk.*(.literal .text .literal.* .text.*) -+ *components/esp_hw_support/*/rtc_time.*(.literal .text .literal.* .text.*) -+ *components/esp_hw_support/*/regi2c_ctrl.*(.literal .text .literal.* .text.*) -+ *components/efuse/*(.literal .text .literal.* .text.*) - *(.fini.literal) - *(.fini) - *(.gnu.version) --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0018-freertos-portasm-changes-for-RIOT-for-riscv32.patch b/pkg/esp32_sdk/patches/0018-freertos-portasm-changes-for-RIOT-for-riscv32.patch new file mode 100644 index 0000000000..e0d2bb0f9c --- /dev/null +++ b/pkg/esp32_sdk/patches/0018-freertos-portasm-changes-for-RIOT-for-riscv32.patch @@ -0,0 +1,77 @@ +From 0065ed08bb49264552b1f966196736872e27eba2 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 18:28:29 +0100 +Subject: [PATCH 18/28] freertos/portasm: changes for RIOT for riscv32 + +--- + .../FreeRTOS-Kernel/portable/riscv/portasm.S | 33 ++++++++++++++++--- + 1 file changed, 28 insertions(+), 5 deletions(-) + +diff --git a/components/freertos/FreeRTOS-Kernel/portable/riscv/portasm.S b/components/freertos/FreeRTOS-Kernel/portable/riscv/portasm.S +index 5f32c613a0..f6ba4eb72b 100644 +--- a/components/freertos/FreeRTOS-Kernel/portable/riscv/portasm.S ++++ b/components/freertos/FreeRTOS-Kernel/portable/riscv/portasm.S +@@ -4,17 +4,30 @@ + * SPDX-License-Identifier: Apache-2.0 + */ + #include "sdkconfig.h" +-#include "portmacro.h" +-#include "freertos/FreeRTOSConfig.h" + #include "soc/soc_caps.h" +-#include "riscv/rvruntime-frames.h" +-#include "riscv/csr_hwlp.h" +-#include "riscv/csr_pie.h" + + .extern pxCurrentTCBs + + #if CONFIG_ESP_SYSTEM_HW_STACK_GUARD + #include "esp_private/hw_stack_guard.h" ++#endif ++ ++#ifdef RIOT_VERSION ++#include "cpu_conf.h" ++ ++#define port_uxInterruptNesting irq_interrupt_nesting ++#define port_xSchedulerRunning sched_num_threads ++#define pxCurrentTCB sched_active_thread ++#define pxCurrentTCBs sched_active_thread ++#define vTaskSwitchContext sched_run ++#define xPortSwitchFlag sched_context_switch_request ++ ++#define configISR_STACK_SIZE ESP_ISR_STACKSIZE ++ ++.extern sched_active_thread ++.extern sched_num_threads ++.extern sched_context_switch_request ++.extern irq_interrupt_nesting + #endif + + .global port_uxInterruptNesting +@@ -30,6 +43,14 @@ + .global esp_hw_stack_guard_set_bounds + #endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */ + ++ .data ++ .align 16 ++ .global port_IntStack ++port_IntStack: ++ .space configISR_STACK_SIZE ++ .global port_IntStackTop ++port_IntStackTop: ++ + .section .text + + +@@ -707,7 +728,9 @@ no_switch_restored: + #else + /* Recover the stack of next task */ + lw a0, pxCurrentTCBs ++ beq a0, zero, rtos_enter_isr_stack + lw sp, 0(a0) ++rtos_enter_isr_stack: + #endif /* ( configNUM_CORES > 1 ) */ + + +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0019-hal-fix-spi_ll-compilation-errors-for-riscv32.patch b/pkg/esp32_sdk/patches/0019-hal-fix-spi_ll-compilation-errors-for-riscv32.patch deleted file mode 100644 index 9747fb0dfc..0000000000 --- a/pkg/esp32_sdk/patches/0019-hal-fix-spi_ll-compilation-errors-for-riscv32.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 367e4268b81a30c243628f8c99e94550bd291ec0 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Thu, 10 Mar 2022 12:39:51 +0100 -Subject: [PATCH 19/20] hal: fix spi_ll compilation errors for riscv32 - ---- - components/hal/esp32c3/include/hal/spi_ll.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/components/hal/esp32c3/include/hal/spi_ll.h b/components/hal/esp32c3/include/hal/spi_ll.h -index 38e1676d041..a9154c4600a 100644 ---- a/components/hal/esp32c3/include/hal/spi_ll.h -+++ b/components/hal/esp32c3/include/hal/spi_ll.h -@@ -332,7 +332,7 @@ static inline void spi_ll_dma_set_rx_eof_generation(spi_dev_t *hw, bool enable) - */ - static inline void spi_ll_write_buffer(spi_dev_t *hw, const uint8_t *buffer_to_send, size_t bitlen) - { -- for (int x = 0; x < bitlen; x += 32) { -+ for (size_t x = 0; x < bitlen; x += 32) { - //Use memcpy to get around alignment issues for txdata - uint32_t word; - memcpy(&word, &buffer_to_send[x / 8], 4); -@@ -384,7 +384,7 @@ static inline void spi_ll_write_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t - */ - static inline void spi_ll_read_buffer(spi_dev_t *hw, uint8_t *buffer_to_rcv, size_t bitlen) - { -- for (int x = 0; x < bitlen; x += 32) { -+ for (size_t x = 0; x < bitlen; x += 32) { - //Do a memcpy to get around possible alignment issues in rx_buffer - uint32_t word = hw->data_buf[x / 32]; - int len = bitlen - x; --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0019-heap-IRAM-is-not-used-as-heap.patch b/pkg/esp32_sdk/patches/0019-heap-IRAM-is-not-used-as-heap.patch new file mode 100644 index 0000000000..6a031d17c7 --- /dev/null +++ b/pkg/esp32_sdk/patches/0019-heap-IRAM-is-not-used-as-heap.patch @@ -0,0 +1,33 @@ +From 7517fc3cdf4913727dda1a1cad464927d24db7ec Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 10:20:04 +0100 +Subject: [PATCH 19/28] heap: IRAM is not used as heap + +RIOT only supports memory as a heap that allows byte access. IRAM only allows word-by-word access. +--- + components/heap/port/esp32/memory_layout.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/components/heap/port/esp32/memory_layout.c b/components/heap/port/esp32/memory_layout.c +index b35d8c1b3e..b6c6d59010 100644 +--- a/components/heap/port/esp32/memory_layout.c ++++ b/components/heap/port/esp32/memory_layout.c +@@ -95,6 +95,7 @@ const soc_memory_region_t soc_memory_regions[] = { + { 0x3FFF0000, 0x8000, SOC_MEMORY_TYPE_DIRAM, 0x400A8000,true}, //pool 7 <- can be used for MAC dump + { 0x3FFF8000, 0x4000, SOC_MEMORY_TYPE_DIRAM, 0x400A4000,true}, //pool 6 blk 1 <- can be used as trace memory + { 0x3FFFC000, 0x4000, SOC_MEMORY_TYPE_DIRAM, 0x400A0000,true}, //pool 6 blk 0 <- can be used as trace memory ++#if !defined(RIOT_VERSION) + { 0x40070000, 0x8000, SOC_MEMORY_TYPE_IRAM, 0, false}, //pool 0 + { 0x40078000, 0x8000, SOC_MEMORY_TYPE_IRAM, 0, false}, //pool 1 + { 0x40080000, 0x2000, SOC_MEMORY_TYPE_IRAM, 0, false}, //pool 2-5, mmu page 0 +@@ -113,6 +114,7 @@ const soc_memory_region_t soc_memory_regions[] = { + { 0x4009A000, 0x2000, SOC_MEMORY_TYPE_IRAM, 0, false}, //pool 2-5, mmu page 13 + { 0x4009C000, 0x2000, SOC_MEMORY_TYPE_IRAM, 0, false}, //pool 2-5, mmu page 14 + { 0x4009E000, 0x2000, SOC_MEMORY_TYPE_IRAM, 0, false}, //pool 2-5, mmu page 15 ++#endif + #ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP + { SOC_RTC_DRAM_LOW, 0x2000, SOC_MEMORY_TYPE_RTCRAM, 0, false}, //RTC Fast Memory + #endif +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0020-freertos-portasm-changes-for-RIOT-for-riscv32.patch b/pkg/esp32_sdk/patches/0020-freertos-portasm-changes-for-RIOT-for-riscv32.patch deleted file mode 100644 index d00896e9ab..0000000000 --- a/pkg/esp32_sdk/patches/0020-freertos-portasm-changes-for-RIOT-for-riscv32.patch +++ /dev/null @@ -1,66 +0,0 @@ -From ae4c3076113b0b746bea04206d0186bce99fb4d1 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Thu, 10 Mar 2022 13:10:23 +0100 -Subject: [PATCH 20/20] freertos/portasm: changes for RIOT for riscv32 - -A number of symbols that are used by assembler code have to be mapped to existing symbols in RIOT implementation. Furthermore, the ISR stack `port_IntStack`has to be allocated. ---- - components/freertos/port/riscv/portasm.S | 27 ++++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - -diff --git a/components/freertos/port/riscv/portasm.S b/components/freertos/port/riscv/portasm.S -index 20c094b7a68..8aeabb3dedc 100644 ---- a/components/freertos/port/riscv/portasm.S -+++ b/components/freertos/port/riscv/portasm.S -@@ -12,6 +12,22 @@ - // See the License for the specific language governing permissions and - // limitations under the License. - -+#ifdef RIOT_VERSION -+#include "cpu_conf.h" -+ -+#define pxCurrentTCB sched_active_thread -+#define uxSchedulerRunning sched_num_threads -+#define xPortSwitchFlag sched_context_switch_request -+#define vTaskSwitchContext sched_run -+#define uxInterruptNesting irq_interrupt_nesting -+#define configISR_STACK_SIZE ESP_ISR_STACKSIZE -+ -+.extern sched_active_thread -+.extern sched_num_threads -+.extern sched_context_switch_request -+.extern irq_interrupt_nesting -+#endif -+ - .global uxInterruptNesting - .global uxSchedulerRunning - .global xIsrStackTop -@@ -19,6 +35,14 @@ - .global vTaskSwitchContext - .global xPortSwitchFlag - -+ .data -+ .align 16 -+ .global port_IntStack -+port_IntStack: -+ .space configISR_STACK_SIZE -+ .global port_IntStackTop -+port_IntStackTop: -+ - .section .text - - /** -@@ -50,7 +74,10 @@ rtos_int_enter: - - /* Save current TCB and load the ISR stack */ - lw t0, pxCurrentTCB -+ beq t0, zero, rtos_enter_isr_stack - sw t2, 0x0(t0) -+ -+rtos_enter_isr_stack: - lw sp, xIsrStackTop - - rtos_enter_end: --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0020-nvs_flash-extern-declaration-of-strlcpy.patch b/pkg/esp32_sdk/patches/0020-nvs_flash-extern-declaration-of-strlcpy.patch new file mode 100644 index 0000000000..00bca9bf39 --- /dev/null +++ b/pkg/esp32_sdk/patches/0020-nvs_flash-extern-declaration-of-strlcpy.patch @@ -0,0 +1,25 @@ +From b215127198549f5b1362479c72856fd9c4a75cdb Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 10:21:03 +0100 +Subject: [PATCH 20/28] nvs_flash: extern declaration of strlcpy + +--- + components/nvs_flash/src/nvs_storage.cpp | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/components/nvs_flash/src/nvs_storage.cpp b/components/nvs_flash/src/nvs_storage.cpp +index e5db0caefe..4db36cec91 100644 +--- a/components/nvs_flash/src/nvs_storage.cpp ++++ b/components/nvs_flash/src/nvs_storage.cpp +@@ -7,6 +7,8 @@ + #if __has_include() + // for strlcpy + #include ++#else ++extern size_t strlcpy(char *, const char *, size_t); + #endif + + #ifndef ESP_PLATFORM +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0013-newlib-add-sys-uio.h-from-toolchain.patch b/pkg/esp32_sdk/patches/0021-newlib-include-the-newlibc-sys-uio.h.patch similarity index 50% rename from pkg/esp32_sdk/patches/0013-newlib-add-sys-uio.h-from-toolchain.patch rename to pkg/esp32_sdk/patches/0021-newlib-include-the-newlibc-sys-uio.h.patch index 9b7ffffdfb..e9de8a8ef6 100644 --- a/pkg/esp32_sdk/patches/0013-newlib-add-sys-uio.h-from-toolchain.patch +++ b/pkg/esp32_sdk/patches/0021-newlib-include-the-newlibc-sys-uio.h.patch @@ -1,25 +1,27 @@ -From 5907e2e9a98e73b303eac29781b100d988f9575b Mon Sep 17 00:00:00 2001 +From f052e96b90746eaffcd9142341136201c080910a Mon Sep 17 00:00:00 2001 From: Gunar Schorcht -Date: Tue, 8 Mar 2022 11:36:33 +0100 -Subject: [PATCH 13/17] newlib: add sys/uio.h from toolchain +Date: Sun, 2 Mar 2025 10:22:41 +0100 +Subject: [PATCH 21/28] newlib: include the newlibc sys/uio.h --- - components/newlib/platform_include/sys/uio.h | 2 ++ - 1 file changed, 2 insertions(+) + components/newlib/platform_include/sys/uio.h | 4 ++++ + 1 file changed, 4 insertions(+) diff --git a/components/newlib/platform_include/sys/uio.h b/components/newlib/platform_include/sys/uio.h -index 3ff3eba8716..388fed3d663 100644 +index 3ff3eba871..5a8652a797 100644 --- a/components/newlib/platform_include/sys/uio.h +++ b/components/newlib/platform_include/sys/uio.h -@@ -6,6 +6,8 @@ +@@ -6,6 +6,10 @@ #pragma once ++#ifdef RIOT_VERSION +#include_next ++#endif /* RIOT_VERSION */ + #include #include -- -2.17.1 +2.34.1 diff --git a/pkg/esp32_sdk/patches/0021-spi_flash-changes-for-RIOT-for-esp32s3.patch b/pkg/esp32_sdk/patches/0021-spi_flash-changes-for-RIOT-for-esp32s3.patch deleted file mode 100644 index 4f1e0c18b9..0000000000 --- a/pkg/esp32_sdk/patches/0021-spi_flash-changes-for-RIOT-for-esp32s3.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 1cb888fc95a0374523e164d513952681e4e5847c Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Fri, 8 Apr 2022 16:45:44 +0200 -Subject: [PATCH 21/23] spi_flash: changes for RIOT for esp32s3 - -Define ARRAY_SIZE in `component/spi_flash/spi_flash_timing_tuning.c` only if it is not yet defined by RIOT macros. ---- - components/spi_flash/spi_flash_timing_tuning.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/components/spi_flash/spi_flash_timing_tuning.c b/components/spi_flash/spi_flash_timing_tuning.c -index 8b2efd1450..de8a0a60e9 100644 ---- a/components/spi_flash/spi_flash_timing_tuning.c -+++ b/components/spi_flash/spi_flash_timing_tuning.c -@@ -20,7 +20,9 @@ - #include "esp32s3/rom/cache.h" - #endif - -+#ifndef ARRAY_SIZE - #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(*(arr))) -+#endif - - #if SPI_TIMING_FLASH_NEEDS_TUNING || SPI_TIMING_PSRAM_NEEDS_TUNING - const static char *TAG = "MSPI Timing"; --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0022-driver-gpio-fix-undefined-reference-to-rtc_gpio_forc.patch b/pkg/esp32_sdk/patches/0022-driver-gpio-fix-undefined-reference-to-rtc_gpio_forc.patch deleted file mode 100644 index ddbbc72310..0000000000 --- a/pkg/esp32_sdk/patches/0022-driver-gpio-fix-undefined-reference-to-rtc_gpio_forc.patch +++ /dev/null @@ -1,27 +0,0 @@ -From ff70fdaa8c4c11e060772c47195c271188b7bf01 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Fri, 27 May 2022 15:29:14 +0200 -Subject: [PATCH 22/23] driver/gpio: fix undefined reference to - rtc_gpio_force_hold_all - -Fix the undefined reference to `rtc_gpio_force_hold_en_all` in `components/driver/gpio.c` ---- - components/driver/gpio.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/components/driver/gpio.c b/components/driver/gpio.c -index db27ab45ab..0c696f0d9f 100644 ---- a/components/driver/gpio.c -+++ b/components/driver/gpio.c -@@ -682,7 +682,7 @@ void gpio_deep_sleep_hold_dis(void) - esp_err_t gpio_force_hold_all() - { - #if SOC_RTCIO_HOLD_SUPPORTED -- rtc_gpio_force_hold_all(); -+ rtc_gpio_force_hold_en_all(); - #endif - portENTER_CRITICAL(&gpio_context.gpio_spinlock); - gpio_hal_force_hold_all(gpio_context.gpio_hal); --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0022-esp_system-conditional-define-of-esp_get_free_heap_s.patch b/pkg/esp32_sdk/patches/0022-esp_system-conditional-define-of-esp_get_free_heap_s.patch new file mode 100644 index 0000000000..96a398d6ea --- /dev/null +++ b/pkg/esp32_sdk/patches/0022-esp_system-conditional-define-of-esp_get_free_heap_s.patch @@ -0,0 +1,34 @@ +From 9bb7d4820132d756a37aab8a4a4ea5228d6bf134 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 10:27:20 +0100 +Subject: [PATCH 22/28] esp_system: conditional define of + esp_get_free_heap_size + +Define the function `esp_get_free_heap_size` in ESP-IDF only if the heap implementation of ESP-IDF is used, that is if module `esp_idf_heap` is enabled. Otherwise, this function is defined in `cpu/esp_common/syscalls.c`. +--- + components/esp_system/port/esp_system_chip.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/components/esp_system/port/esp_system_chip.c b/components/esp_system/port/esp_system_chip.c +index 864c2e4c23..dff4a1bd83 100644 +--- a/components/esp_system/port/esp_system_chip.c ++++ b/components/esp_system/port/esp_system_chip.c +@@ -67,6 +67,7 @@ void IRAM_ATTR esp_restart_noos_dig(void) + } + #endif + ++#ifdef MODULE_ESP_IDF_HEAP + uint32_t esp_get_free_heap_size(void) + { + return heap_caps_get_free_size(MALLOC_CAP_DEFAULT); +@@ -76,6 +77,7 @@ uint32_t esp_get_free_internal_heap_size(void) + { + return heap_caps_get_free_size(MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL); + } ++#endif + + uint32_t esp_get_minimum_free_heap_size(void) + { +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0023-bootloader-remove-compile-time-from-banner.patch b/pkg/esp32_sdk/patches/0023-bootloader-remove-compile-time-from-banner.patch deleted file mode 100644 index 73230d7dee..0000000000 --- a/pkg/esp32_sdk/patches/0023-bootloader-remove-compile-time-from-banner.patch +++ /dev/null @@ -1,24 +0,0 @@ -From c6789a3f627915ff7d9f6909c2202eac2cb9db0c Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 31 May 2022 22:32:47 +0200 -Subject: [PATCH 23/23] bootloader: remove compile time from banner - ---- - components/bootloader_support/src/bootloader_init.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/components/bootloader_support/src/bootloader_init.c b/components/bootloader_support/src/bootloader_init.c -index 1d73f5dc26..9e45b1d415 100644 ---- a/components/bootloader_support/src/bootloader_init.c -+++ b/components/bootloader_support/src/bootloader_init.c -@@ -91,5 +91,7 @@ void bootloader_enable_random(void) - void bootloader_print_banner(void) - { - ESP_LOGI(TAG, "ESP-IDF %s 2nd stage bootloader", IDF_VER); -+#if 0 /* not used in RIOT */ - ESP_LOGI(TAG, "compile time " __TIME__); -+#endif - } --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0023-esp_system-conditional-define-of-esp_system_abort.patch b/pkg/esp32_sdk/patches/0023-esp_system-conditional-define-of-esp_system_abort.patch new file mode 100644 index 0000000000..3e15e9b9d4 --- /dev/null +++ b/pkg/esp32_sdk/patches/0023-esp_system-conditional-define-of-esp_system_abort.patch @@ -0,0 +1,26 @@ +From b7bf248a900dff96bd04f655ffeb120847ec2fb7 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 10:29:08 +0100 +Subject: [PATCH 23/28] esp_system: conditional define of esp_system_abort + +--- + components/esp_system/port/esp_system_chip.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/components/esp_system/port/esp_system_chip.c b/components/esp_system/port/esp_system_chip.c +index dff4a1bd83..ce7cb27efb 100644 +--- a/components/esp_system/port/esp_system_chip.c ++++ b/components/esp_system/port/esp_system_chip.c +@@ -89,7 +89,9 @@ const char *esp_get_idf_version(void) + return IDF_VER; + } + ++#ifndef RIOT_VERSION + void __attribute__((noreturn)) esp_system_abort(const char *details) + { + panic_abort(details); + } ++#endif +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0024-bt-RIOT-uses-another-version-of-vendor-function.patch b/pkg/esp32_sdk/patches/0024-bt-RIOT-uses-another-version-of-vendor-function.patch deleted file mode 100644 index 3e052d9440..0000000000 --- a/pkg/esp32_sdk/patches/0024-bt-RIOT-uses-another-version-of-vendor-function.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 612d6db5386a9a599fe66cfae9ad526c5dfb7372 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Thu, 11 Aug 2022 01:44:44 +0200 -Subject: [PATCH 24/26] bt: RIOT uses another version of vendor function - -The xt_ints_on function version used by RIOT returns an integer value, the old mask. Using this function instead of void version, doesn't lead to any problem. ---- - components/bt/controller/esp32/bt.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/components/bt/controller/esp32/bt.c b/components/bt/controller/esp32/bt.c -index 8ed126f867..f967c5b238 100644 ---- a/components/bt/controller/esp32/bt.c -+++ b/components/bt/controller/esp32/bt.c -@@ -125,7 +125,7 @@ typedef struct { - struct osi_funcs_t { - uint32_t _version; - xt_handler (*_set_isr)(int n, xt_handler f, void *arg); -- void (*_ints_on)(unsigned int mask); -+ unsigned int (*_ints_on)(unsigned int mask); - void (*_interrupt_disable)(void); - void (*_interrupt_restore)(void); - void (*_task_yield)(void); --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0024-esp_common-use-_Static_assert-instead-of-static_asse.patch b/pkg/esp32_sdk/patches/0024-esp_common-use-_Static_assert-instead-of-static_asse.patch new file mode 100644 index 0000000000..21ac80ed03 --- /dev/null +++ b/pkg/esp32_sdk/patches/0024-esp_common-use-_Static_assert-instead-of-static_asse.patch @@ -0,0 +1,28 @@ +From b2454c0629b03bb244ea9781f294c4a96b7fd848 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 10:40:35 +0100 +Subject: [PATCH 24/28] esp_common: use _Static_assert instead of static_assert + +--- + components/esp_common/include/esp_assert.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/components/esp_common/include/esp_assert.h b/components/esp_common/include/esp_assert.h +index fa54fdbedb..e6a77ae046 100644 +--- a/components/esp_common/include/esp_assert.h ++++ b/components/esp_common/include/esp_assert.h +@@ -10,7 +10,11 @@ + + /* Since IDF v5.0, C17 standard is used, which supports both _Static_assert and static_assert syntax */ + /* Please do not use `_Static_assert` for C++ compatibility */ ++#ifndef RIOT_VERSION + #define ESP_STATIC_ASSERT static_assert ++#else ++#define ESP_STATIC_ASSERT _Static_assert ++#endif + + /* Assert at compile time if possible, runtime otherwise */ + #ifndef __cplusplus +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0025-esp_app_format-set-app_elf_sha256-in-esp_app_desc.patch b/pkg/esp32_sdk/patches/0025-esp_app_format-set-app_elf_sha256-in-esp_app_desc.patch new file mode 100644 index 0000000000..f5c9204e0c --- /dev/null +++ b/pkg/esp32_sdk/patches/0025-esp_app_format-set-app_elf_sha256-in-esp_app_desc.patch @@ -0,0 +1,25 @@ +From d203d26a1c478fb1cec92ed569fec73a89299bd8 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 10:42:40 +0100 +Subject: [PATCH 25/28] esp_app_format: set app_elf_sha256 in esp_app_desc + +--- + components/esp_app_format/esp_app_desc.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/components/esp_app_format/esp_app_desc.c b/components/esp_app_format/esp_app_desc.c +index 302250b179..c44b32648b 100644 +--- a/components/esp_app_format/esp_app_desc.c ++++ b/components/esp_app_format/esp_app_desc.c +@@ -42,6 +42,8 @@ const __attribute__((weak)) __attribute__((section(".rodata_desc"))) esp_app_de + // On Linux we just initialize the hash to some known value for testing + #if CONFIG_IDF_TARGET_LINUX + .app_elf_sha256 = { 0xDE, 0xAD, 0xBE, 0xEF, 0x47, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B}, ++#else ++ .app_elf_sha256 = { }, + #endif + + #ifdef CONFIG_BOOTLOADER_APP_SECURE_VERSION +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0026-esp_hw_support-rename-rtc_init.patch b/pkg/esp32_sdk/patches/0026-esp_hw_support-rename-rtc_init.patch new file mode 100644 index 0000000000..8dbbbcfc7b --- /dev/null +++ b/pkg/esp32_sdk/patches/0026-esp_hw_support-rename-rtc_init.patch @@ -0,0 +1,222 @@ +From a9b8142108e1d9aa88c7d5b2bc968fbe9a0e4433 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sat, 1 Mar 2025 17:17:13 +0100 +Subject: [PATCH 26/28] esp_hw_support: rename rtc_init + +Rename `rtc_init` to `rtc_init_module` due to name conflicts with RIOT `periph/rtc` module. +--- + components/esp_hw_support/port/esp32/include/soc/rtc.h | 2 +- + components/esp_hw_support/port/esp32/rtc_init.c | 2 +- + components/esp_hw_support/port/esp32c2/include/soc/rtc.h | 2 +- + components/esp_hw_support/port/esp32c2/rtc_init.c | 2 +- + components/esp_hw_support/port/esp32c3/include/soc/rtc.h | 2 +- + components/esp_hw_support/port/esp32c3/rtc_init.c | 2 +- + components/esp_hw_support/port/esp32s2/include/soc/rtc.h | 2 +- + components/esp_hw_support/port/esp32s2/rtc_init.c | 2 +- + components/esp_hw_support/port/esp32s3/include/soc/rtc.h | 2 +- + components/esp_hw_support/port/esp32s3/rtc_init.c | 2 +- + components/esp_system/port/soc/esp32/clk.c | 2 +- + components/esp_system/port/soc/esp32c2/clk.c | 2 +- + components/esp_system/port/soc/esp32c3/clk.c | 2 +- + components/esp_system/port/soc/esp32s2/clk.c | 2 +- + components/esp_system/port/soc/esp32s3/clk.c | 2 +- + 15 files changed, 15 insertions(+), 15 deletions(-) + +diff --git a/components/esp_hw_support/port/esp32/include/soc/rtc.h b/components/esp_hw_support/port/esp32/include/soc/rtc.h +index 22f7cfe157..1f0f9f2e77 100644 +--- a/components/esp_hw_support/port/esp32/include/soc/rtc.h ++++ b/components/esp_hw_support/port/esp32/include/soc/rtc.h +@@ -666,7 +666,7 @@ typedef struct rtc_config_s { + * Initialize RTC clock and power control related functions + * @param cfg configuration options as rtc_config_t + */ +-void rtc_init(rtc_config_t cfg); ++void rtc_init_module(rtc_config_t cfg); + + #define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO + #define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO +diff --git a/components/esp_hw_support/port/esp32/rtc_init.c b/components/esp_hw_support/port/esp32/rtc_init.c +index 087824c279..9eecbef376 100644 +--- a/components/esp_hw_support/port/esp32/rtc_init.c ++++ b/components/esp_hw_support/port/esp32/rtc_init.c +@@ -17,7 +17,7 @@ + #endif + + +-void rtc_init(rtc_config_t cfg) ++void rtc_init_module(rtc_config_t cfg) + { + /** + * When run rtc_init, it maybe deep sleep reset. Since we power down modem in deep sleep, after wakeup +diff --git a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h +index 9f8d412f59..3d2ae50f99 100644 +--- a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h ++++ b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h +@@ -690,7 +690,7 @@ typedef struct { + * Initialize RTC clock and power control related functions + * @param cfg configuration options as rtc_config_t + */ +-void rtc_init(rtc_config_t cfg); ++void rtc_init_module(rtc_config_t cfg); + + // -------------------------- CLOCK TREE DEFS ALIAS ---------------------------- + // **WARNING**: The following are only for backwards compatibility. +diff --git a/components/esp_hw_support/port/esp32c2/rtc_init.c b/components/esp_hw_support/port/esp32c2/rtc_init.c +index abb5370c67..32549d5376 100644 +--- a/components/esp_hw_support/port/esp32c2/rtc_init.c ++++ b/components/esp_hw_support/port/esp32c2/rtc_init.c +@@ -29,7 +29,7 @@ static void set_ocode_by_efuse(int ocode_scheme_ver); + static void calibrate_ocode(void); + static void set_rtc_dig_dbias(void); + +-void rtc_init(rtc_config_t cfg) ++void rtc_init_module(rtc_config_t cfg) + { + REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0); + REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0); +diff --git a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h +index 58a26dd41e..bae3de4931 100644 +--- a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h ++++ b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h +@@ -759,7 +759,7 @@ typedef struct { + * Initialize RTC clock and power control related functions + * @param cfg configuration options as rtc_config_t + */ +-void rtc_init(rtc_config_t cfg); ++void rtc_init_module(rtc_config_t cfg); + + // -------------------------- CLOCK TREE DEFS ALIAS ---------------------------- + // **WARNING**: The following are only for backwards compatibility. +diff --git a/components/esp_hw_support/port/esp32c3/rtc_init.c b/components/esp_hw_support/port/esp32c3/rtc_init.c +index c7a1eb55f0..ed62540c6e 100644 +--- a/components/esp_hw_support/port/esp32c3/rtc_init.c ++++ b/components/esp_hw_support/port/esp32c3/rtc_init.c +@@ -29,7 +29,7 @@ static void set_ocode_by_efuse(int calib_version); + static void calibrate_ocode(void); + static void set_rtc_dig_dbias(void); + +-void rtc_init(rtc_config_t cfg) ++void rtc_init_module(rtc_config_t cfg) + { + /** + * When run rtc_init, it maybe deep sleep reset. Since we power down modem in deep sleep, after wakeup +diff --git a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h +index 5a3dda4844..109e956af2 100644 +--- a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h ++++ b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h +@@ -799,7 +799,7 @@ typedef struct { + * Initialize RTC clock and power control related functions + * @param cfg configuration options as rtc_config_t + */ +-void rtc_init(rtc_config_t cfg); ++void rtc_init_module(rtc_config_t cfg); + + /** + * Structure describing vddsdio configuration +diff --git a/components/esp_hw_support/port/esp32s2/rtc_init.c b/components/esp_hw_support/port/esp32s2/rtc_init.c +index 549cdffd43..0f1111c758 100644 +--- a/components/esp_hw_support/port/esp32s2/rtc_init.c ++++ b/components/esp_hw_support/port/esp32s2/rtc_init.c +@@ -26,7 +26,7 @@ __attribute__((unused)) static const char *TAG = "rtc_init"; + static void set_ocode_by_efuse(int calib_version); + static void calibrate_ocode(void); + +-void rtc_init(rtc_config_t cfg) ++void rtc_init_module(rtc_config_t cfg) + { + /** + * When run rtc_init, it maybe deep sleep reset. Since we power down modem in deep sleep, after wakeup +diff --git a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h +index 27a4845f5f..f4c37716e5 100644 +--- a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h ++++ b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h +@@ -786,7 +786,7 @@ typedef struct { + * Initialize RTC clock and power control related functions + * @param cfg configuration options as rtc_config_t + */ +-void rtc_init(rtc_config_t cfg); ++void rtc_init_module(rtc_config_t cfg); + + /** + * Structure describing vddsdio configuration +diff --git a/components/esp_hw_support/port/esp32s3/rtc_init.c b/components/esp_hw_support/port/esp32s3/rtc_init.c +index bbdf99ee89..3e28058c87 100644 +--- a/components/esp_hw_support/port/esp32s3/rtc_init.c ++++ b/components/esp_hw_support/port/esp32s3/rtc_init.c +@@ -43,7 +43,7 @@ uint32_t g_rtc_dbias_pvt_240m = 28; + uint32_t g_dig_dbias_pvt_non_240m = 27; + uint32_t g_rtc_dbias_pvt_non_240m = 27; + +-void rtc_init(rtc_config_t cfg) ++void rtc_init_module(rtc_config_t cfg) + { + /** + * When run rtc_init, it maybe deep sleep reset. Since we power down modem in deep sleep, after wakeup +diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c +index 88f72ff947..197a17b5e1 100644 +--- a/components/esp_system/port/soc/esp32/clk.c ++++ b/components/esp_system/port/soc/esp32/clk.c +@@ -109,7 +109,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) + void esp_rtc_init(void) + { + rtc_config_t cfg = RTC_CONFIG_DEFAULT(); +- rtc_init(cfg); ++ rtc_init_module(cfg); + } + + __attribute__((weak)) void esp_clk_init(void) +diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c +index 6cc267ea6c..5c8fc6c2f4 100644 +--- a/components/esp_system/port/soc/esp32c2/clk.c ++++ b/components/esp_system/port/soc/esp32c2/clk.c +@@ -70,7 +70,7 @@ void esp_rtc_init(void) + if (rst_reas == RESET_REASON_CHIP_POWER_ON) { + cfg.cali_ocode = 1; + } +- rtc_init(cfg); ++ rtc_init_module(cfg); + #endif + } + +diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c +index ecb5d08385..bc4687bbd6 100644 +--- a/components/esp_system/port/soc/esp32c3/clk.c ++++ b/components/esp_system/port/soc/esp32c3/clk.c +@@ -69,7 +69,7 @@ void esp_rtc_init(void) + ) { + cfg.cali_ocode = 1; + } +- rtc_init(cfg); ++ rtc_init_module(cfg); + } + + __attribute__((weak)) void esp_clk_init(void) +diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c +index 2b786b62f9..26d86af6c3 100644 +--- a/components/esp_system/port/soc/esp32s2/clk.c ++++ b/components/esp_system/port/soc/esp32s2/clk.c +@@ -72,7 +72,7 @@ void esp_rtc_init(void) + esp_rom_output_tx_wait_idle(CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM); + } + } +- rtc_init(cfg); ++ rtc_init_module(cfg); + } + + __attribute__((weak)) void esp_clk_init(void) +diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c +index fac148fb41..fe6f9bee6d 100644 +--- a/components/esp_system/port/soc/esp32s3/clk.c ++++ b/components/esp_system/port/soc/esp32s3/clk.c +@@ -71,7 +71,7 @@ void esp_rtc_init(void) + if (rst_reas == RESET_REASON_CHIP_POWER_ON) { + cfg.cali_ocode = 1; + } +- rtc_init(cfg); ++ rtc_init_module(cfg); + } + + __attribute__((weak)) void esp_clk_init(void) +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0026-hal-conditional-definition-of-gpio_pull_mode_t.patch b/pkg/esp32_sdk/patches/0026-hal-conditional-definition-of-gpio_pull_mode_t.patch deleted file mode 100644 index c22a4d2d90..0000000000 --- a/pkg/esp32_sdk/patches/0026-hal-conditional-definition-of-gpio_pull_mode_t.patch +++ /dev/null @@ -1,32 +0,0 @@ -From b02c4c62bd162472a49f2cd133683a043eeb939a Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 17 Jul 2022 16:06:34 +0200 -Subject: [PATCH 26/26] hal: conditional definition of gpio_pull_mode_t - -Define type `gpio_pull_mode_t` only if it is not yet defined by RIOT `periph/gpio`. When this header is used during the compilation of RIOT source, this type definition isn't required and leads to name conflicts with RIOT's `gpio_pull_t` and `GPIO_FLOATING` definition. The definition of `gpio_pull_mode_t` in this header is only required when ESP-IDF source code is compiled. In that case RIOT's `gpio_pull_t` isn't defined. ---- - components/hal/include/hal/gpio_types.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/components/hal/include/hal/gpio_types.h b/components/hal/include/hal/gpio_types.h -index 8a15b8e396c..0b60f7284a8 100644 ---- a/components/hal/include/hal/gpio_types.h -+++ b/components/hal/include/hal/gpio_types.h -@@ -401,12 +401,14 @@ typedef struct { - gpio_int_type_t intr_type; /*!< GPIO interrupt type */ - } gpio_config_t; - -+#ifndef HAVE_GPIO_PULL_T - typedef enum { - GPIO_PULLUP_ONLY, /*!< Pad pull up */ - GPIO_PULLDOWN_ONLY, /*!< Pad pull down */ - GPIO_PULLUP_PULLDOWN, /*!< Pad pull up + pull down*/ - GPIO_FLOATING, /*!< Pad floating */ - } gpio_pull_mode_t; -+#endif - - typedef enum { - GPIO_DRIVE_CAP_0 = 0, /*!< Pad drive capability: weak */ --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0027-hal-conditional-definition-of-gpio_port_t.patch b/pkg/esp32_sdk/patches/0027-hal-conditional-definition-of-gpio_port_t.patch deleted file mode 100644 index fed3831b2a..0000000000 --- a/pkg/esp32_sdk/patches/0027-hal-conditional-definition-of-gpio_port_t.patch +++ /dev/null @@ -1,30 +0,0 @@ -From abfd0f5fc57a8948aaef0f5ba7c1632bc5ebe3df Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Sun, 17 Jul 2022 18:21:25 +0200 -Subject: [PATCH 27/27] hal: conditional definition of gpio_port_t - -Define type `gpio_port_t` only if it is not yet defined by RIOT `periph/gpio`. When this header is used during the compilation of RIOT source, this type definition isn't required and leads to name conflicts with RIOT's `gpio_port_t` definition. The definition of `gpio_port_t` in this header is only required when ESP-IDF source code is compiled. In that case RIOT's `gpio_port_t` isn't defined. ---- - components/hal/include/hal/gpio_types.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/components/hal/include/hal/gpio_types.h b/components/hal/include/hal/gpio_types.h -index 0b60f7284a8..a5258525801 100644 ---- a/components/hal/include/hal/gpio_types.h -+++ b/components/hal/include/hal/gpio_types.h -@@ -21,10 +21,12 @@ - extern "C" { - #endif - -+#ifndef HAVE_GPIO_PORT_T - typedef enum { - GPIO_PORT_0 = 0, - GPIO_PORT_MAX, - } gpio_port_t; -+#endif - - #define GPIO_SEL_0 (BIT(0)) /*!< Pin 0 selected */ - #define GPIO_SEL_1 (BIT(1)) /*!< Pin 1 selected */ --- -2.17.1 - diff --git a/pkg/esp32_sdk/patches/0027-wpa_supplicant-fix-include-to-find-correct-base64.h.patch b/pkg/esp32_sdk/patches/0027-wpa_supplicant-fix-include-to-find-correct-base64.h.patch new file mode 100644 index 0000000000..60a8997897 --- /dev/null +++ b/pkg/esp32_sdk/patches/0027-wpa_supplicant-fix-include-to-find-correct-base64.h.patch @@ -0,0 +1,25 @@ +From d52016bf6f16eac0c3a4b895707368ee8a3babea Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Sun, 2 Mar 2025 17:15:03 +0100 +Subject: [PATCH 27/28] wpa_supplicant: fix include to find correct base64.h + +--- + components/wpa_supplicant/src/tls/tlsv1_cred.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/components/wpa_supplicant/src/tls/tlsv1_cred.c b/components/wpa_supplicant/src/tls/tlsv1_cred.c +index 0cee09749d..4d5d9d0b29 100644 +--- a/components/wpa_supplicant/src/tls/tlsv1_cred.c ++++ b/components/wpa_supplicant/src/tls/tlsv1_cred.c +@@ -9,7 +9,7 @@ + #include "includes.h" + + #include "common.h" +-#include "base64.h" ++#include "utils/base64.h" + #include "crypto/crypto.h" + #include "crypto/sha1.h" + #include "pkcs5.h" +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch b/pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch deleted file mode 100644 index d588f1057f..0000000000 --- a/pkg/esp32_sdk/patches/0028-hal-cast-esp-interrupt-type-to-riscv-interrupt-type.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 19f7ed9aaab8be94571779fc8b738d3479e0aa23 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 4 Apr 2023 09:55:00 +0200 -Subject: [PATCH 28/29] hal: cast esp interrupt type to riscv interrupt type - ---- - components/hal/esp32c3/include/hal/interrupt_controller_ll.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/components/hal/esp32c3/include/hal/interrupt_controller_ll.h b/components/hal/esp32c3/include/hal/interrupt_controller_ll.h -index 70afe314cfe..3c3ef3b953e 100644 ---- a/components/hal/esp32c3/include/hal/interrupt_controller_ll.h -+++ b/components/hal/esp32c3/include/hal/interrupt_controller_ll.h -@@ -124,7 +124,7 @@ static inline void intr_cntrl_ll_set_int_level(int intr, int level) - */ - static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type) - { -- esprv_intc_int_set_type(BIT(intr), type); -+ esprv_intc_int_set_type(BIT(intr), (enum intr_type)type); - } - - #ifdef __cplusplus --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0028-heap-add-prefix-esp_-to-tlsf-to-avoid-conflicts-with.patch b/pkg/esp32_sdk/patches/0028-heap-add-prefix-esp_-to-tlsf-to-avoid-conflicts-with.patch new file mode 100644 index 0000000000..6bfac7675f --- /dev/null +++ b/pkg/esp32_sdk/patches/0028-heap-add-prefix-esp_-to-tlsf-to-avoid-conflicts-with.patch @@ -0,0 +1,190 @@ +From 6a80d252810469dd3c6e0bbd4f27de02c90cb12e Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Tue, 11 Mar 2025 02:01:29 +0100 +Subject: [PATCH 28/28] heap: add prefix esp_ to tlsf to avoid conflicts with + tlsf package + +--- + components/heap/multi_heap.c | 58 ++++++++++++++++++------------------ + 1 file changed, 29 insertions(+), 29 deletions(-) + +diff --git a/components/heap/multi_heap.c b/components/heap/multi_heap.c +index d47a6c0a3a..78fc411b74 100644 +--- a/components/heap/multi_heap.c ++++ b/components/heap/multi_heap.c +@@ -15,8 +15,8 @@ + #include "multi_heap.h" + #include "multi_heap_internal.h" + +-#include "tlsf.h" +-#include "tlsf_block_functions.h" ++#include "esp_tlsf.h" ++#include "esp_tlsf_block_functions.h" + + /* Note: Keep platform-specific parts in this header, this source + file should depend on libc only */ +@@ -110,7 +110,7 @@ void multi_heap_in_rom_init(void) + /* Check a block is valid for this heap. Used to verify parameters. */ + __attribute__((noinline)) NOCLONE_ATTR static void assert_valid_block(const heap_t *heap, const multi_heap_block_handle_t block) + { +- pool_t pool = tlsf_get_pool(heap->heap_data); ++ pool_t pool = esp_tlsf_get_pool(heap->heap_data); + void *ptr = block_to_ptr(block); + + MULTI_HEAP_ASSERT((ptr >= pool) && +@@ -125,7 +125,7 @@ void *multi_heap_get_block_address_impl(multi_heap_block_handle_t block) + + size_t multi_heap_get_allocated_size_impl(multi_heap_handle_t heap, void *p) + { +- return tlsf_block_size(p); ++ return esp_tlsf_block_size(p); + } + + multi_heap_handle_t multi_heap_register_impl(void *start_ptr, size_t size) +@@ -142,13 +142,13 @@ multi_heap_handle_t multi_heap_register_impl(void *start_ptr, size_t size) + /* Do not specify any maximum size for the allocations so that the default configuration is used */ + const size_t max_bytes = 0; + +- result->heap_data = tlsf_create_with_pool(start_ptr + sizeof(heap_t), size, max_bytes); ++ result->heap_data = esp_tlsf_create_with_pool(start_ptr + sizeof(heap_t), size, max_bytes); + if(!result->heap_data) { + return NULL; + } + + result->lock = NULL; +- result->free_bytes = size - tlsf_size(result->heap_data); ++ result->free_bytes = size - esp_tlsf_size(result->heap_data); + result->pool_size = size; + result->minimum_free_bytes = result->free_bytes; + return result; +@@ -172,7 +172,7 @@ void multi_heap_internal_unlock(multi_heap_handle_t heap) + multi_heap_block_handle_t multi_heap_get_first_block(multi_heap_handle_t heap) + { + assert(heap != NULL); +- pool_t pool = tlsf_get_pool(heap->heap_data); ++ pool_t pool = esp_tlsf_get_pool(heap->heap_data); + multi_heap_block_handle_t block = offset_to_block(pool, -(int)block_header_overhead); + + return block; +@@ -206,10 +206,10 @@ void *multi_heap_malloc_impl(multi_heap_handle_t heap, size_t size) + + + multi_heap_internal_lock(heap); +- void *result = tlsf_malloc(heap->heap_data, size); ++ void *result = esp_tlsf_malloc(heap->heap_data, size); + if(result) { +- heap->free_bytes -= tlsf_block_size(result); +- heap->free_bytes -= tlsf_alloc_overhead(); ++ heap->free_bytes -= esp_tlsf_block_size(result); ++ heap->free_bytes -= esp_tlsf_alloc_overhead(); + if (heap->free_bytes < heap->minimum_free_bytes) { + heap->minimum_free_bytes = heap->free_bytes; + } +@@ -228,9 +228,9 @@ void multi_heap_free_impl(multi_heap_handle_t heap, void *p) + assert_valid_block(heap, block_from_ptr(p)); + + multi_heap_internal_lock(heap); +- heap->free_bytes += tlsf_block_size(p); +- heap->free_bytes += tlsf_alloc_overhead(); +- tlsf_free(heap->heap_data, p); ++ heap->free_bytes += esp_tlsf_block_size(p); ++ heap->free_bytes += esp_tlsf_alloc_overhead(); ++ esp_tlsf_free(heap->heap_data, p); + multi_heap_internal_unlock(heap); + } + +@@ -249,13 +249,13 @@ void *multi_heap_realloc_impl(multi_heap_handle_t heap, void *p, size_t size) + } + + multi_heap_internal_lock(heap); +- size_t previous_block_size = tlsf_block_size(p); +- void *result = tlsf_realloc(heap->heap_data, p, size); ++ size_t previous_block_size = esp_tlsf_block_size(p); ++ void *result = esp_tlsf_realloc(heap->heap_data, p, size); + if(result) { +- /* No need to subtract the tlsf_alloc_overhead() as it has already ++ /* No need to subtract the esp_tlsf_alloc_overhead() as it has already + * been subtracted when allocating the block at first with malloc */ + heap->free_bytes += previous_block_size; +- heap->free_bytes -= tlsf_block_size(result); ++ heap->free_bytes -= esp_tlsf_block_size(result); + if (heap->free_bytes < heap->minimum_free_bytes) { + heap->minimum_free_bytes = heap->free_bytes; + } +@@ -282,10 +282,10 @@ void *multi_heap_aligned_alloc_impl_offs(multi_heap_handle_t heap, size_t size, + } + + multi_heap_internal_lock(heap); +- void *result = tlsf_memalign_offs(heap->heap_data, alignment, size, offset); ++ void *result = esp_tlsf_memalign_offs(heap->heap_data, alignment, size, offset); + if(result) { +- heap->free_bytes -= tlsf_block_size(result); +- heap->free_bytes -= tlsf_alloc_overhead(); ++ heap->free_bytes -= esp_tlsf_block_size(result); ++ heap->free_bytes -= esp_tlsf_alloc_overhead(); + if(heap->free_bytes < heap->minimum_free_bytes) { + heap->minimum_free_bytes = heap->free_bytes; + } +@@ -322,7 +322,7 @@ static bool g_print_errors = false; + * + * @return bool: true if the the memory is not corrupted, false if the memory if corrupted. + */ +-bool tlsf_check_hook(void *start, size_t size, bool is_free) ++bool esp_tlsf_check_hook(void *start, size_t size, bool is_free) + { + return multi_heap_internal_check_block_poisoning(start, size, is_free, g_print_errors); + } +@@ -341,11 +341,11 @@ bool multi_heap_check(multi_heap_handle_t heap, bool print_errors) + (void) print_errors; + #endif + +- if(tlsf_check(heap->heap_data)) { ++ if(esp_tlsf_check(heap->heap_data)) { + valid = false; + } + +- if(tlsf_check_pool(tlsf_get_pool(heap->heap_data))) { ++ if(esp_tlsf_check_pool(esp_tlsf_get_pool(heap->heap_data))) { + valid = false; + } + +@@ -366,7 +366,7 @@ void multi_heap_dump(multi_heap_handle_t heap) + + multi_heap_internal_lock(heap); + MULTI_HEAP_STDERR_PRINTF("Showing data for heap: %p \n", (void *)heap); +- tlsf_walk_pool(tlsf_get_pool(heap->heap_data), multi_heap_dump_tlsf, NULL); ++ esp_tlsf_walk_pool(esp_tlsf_get_pool(heap->heap_data), multi_heap_dump_tlsf, NULL); + multi_heap_internal_unlock(heap); + } + +@@ -417,14 +417,14 @@ void multi_heap_get_info_impl(multi_heap_handle_t heap, multi_heap_info_t *info) + } + + multi_heap_internal_lock(heap); +- tlsf_walk_pool(tlsf_get_pool(heap->heap_data), multi_heap_get_info_tlsf, info); ++ esp_tlsf_walk_pool(esp_tlsf_get_pool(heap->heap_data), multi_heap_get_info_tlsf, info); + /* TLSF has an overhead per block. Calculate the total amount of overhead, it shall not be + * part of the allocated bytes */ +- overhead = info->allocated_blocks * tlsf_alloc_overhead(); +- info->total_allocated_bytes = (heap->pool_size - tlsf_size(heap->heap_data)) - heap->free_bytes - overhead; ++ overhead = info->allocated_blocks * esp_tlsf_alloc_overhead(); ++ info->total_allocated_bytes = (heap->pool_size - esp_tlsf_size(heap->heap_data)) - heap->free_bytes - overhead; + info->minimum_free_bytes = heap->minimum_free_bytes; + info->total_free_bytes = heap->free_bytes; +- info->largest_free_block = tlsf_fit_size(heap->heap_data, info->largest_free_block); ++ info->largest_free_block = esp_tlsf_fit_size(heap->heap_data, info->largest_free_block); + multi_heap_internal_unlock(heap); + } + +@@ -433,7 +433,7 @@ void multi_heap_walk(multi_heap_handle_t heap, multi_heap_walker_cb_t walker_fun + assert(heap != NULL); + + multi_heap_internal_lock(heap); +- tlsf_walk_pool(tlsf_get_pool(heap->heap_data), walker_func, user_data); ++ esp_tlsf_walk_pool(esp_tlsf_get_pool(heap->heap_data), walker_func, user_data); + multi_heap_internal_unlock(heap); + } + +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0029-hal-uart_types-avoid-type-conflicts-with-RIOT-uart-t.patch b/pkg/esp32_sdk/patches/0029-hal-uart_types-avoid-type-conflicts-with-RIOT-uart-t.patch new file mode 100644 index 0000000000..356f7e5169 --- /dev/null +++ b/pkg/esp32_sdk/patches/0029-hal-uart_types-avoid-type-conflicts-with-RIOT-uart-t.patch @@ -0,0 +1,43 @@ +From 4b83c7a4d753d57ab44964be762068ab8a6560fd Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Tue, 25 Mar 2025 14:12:40 +0100 +Subject: [PATCH 29/29] hal/uart_types: avoid type conflicts with RIOT uart + types + +--- + components/hal/include/hal/uart_types.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/components/hal/include/hal/uart_types.h b/components/hal/include/hal/uart_types.h +index b97944abea..7f14ea6f9d 100644 +--- a/components/hal/include/hal/uart_types.h ++++ b/components/hal/include/hal/uart_types.h +@@ -61,6 +61,7 @@ typedef enum { + UART_DATA_BITS_MAX = 0x4, + } uart_word_length_t; + ++#ifndef HAVE_UART_STOP_BITS_T + /** + * @brief UART stop bits number + */ +@@ -70,7 +71,9 @@ typedef enum { + UART_STOP_BITS_2 = 0x3, /*!< stop bit: 2bits*/ + UART_STOP_BITS_MAX = 0x4, + } uart_stop_bits_t; ++#endif + ++#ifndef HAVE_UART_PARITY_T + /** + * @brief UART parity constants + */ +@@ -79,6 +82,7 @@ typedef enum { + UART_PARITY_EVEN = 0x2, /*!< Enable UART even parity*/ + UART_PARITY_ODD = 0x3 /*!< Enable UART odd parity*/ + } uart_parity_t; ++#endif + + /** + * @brief UART hardware flow control modes +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch b/pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch deleted file mode 100644 index 2a8ecc0521..0000000000 --- a/pkg/esp32_sdk/patches/0029-nfs_flash-include-stddef.h-for-size_t-deklaration.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 0e52f50f9c53eac78f5c70aed1f140b8ba3a3031 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 4 Apr 2023 09:55:45 +0200 -Subject: [PATCH 29/29] nfs_flash: include stddef.h for size_t deklaration - ---- - components/nvs_flash/src/intrusive_list.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/components/nvs_flash/src/intrusive_list.h b/components/nvs_flash/src/intrusive_list.h -index bb580502ec7..695020c415f 100644 ---- a/components/nvs_flash/src/intrusive_list.h -+++ b/components/nvs_flash/src/intrusive_list.h -@@ -14,6 +14,7 @@ - #ifndef intrusive_list_h - #define intrusive_list_h - -+#include - #include - #include - --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch b/pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch deleted file mode 100644 index cde309f996..0000000000 --- a/pkg/esp32_sdk/patches/0030-bt-controller-esp32s3-fix-return-types-in-functions.patch +++ /dev/null @@ -1,141 +0,0 @@ -From e175ea4902cebfdd5b4edc470feff2dadbec408a Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Wed, 5 Apr 2023 01:17:12 +0200 -Subject: [PATCH 30/30] bt/controller/esp32s3: fix return types in functions - -Since the size of int and int32_t is the same, changing int to int32_t and vise versa to fix the compilation issue due to function declaration conflict isn't any risk. ---- - components/bt/controller/esp32s3/bt.c | 52 +++++++++++++-------------- - 1 file changed, 26 insertions(+), 26 deletions(-) - -diff --git a/components/bt/controller/esp32s3/bt.c b/components/bt/controller/esp32s3/bt.c -index 64e10ad4a70..ee68c6b834b 100644 ---- a/components/bt/controller/esp32s3/bt.c -+++ b/components/bt/controller/esp32s3/bt.c -@@ -268,7 +268,7 @@ extern char _bt_tmp_bss_end; - */ - static void interrupt_set_wrapper(int32_t cpu_no, int32_t intr_source, int32_t intr_num, int32_t intr_prio); - static void interrupt_clear_wrapper(int32_t intr_source, int32_t intr_num); --static void interrupt_handler_set_wrapper(int n, void *fn, void *arg); -+static void interrupt_handler_set_wrapper(int32_t n, void *fn, void *arg); - static void IRAM_ATTR interrupt_disable(void); - static void IRAM_ATTR interrupt_restore(void); - static void IRAM_ATTR task_yield_from_isr(void); -@@ -486,28 +486,28 @@ static void semphr_delete_wrapper(void *semphr) - vSemaphoreDelete(semphr); - } - --static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw) -+static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw) - { -- return (int)xSemaphoreTakeFromISR(semphr, hptw); -+ return xSemaphoreTakeFromISR(semphr, hptw); - } - --static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw) -+static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw) - { -- return (int)xSemaphoreGiveFromISR(semphr, hptw); -+ return xSemaphoreGiveFromISR(semphr, hptw); - } - --static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms) -+static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms) - { - if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) { -- return (int)xSemaphoreTake(semphr, portMAX_DELAY); -+ return xSemaphoreTake(semphr, portMAX_DELAY); - } else { -- return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS); -+ return xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS); - } - } - --static int semphr_give_wrapper(void *semphr) -+static int32_t semphr_give_wrapper(void *semphr) - { -- return (int)xSemaphoreGive(semphr); -+ return xSemaphoreGive(semphr); - } - - static void *mutex_create_wrapper(void) -@@ -520,14 +520,14 @@ static void mutex_delete_wrapper(void *mutex) - vSemaphoreDelete(mutex); - } - --static int mutex_lock_wrapper(void *mutex) -+static int32_t mutex_lock_wrapper(void *mutex) - { -- return (int)xSemaphoreTake(mutex, portMAX_DELAY); -+ return xSemaphoreTake(mutex, portMAX_DELAY); - } - --static int mutex_unlock_wrapper(void *mutex) -+static int32_t mutex_unlock_wrapper(void *mutex) - { -- return (int)xSemaphoreGive(mutex); -+ return xSemaphoreGive(mutex); - } - - static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size) -@@ -540,37 +540,37 @@ static void queue_delete_wrapper(void *queue) - vQueueDelete(queue); - } - --static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms) -+static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms) - { - if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) { -- return (int)xQueueSend(queue, item, portMAX_DELAY); -+ return xQueueSend(queue, item, portMAX_DELAY); - } else { -- return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS); -+ return xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS); - } - } - --static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw) -+static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw) - { - return (int)xQueueSendFromISR(queue, item, hptw); - } - --static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms) -+static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms) - { - if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) { -- return (int)xQueueReceive(queue, item, portMAX_DELAY); -+ return xQueueReceive(queue, item, portMAX_DELAY); - } else { -- return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS); -+ return xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS); - } - } - --static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw) -+static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw) - { -- return (int)xQueueReceiveFromISR(queue, item, hptw); -+ return xQueueReceiveFromISR(queue, item, hptw); - } - --static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) -+static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) - { -- return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY)); -+ return xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY)); - } - - static void task_delete_wrapper(void *task_handle) -@@ -592,7 +592,7 @@ static void *malloc_internal_wrapper(size_t size) - return p; - } - --static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6]) -+static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]) - { - int ret = esp_read_mac(mac, ESP_MAC_BT); - ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0030-newlib-remove-semaphore.h-to-avoid-conflicts.patch b/pkg/esp32_sdk/patches/0030-newlib-remove-semaphore.h-to-avoid-conflicts.patch new file mode 100644 index 0000000000..4953390610 --- /dev/null +++ b/pkg/esp32_sdk/patches/0030-newlib-remove-semaphore.h-to-avoid-conflicts.patch @@ -0,0 +1,92 @@ +From 415abab5769271f7d68b6c0daae68c54fe411734 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Thu, 10 Apr 2025 00:29:40 +0200 +Subject: [PATCH 30/30] newlib: remove semaphore.h to avoid conflicts + +--- + .../newlib/platform_include/semaphore.h | 73 ------------------- + 1 file changed, 73 deletions(-) + delete mode 100644 components/newlib/platform_include/semaphore.h + +diff --git a/components/newlib/platform_include/semaphore.h b/components/newlib/platform_include/semaphore.h +deleted file mode 100644 +index 31d47d2072..0000000000 +--- a/components/newlib/platform_include/semaphore.h ++++ /dev/null +@@ -1,73 +0,0 @@ +-/* +- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +- * +- * SPDX-License-Identifier: Apache-2.0 +- */ +- +-#pragma once +- +-#include +- +-#ifdef __cplusplus +-extern "C" { +-#endif +- +-typedef unsigned int sem_t; +- +-/** +- * This is the maximum value to which any POSIX semaphore can count on ESP chips. +- */ +-#define SEM_VALUE_MAX 0x7FFF +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- * +- * Must NOT be called if threads are still blocked on semaphore! +- */ +-int sem_destroy(sem_t *sem); +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- * +- * Note that on ESP chips, pshared is ignored. Semaphores can always be shared between FreeRTOS tasks. +- */ +-int sem_init(sem_t *sem, int pshared, unsigned value); +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- * +- * Note that, unlike specified in POSIX, this implementation returns -1 and sets errno to +- * EAGAIN if the semaphore can not be unlocked (posted) due to its value being SEM_VALUE_MAX. +- */ +-int sem_post(sem_t *sem); +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- * +- * Note the following three deviations/issues originating from the underlying FreeRTOS implementation: +- * * The time value passed by abstime will be rounded up to the next FreeRTOS tick. +- * * The actual timeout will happen after the tick the time was rounded to +- * and before the following tick. +- * * It is possible, though unlikely, that the task is preempted directly after the timeout calculation, +- * delaying timeout of the following blocking operating system call by the duration of the preemption. +- */ +-int sem_timedwait(sem_t *semaphore, const struct timespec *abstime); +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- */ +-int sem_trywait(sem_t *sem); +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- */ +-int sem_wait(sem_t *sem); +- +-/** +- * This is a POSIX function, please refer to the POSIX specification for a detailed description. +- */ +-int sem_getvalue(sem_t *sem, int *sval); +- +-#ifdef __cplusplus +-} +-#endif +-- +2.34.1 + diff --git a/pkg/esp32_sdk/patches/0031-driver-sdmmc-avoid-type-definition-conflicts.patch b/pkg/esp32_sdk/patches/0031-driver-sdmmc-avoid-type-definition-conflicts.patch deleted file mode 100644 index cfe293be65..0000000000 --- a/pkg/esp32_sdk/patches/0031-driver-sdmmc-avoid-type-definition-conflicts.patch +++ /dev/null @@ -1,48 +0,0 @@ -From b00693f50e7f4b8239384c7b06ef1dd5a85f2ca9 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 27 Jun 2023 16:24:27 +0200 -Subject: [PATCH 31/31] driver/sdmmc: avoid type definition conflicts - ---- - components/driver/include/driver/sdmmc_types.h | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/components/driver/include/driver/sdmmc_types.h b/components/driver/include/driver/sdmmc_types.h -index cbb796fdbb3..c3d27bec18d 100644 ---- a/components/driver/include/driver/sdmmc_types.h -+++ b/components/driver/include/driver/sdmmc_types.h -@@ -29,6 +29,7 @@ - #include "esp_err.h" - #include "freertos/FreeRTOS.h" - -+#if !defined(RIOT_VERSION) - /** - * Decoded values from SD card Card Specific Data register - */ -@@ -69,6 +70,8 @@ typedef struct { - uint8_t power_class; /*!< Power class used by the card */ - } sdmmc_ext_csd_t; - -+#endif /* !defined(RIOT_VERSION) */ -+ - /** - * SD/MMC command response buffer - */ -@@ -160,6 +163,7 @@ typedef struct { - int command_timeout_ms; /*!< timeout, in milliseconds, of a single command. Set to 0 to use the default value. */ - } sdmmc_host_t; - -+#if !defined(RIOT_VERSION) - /** - * SD/MMC card information structure - */ -@@ -185,5 +189,6 @@ typedef struct { - uint32_t reserved : 23; /*!< Reserved for future expansion */ - } sdmmc_card_t; - -+#endif /* !defined(RIOT_VERSION) */ - - #endif // _SDMMC_TYPES_H_ --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0032-hal-gdma-include-stddef.h-for-NULL.patch b/pkg/esp32_sdk/patches/0032-hal-gdma-include-stddef.h-for-NULL.patch deleted file mode 100644 index d9fa59f174..0000000000 --- a/pkg/esp32_sdk/patches/0032-hal-gdma-include-stddef.h-for-NULL.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 5117abbc20cad093f4f8285ecd2dea737df7be23 Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Wed, 2 Aug 2023 13:18:40 +0200 -Subject: [PATCH 32/32] hal/gdma: include stddef.h for NULL - ---- - components/hal/esp32s3/include/hal/gdma_ll.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/components/hal/esp32s3/include/hal/gdma_ll.h b/components/hal/esp32s3/include/hal/gdma_ll.h -index 4035c76934c..a3d1436b9bc 100644 ---- a/components/hal/esp32s3/include/hal/gdma_ll.h -+++ b/components/hal/esp32s3/include/hal/gdma_ll.h -@@ -5,6 +5,7 @@ - */ - #pragma once - -+#include - #include - #include - #include "soc/soc_caps.h" --- -2.34.1 - diff --git a/pkg/esp32_sdk/patches/0033-wpa_supplicant-add-prefix-wpa_-to-sha512_init.patch b/pkg/esp32_sdk/patches/0033-wpa_supplicant-add-prefix-wpa_-to-sha512_init.patch deleted file mode 100644 index c0ba1dde27..0000000000 --- a/pkg/esp32_sdk/patches/0033-wpa_supplicant-add-prefix-wpa_-to-sha512_init.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 241861e24ad628946e3257317549a70c6f90aeec Mon Sep 17 00:00:00 2001 -From: Gunar Schorcht -Date: Tue, 10 Oct 2023 17:54:52 +0200 -Subject: [PATCH 33/33] wpa_supplicant: add prefix wpa_ to sha512_init - -Prefix `_wpa` added to `sha512_init` function of `wpa_suppplicant` to avoid name conflicts with RIOT modules `crypto` and `hashes`. ---- - components/wpa_supplicant/src/crypto/crypto_internal.c | 2 +- - components/wpa_supplicant/src/crypto/sha512-internal.c | 4 ++-- - components/wpa_supplicant/src/crypto/sha512_i.h | 2 +- - 3 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/components/wpa_supplicant/src/crypto/crypto_internal.c b/components/wpa_supplicant/src/crypto/crypto_internal.c -index d1426a8feb7..7ff588cbb40 100644 ---- a/components/wpa_supplicant/src/crypto/crypto_internal.c -+++ b/components/wpa_supplicant/src/crypto/crypto_internal.c -@@ -67,7 +67,7 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, - #endif /* CONFIG_INTERNAL_SHA384 */ - #ifdef CONFIG_INTERNAL_SHA512 - case CRYPTO_HASH_ALG_SHA512: -- sha512_init(&ctx->u.sha512); -+ wpa_sha512_init(&ctx->u.sha512); - break; - #endif /* CONFIG_INTERNAL_SHA512 */ - case CRYPTO_HASH_ALG_HMAC_MD5: -diff --git a/components/wpa_supplicant/src/crypto/sha512-internal.c b/components/wpa_supplicant/src/crypto/sha512-internal.c -index c0263941c12..1e816867faf 100644 ---- a/components/wpa_supplicant/src/crypto/sha512-internal.c -+++ b/components/wpa_supplicant/src/crypto/sha512-internal.c -@@ -27,7 +27,7 @@ int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len, - struct sha512_state ctx; - size_t i; - -- sha512_init(&ctx); -+ wpa_sha512_init(&ctx); - for (i = 0; i < num_elem; i++) - if (sha512_process(&ctx, addr[i], len[i])) - return -1; -@@ -161,7 +161,7 @@ static int sha512_compress(struct sha512_state *md, unsigned char *buf) - @param md The hash state you wish to initialize - @return CRYPT_OK if successful - */ --void sha512_init(struct sha512_state *md) -+void wpa_sha512_init(struct sha512_state *md) - { - md->curlen = 0; - md->length = 0; -diff --git a/components/wpa_supplicant/src/crypto/sha512_i.h b/components/wpa_supplicant/src/crypto/sha512_i.h -index 108958911ef..e451e48fcfd 100644 ---- a/components/wpa_supplicant/src/crypto/sha512_i.h -+++ b/components/wpa_supplicant/src/crypto/sha512_i.h -@@ -17,7 +17,7 @@ struct sha512_state { - u8 buf[SHA512_BLOCK_SIZE]; - }; - --void sha512_init(struct sha512_state *md); -+void wpa_sha512_init(struct sha512_state *md); - int sha512_process(struct sha512_state *md, const unsigned char *in, - unsigned long inlen); - int sha512_done(struct sha512_state *md, unsigned char *out); --- -2.34.1 diff --git a/pkg/esp32_sdk/patches/0034-components-efuse-fix-incorrect-forward-declaration.patch b/pkg/esp32_sdk/patches/0034-components-efuse-fix-incorrect-forward-declaration.patch deleted file mode 100644 index b002a6ffbe..0000000000 --- a/pkg/esp32_sdk/patches/0034-components-efuse-fix-incorrect-forward-declaration.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 2957d710a61c11d20e9f9fea10a8fb5d7ef94e15 Mon Sep 17 00:00:00 2001 -From: Marian Buschsieweke -Date: Tue, 13 Feb 2024 13:31:10 +0100 -Subject: [PATCH] components/efuse: fix incorrect forward declaration - ---- - components/efuse/private_include/esp_efuse_utility.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/components/efuse/private_include/esp_efuse_utility.h b/components/efuse/private_include/esp_efuse_utility.h -index 3016d55d..630a3a32 100644 ---- a/components/efuse/private_include/esp_efuse_utility.h -+++ b/components/efuse/private_include/esp_efuse_utility.h -@@ -119,7 +119,7 @@ uint32_t esp_efuse_utility_read_reg(esp_efuse_block_t blk, unsigned int num_reg) - /** - * @brief Writing efuse register with checking of repeated programming of programmed bits. - */ --esp_err_t esp_efuse_utility_write_reg(unsigned int num_reg, esp_efuse_block_t efuse_block, uint32_t reg_to_write); -+esp_err_t esp_efuse_utility_write_reg(esp_efuse_block_t efuse_block, unsigned int num_reg, uint32_t reg_to_write); - - /* @brief Reset efuse write registers - * --- -2.43.1 - diff --git a/pkg/esp32_sdk/patches/0034-wpa_supplicant-add-prefix-wpa_-to-sha384_init.patch b/pkg/esp32_sdk/patches/0034-wpa_supplicant-add-prefix-wpa_-to-sha384_init.patch deleted file mode 100644 index 9ec181f232..0000000000 --- a/pkg/esp32_sdk/patches/0034-wpa_supplicant-add-prefix-wpa_-to-sha384_init.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 1a3bd2c8020d9d8e36312f0a64adf9d3bf45f462 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mikolai=20G=C3=BCtschow?= -Date: Fri, 22 Mar 2024 07:54:19 +0100 -Subject: [PATCH] wpa_supplicant: add prefix wpa_ to sha384_init - -Prefix `wpa_` added to `sha384_init` function of `wpa_suppplicant` to avoid name conflicts with RIOT module `sys/hashes`. ---- - components/wpa_supplicant/src/crypto/crypto_internal.c | 2 +- - components/wpa_supplicant/src/crypto/sha384-internal.c | 4 ++-- - components/wpa_supplicant/src/crypto/sha384_i.h | 2 +- - 3 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/components/wpa_supplicant/src/crypto/crypto_internal.c b/components/wpa_supplicant/src/crypto/crypto_internal.c -index 7ff588cb..bda80730 100644 ---- a/components/wpa_supplicant/src/crypto/crypto_internal.c -+++ b/components/wpa_supplicant/src/crypto/crypto_internal.c -@@ -62,7 +62,7 @@ struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key, - #endif /* CONFIG_SHA256 */ - #ifdef CONFIG_INTERNAL_SHA384 - case CRYPTO_HASH_ALG_SHA384: -- sha384_init(&ctx->u.sha384); -+ wpa_sha384_init(&ctx->u.sha384); - break; - #endif /* CONFIG_INTERNAL_SHA384 */ - #ifdef CONFIG_INTERNAL_SHA512 -diff --git a/components/wpa_supplicant/src/crypto/sha384-internal.c b/components/wpa_supplicant/src/crypto/sha384-internal.c -index 646f7297..5cefa825 100644 ---- a/components/wpa_supplicant/src/crypto/sha384-internal.c -+++ b/components/wpa_supplicant/src/crypto/sha384-internal.c -@@ -27,7 +27,7 @@ int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, - struct sha384_state ctx; - size_t i; - -- sha384_init(&ctx); -+ wpa_sha384_init(&ctx); - for (i = 0; i < num_elem; i++) - if (sha384_process(&ctx, addr[i], len[i])) - return -1; -@@ -49,7 +49,7 @@ int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len, - @param md The hash state you wish to initialize - @return CRYPT_OK if successful - */ --void sha384_init(struct sha384_state *md) -+void wpa_sha384_init(struct sha384_state *md) - { - md->curlen = 0; - md->length = 0; -diff --git a/components/wpa_supplicant/src/crypto/sha384_i.h b/components/wpa_supplicant/src/crypto/sha384_i.h -index a00253ff..57860bdf 100644 ---- a/components/wpa_supplicant/src/crypto/sha384_i.h -+++ b/components/wpa_supplicant/src/crypto/sha384_i.h -@@ -15,7 +15,7 @@ - - #define sha384_state sha512_state - --void sha384_init(struct sha384_state *md); -+void wpa_sha384_init(struct sha384_state *md); - int sha384_process(struct sha384_state *md, const unsigned char *in, - unsigned long inlen); - int sha384_done(struct sha384_state *md, unsigned char *out); --- -2.39.2 - diff --git a/pkg/esp32_sdk/patches/0035-components-wpa_supplicant-add-missing-include.patch b/pkg/esp32_sdk/patches/0035-components-wpa_supplicant-add-missing-include.patch deleted file mode 100644 index f8b88f2678..0000000000 --- a/pkg/esp32_sdk/patches/0035-components-wpa_supplicant-add-missing-include.patch +++ /dev/null @@ -1,24 +0,0 @@ -From a9d2537cb0a3f0967588b625f44a32dcdef2af52 Mon Sep 17 00:00:00 2001 -From: Marian Buschsieweke -Date: Sat, 1 Jun 2024 09:31:50 +0200 -Subject: [PATCH] components/wpa_supplicant: add missing include - ---- - components/wpa_supplicant/port/include/os.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/components/wpa_supplicant/port/include/os.h b/components/wpa_supplicant/port/include/os.h -index d00bd6f6..5a67c4e3 100644 ---- a/components/wpa_supplicant/port/include/os.h -+++ b/components/wpa_supplicant/port/include/os.h -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - #include "esp_err.h" - #include "supplicant_opt.h" - --- -2.45.1 - diff --git a/pkg/esp32_sdk/patches/0036-components-fix-calls-to-calloc.patch b/pkg/esp32_sdk/patches/0036-components-fix-calls-to-calloc.patch deleted file mode 100644 index 89179020d9..0000000000 --- a/pkg/esp32_sdk/patches/0036-components-fix-calls-to-calloc.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 3062316cd717b4df3099f40587e37c133195e9ca Mon Sep 17 00:00:00 2001 -From: Marian Buschsieweke -Date: Sat, 1 Jun 2024 09:59:40 +0200 -Subject: [PATCH] components: fix calls to calloc() - -The first argument is the number of array members, the second the -member size, not the other way round. - -This fixes compilation with `-Werror=calloc-transposed-args` ---- - components/app_update/esp_ota_ops.c | 2 +- - components/esp_hw_support/port/esp32/esp_himem.c | 10 +++++----- - components/esp_phy/src/phy_init.c | 2 +- - components/spi_flash/partition.c | 4 ++-- - 4 files changed, 9 insertions(+), 9 deletions(-) - -diff --git a/components/app_update/esp_ota_ops.c b/components/app_update/esp_ota_ops.c -index c81dff19..664dd7b3 100644 ---- a/components/app_update/esp_ota_ops.c -+++ b/components/app_update/esp_ota_ops.c -@@ -156,7 +156,7 @@ esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp - } - } - -- new_entry = (ota_ops_entry_t *) calloc(sizeof(ota_ops_entry_t), 1); -+ new_entry = (ota_ops_entry_t *) calloc(1, sizeof(ota_ops_entry_t)); - if (new_entry == NULL) { - return ESP_ERR_NO_MEM; - } -diff --git a/components/esp_hw_support/port/esp32/esp_himem.c b/components/esp_hw_support/port/esp32/esp_himem.c -index 061b2661..45d07f6e 100644 ---- a/components/esp_hw_support/port/esp32/esp_himem.c -+++ b/components/esp_hw_support/port/esp32/esp_himem.c -@@ -144,8 +144,8 @@ void __attribute__((constructor)) esp_himem_init(void) - int paddr_end = maxram; - s_ramblockcnt = ((paddr_end - paddr_start) / CACHE_BLOCKSIZE); - //Allocate data structures -- s_ram_descriptor = calloc(sizeof(ramblock_t), s_ramblockcnt); -- s_range_descriptor = calloc(sizeof(rangeblock_t), SPIRAM_BANKSWITCH_RESERVE); -+ s_ram_descriptor = calloc(s_ramblockcnt, sizeof(ramblock_t)); -+ s_range_descriptor = calloc(SPIRAM_BANKSWITCH_RESERVE, sizeof(rangeblock_t)); - if (s_ram_descriptor == NULL || s_range_descriptor == NULL) { - ESP_EARLY_LOGE(TAG, "Cannot allocate memory for meta info. Not initializing!"); - free(s_ram_descriptor); -@@ -188,11 +188,11 @@ esp_err_t esp_himem_alloc(size_t size, esp_himem_handle_t *handle_out) - return ESP_ERR_INVALID_SIZE; - } - int blocks = size / CACHE_BLOCKSIZE; -- esp_himem_ramdata_t *r = calloc(sizeof(esp_himem_ramdata_t), 1); -+ esp_himem_ramdata_t *r = calloc(1, sizeof(esp_himem_ramdata_t)); - if (!r) { - goto nomem; - } -- r->block = calloc(sizeof(uint16_t), blocks); -+ r->block = calloc(blocks, sizeof(uint16_t)); - if (!r->block) { - goto nomem; - } -@@ -239,7 +239,7 @@ esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle - ESP_RETURN_ON_FALSE(s_ram_descriptor != NULL, ESP_ERR_INVALID_STATE, TAG, "Himem not available!"); - ESP_RETURN_ON_FALSE(size % CACHE_BLOCKSIZE == 0, ESP_ERR_INVALID_SIZE, TAG, "requested size not aligned to blocksize"); - int blocks = size / CACHE_BLOCKSIZE; -- esp_himem_rangedata_t *r = calloc(sizeof(esp_himem_rangedata_t), 1); -+ esp_himem_rangedata_t *r = calloc(1, sizeof(esp_himem_rangedata_t)); - if (!r) { - return ESP_ERR_NO_MEM; - } -diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c -index 5be0fa91..71ece1bb 100644 ---- a/components/esp_phy/src/phy_init.c -+++ b/components/esp_phy/src/phy_init.c -@@ -625,7 +625,7 @@ void esp_phy_load_cal_and_init(void) - phy_eco_version_sel(esp_efuse_get_chip_ver()); - #endif - esp_phy_calibration_data_t* cal_data = -- (esp_phy_calibration_data_t*) calloc(sizeof(esp_phy_calibration_data_t), 1); -+ (esp_phy_calibration_data_t*) calloc(1, sizeof(esp_phy_calibration_data_t)); - if (cal_data == NULL) { - ESP_LOGE(TAG, "failed to allocate memory for RF calibration data"); - abort(); -diff --git a/components/spi_flash/partition.c b/components/spi_flash/partition.c -index d1140ad0..dcd00324 100644 ---- a/components/spi_flash/partition.c -+++ b/components/spi_flash/partition.c -@@ -211,7 +211,7 @@ static esp_err_t load_partitions(void) - #endif - - // allocate new linked list item and populate it with data from partition table -- partition_list_item_t* item = (partition_list_item_t*) calloc(sizeof(partition_list_item_t), 1); -+ partition_list_item_t* item = (partition_list_item_t*) calloc(1, sizeof(partition_list_item_t)); - if (item == NULL) { - err = ESP_ERR_NO_MEM; - break; -@@ -326,7 +326,7 @@ esp_err_t esp_partition_register_external(esp_flash_t* flash_chip, size_t offset - return err; - } - -- partition_list_item_t* item = (partition_list_item_t*) calloc(sizeof(partition_list_item_t), 1); -+ partition_list_item_t* item = (partition_list_item_t*) calloc(1, sizeof(partition_list_item_t)); - if (item == NULL) { - return ESP_ERR_NO_MEM; - } --- -2.45.1 - diff --git a/pkg/esp32_sdk/patches/0037-driver-rtc_io-correct-declaration-of-renamed-functio.patch b/pkg/esp32_sdk/patches/0037-driver-rtc_io-correct-declaration-of-renamed-functio.patch deleted file mode 100644 index 396482f0ea..0000000000 --- a/pkg/esp32_sdk/patches/0037-driver-rtc_io-correct-declaration-of-renamed-functio.patch +++ /dev/null @@ -1,30 +0,0 @@ -From d9443415cc1e10526a265601cd98374988660101 Mon Sep 17 00:00:00 2001 -From: Jongmin Kim -Date: Mon, 14 Apr 2025 15:03:34 +0900 -Subject: [PATCH 1/2] driver/rtc_io: correct declaration of renamed function - rtc_gpio_force_hold_en_all - -The implementation of `rtc_gpio_force_hold_all()` was renamed to`rtc_gpio_force_hold_en_all()` -in the patch `0022-driver-gpio-fix-undefined-reference-to-rtc_gpio_forc.patch`. - -This patch corrects the function declaration to match the renamed implementation. ---- - components/driver/include/driver/rtc_io.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/components/driver/include/driver/rtc_io.h b/components/driver/include/driver/rtc_io.h -index cbf32c4f..766bde11 100644 ---- a/components/driver/include/driver/rtc_io.h -+++ b/components/driver/include/driver/rtc_io.h -@@ -269,7 +269,7 @@ esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num); - * Force hold signal is enabled before going into deep sleep for pins which - * are used for EXT1 wakeup. - */ --esp_err_t rtc_gpio_force_hold_all(void); -+esp_err_t rtc_gpio_force_hold_en_all(void); - - /** - * @brief Disable force hold signal for all RTC IOs --- -2.49.0 - diff --git a/pkg/esp32_sdk/patches/0038-newlib-avoid-sys-uio.h-inclusion-outside-of-RIOT.patch b/pkg/esp32_sdk/patches/0038-newlib-avoid-sys-uio.h-inclusion-outside-of-RIOT.patch deleted file mode 100644 index 3251d5ae91..0000000000 --- a/pkg/esp32_sdk/patches/0038-newlib-avoid-sys-uio.h-inclusion-outside-of-RIOT.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 87cf66f13900f4609ac6e1fa4b4c8046232268bd Mon Sep 17 00:00:00 2001 -From: Jongmin Kim -Date: Mon, 14 Apr 2025 15:08:58 +0900 -Subject: [PATCH 2/2] newlib: avoid sys/uio.h inclusion outside of RIOT - -The RIOT header `` is not available when using the bundled ESP-IDF -outside of RIOT. - -This patch ensures that `` is only included when `RIOT_VERSION` is -defined. ---- - components/newlib/platform_include/sys/uio.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/components/newlib/platform_include/sys/uio.h b/components/newlib/platform_include/sys/uio.h -index 388fed3d..5a8652a7 100644 ---- a/components/newlib/platform_include/sys/uio.h -+++ b/components/newlib/platform_include/sys/uio.h -@@ -6,7 +6,9 @@ - - #pragma once - -+#ifdef RIOT_VERSION - #include_next -+#endif /* RIOT_VERSION */ - - #include - #include --- -2.49.0 - diff --git a/pkg/esp32_sdk/patches/0043-esp_lcd-increase-DMA-buffer-size-for-better-performa.patch b/pkg/esp32_sdk/patches/0043-esp_lcd-increase-DMA-buffer-size-for-better-performa.patch new file mode 100644 index 0000000000..2781c76a11 --- /dev/null +++ b/pkg/esp32_sdk/patches/0043-esp_lcd-increase-DMA-buffer-size-for-better-performa.patch @@ -0,0 +1,26 @@ +From 2765e97f71e5eb00ca2098d87076668a6745ecdf Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Fri, 30 May 2025 16:56:55 +0200 +Subject: [PATCH 43/43] esp_lcd: increase DMA buffer size for better + performance + +--- + components/esp_lcd/priv_include/esp_lcd_common.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/components/esp_lcd/priv_include/esp_lcd_common.h b/components/esp_lcd/priv_include/esp_lcd_common.h +index 64546727ef..5f67bf5a5b 100644 +--- a/components/esp_lcd/priv_include/esp_lcd_common.h ++++ b/components/esp_lcd/priv_include/esp_lcd_common.h +@@ -20,7 +20,7 @@ extern "C" { + #endif + + // size of the internal buffer to transform the data into a proper format (e.g. data endian) +-#define LCD_I80_IO_FORMAT_BUF_SIZE 32 ++#define LCD_I80_IO_FORMAT_BUF_SIZE 512 + + #define LCD_I80_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED + #define LCD_I80_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT +-- +2.34.1 + diff --git a/pkg/esp32_sdk_lib_bt_esp32/Makefile b/pkg/esp32_sdk_lib_bt_esp32/Makefile index 3e5c369c26..8e91b22a33 100644 --- a/pkg/esp32_sdk_lib_bt_esp32/Makefile +++ b/pkg/esp32_sdk_lib_bt_esp32/Makefile @@ -1,7 +1,7 @@ PKG_NAME=esp32_sdk_lib_bt_esp32 PKG_URL=https://github.com/espressif/esp32-bt-lib -# This is a version in the v4.4.1 release branch -PKG_VERSION=b877f7e1fc98dccfcf4dbf31f215c5cb44ec3f0d +# This is a version in the v5.4 release branch +PKG_VERSION=daee36fdcf0ede5a2083f1de230347e6139ba812 PKG_LICENSE=Apache-2.0 include $(RIOTBASE)/pkg/pkg.mk diff --git a/pkg/esp32_sdk_lib_bt_esp32c3/Makefile b/pkg/esp32_sdk_lib_bt_esp32c3/Makefile index f86817589b..58697f6d55 100644 --- a/pkg/esp32_sdk_lib_bt_esp32c3/Makefile +++ b/pkg/esp32_sdk_lib_bt_esp32c3/Makefile @@ -1,7 +1,7 @@ PKG_NAME=esp32_sdk_lib_bt_esp32c3 PKG_URL=https://github.com/espressif/esp32c3-bt-lib -# This is a version in the v4.4.1 release branch -PKG_VERSION=98dcc9591365b5ac486a9f0b474c36bf8c4ca97b +# This is a version in the v5.4 release branch +PKG_VERSION=ed99228396aaa18935b575d600bc19da38dc4746 PKG_LICENSE=Apache-2.0 include $(RIOTBASE)/pkg/pkg.mk diff --git a/pkg/esp32_sdk_lib_coexist/Makefile b/pkg/esp32_sdk_lib_coexist/Makefile new file mode 100644 index 0000000000..52e132606c --- /dev/null +++ b/pkg/esp32_sdk_lib_coexist/Makefile @@ -0,0 +1,10 @@ +PKG_NAME=esp32_sdk_lib_coexist +PKG_URL=https://github.com/espressif/esp-coex-lib +# This is a version in the v5.4 release branch +PKG_VERSION=7b588f2dbb12ddcd46c075dcd041f4d03a59154f +PKG_LICENSE=Apache-2.0 + +include $(RIOTBASE)/pkg/pkg.mk + +# there is nothing to compile +all: diff --git a/pkg/esp32_sdk_lib_coexist/Makefile.dep b/pkg/esp32_sdk_lib_coexist/Makefile.dep new file mode 100644 index 0000000000..607e8707ca --- /dev/null +++ b/pkg/esp32_sdk_lib_coexist/Makefile.dep @@ -0,0 +1,2 @@ +# This package can only be used with the ESP32 CPU +FEATURES_REQUIRED += arch_esp32 diff --git a/pkg/esp32_sdk_lib_coexist/Makefile.include b/pkg/esp32_sdk_lib_coexist/Makefile.include new file mode 100644 index 0000000000..b758de211b --- /dev/null +++ b/pkg/esp32_sdk_lib_coexist/Makefile.include @@ -0,0 +1,3 @@ +export ESP32_SDK_LIB_COEXIST_DIR ?= $(PKGDIRBASE)/esp32_sdk_lib_coexist + +PSEUDOMODULES += esp32_sdk_lib_coexist diff --git a/pkg/esp32_sdk_lib_coexist/doc.md b/pkg/esp32_sdk_lib_coexist/doc.md new file mode 100644 index 0000000000..09733b9c08 --- /dev/null +++ b/pkg/esp32_sdk_lib_coexist/doc.md @@ -0,0 +1,4 @@ +@defgroup pkg_esp32_sdk_lib_coexist ESP32 SDK Coexist Libraries +@ingroup pkg_esp32_sdk +@brief Vendor SDK Coexist Libraries for ESP32 SoC by Espressif +@see https://github.com/espressif/esp-coex-lib diff --git a/pkg/esp32_sdk_lib_phy/Makefile b/pkg/esp32_sdk_lib_phy/Makefile index 99b3973b09..5e5a9de156 100644 --- a/pkg/esp32_sdk_lib_phy/Makefile +++ b/pkg/esp32_sdk_lib_phy/Makefile @@ -1,7 +1,7 @@ PKG_NAME=esp32_sdk_lib_phy PKG_URL=https://github.com/espressif/esp-phy-lib -# This is a version in the v4.4.1 release branch -PKG_VERSION=dcbe6085e0215e2ea6a2e43b1106bdb15807f398 +# This is a version in the v5.4 release branch +PKG_VERSION=f5f852b53c90c2a23bfbd6b9c4897c25f0ae6155 PKG_LICENSE=Apache-2.0 include $(RIOTBASE)/pkg/pkg.mk diff --git a/pkg/esp32_sdk_lib_wifi/Makefile b/pkg/esp32_sdk_lib_wifi/Makefile index 6e481f0d53..c47a85554b 100644 --- a/pkg/esp32_sdk_lib_wifi/Makefile +++ b/pkg/esp32_sdk_lib_wifi/Makefile @@ -1,7 +1,7 @@ PKG_NAME=esp32_sdk_lib_wifi PKG_URL=https://github.com/espressif/esp32-wifi-lib -# This is a version in the v4.4.1 release branch -PKG_VERSION=5a0d2aee49633b1a0c0374c2a01ed8c2a10e2fe4 +# This is a version in the v5.4 release branch +PKG_VERSION=a29b11bf0fe019ca0ade5459714b0b2426dfe020 PKG_LICENSE=Apache-2.0 include $(RIOTBASE)/pkg/pkg.mk diff --git a/pkg/esp32_sdk_mbedtls/Makefile b/pkg/esp32_sdk_mbedtls/Makefile new file mode 100644 index 0000000000..182d1a103f --- /dev/null +++ b/pkg/esp32_sdk_mbedtls/Makefile @@ -0,0 +1,9 @@ +PKG_NAME=esp32_sdk_mbedtls +PKG_URL=https://github.com/espressif/mbedtls.git +PKG_VERSION=98fcfd6d2cea90d306e8fde8e5bffd6087c9cda8 +PKG_LICENSE=Apache-2.0 + +include $(RIOTBASE)/pkg/pkg.mk + +all: + $(QQ)"$(MAKE)" -C $(PKG_SOURCE_DIR) -f $(RIOTBASE)/Makefile.base MODULE=$(PKG_NAME) diff --git a/pkg/esp32_sdk_mbedtls/Makefile.dep b/pkg/esp32_sdk_mbedtls/Makefile.dep new file mode 100644 index 0000000000..607e8707ca --- /dev/null +++ b/pkg/esp32_sdk_mbedtls/Makefile.dep @@ -0,0 +1,2 @@ +# This package can only be used with the ESP32 CPU +FEATURES_REQUIRED += arch_esp32 diff --git a/pkg/esp32_sdk_mbedtls/Makefile.include b/pkg/esp32_sdk_mbedtls/Makefile.include new file mode 100644 index 0000000000..a35aa29cad --- /dev/null +++ b/pkg/esp32_sdk_mbedtls/Makefile.include @@ -0,0 +1,2 @@ +INCLUDES += -I$(PKGDIRBASE)/mbedtls/include +INCLUDES += -I$(PKGDIRBASE)/mbedtls/include/mbedtls diff --git a/pkg/esp32_sdk_mbedtls/doc.md b/pkg/esp32_sdk_mbedtls/doc.md new file mode 100644 index 0000000000..1cd04cb0ed --- /dev/null +++ b/pkg/esp32_sdk_mbedtls/doc.md @@ -0,0 +1,3 @@ +@defgroup pkg_esp32_sdk_mbdetls ESP32x SDK Mbed TLS package +@ingroup pkg +@brief A fork of the Mbed TLS used by the ESP-IDF. diff --git a/pkg/esp32_sdk_tlsf/Makefile b/pkg/esp32_sdk_tlsf/Makefile new file mode 100644 index 0000000000..3f52f40df6 --- /dev/null +++ b/pkg/esp32_sdk_tlsf/Makefile @@ -0,0 +1,11 @@ +PKG_NAME=esp32_sdk_tlsf +PKG_URL=https://github.com/espressif/tlsf +PKG_VERSION=ba64d198a845df70b481e2c55004521ca643dea6 +PKG_LICENSE=BSD + +include $(RIOTBASE)/pkg/pkg.mk + +CFLAGS += -Wno-cast-align + +all: + $(QQ)"$(MAKE)" -C $(PKG_SOURCE_DIR) -f $(RIOTBASE)/Makefile.base MODULE=$(PKG_NAME) diff --git a/pkg/esp32_sdk_tlsf/Makefile.dep b/pkg/esp32_sdk_tlsf/Makefile.dep new file mode 100644 index 0000000000..607e8707ca --- /dev/null +++ b/pkg/esp32_sdk_tlsf/Makefile.dep @@ -0,0 +1,2 @@ +# This package can only be used with the ESP32 CPU +FEATURES_REQUIRED += arch_esp32 diff --git a/pkg/esp32_sdk_tlsf/Makefile.include b/pkg/esp32_sdk_tlsf/Makefile.include new file mode 100644 index 0000000000..db5090443f --- /dev/null +++ b/pkg/esp32_sdk_tlsf/Makefile.include @@ -0,0 +1,2 @@ +INCLUDES += -I$(PKGDIRBASE)/esp32_sdk_tlsf +INCLUDES += -I$(PKGDIRBASE)/esp32_sdk_tlsf/include diff --git a/pkg/esp32_sdk_tlsf/doc.md b/pkg/esp32_sdk_tlsf/doc.md new file mode 100644 index 0000000000..cd8afa29c1 --- /dev/null +++ b/pkg/esp32_sdk_tlsf/doc.md @@ -0,0 +1,3 @@ +@defgroup pkg_esp32_sdk_tls ESP32x SDK Two-Level Segregated Fit memory allocator +@ingroup pkg +@brief A fork of the TLSF library used by the ESP-IDF. diff --git a/pkg/esp32_sdk_tlsf/patches/0001-add-prefix-esp_-to-functions-to-avoid-conflicts-with.patch b/pkg/esp32_sdk_tlsf/patches/0001-add-prefix-esp_-to-functions-to-avoid-conflicts-with.patch new file mode 100644 index 0000000000..c1269180c2 --- /dev/null +++ b/pkg/esp32_sdk_tlsf/patches/0001-add-prefix-esp_-to-functions-to-avoid-conflicts-with.patch @@ -0,0 +1,1287 @@ +From e49e678b04d7557142fcabadbab0b24502f5076c Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Tue, 11 Mar 2025 02:08:56 +0100 +Subject: [PATCH 1/2] add prefix esp_ to functions to avoid conflicts with tlsf + package + +--- + include/tlsf.h | 48 ++++----- + tlsf.c | 226 +++++++++++++++++++-------------------- + tlsf_block_functions.h | 36 +++---- + tlsf_control_functions.h | 162 ++++++++++++++-------------- + 4 files changed, 236 insertions(+), 236 deletions(-) + +diff --git a/include/tlsf.h b/include/tlsf.h +index 94bd67a..f4dfc08 100644 +--- a/include/tlsf.h ++++ b/include/tlsf.h +@@ -15,36 +15,36 @@ + extern "C" { + #endif + +-/* tlsf_t: a TLSF structure. Can contain 1 to N pools. */ ++/* esp_tlsf_t: a TLSF structure. Can contain 1 to N pools. */ + /* pool_t: a block of memory that TLSF can manage. */ +-typedef void* tlsf_t; ++typedef void* esp_tlsf_t; + typedef void* pool_t; + + /* Create/destroy a memory pool. */ +-tlsf_t tlsf_create(void* mem, size_t max_bytes); +-tlsf_t tlsf_create_with_pool(void* mem, size_t pool_bytes, size_t max_bytes); +-void tlsf_destroy(tlsf_t tlsf); +-pool_t tlsf_get_pool(tlsf_t tlsf); ++esp_tlsf_t esp_tlsf_create(void* mem, size_t max_bytes); ++esp_tlsf_t esp_tlsf_create_with_pool(void* mem, size_t pool_bytes, size_t max_bytes); ++void esp_tlsf_destroy(esp_tlsf_t tlsf); ++pool_t esp_tlsf_get_pool(esp_tlsf_t tlsf); + + /* Add/remove memory pools. */ +-pool_t tlsf_add_pool(tlsf_t tlsf, void* mem, size_t bytes); +-void tlsf_remove_pool(tlsf_t tlsf, pool_t pool); ++pool_t esp_tlsf_add_pool(esp_tlsf_t tlsf, void* mem, size_t bytes); ++void esp_tlsf_remove_pool(esp_tlsf_t tlsf, pool_t pool); + + /* malloc/memalign/realloc/free replacements. */ +-void* tlsf_malloc(tlsf_t tlsf, size_t size); +-void* tlsf_memalign(tlsf_t tlsf, size_t align, size_t size); +-void* tlsf_memalign_offs(tlsf_t tlsf, size_t align, size_t size, size_t offset); +-void* tlsf_malloc_addr(tlsf_t tlsf, size_t size, void *address); +-void* tlsf_realloc(tlsf_t tlsf, void* ptr, size_t size); +-void tlsf_free(tlsf_t tlsf, void* ptr); ++void* esp_tlsf_malloc(esp_tlsf_t tlsf, size_t size); ++void* esp_tlsf_memalign(esp_tlsf_t tlsf, size_t align, size_t size); ++void* esp_tlsf_memalign_offs(esp_tlsf_t tlsf, size_t align, size_t size, size_t offset); ++void* esp_tlsf_malloc_addr(esp_tlsf_t tlsf, size_t size, void *address); ++void* esp_tlsf_realloc(esp_tlsf_t tlsf, void* ptr, size_t size); ++void esp_tlsf_free(esp_tlsf_t tlsf, void* ptr); + + /* Returns internal block size, not original request size */ +-size_t tlsf_block_size(void* ptr); ++size_t esp_tlsf_block_size(void* ptr); + + /* Overheads/limits of internal structures. */ +-size_t tlsf_size(tlsf_t tlsf); +-size_t tlsf_pool_overhead(void); +-size_t tlsf_alloc_overhead(void); ++size_t esp_tlsf_size(esp_tlsf_t tlsf); ++size_t esp_tlsf_pool_overhead(void); ++size_t esp_tlsf_alloc_overhead(void); + + /** + * @brief Return the allocable size based on the size passed +@@ -54,14 +54,14 @@ size_t tlsf_alloc_overhead(void); + * @param size The allocation size + * @return size_t The updated allocation size + */ +-size_t tlsf_fit_size(tlsf_t tlsf, size_t size); ++size_t esp_tlsf_fit_size(esp_tlsf_t tlsf, size_t size); + + /* Debugging. */ +-typedef bool (*tlsf_walker)(void* ptr, size_t size, int used, void* user); +-void tlsf_walk_pool(pool_t pool, tlsf_walker walker, void* user); ++typedef bool (*esp_tlsf_walker)(void* ptr, size_t size, int used, void* user); ++void esp_tlsf_walk_pool(pool_t pool, esp_tlsf_walker walker, void* user); + /* Returns nonzero if any internal consistency check fails. */ +-int tlsf_check(tlsf_t tlsf); +-int tlsf_check_pool(pool_t pool); ++int esp_tlsf_check(esp_tlsf_t tlsf); ++int esp_tlsf_check_pool(pool_t pool); + + /** + * @brief Weak function called on every free block of memory allowing the user to implement +@@ -74,7 +74,7 @@ int tlsf_check_pool(pool_t pool); + * @return true The checks found no inconsistency in the memory + * @return false The checks in the function highlighted an inconsistency in the memory + */ +-__attribute__((weak)) bool tlsf_check_hook(void *start, size_t size, bool is_free); ++__attribute__((weak)) bool esp_tlsf_check_hook(void *start, size_t size, bool is_free); + + #if defined(__cplusplus) + }; +diff --git a/tlsf.c b/tlsf.c +index 23c5aa3..1866a61 100644 +--- a/tlsf.c ++++ b/tlsf.c +@@ -15,15 +15,15 @@ + ** Static assertion mechanism. + */ + +-#define _tlsf_glue2(x, y) x ## y +-#define _tlsf_glue(x, y) _tlsf_glue2(x, y) +-#define tlsf_static_assert(exp) \ +- typedef char _tlsf_glue(static_assert, __LINE__) [(exp) ? 1 : -1] ++#define _esp_tlsf_glue2(x, y) x ## y ++#define _esp_tlsf_glue(x, y) _esp_tlsf_glue2(x, y) ++#define esp_tlsf_static_assert(exp) \ ++ typedef char _esp_tlsf_glue(static_assert, __LINE__) [(exp) ? 1 : -1] + + /* This code has been tested on 32- and 64-bit (LP/LLP) architectures. */ +-tlsf_static_assert(sizeof(int) * CHAR_BIT == 32); +-tlsf_static_assert(sizeof(size_t) * CHAR_BIT >= 32); +-tlsf_static_assert(sizeof(size_t) * CHAR_BIT <= 64); ++esp_tlsf_static_assert(sizeof(int) * CHAR_BIT == 32); ++esp_tlsf_static_assert(sizeof(size_t) * CHAR_BIT >= 32); ++esp_tlsf_static_assert(sizeof(size_t) * CHAR_BIT <= 64); + + /* Clear structure and point all empty lists at the null block. */ + static control_t* control_construct(control_t* control, size_t bytes) +@@ -71,11 +71,11 @@ static control_t* control_construct(control_t* control, size_t bytes) + + + /* SL_INDEX_COUNT must be <= number of bits in sl_bitmap's storage type. */ +- tlsf_assert(sizeof(unsigned int) * CHAR_BIT >= control->sl_index_count ++ esp_tlsf_assert(sizeof(unsigned int) * CHAR_BIT >= control->sl_index_count + && "CHAR_BIT less than sl_index_count"); + + /* Ensure we've properly tuned our sizes. */ +- tlsf_assert(ALIGN_SIZE == control->small_block_size / control->sl_index_count); //ALIGN_SIZE does not match"); ++ esp_tlsf_assert(ALIGN_SIZE == control->small_block_size / control->sl_index_count); //ALIGN_SIZE does not match"); + + for (int i = 0; i < control->fl_index_count; ++i) + { +@@ -99,21 +99,21 @@ typedef struct integrity_t + int status; + } integrity_t; + +-#define tlsf_insist(x) { if (!(x)) { status--; } } ++#define esp_tlsf_insist(x) { if (!(x)) { status--; } } + + static bool integrity_walker(void* ptr, size_t size, int used, void* user) + { + block_header_t* block = block_from_ptr(ptr); +- integrity_t* integ = tlsf_cast(integrity_t*, user); ++ integrity_t* integ = esp_tlsf_cast(integrity_t*, user); + const int this_prev_status = block_is_prev_free(block) ? 1 : 0; + const int this_status = block_is_free(block) ? 1 : 0; + const size_t this_block_size = block_size(block); + + int status = 0; +- tlsf_insist(integ->prev_status == this_prev_status && "prev status incorrect"); +- tlsf_insist(size == this_block_size && "block size incorrect"); ++ esp_tlsf_insist(integ->prev_status == this_prev_status && "prev status incorrect"); ++ esp_tlsf_insist(size == this_block_size && "block size incorrect"); + +- if (tlsf_check_hook != NULL) ++ if (esp_tlsf_check_hook != NULL) + { + /* block_size(block) returns the size of the usable memory when the block is allocated. + * As the block under test is free, we need to subtract to the block size the next_free +@@ -128,7 +128,7 @@ static bool integrity_walker(void* ptr, size_t size, int used, void* user) + void* ptr_block = used ? (void*)block + block_start_offset : + (void*)block + sizeof(block_header_t); + +- tlsf_insist(tlsf_check_hook(ptr_block, actual_free_block_size, !used)); ++ esp_tlsf_insist(esp_tlsf_check_hook(ptr_block, actual_free_block_size, !used)); + } + + integ->prev_status = this_status; +@@ -138,11 +138,11 @@ static bool integrity_walker(void* ptr, size_t size, int used, void* user) + } + + +-int tlsf_check(tlsf_t tlsf) ++int esp_tlsf_check(esp_tlsf_t tlsf) + { + int i, j; + +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + int status = 0; + + /* Check that the free lists and bitmaps are accurate. */ +@@ -158,31 +158,31 @@ int tlsf_check(tlsf_t tlsf) + /* Check that first- and second-level lists agree. */ + if (!fl_map) + { +- tlsf_insist(!sl_map && "second-level map must be null"); ++ esp_tlsf_insist(!sl_map && "second-level map must be null"); + } + + if (!sl_map) + { +- tlsf_insist(block == &control->block_null && "block list must be null"); ++ esp_tlsf_insist(block == &control->block_null && "block list must be null"); + continue; + } + + /* Check that there is at least one free block. */ +- tlsf_insist(sl_list && "no free blocks in second-level map"); +- tlsf_insist(block != &control->block_null && "block should not be null"); ++ esp_tlsf_insist(sl_list && "no free blocks in second-level map"); ++ esp_tlsf_insist(block != &control->block_null && "block should not be null"); + + while (block != &control->block_null) + { + int fli, sli; + const bool is_block_free = block_is_free(block); +- tlsf_insist(is_block_free && "block should be free"); +- tlsf_insist(!block_is_prev_free(block) && "blocks should have coalesced"); +- tlsf_insist(!block_is_free(block_next(block)) && "blocks should have coalesced"); +- tlsf_insist(block_is_prev_free(block_next(block)) && "block should be free"); +- tlsf_insist(block_size(block) >= block_size_min && "block not minimum size"); ++ esp_tlsf_insist(is_block_free && "block should be free"); ++ esp_tlsf_insist(!block_is_prev_free(block) && "blocks should have coalesced"); ++ esp_tlsf_insist(!block_is_free(block_next(block)) && "blocks should have coalesced"); ++ esp_tlsf_insist(block_is_prev_free(block_next(block)) && "block should be free"); ++ esp_tlsf_insist(block_size(block) >= block_size_min && "block not minimum size"); + + mapping_insert(control, block_size(block), &fli, &sli); +- tlsf_insist(fli == i && sli == j && "block size indexed in wrong list"); ++ esp_tlsf_insist(fli == i && sli == j && "block size indexed in wrong list"); + + block = block->next_free; + } +@@ -192,7 +192,7 @@ int tlsf_check(tlsf_t tlsf) + return status; + } + +-#undef tlsf_insist ++#undef esp_tlsf_insist + + static bool default_walker(void* ptr, size_t size, int used, void* user) + { +@@ -201,9 +201,9 @@ static bool default_walker(void* ptr, size_t size, int used, void* user) + return true; + } + +-void tlsf_walk_pool(pool_t pool, tlsf_walker walker, void* user) ++void esp_tlsf_walk_pool(pool_t pool, esp_tlsf_walker walker, void* user) + { +- tlsf_walker pool_walker = walker ? walker : default_walker; ++ esp_tlsf_walker pool_walker = walker ? walker : default_walker; + block_header_t* block = + offset_to_block(pool, -(int)block_header_overhead); + +@@ -222,7 +222,7 @@ void tlsf_walk_pool(pool_t pool, tlsf_walker walker, void* user) + } + } + +-size_t tlsf_block_size(void* ptr) ++size_t esp_tlsf_block_size(void* ptr) + { + size_t size = 0; + if (ptr) +@@ -233,22 +233,22 @@ size_t tlsf_block_size(void* ptr) + return size; + } + +-int tlsf_check_pool(pool_t pool) ++int esp_tlsf_check_pool(pool_t pool) + { + /* Check that the blocks are physically correct. */ + integrity_t integ = { 0, 0 }; +- tlsf_walk_pool(pool, integrity_walker, &integ); ++ esp_tlsf_walk_pool(pool, integrity_walker, &integ); + + return integ.status; + } + +-size_t tlsf_fit_size(tlsf_t tlsf, size_t size) ++size_t esp_tlsf_fit_size(esp_tlsf_t tlsf, size_t size) + { + if (size == 0 || tlsf == NULL) { + return 0; + } + +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + if (size < control->small_block_size) { + return adjust_request_size(tlsf, size, ALIGN_SIZE); + } +@@ -261,58 +261,58 @@ size_t tlsf_fit_size(tlsf_t tlsf, size_t size) + + /* + ** Size of the TLSF structures in a given memory block passed to +-** tlsf_create, equal to the size of a control_t ++** esp_tlsf_create, equal to the size of a control_t + */ +-size_t tlsf_size(tlsf_t tlsf) ++size_t esp_tlsf_size(esp_tlsf_t tlsf) + { + if (tlsf == NULL) + { + return 0; + } +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + return control->size; + } + + /* + ** Overhead of the TLSF structures in a given memory block passed to +-** tlsf_add_pool, equal to the overhead of a free block and the ++** esp_tlsf_add_pool, equal to the overhead of a free block and the + ** sentinel block. + */ +-size_t tlsf_pool_overhead(void) ++size_t esp_tlsf_pool_overhead(void) + { + return 2 * block_header_overhead; + } + +-size_t tlsf_alloc_overhead(void) ++size_t esp_tlsf_alloc_overhead(void) + { + return block_header_overhead; + } + +-pool_t tlsf_add_pool(tlsf_t tlsf, void* mem, size_t bytes) ++pool_t esp_tlsf_add_pool(esp_tlsf_t tlsf, void* mem, size_t bytes) + { + block_header_t* block; + block_header_t* next; + +- const size_t pool_overhead = tlsf_pool_overhead(); ++ const size_t pool_overhead = esp_tlsf_pool_overhead(); + const size_t pool_bytes = align_down(bytes - pool_overhead, ALIGN_SIZE); + + if (((ptrdiff_t)mem % ALIGN_SIZE) != 0) + { +- printf("tlsf_add_pool: Memory must be aligned by %u bytes.\n", ++ printf("esp_tlsf_add_pool: Memory must be aligned by %u bytes.\n", + (unsigned int)ALIGN_SIZE); + return 0; + } + +- if (pool_bytes < block_size_min || pool_bytes > tlsf_block_size_max(tlsf)) ++ if (pool_bytes < block_size_min || pool_bytes > esp_tlsf_block_size_max(tlsf)) + { + #if defined (TLSF_64BIT) +- printf("tlsf_add_pool: Memory size must be between 0x%x and 0x%x00 bytes.\n", ++ printf("esp_tlsf_add_pool: Memory size must be between 0x%x and 0x%x00 bytes.\n", + (unsigned int)(pool_overhead + block_size_min), +- (unsigned int)((pool_overhead + tlsf_block_size_max(tlsf)) / 256)); ++ (unsigned int)((pool_overhead + esp_tlsf_block_size_max(tlsf)) / 256)); + #else +- printf("tlsf_add_pool: Memory size must be between %u and %u bytes.\n", ++ printf("esp_tlsf_add_pool: Memory size must be between %u and %u bytes.\n", + (unsigned int)(pool_overhead + block_size_min), +- (unsigned int)(pool_overhead + tlsf_block_size_max(tlsf))); ++ (unsigned int)(pool_overhead + esp_tlsf_block_size_max(tlsf))); + #endif + return 0; + } +@@ -326,7 +326,7 @@ pool_t tlsf_add_pool(tlsf_t tlsf, void* mem, size_t bytes) + block_set_size(block, pool_bytes); + block_set_free(block); + block_set_prev_used(block); +- block_insert(tlsf_cast(control_t*, tlsf), block); ++ block_insert(esp_tlsf_cast(control_t*, tlsf), block); + + /* Split the block to create a zero-size sentinel block. */ + next = block_link_next(block); +@@ -337,16 +337,16 @@ pool_t tlsf_add_pool(tlsf_t tlsf, void* mem, size_t bytes) + return mem; + } + +-void tlsf_remove_pool(tlsf_t tlsf, pool_t pool) ++void esp_tlsf_remove_pool(esp_tlsf_t tlsf, pool_t pool) + { +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + block_header_t* block = offset_to_block(pool, -(int)block_header_overhead); + + int fl = 0, sl = 0; + +- tlsf_assert(block_is_free(block) && "block should be free"); +- tlsf_assert(!block_is_free(block_next(block)) && "next block should not be free"); +- tlsf_assert(block_size(block_next(block)) == 0 && "next block size should be zero"); ++ esp_tlsf_assert(block_is_free(block) && "block should be free"); ++ esp_tlsf_assert(!block_is_free(block_next(block)) && "next block should not be free"); ++ esp_tlsf_assert(block_size(block_next(block)) == 0 && "next block size should be zero"); + + mapping_insert(control, block_size(block), &fl, &sl); + remove_free_block(control, block, fl, sl); +@@ -361,19 +361,19 @@ int test_ffs_fls() + { + /* Verify ffs/fls work properly. */ + int rv = 0; +- rv += (tlsf_ffs(0) == -1) ? 0 : 0x1; +- rv += (tlsf_fls(0) == -1) ? 0 : 0x2; +- rv += (tlsf_ffs(1) == 0) ? 0 : 0x4; +- rv += (tlsf_fls(1) == 0) ? 0 : 0x8; +- rv += (tlsf_ffs(0x80000000) == 31) ? 0 : 0x10; +- rv += (tlsf_ffs(0x80008000) == 15) ? 0 : 0x20; +- rv += (tlsf_fls(0x80000008) == 31) ? 0 : 0x40; +- rv += (tlsf_fls(0x7FFFFFFF) == 30) ? 0 : 0x80; ++ rv += (esp_tlsf_ffs(0) == -1) ? 0 : 0x1; ++ rv += (esp_tlsf_fls(0) == -1) ? 0 : 0x2; ++ rv += (esp_tlsf_ffs(1) == 0) ? 0 : 0x4; ++ rv += (esp_tlsf_fls(1) == 0) ? 0 : 0x8; ++ rv += (esp_tlsf_ffs(0x80000000) == 31) ? 0 : 0x10; ++ rv += (esp_tlsf_ffs(0x80008000) == 15) ? 0 : 0x20; ++ rv += (esp_tlsf_fls(0x80000008) == 31) ? 0 : 0x40; ++ rv += (esp_tlsf_fls(0x7FFFFFFF) == 30) ? 0 : 0x80; + + #if defined (TLSF_64BIT) +- rv += (tlsf_fls_sizet(0x80000000) == 31) ? 0 : 0x100; +- rv += (tlsf_fls_sizet(0x100000000) == 32) ? 0 : 0x200; +- rv += (tlsf_fls_sizet(0xffffffffffffffff) == 63) ? 0 : 0x400; ++ rv += (esp_tlsf_fls_sizet(0x80000000) == 31) ? 0 : 0x100; ++ rv += (esp_tlsf_fls_sizet(0x100000000) == 32) ? 0 : 0x200; ++ rv += (esp_tlsf_fls_sizet(0xffffffffffffffff) == 63) ? 0 : 0x400; + #endif + + if (rv) +@@ -384,7 +384,7 @@ int test_ffs_fls() + } + #endif + +-tlsf_t tlsf_create(void* mem, size_t max_bytes) ++esp_tlsf_t esp_tlsf_create(void* mem, size_t max_bytes) + { + #if _DEBUG + if (test_ffs_fls()) +@@ -400,39 +400,39 @@ tlsf_t tlsf_create(void* mem, size_t max_bytes) + + if (((tlsfptr_t)mem % ALIGN_SIZE) != 0) + { +- printf("tlsf_create: Memory must be aligned to %u bytes.\n", ++ printf("esp_tlsf_create: Memory must be aligned to %u bytes.\n", + (unsigned int)ALIGN_SIZE); + return NULL; + } + +- control_t* control_ptr = control_construct(tlsf_cast(control_t*, mem), max_bytes); +- return tlsf_cast(tlsf_t, control_ptr); ++ control_t* control_ptr = control_construct(esp_tlsf_cast(control_t*, mem), max_bytes); ++ return esp_tlsf_cast(esp_tlsf_t, control_ptr); + } + +-tlsf_t tlsf_create_with_pool(void* mem, size_t pool_bytes, size_t max_bytes) ++esp_tlsf_t esp_tlsf_create_with_pool(void* mem, size_t pool_bytes, size_t max_bytes) + { +- tlsf_t tlsf = tlsf_create(mem, max_bytes ? max_bytes : pool_bytes); ++ esp_tlsf_t tlsf = esp_tlsf_create(mem, max_bytes ? max_bytes : pool_bytes); + if (tlsf != NULL) + { +- tlsf_add_pool(tlsf, (char*)mem + tlsf_size(tlsf), pool_bytes - tlsf_size(tlsf)); ++ esp_tlsf_add_pool(tlsf, (char*)mem + esp_tlsf_size(tlsf), pool_bytes - esp_tlsf_size(tlsf)); + } + return tlsf; + } + +-void tlsf_destroy(tlsf_t tlsf) ++void esp_tlsf_destroy(esp_tlsf_t tlsf) + { + /* Nothing to do. */ + (void)tlsf; + } + +-pool_t tlsf_get_pool(tlsf_t tlsf) ++pool_t esp_tlsf_get_pool(esp_tlsf_t tlsf) + { +- return tlsf_cast(pool_t, (char*)tlsf + tlsf_size(tlsf)); ++ return esp_tlsf_cast(pool_t, (char*)tlsf + esp_tlsf_size(tlsf)); + } + +-void* tlsf_malloc(tlsf_t tlsf, size_t size) ++void* esp_tlsf_malloc(esp_tlsf_t tlsf, size_t size) + { +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + size_t adjust = adjust_request_size(tlsf, size, ALIGN_SIZE); + // Returned size is 0 when the requested size is larger than the max block + // size. +@@ -453,27 +453,27 @@ void* tlsf_malloc(tlsf_t tlsf, size_t size) + * + * @return pointer to free memory or NULL in case of incapacity to perform the malloc + */ +-void* tlsf_malloc_addr(tlsf_t tlsf, size_t size, void *address) ++void* esp_tlsf_malloc_addr(esp_tlsf_t tlsf, size_t size, void *address) + { +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + + /* adjust the address to be ALIGN_SIZE bytes aligned. */ +- const unsigned int addr_adjusted = align_down(tlsf_cast(unsigned int, address), ALIGN_SIZE); ++ const unsigned int addr_adjusted = align_down(esp_tlsf_cast(unsigned int, address), ALIGN_SIZE); + + /* adjust the size to be ALIGN_SIZE bytes aligned. Add to the size the difference + * between the requested address and the address_adjusted. */ +- size_t size_adjusted = align_up(size + (tlsf_cast(unsigned int, address) - addr_adjusted), ALIGN_SIZE); ++ size_t size_adjusted = align_up(size + (esp_tlsf_cast(unsigned int, address) - addr_adjusted), ALIGN_SIZE); + + /* find the free block that starts before the address in the pool and is big enough + * to support the size of allocation at the given address */ +- block_header_t* block = offset_to_block(tlsf_get_pool(tlsf), -(int)block_header_overhead); ++ block_header_t* block = offset_to_block(esp_tlsf_get_pool(tlsf), -(int)block_header_overhead); + +- const char *alloc_start = tlsf_cast(char*, addr_adjusted); ++ const char *alloc_start = esp_tlsf_cast(char*, addr_adjusted); + const char *alloc_end = alloc_start + size_adjusted; + bool block_found = false; + do { +- const char *block_start = tlsf_cast(char*, block_to_ptr(block)); +- const char *block_end = tlsf_cast(char*, block_to_ptr(block)) + block_size(block); ++ const char *block_start = esp_tlsf_cast(char*, block_to_ptr(block)); ++ const char *block_end = esp_tlsf_cast(char*, block_to_ptr(block)) + block_size(block); + if (block_start <= alloc_start && block_end > alloc_start) { + /* A: block_end >= alloc_end. B: block is free */ + if (block_end < alloc_end || !block_is_free(block)) { +@@ -502,7 +502,7 @@ void* tlsf_malloc_addr(tlsf_t tlsf, size_t size, void *address) + + /* trim any leading space or add the leading space to the overall requested size + * if the leading space is not big enough to store a block of minimum size */ +- const size_t space_before_addr_adjusted = addr_adjusted - tlsf_cast(unsigned int, block_to_ptr(block)); ++ const size_t space_before_addr_adjusted = addr_adjusted - esp_tlsf_cast(unsigned int, block_to_ptr(block)); + block_header_t *return_block = block; + if (space_before_addr_adjusted >= block_size_min) { + return_block = block_trim_free_leading(control, block, space_before_addr_adjusted); +@@ -538,9 +538,9 @@ void* tlsf_malloc_addr(tlsf_t tlsf, size_t size, void *address) + * + * @return pointer to free memory. + */ +-void* tlsf_memalign_offs(tlsf_t tlsf, size_t align, size_t size, size_t data_offset) ++void* esp_tlsf_memalign_offs(esp_tlsf_t tlsf, size_t align, size_t size, size_t data_offset) + { +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + const size_t adjust = adjust_request_size(tlsf, size, ALIGN_SIZE); + const size_t off_adjust = align_up(data_offset, ALIGN_SIZE); + +@@ -564,21 +564,21 @@ void* tlsf_memalign_offs(tlsf_t tlsf, size_t align, size_t size, size_t data_off + ** to store next blocks' metadata. Plus, all pointers allocated will all be + ** aligned on a 4-byte bound, so ptr + data_offset will also have this + ** alignment constraint. Thus, the gap is not required. +- ** If we requested 0 bytes, return null, as tlsf_malloc(0) does. ++ ** If we requested 0 bytes, return null, as esp_tlsf_malloc(0) does. + */ + size_t aligned_size = (adjust && align > ALIGN_SIZE) ? size_with_gap : adjust; + + block_header_t* block = block_locate_free(control, &aligned_size); + + /* This can't be a static assert. */ +- tlsf_assert(sizeof(block_header_t) == block_size_min + block_header_overhead); ++ esp_tlsf_assert(sizeof(block_header_t) == block_size_min + block_header_overhead); + + if (block) + { + void* ptr = block_to_ptr(block); + void* aligned = align_ptr(ptr, align); +- size_t gap = tlsf_cast(size_t, +- tlsf_cast(tlsfptr_t, aligned) - tlsf_cast(tlsfptr_t, ptr)); ++ size_t gap = esp_tlsf_cast(size_t, ++ esp_tlsf_cast(tlsfptr_t, aligned) - esp_tlsf_cast(tlsfptr_t, ptr)); + + /* + ** If gap size is too small or if there is no gap but we need one, +@@ -589,18 +589,18 @@ void* tlsf_memalign_offs(tlsf_t tlsf, size_t align, size_t size, size_t data_off + if ((gap && gap < gap_minimum) || (!gap && off_adjust && align > ALIGN_SIZE)) + { + const size_t gap_remain = gap_minimum - gap; +- const size_t offset = tlsf_max(gap_remain, align); +- const void* next_aligned = tlsf_cast(void*, +- tlsf_cast(tlsfptr_t, aligned) + offset); ++ const size_t offset = esp_tlsf_max(gap_remain, align); ++ const void* next_aligned = esp_tlsf_cast(void*, ++ esp_tlsf_cast(tlsfptr_t, aligned) + offset); + + aligned = align_ptr(next_aligned, align); +- gap = tlsf_cast(size_t, +- tlsf_cast(tlsfptr_t, aligned) - tlsf_cast(tlsfptr_t, ptr)); ++ gap = esp_tlsf_cast(size_t, ++ esp_tlsf_cast(tlsfptr_t, aligned) - esp_tlsf_cast(tlsfptr_t, ptr)); + } + + if (gap) + { +- tlsf_assert(gap >= gap_minimum && "gap size too small"); ++ esp_tlsf_assert(gap >= gap_minimum && "gap size too small"); + block = block_trim_free_leading(control, block, gap - off_adjust); + } + } +@@ -610,23 +610,23 @@ void* tlsf_memalign_offs(tlsf_t tlsf, size_t align, size_t size, size_t data_off + } + + /** +- * @brief Same as `tlsf_memalign_offs` function but with a 0 offset. ++ * @brief Same as `esp_tlsf_memalign_offs` function but with a 0 offset. + * The pointer returned is aligned on `align`. + */ +-void* tlsf_memalign(tlsf_t tlsf, size_t align, size_t size) ++void* esp_tlsf_memalign(esp_tlsf_t tlsf, size_t align, size_t size) + { +- return tlsf_memalign_offs(tlsf, align, size, 0); ++ return esp_tlsf_memalign_offs(tlsf, align, size, 0); + } + + +-void tlsf_free(tlsf_t tlsf, void* ptr) ++void esp_tlsf_free(esp_tlsf_t tlsf, void* ptr) + { + /* Don't attempt to free a NULL pointer. */ + if (ptr) + { +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + block_header_t* block = block_from_ptr(ptr); +- tlsf_assert(!block_is_free(block) && "block already marked as free"); ++ esp_tlsf_assert(!block_is_free(block) && "block already marked as free"); + block_mark_as_free(block); + block = block_merge_prev(control, block); + block = block_merge_next(control, block); +@@ -647,20 +647,20 @@ void tlsf_free(tlsf_t tlsf, void* ptr) + ** - an extended buffer size will leave the newly-allocated area with + ** contents undefined + */ +-void* tlsf_realloc(tlsf_t tlsf, void* ptr, size_t size) ++void* esp_tlsf_realloc(esp_tlsf_t tlsf, void* ptr, size_t size) + { +- control_t* control = tlsf_cast(control_t*, tlsf); ++ control_t* control = esp_tlsf_cast(control_t*, tlsf); + void* p = 0; + + /* Zero-size requests are treated as free. */ + if (ptr && size == 0) + { +- tlsf_free(tlsf, ptr); ++ esp_tlsf_free(tlsf, ptr); + } + /* Requests with NULL pointers are treated as malloc. */ + else if (!ptr) + { +- p = tlsf_malloc(tlsf, size); ++ p = esp_tlsf_malloc(tlsf, size); + } + else + { +@@ -677,7 +677,7 @@ void* tlsf_realloc(tlsf_t tlsf, void* ptr, size_t size) + return p; + } + +- tlsf_assert(!block_is_free(block) && "block already marked as free"); ++ esp_tlsf_assert(!block_is_free(block) && "block already marked as free"); + + /* + ** If the next block is used, or when combined with the current +@@ -685,12 +685,12 @@ void* tlsf_realloc(tlsf_t tlsf, void* ptr, size_t size) + */ + if (adjust > cursize && (!block_is_free(next) || adjust > combined)) + { +- p = tlsf_malloc(tlsf, size); ++ p = esp_tlsf_malloc(tlsf, size); + if (p) + { +- const size_t minsize = tlsf_min(cursize, size); ++ const size_t minsize = esp_tlsf_min(cursize, size); + memcpy(p, ptr, minsize); +- tlsf_free(tlsf, ptr); ++ esp_tlsf_free(tlsf, ptr); + } + } + else +diff --git a/tlsf_block_functions.h b/tlsf_block_functions.h +index d801442..8b3cc18 100644 +--- a/tlsf_block_functions.h ++++ b/tlsf_block_functions.h +@@ -12,7 +12,7 @@ extern "C" { + + /* + ** Constants definition for poisoning. +-** These defines are used as 3rd argument of tlsf_poison_fill_region() for readability purposes. ++** These defines are used as 3rd argument of esp_tlsf_poison_fill_region() for readability purposes. + */ + #define POISONING_AFTER_FREE true + #define POISONING_AFTER_MALLOC !POISONING_AFTER_FREE +@@ -23,21 +23,21 @@ typedef ptrdiff_t tlsfptr_t; + /* + ** Cast and min/max macros. + */ +-#if !defined (tlsf_cast) +-#define tlsf_cast(t, exp) ((t) (exp)) ++#if !defined (esp_tlsf_cast) ++#define esp_tlsf_cast(t, exp) ((t) (exp)) + #endif +-#if !defined (tlsf_min) +-#define tlsf_min(a, b) ((a) < (b) ? (a) : (b)) ++#if !defined (esp_tlsf_min) ++#define esp_tlsf_min(a, b) ((a) < (b) ? (a) : (b)) + #endif +-#if !defined (tlsf_max) +-#define tlsf_max(a, b) ((a) > (b) ? (a) : (b)) ++#if !defined (esp_tlsf_max) ++#define esp_tlsf_max(a, b) ((a) > (b) ? (a) : (b)) + #endif + + /* + ** Set assert macro, if it has not been provided by the user. + */ +-#if !defined (tlsf_assert) +-#define tlsf_assert assert ++#if !defined (esp_tlsf_assert) ++#define esp_tlsf_assert assert + #endif + + typedef struct block_header_t +@@ -100,7 +100,7 @@ static inline __attribute__((always_inline)) int block_is_last(const block_heade + + static inline __attribute__((always_inline)) int block_is_free(const block_header_t* block) + { +- return tlsf_cast(int, block->size & block_header_free_bit); ++ return esp_tlsf_cast(int, block->size & block_header_free_bit); + } + + static inline __attribute__((always_inline)) void block_set_free(block_header_t* block) +@@ -115,7 +115,7 @@ static inline __attribute__((always_inline)) void block_set_used(block_header_t* + + static inline __attribute__((always_inline)) int block_is_prev_free(const block_header_t* block) + { +- return tlsf_cast(int, block->size & block_header_prev_free_bit); ++ return esp_tlsf_cast(int, block->size & block_header_prev_free_bit); + } + + static inline __attribute__((always_inline)) void block_set_prev_free(block_header_t* block) +@@ -130,26 +130,26 @@ static inline __attribute__((always_inline)) void block_set_prev_used(block_head + + static inline __attribute__((always_inline)) block_header_t* block_from_ptr(const void* ptr) + { +- return tlsf_cast(block_header_t*, +- tlsf_cast(unsigned char*, ptr) - block_start_offset); ++ return esp_tlsf_cast(block_header_t*, ++ esp_tlsf_cast(unsigned char*, ptr) - block_start_offset); + } + + static inline __attribute__((always_inline)) void* block_to_ptr(const block_header_t* block) + { +- return tlsf_cast(void*, +- tlsf_cast(unsigned char*, block) + block_start_offset); ++ return esp_tlsf_cast(void*, ++ esp_tlsf_cast(unsigned char*, block) + block_start_offset); + } + + /* Return location of next block after block of given size. */ + static inline __attribute__((always_inline)) block_header_t* offset_to_block(const void* ptr, size_t size) + { +- return tlsf_cast(block_header_t*, tlsf_cast(tlsfptr_t, ptr) + size); ++ return esp_tlsf_cast(block_header_t*, esp_tlsf_cast(tlsfptr_t, ptr) + size); + } + + /* Return location of previous block. */ + static inline __attribute__((always_inline)) block_header_t* block_prev(const block_header_t* block) + { +- tlsf_assert(block_is_prev_free(block) && "previous block must be free"); ++ esp_tlsf_assert(block_is_prev_free(block) && "previous block must be free"); + return block->prev_phys_block; + } + +@@ -158,7 +158,7 @@ static inline __attribute__((always_inline)) block_header_t* block_next(const bl + { + block_header_t* next = offset_to_block(block_to_ptr(block), + block_size(block) - block_header_overhead); +- tlsf_assert(!block_is_last(block)); ++ esp_tlsf_assert(!block_is_last(block)); + return next; + } + +diff --git a/tlsf_control_functions.h b/tlsf_control_functions.h +index 1ed3443..ff2ad90 100644 +--- a/tlsf_control_functions.h ++++ b/tlsf_control_functions.h +@@ -9,12 +9,12 @@ + + #if defined(__cplusplus) + extern "C" { +-#define tlsf_decl static inline ++#define esp_tlsf_decl static inline + #else +-#define tlsf_decl static inline __attribute__((always_inline)) ++#define esp_tlsf_decl static inline __attribute__((always_inline)) + #endif + +-enum tlsf_config ++enum esp_tlsf_config + { + /* All allocation sizes and addresses are aligned to 4 bytes. */ + ALIGN_SIZE_LOG2 = 2, +@@ -93,7 +93,7 @@ typedef struct control_t + #if defined (__SNC__) + /* SNC for Playstation 3. */ + +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { + const unsigned int reverse = word & (~word + 1); + const int bit = 32 - __builtin_clz(reverse); +@@ -102,14 +102,14 @@ tlsf_decl int tlsf_ffs(unsigned int word) + + #else + +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { + return __builtin_ffs(word) - 1; + } + + #endif + +-tlsf_decl int tlsf_fls(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls(unsigned int word) + { + const int bit = word ? 32 - __builtin_clz(word) : 0; + return bit - 1; +@@ -123,13 +123,13 @@ tlsf_decl int tlsf_fls(unsigned int word) + #pragma intrinsic(_BitScanReverse) + #pragma intrinsic(_BitScanForward) + +-tlsf_decl int tlsf_fls(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls(unsigned int word) + { + unsigned long index; + return _BitScanReverse(&index, word) ? index : -1; + } + +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { + unsigned long index; + return _BitScanForward(&index, word) ? index : -1; +@@ -140,13 +140,13 @@ tlsf_decl int tlsf_ffs(unsigned int word) + + #include + +-tlsf_decl int tlsf_fls(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls(unsigned int word) + { + const int bit = 32 - _CountLeadingZeros(word); + return bit - 1; + } + +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { + const unsigned int reverse = word & (~word + 1); + const int bit = 32 - _CountLeadingZeros(reverse); +@@ -156,14 +156,14 @@ tlsf_decl int tlsf_ffs(unsigned int word) + #elif defined (__ARMCC_VERSION) + /* RealView Compilation Tools for ARM */ + +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { + const unsigned int reverse = word & (~word + 1); + const int bit = 32 - __clz(reverse); + return bit - 1; + } + +-tlsf_decl int tlsf_fls(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls(unsigned int word) + { + const int bit = word ? 32 - __clz(word) : 0; + return bit - 1; +@@ -174,14 +174,14 @@ tlsf_decl int tlsf_fls(unsigned int word) + + #include + +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { + const unsigned int reverse = word & (~word + 1); + const int bit = 32 - __CLZ32(reverse); + return bit - 1; + } + +-tlsf_decl int tlsf_fls(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls(unsigned int word) + { + const int bit = word ? 32 - __CLZ32(word) : 0; + return bit - 1; +@@ -190,7 +190,7 @@ tlsf_decl int tlsf_fls(unsigned int word) + #else + /* Fall back to generic implementation. */ + +-tlsf_decl int tlsf_fls_generic(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls_generic(unsigned int word) + { + int bit = 32; + +@@ -205,83 +205,83 @@ tlsf_decl int tlsf_fls_generic(unsigned int word) + } + + /* Implement ffs in terms of fls. */ +-tlsf_decl int tlsf_ffs(unsigned int word) ++esp_tlsf_decl int esp_tlsf_ffs(unsigned int word) + { +- return tlsf_fls_generic(word & (~word + 1)) - 1; ++ return esp_tlsf_fls_generic(word & (~word + 1)) - 1; + } + +-tlsf_decl int tlsf_fls(unsigned int word) ++esp_tlsf_decl int esp_tlsf_fls(unsigned int word) + { +- return tlsf_fls_generic(word) - 1; ++ return esp_tlsf_fls_generic(word) - 1; + } + + #endif + +-/* Possibly 64-bit version of tlsf_fls. */ ++/* Possibly 64-bit version of esp_tlsf_fls. */ + #if defined (TLSF_64BIT) +-tlsf_decl int tlsf_fls_sizet(size_t size) ++esp_tlsf_decl int esp_tlsf_fls_sizet(size_t size) + { + int high = (int)(size >> 32); + int bits = 0; + if (high) + { +- bits = 32 + tlsf_fls(high); ++ bits = 32 + esp_tlsf_fls(high); + } + else + { +- bits = tlsf_fls((int)size & 0xffffffff); ++ bits = esp_tlsf_fls((int)size & 0xffffffff); + + } + return bits; + } + #else +-#define tlsf_fls_sizet tlsf_fls ++#define esp_tlsf_fls_sizet esp_tlsf_fls + #endif + +-tlsf_decl size_t align_up(size_t x, size_t align) ++esp_tlsf_decl size_t align_up(size_t x, size_t align) + { +- tlsf_assert(0 == (align & (align - 1)) && "must align to a power of two"); ++ esp_tlsf_assert(0 == (align & (align - 1)) && "must align to a power of two"); + return (x + (align - 1)) & ~(align - 1); + } + +-tlsf_decl size_t align_down(size_t x, size_t align) ++esp_tlsf_decl size_t align_down(size_t x, size_t align) + { +- tlsf_assert(0 == (align & (align - 1)) && "must align to a power of two"); ++ esp_tlsf_assert(0 == (align & (align - 1)) && "must align to a power of two"); + return x - (x & (align - 1)); + } + +-tlsf_decl void* align_ptr(const void* ptr, size_t align) ++esp_tlsf_decl void* align_ptr(const void* ptr, size_t align) + { + const tlsfptr_t aligned = +- (tlsf_cast(tlsfptr_t, ptr) + (align - 1)) & ~(align - 1); +- tlsf_assert(0 == (align & (align - 1)) && "must align to a power of two"); +- return tlsf_cast(void*, aligned); ++ (esp_tlsf_cast(tlsfptr_t, ptr) + (align - 1)) & ~(align - 1); ++ esp_tlsf_assert(0 == (align & (align - 1)) && "must align to a power of two"); ++ return esp_tlsf_cast(void*, aligned); + } + +-tlsf_decl size_t tlsf_align_size(void) ++esp_tlsf_decl size_t esp_tlsf_align_size(void) + { + return ALIGN_SIZE; + } + +-tlsf_decl size_t tlsf_block_size_min(void) ++esp_tlsf_decl size_t esp_tlsf_block_size_min(void) + { + return block_size_min; + } + +-tlsf_decl size_t tlsf_block_size_max(control_t *control) ++esp_tlsf_decl size_t esp_tlsf_block_size_max(control_t *control) + { + if (control == NULL) + { + return 0; + } +- return tlsf_cast(size_t, 1) << control->fl_index_max; ++ return esp_tlsf_cast(size_t, 1) << control->fl_index_max; + } + + /* + ** Adjust an allocation size to be aligned to word size, and no smaller + ** than internal minimum. + */ +-tlsf_decl size_t adjust_request_size(control_t *control, size_t size, size_t align) ++esp_tlsf_decl size_t adjust_request_size(control_t *control, size_t size, size_t align) + { + size_t adjust = 0; + if (size) +@@ -289,9 +289,9 @@ tlsf_decl size_t adjust_request_size(control_t *control, size_t size, size_t ali + const size_t aligned = align_up(size, align); + + /* aligned sized must not exceed block_size_max or we'll go out of bounds on sl_bitmap */ +- if (aligned < tlsf_block_size_max(control)) ++ if (aligned < esp_tlsf_block_size_max(control)) + { +- adjust = tlsf_max(aligned, block_size_min); ++ adjust = esp_tlsf_max(aligned, block_size_min); + } + } + return adjust; +@@ -302,19 +302,19 @@ tlsf_decl size_t adjust_request_size(control_t *control, size_t size, size_t ali + ** the documentation found in the white paper. + */ + +-tlsf_decl void mapping_insert(control_t* control, size_t size, int* fli, int* sli) ++esp_tlsf_decl void mapping_insert(control_t* control, size_t size, int* fli, int* sli) + { + int fl, sl; + if (size < control->small_block_size) + { + /* Store small blocks in first list. */ + fl = 0; +- sl = tlsf_cast(int, size) / (control->small_block_size / control->sl_index_count); ++ sl = esp_tlsf_cast(int, size) / (control->small_block_size / control->sl_index_count); + } + else + { +- fl = tlsf_fls_sizet(size); +- sl = tlsf_cast(int, size >> (fl - control->sl_index_count_log2)) ^ (1 << control->sl_index_count_log2); ++ fl = esp_tlsf_fls_sizet(size); ++ sl = esp_tlsf_cast(int, size >> (fl - control->sl_index_count_log2)) ^ (1 << control->sl_index_count_log2); + fl -= (control->fl_index_shift - 1); + } + *fli = fl; +@@ -322,17 +322,17 @@ tlsf_decl void mapping_insert(control_t* control, size_t size, int* fli, int* sl + } + + /* This version rounds up to the next block size (for allocations) */ +-tlsf_decl void mapping_search(control_t* control, size_t* size, int* fli, int* sli) ++esp_tlsf_decl void mapping_search(control_t* control, size_t* size, int* fli, int* sli) + { + if (*size >= control->small_block_size) + { +- const size_t round = (1 << (tlsf_fls_sizet(*size) - control->sl_index_count_log2)); ++ const size_t round = (1 << (esp_tlsf_fls_sizet(*size) - control->sl_index_count_log2)); + *size = align_up(*size, round); + } + mapping_insert(control, *size, fli, sli); + } + +-tlsf_decl block_header_t* search_suitable_block(control_t* control, int* fli, int* sli) ++esp_tlsf_decl block_header_t* search_suitable_block(control_t* control, int* fli, int* sli) + { + int fl = *fli; + int sl = *sli; +@@ -352,12 +352,12 @@ tlsf_decl block_header_t* search_suitable_block(control_t* control, int* fli, in + return 0; + } + +- fl = tlsf_ffs(fl_map); ++ fl = esp_tlsf_ffs(fl_map); + *fli = fl; + sl_map = control->sl_bitmap[fl]; + } +- tlsf_assert(sl_map && "internal error - second level bitmap is null"); +- sl = tlsf_ffs(sl_map); ++ esp_tlsf_assert(sl_map && "internal error - second level bitmap is null"); ++ sl = esp_tlsf_ffs(sl_map); + *sli = sl; + + /* Return the first block in the free list. */ +@@ -365,12 +365,12 @@ tlsf_decl block_header_t* search_suitable_block(control_t* control, int* fli, in + } + + /* Remove a free block from the free list.*/ +-tlsf_decl void remove_free_block(control_t* control, block_header_t* block, int fl, int sl) ++esp_tlsf_decl void remove_free_block(control_t* control, block_header_t* block, int fl, int sl) + { + block_header_t* prev = block->prev_free; + block_header_t* next = block->next_free; +- tlsf_assert(prev && "prev_free field can not be null"); +- tlsf_assert(next && "next_free field can not be null"); ++ esp_tlsf_assert(prev && "prev_free field can not be null"); ++ esp_tlsf_assert(next && "next_free field can not be null"); + next->prev_free = prev; + prev->next_free = next; + +@@ -394,16 +394,16 @@ tlsf_decl void remove_free_block(control_t* control, block_header_t* block, int + } + + /* Insert a free block into the free block list. */ +-tlsf_decl void insert_free_block(control_t* control, block_header_t* block, int fl, int sl) ++esp_tlsf_decl void insert_free_block(control_t* control, block_header_t* block, int fl, int sl) + { + block_header_t* current = control->blocks[fl * control->sl_index_count + sl]; +- tlsf_assert(current && "free list cannot have a null entry"); +- tlsf_assert(block && "cannot insert a null entry into the free list"); ++ esp_tlsf_assert(current && "free list cannot have a null entry"); ++ esp_tlsf_assert(block && "cannot insert a null entry into the free list"); + block->next_free = current; + block->prev_free = &control->block_null; + current->prev_free = block; + +- tlsf_assert(block_to_ptr(block) == align_ptr(block_to_ptr(block), ALIGN_SIZE) ++ esp_tlsf_assert(block_to_ptr(block) == align_ptr(block_to_ptr(block), ALIGN_SIZE) + && "block not aligned properly"); + /* + ** Insert the new block at the head of the list, and mark the first- +@@ -415,7 +415,7 @@ tlsf_decl void insert_free_block(control_t* control, block_header_t* block, int + } + + /* Remove a given block from the free list. */ +-tlsf_decl void block_remove(control_t* control, block_header_t* block) ++esp_tlsf_decl void block_remove(control_t* control, block_header_t* block) + { + int fl, sl; + mapping_insert(control, block_size(block), &fl, &sl); +@@ -423,20 +423,20 @@ tlsf_decl void block_remove(control_t* control, block_header_t* block) + } + + /* Insert a given block into the free list. */ +-tlsf_decl void block_insert(control_t* control, block_header_t* block) ++esp_tlsf_decl void block_insert(control_t* control, block_header_t* block) + { + int fl, sl; + mapping_insert(control, block_size(block), &fl, &sl); + insert_free_block(control, block, fl, sl); + } + +-tlsf_decl int block_can_split(block_header_t* block, size_t size) ++esp_tlsf_decl int block_can_split(block_header_t* block, size_t size) + { + return block_size(block) >= sizeof(block_header_t) + size; + } + + /* Split a block into two, the second of which is free. */ +-tlsf_decl block_header_t* block_split(block_header_t* block, size_t size) ++esp_tlsf_decl block_header_t* block_split(block_header_t* block, size_t size) + { + /* Calculate the amount of space left in the remaining block. + * REMINDER: remaining pointer's first field is `prev_phys_block` but this field is part of the +@@ -449,12 +449,12 @@ tlsf_decl block_header_t* block_split(block_header_t* block, size_t size) + * This field is NOT part of the size, so it has to be substracted from the calculation. */ + const size_t remain_size = block_size(block) - (size + block_header_overhead); + +- tlsf_assert(block_to_ptr(remaining) == align_ptr(block_to_ptr(remaining), ALIGN_SIZE) ++ esp_tlsf_assert(block_to_ptr(remaining) == align_ptr(block_to_ptr(remaining), ALIGN_SIZE) + && "remaining block not aligned properly"); + +- tlsf_assert(block_size(block) == remain_size + size + block_header_overhead); ++ esp_tlsf_assert(block_size(block) == remain_size + size + block_header_overhead); + block_set_size(remaining, remain_size); +- tlsf_assert(block_size(remaining) >= block_size_min && "block split with invalid size"); ++ esp_tlsf_assert(block_size(remaining) >= block_size_min && "block split with invalid size"); + + block_set_size(block, size); + block_mark_as_free(remaining); +@@ -496,9 +496,9 @@ tlsf_decl block_header_t* block_split(block_header_t* block, size_t size) + __attribute__((weak)) void block_absorb_post_hook(void *start, size_t size, bool is_free); + + /* Absorb a free block's storage into an adjacent previous free block. */ +-tlsf_decl block_header_t* block_absorb(block_header_t* prev, block_header_t* block) ++esp_tlsf_decl block_header_t* block_absorb(block_header_t* prev, block_header_t* block) + { +- tlsf_assert(!block_is_last(prev) && "previous block can't be last"); ++ esp_tlsf_assert(!block_is_last(prev) && "previous block can't be last"); + /* Note: Leaves flags untouched. */ + prev->size += block_size(block) + block_header_overhead; + block_link_next(prev); +@@ -512,13 +512,13 @@ tlsf_decl block_header_t* block_absorb(block_header_t* prev, block_header_t* blo + } + + /* Merge a just-freed block with an adjacent previous free block. */ +-tlsf_decl block_header_t* block_merge_prev(control_t* control, block_header_t* block) ++esp_tlsf_decl block_header_t* block_merge_prev(control_t* control, block_header_t* block) + { + if (block_is_prev_free(block)) + { + block_header_t* prev = block_prev(block); +- tlsf_assert(prev && "prev physical block can't be null"); +- tlsf_assert(block_is_free(prev) && "prev block is not free though marked as such"); ++ esp_tlsf_assert(prev && "prev physical block can't be null"); ++ esp_tlsf_assert(block_is_free(prev) && "prev block is not free though marked as such"); + block_remove(control, prev); + block = block_absorb(prev, block); + } +@@ -527,14 +527,14 @@ tlsf_decl block_header_t* block_merge_prev(control_t* control, block_header_t* b + } + + /* Merge a just-freed block with an adjacent free block. */ +-tlsf_decl block_header_t* block_merge_next(control_t* control, block_header_t* block) ++esp_tlsf_decl block_header_t* block_merge_next(control_t* control, block_header_t* block) + { + block_header_t* next = block_next(block); +- tlsf_assert(next && "next physical block can't be null"); ++ esp_tlsf_assert(next && "next physical block can't be null"); + + if (block_is_free(next)) + { +- tlsf_assert(!block_is_last(block) && "previous block can't be last"); ++ esp_tlsf_assert(!block_is_last(block) && "previous block can't be last"); + block_remove(control, next); + block = block_absorb(block, next); + } +@@ -543,9 +543,9 @@ tlsf_decl block_header_t* block_merge_next(control_t* control, block_header_t* b + } + + /* Trim any trailing block space off the end of a block, return to pool. */ +-tlsf_decl void block_trim_free(control_t* control, block_header_t* block, size_t size) ++esp_tlsf_decl void block_trim_free(control_t* control, block_header_t* block, size_t size) + { +- tlsf_assert(block_is_free(block) && "block must be free"); ++ esp_tlsf_assert(block_is_free(block) && "block must be free"); + if (block_can_split(block, size)) + { + block_header_t* remaining_block = block_split(block, size); +@@ -556,9 +556,9 @@ tlsf_decl void block_trim_free(control_t* control, block_header_t* block, size_t + } + + /* Trim any trailing block space off the end of a used block, return to pool. */ +-tlsf_decl void block_trim_used(control_t* control, block_header_t* block, size_t size) ++esp_tlsf_decl void block_trim_used(control_t* control, block_header_t* block, size_t size) + { +- tlsf_assert(!block_is_free(block) && "block must be used"); ++ esp_tlsf_assert(!block_is_free(block) && "block must be used"); + if (block_can_split(block, size)) + { + /* If the next block is free, we must coalesce. */ +@@ -570,7 +570,7 @@ tlsf_decl void block_trim_used(control_t* control, block_header_t* block, size_t + } + } + +-tlsf_decl block_header_t* block_trim_free_leading(control_t* control, block_header_t* block, size_t size) ++esp_tlsf_decl block_header_t* block_trim_free_leading(control_t* control, block_header_t* block, size_t size) + { + block_header_t* remaining_block = block; + if (block_can_split(block, size)) +@@ -592,7 +592,7 @@ tlsf_decl block_header_t* block_trim_free_leading(control_t* control, block_head + return remaining_block; + } + +-tlsf_decl block_header_t* block_locate_free(control_t* control, size_t* size) ++esp_tlsf_decl block_header_t* block_locate_free(control_t* control, size_t* size) + { + int fl = 0, sl = 0; + block_header_t* block = 0; +@@ -615,19 +615,19 @@ tlsf_decl block_header_t* block_locate_free(control_t* control, size_t* size) + + if (block) + { +- tlsf_assert(block_size(block) >= *size); ++ esp_tlsf_assert(block_size(block) >= *size); + remove_free_block(control, block, fl, sl); + } + + return block; + } + +-tlsf_decl void* block_prepare_used(control_t* control, block_header_t* block, size_t size) ++esp_tlsf_decl void* block_prepare_used(control_t* control, block_header_t* block, size_t size) + { + void* p = 0; + if (block) + { +- tlsf_assert(size && "size must be non-zero"); ++ esp_tlsf_assert(size && "size must be non-zero"); + block_trim_free(control, block, size); + block_mark_as_used(block); + p = block_to_ptr(block); +@@ -635,7 +635,7 @@ tlsf_decl void* block_prepare_used(control_t* control, block_header_t* block, si + return p; + } + +-#undef tlsf_decl ++#undef esp_tlsf_decl + + #if defined(__cplusplus) + }; +-- +2.34.1 + diff --git a/pkg/esp32_sdk_tlsf/patches/0002-add-prefix-esp_-to-file-names-to-avoid-conflicts-wit.patch b/pkg/esp32_sdk_tlsf/patches/0002-add-prefix-esp_-to-file-names-to-avoid-conflicts-wit.patch new file mode 100644 index 0000000000..624f2233b2 --- /dev/null +++ b/pkg/esp32_sdk_tlsf/patches/0002-add-prefix-esp_-to-file-names-to-avoid-conflicts-wit.patch @@ -0,0 +1,64 @@ +From b668dbb014752261500f8fcb0703295fba20b5d8 Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Tue, 11 Mar 2025 02:10:23 +0100 +Subject: [PATCH 2/2] add prefix esp_ to file names to avoid conflicts with + tlsf package + +--- + tlsf.c => esp_tlsf.c | 6 +++--- + tlsf_block_functions.h => esp_tlsf_block_functions.h | 0 + tlsf_control_functions.h => esp_tlsf_control_functions.h | 2 +- + include/{tlsf.h => esp_tlsf.h} | 0 + 4 files changed, 4 insertions(+), 4 deletions(-) + rename tlsf.c => esp_tlsf.c (96%) + rename tlsf_block_functions.h => esp_tlsf_block_functions.h (100%) + rename tlsf_control_functions.h => esp_tlsf_control_functions.h (99%) + rename include/{tlsf.h => esp_tlsf.h} (100%) + +diff --git a/tlsf.c b/esp_tlsf.c +similarity index 96% +rename from tlsf.c +rename to esp_tlsf.c +index 1866a61..0793373 100644 +--- a/tlsf.c ++++ b/esp_tlsf.c +@@ -7,9 +7,9 @@ + #include + #include + #include +-#include "tlsf.h" +-#include "tlsf_block_functions.h" +-#include "tlsf_control_functions.h" ++#include "esp_tlsf.h" ++#include "esp_tlsf_block_functions.h" ++#include "esp_tlsf_control_functions.h" + + /* + ** Static assertion mechanism. +diff --git a/tlsf_block_functions.h b/esp_tlsf_block_functions.h +similarity index 100% +rename from tlsf_block_functions.h +rename to esp_tlsf_block_functions.h +diff --git a/tlsf_control_functions.h b/esp_tlsf_control_functions.h +similarity index 99% +rename from tlsf_control_functions.h +rename to esp_tlsf_control_functions.h +index ff2ad90..a0dfa14 100644 +--- a/tlsf_control_functions.h ++++ b/esp_tlsf_control_functions.h +@@ -5,7 +5,7 @@ + */ + + #pragma once +-#include "tlsf_block_functions.h" ++#include "esp_tlsf_block_functions.h" + + #if defined(__cplusplus) + extern "C" { +diff --git a/include/tlsf.h b/include/esp_tlsf.h +similarity index 100% +rename from include/tlsf.h +rename to include/esp_tlsf.h +-- +2.34.1 + diff --git a/pkg/tinyusb/patches/0006-src-portable-espressif-migration-to-ESP-IDF-v5.4.patch b/pkg/tinyusb/patches/0006-src-portable-espressif-migration-to-ESP-IDF-v5.4.patch new file mode 100644 index 0000000000..cd809a4cb2 --- /dev/null +++ b/pkg/tinyusb/patches/0006-src-portable-espressif-migration-to-ESP-IDF-v5.4.patch @@ -0,0 +1,37 @@ +From 93a725df6169ba66124079d84490e44575e1793a Mon Sep 17 00:00:00 2001 +From: Gunar Schorcht +Date: Tue, 18 Mar 2025 13:43:15 +0100 +Subject: [PATCH 6/6] src/portable/espressif: migration to ESP-IDF v5.4 + +--- + src/portable/espressif/esp32sx/dcd_esp32sx.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c +index 717ac707221..e9bff871815 100644 +--- a/src/portable/espressif/esp32sx/dcd_esp32sx.c ++++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c +@@ -38,10 +38,20 @@ + #include "soc/dport_reg.h" + #include "soc/gpio_sig_map.h" + #include "soc/usb_periph.h" ++#include "soc/usb_reg.h" ++#include "soc/usb_struct.h" + #include "soc/periph_defs.h" // for interrupt source + + #include "device/dcd.h" + ++#ifndef USB_OUT_EP_NUM ++#define USB_OUT_EP_NUM ((int) (sizeof(USB0.out_ep_reg) / sizeof(USB0.out_ep_reg[0]))) ++#endif ++ ++#ifndef USB_IN_EP_NUM ++#define USB_IN_EP_NUM ((int) (sizeof(USB0.in_ep_reg) / sizeof(USB0.in_ep_reg[0]))) ++#endif ++ + // Max number of bi-directional endpoints including EP0 + // Note: ESP32S2 specs say there are only up to 5 IN active endpoints include EP0 + // We should probably prohibit enabling Endpoint IN > 4 (not done yet) +-- +2.34.1 +