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Merge pull request #20219 from krzysztof-cabaj/treewise-typo-or-RAM

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treewise: typo "or RAM"
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Kaspar Schleiser 2024-01-01 17:39:10 +00:00 committed by GitHub
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2
boards/nucleo-f439zi/doc.txt
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@ -6,7 +6,7 @@
## Overview
The Nucleo-F439ZI is a board from ST's Nucleo family supporting ARM Cortex-M4
STM32F439ZI microcontroller with, 256KiB or RAM and 2MiB of Flash.
STM32F439ZI microcontroller with, 256KiB of RAM and 2MiB of Flash.
## Flashing the device

2
boards/nucleo-l031k6/doc.txt
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## Overview
The Nucleo-L031K6 is a board from ST's Nucleo family supporting ARM Cortex-M0
STM32L031K6T6 microcontroller with 8KiB or RAM and 32KiB of Flash.
STM32L031K6T6 microcontroller with 8KiB of RAM and 32KiB of Flash.
## Flashing the Board Using ST-LINK Removable Media

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boards/nucleo-l073rz/doc.txt
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## Overview
The Nucleo-L073RZ is a board from ST's Nucleo family supporting ARM Cortex-M0
STM32L073RZT6 microcontroller with 20KiB or RAM and 192KiB of Flash.
STM32L073RZT6 microcontroller with 20KiB of RAM and 192KiB of Flash.
## Pinout

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boards/nucleo-l432kc/doc.txt
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## Overview
The Nucleo-L432KC is a board from ST's Nucleo family supporting ARM Cortex-M4
STM32L432KCU6 microcontroller with 64KiB or RAM and 256KiB of Flash.
STM32L432KCU6 microcontroller with 64KiB of RAM and 256KiB of Flash.
## Flashing the Board Using ST-LINK Removable Media

2
boards/nucleo-l476rg/doc.txt
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@ -7,7 +7,7 @@
## Overview
The Nucleo-L476RG is a board from ST's Nucleo family supporting ARM Cortex-M4
STM32L476RG microcontroller with 128KiB or RAM and 1MiB of Flash.
STM32L476RG microcontroller with 128KiB of RAM and 1MiB of Flash.
## Pinout

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boards/nucleo-l552ze-q/doc.txt
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## Overview
The Nucleo-L552ZE-Q is a board from ST's Nucleo family supporting ARM Cortex-M33
STM32L552ZE ultra-low-pawer microcontroller with TrustZone, 256KiB or RAM and 512KiB
STM32L552ZE ultra-low-pawer microcontroller with TrustZone, 256KiB of RAM and 512KiB
of Flash.
## Hardware

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cpu/stm32/periph/gpio_ll_irq.c
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@ -316,7 +316,7 @@ void isr_exti(void)
/* emulate level triggered IRQs by asserting the IRQ again in software, if needed */
if (level_triggered & (1UL << pin)) {
/* Trading a couple of CPU cycles to not having to store port connected to EXTI in RAM.
* A simple look up table would save ~6 instructions for the cost 64 byte or RAM. */
* A simple look up table would save ~6 instructions for the cost 64 bytes of RAM. */
gpio_port_t port = GPIO_PORT(get_exti_port(pin));
uint32_t actual_level = gpio_ll_read(port) & (1UL << pin);
uint32_t trigger_level = EXTI_REG_RTSR & (1UL << pin);