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cpu/nrf5x_common: remove local vendor header files from sourcetree

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crasbe 2025-10-16 15:51:14 +02:00
parent 9dd2e5e38f
commit 4752d2e291
34 changed files with 0 additions and 161360 deletions
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1300
cpu/nrf51/include/vendor/nrf51.h vendored
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cpu/nrf51/include/vendor/nrf51822_peripherals.h vendored
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/*
Copyright (c) 2010 - 2021, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
/* This file is deprecated */
#ifndef _NRF51822_PERIPHERALS_H
#define _NRF51822_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAMON_REGISTERS_PRESENT
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 1
#define P0_PIN_NUM 32
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
/* MPU and BPROT */
#define BPROT_PRESENT
#define BPROT_REGIONS_SIZE 4096
#define BPROT_REGIONS_NUM 64
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos4dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 8
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 16
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 4
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 3
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 16
#define TIMER2_MAX_SIZE 16
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 2
/* Serial Peripheral Interface Slave with DMA */
#define SPIS_PRESENT
#define SPIS_COUNT 1
#define SPIS1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 2
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Analog to Digital Converter */
#define ADC_PRESENT
#define ADC_COUNT 1
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 4
/* Low Power Comparator */
#define LPCOMP_PRESENT
#define LPCOMP_COUNT 1
#define LPCOMP_REFSEL_RESOLUTION 8
#endif // _NRF51822_PERIPHERALS_H

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cpu/nrf51/include/vendor/nrf51_bitfields.h vendored
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cpu/nrf52/include/vendor/nrf52.h vendored
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cpu/nrf52/include/vendor/nrf52805.h vendored
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cpu/nrf52/include/vendor/nrf52805_bitfields.h vendored
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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52805_PERIPHERALS_H
#define _NRF52805_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#define POWER_FEATURE_RAM_REGISTERS_COUNT 3
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 1
#define P0_PIN_NUM 32
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
/* MPU and BPROT */
#define BPROT_PRESENT
#define BPROT_REGIONS_SIZE 4096
#define BPROT_REGIONS_NUM 48
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 8
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos4dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 10
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 2
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 3
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 1
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 1
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM0_EASYDMA_MAXCNT_SIZE 14
#define SPIM1_EASYDMA_MAXCNT_SIZE 14
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 1
#define SPIS0_EASYDMA_MAXCNT_SIZE 14
#define SPIS1_EASYDMA_MAXCNT_SIZE 14
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 1
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 1
#define TWIM0_EASYDMA_MAXCNT_SIZE 14
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 1
#define TWIS0_EASYDMA_MAXCNT_SIZE 14
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 1
#define UARTE0_EASYDMA_MAXCNT_SIZE 14
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_EASYDMA_MAXCNT_SIZE 15
#define SAADC_CH_NUM 8
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
#endif // _NRF52805_PERIPHERALS_H

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cpu/nrf52/include/vendor/nrf52810.h vendored
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cpu/nrf52/include/vendor/nrf52810_bitfields.h vendored
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cpu/nrf52/include/vendor/nrf52810_name_change.h vendored
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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF52810_NAME_CHANGE_H
#define NRF52810_NAME_CHANGE_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the updates made to nrf52810.h and
* nrf52810_bitfields.h. The macros defined in this file were available previously. Do not use these
* macros on purpose. Use the ones defined in nrf52810.h and nrf52810_bitfields.h instead.
*/
/* IRQ */
/* Changes of interrupt names */
#define SPIM0_SPIS0_IRQn SPIM0_SPIS0_SPI0_IRQn
#define TWIM0_TWIS0_IRQn TWIM0_TWIS0_TWI0_IRQn
#define UARTE0_IRQn UARTE0_UART0_IRQn
#define SPIM0_SPIS0_IRQHandler SPIM0_SPIS0_SPI0_IRQHandler
#define TWIM0_TWIS0_IRQHandler TWIM0_TWIS0_TWI0_IRQHandler
#define UARTE0_IRQHandler UARTE0_UART0_IRQHandler
/*lint --flb "Leave library region" */
#endif /* NRF52810_NAME_CHANGE_H */

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52810_PERIPHERALS_H
#define _NRF52810_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#define POWER_FEATURE_RAM_REGISTERS_COUNT 3
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 1
#define P0_PIN_NUM 32
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
/* MPU and BPROT */
#define BPROT_PRESENT
#define BPROT_REGIONS_SIZE 4096
#define BPROT_REGIONS_NUM 48
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 8
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos4dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 2
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 3
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 1
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 1
#define SPIM0_MAX_DATARATE 8
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM0_EASYDMA_MAXCNT_SIZE 10
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 1
#define SPIS0_EASYDMA_MAXCNT_SIZE 10
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 1
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 1
#define TWIM0_EASYDMA_MAXCNT_SIZE 10
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 1
#define TWIS0_EASYDMA_MAXCNT_SIZE 10
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 1
#define UARTE0_EASYDMA_MAXCNT_SIZE 10
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_EASYDMA_MAXCNT_SIZE 15
#define SAADC_CH_NUM 8
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 1
#define PWM0_CH_NUM 4
#define PWM0_EASYDMA_MAXCNT_SIZE 15
/* Pulse Density Modulator */
#define PDM_PRESENT
#define PDM_COUNT 1
#define PDM_EASYDMA_MAXCNT_SIZE 15
#endif // _NRF52810_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52811_PERIPHERALS_H
#define _NRF52811_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#define POWER_FEATURE_RAM_REGISTERS_COUNT 3
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 1
#define P0_PIN_NUM 32
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
/* MPU and BPROT */
#define BPROT_PRESENT
#define BPROT_REGIONS_SIZE 4096
#define BPROT_REGIONS_NUM 48
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 8
#define RADIO_FEATURE_IEEE_802_15_4_PRESENT
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos4dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 2
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 3
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 2
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 2
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM0_EASYDMA_MAXCNT_SIZE 14
#define SPIM1_EASYDMA_MAXCNT_SIZE 14
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 2
#define SPIS0_EASYDMA_MAXCNT_SIZE 14
#define SPIS1_EASYDMA_MAXCNT_SIZE 14
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 1
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 1
#define TWIM0_EASYDMA_MAXCNT_SIZE 14
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 1
#define TWIS0_EASYDMA_MAXCNT_SIZE 14
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 1
#define UARTE0_EASYDMA_MAXCNT_SIZE 14
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_EASYDMA_MAXCNT_SIZE 15
#define SAADC_CH_NUM 8
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 1
#define PWM0_CH_NUM 4
#define PWM0_EASYDMA_MAXCNT_SIZE 15
/* Pulse Density Modulator */
#define PDM_PRESENT
#define PDM_COUNT 1
#define PDM_EASYDMA_MAXCNT_SIZE 15
#endif // _NRF52811_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52820_PERIPHERALS_H
#define _NRF52820_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#define POWER_FEATURE_RAM_REGISTERS_COUNT 4
#define POWER_FEATURE_VDDH_PRESENT
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 1
#define P0_PIN_NUM (18)
#define P0_FEATURE_PINS_PRESENT (nrf52_errata_230() ? 0xF0168E3Ful : 0x7017C1FFul)
/* ACL */
#define ACL_PRESENT
#define ACL_REGIONS_COUNT 8
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 14
#define RADIO_FEATURE_IEEE_802_15_4_PRESENT
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos8dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 6
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
#define EGU2_CH_NUM 16
#define EGU3_CH_NUM 16
#define EGU4_CH_NUM 16
#define EGU5_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 4
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER3_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
#define TIMER3_CC_NUM 6
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 2
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 2
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM0_EASYDMA_MAXCNT_SIZE 15
#define SPIM1_EASYDMA_MAXCNT_SIZE 15
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 2
#define SPIS0_EASYDMA_MAXCNT_SIZE 15
#define SPIS1_EASYDMA_MAXCNT_SIZE 15
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 2
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 2
#define TWIM0_EASYDMA_MAXCNT_SIZE 15
#define TWIM1_EASYDMA_MAXCNT_SIZE 15
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 2
#define TWIS0_EASYDMA_MAXCNT_SIZE 15
#define TWIS1_EASYDMA_MAXCNT_SIZE 15
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 1
#define UARTE0_EASYDMA_MAXCNT_SIZE 15
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Universal Serial Bus Device */
#define USBD_PRESENT
#define USBD_COUNT 1
#define USBD_EASYDMA_MAXCNT_SIZE 7
#endif // _NRF52820_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52832_PERIPHERALS_H
#define _NRF52832_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#if defined(CPU_MODEL_NRF52832XXAA)
#define POWER_FEATURE_RAM_REGISTERS_COUNT 8
#elif defined(CPU_MODEL_NRF52832XXAB)
#define POWER_FEATURE_RAM_REGISTERS_COUNT 4
#endif
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
#define NVMC_FEATURE_CACHE_PRESENT
/* Floating Point Unit */
#define FPU_PRESENT
#define FPU_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* Memory Watch Unit */
#define MWU_PRESENT
#define MWU_COUNT 1
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 1
#define P0_PIN_NUM 32
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
/* MPU and BPROT */
#define BPROT_PRESENT
#define BPROT_REGIONS_SIZE 4096
#if defined(CPU_MODEL_NRF52832XXAA)
#define BPROT_REGIONS_NUM 128
#elif defined(CPU_MODEL_NRF52832XXAB)
#define BPROT_REGIONS_NUM 64
#endif
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 8
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos4dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* NFC Tag */
#define NFCT_PRESENT
#define NFCT_COUNT 1
#define NFCT_EASYDMA_MAXCNT_SIZE 9
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 6
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
#define EGU2_CH_NUM 16
#define EGU3_CH_NUM 16
#define EGU4_CH_NUM 16
#define EGU5_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 5
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER3_MAX_SIZE 32
#define TIMER4_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
#define TIMER3_CC_NUM 6
#define TIMER4_CC_NUM 6
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 3
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
#define RTC2_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 3
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 3
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM2_MAX_DATARATE 8
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM2_FEATURE_DCX_PRESENT 0
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM2_FEATURE_RXDELAY_PRESENT 0
#define SPIM0_EASYDMA_MAXCNT_SIZE 8
#define SPIM1_EASYDMA_MAXCNT_SIZE 8
#define SPIM2_EASYDMA_MAXCNT_SIZE 8
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 3
#define SPIS0_EASYDMA_MAXCNT_SIZE 8
#define SPIS1_EASYDMA_MAXCNT_SIZE 8
#define SPIS2_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 2
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 2
#define TWIM0_EASYDMA_MAXCNT_SIZE 8
#define TWIM1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 2
#define TWIS0_EASYDMA_MAXCNT_SIZE 8
#define TWIS1_EASYDMA_MAXCNT_SIZE 8
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 1
#define UARTE0_EASYDMA_MAXCNT_SIZE 8
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_EASYDMA_MAXCNT_SIZE 15
#define SAADC_CH_NUM 8
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Low Power Comparator */
#define LPCOMP_PRESENT
#define LPCOMP_COUNT 1
#define LPCOMP_REFSEL_RESOLUTION 16
#define LPCOMP_FEATURE_HYST_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 3
#define PWM0_CH_NUM 4
#define PWM1_CH_NUM 4
#define PWM2_CH_NUM 4
#define PWM0_EASYDMA_MAXCNT_SIZE 15
#define PWM1_EASYDMA_MAXCNT_SIZE 15
#define PWM2_EASYDMA_MAXCNT_SIZE 15
/* Pulse Density Modulator */
#define PDM_PRESENT
#define PDM_COUNT 1
#define PDM_EASYDMA_MAXCNT_SIZE 15
/* Inter-IC Sound Interface */
#define I2S_PRESENT
#define I2S_COUNT 1
#define I2S_EASYDMA_MAXCNT_SIZE 14
#endif // _NRF52832_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52833_PERIPHERALS_H
#define _NRF52833_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
#define CLOCK_FEATURE_LFXO_EXTENDED_DEBOUNCE_PRESENT
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#define POWER_FEATURE_RAM_REGISTERS_COUNT 9
#define POWER_FEATURE_VDDH_PRESENT
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
#define NVMC_FEATURE_CACHE_PRESENT
/* Floating Point Unit */
#define FPU_PRESENT
#define FPU_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* Memory Watch Unit */
#define MWU_PRESENT
#define MWU_COUNT 1
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 2
#define P0_PIN_NUM 32
#define P1_PIN_NUM 10
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
#define P1_FEATURE_PINS_PRESENT 0x000003FFUL
/* ACL */
#define ACL_PRESENT
#define ACL_REGIONS_COUNT 8
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 8
#define RADIO_FEATURE_IEEE_802_15_4_PRESENT
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos8dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* NFC Tag */
#define NFCT_PRESENT
#define NFCT_COUNT 1
#define NFCT_EASYDMA_MAXCNT_SIZE 9
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 6
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
#define EGU2_CH_NUM 16
#define EGU3_CH_NUM 16
#define EGU4_CH_NUM 16
#define EGU5_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 5
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER3_MAX_SIZE 32
#define TIMER4_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
#define TIMER3_CC_NUM 6
#define TIMER4_CC_NUM 6
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 3
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
#define RTC2_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 3
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 4
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM2_MAX_DATARATE 8
#define SPIM3_MAX_DATARATE 32
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 1
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM2_FEATURE_DCX_PRESENT 0
#define SPIM3_FEATURE_DCX_PRESENT 1
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM2_FEATURE_RXDELAY_PRESENT 0
#define SPIM3_FEATURE_RXDELAY_PRESENT 1
#define SPIM0_EASYDMA_MAXCNT_SIZE 16
#define SPIM1_EASYDMA_MAXCNT_SIZE 16
#define SPIM2_EASYDMA_MAXCNT_SIZE 16
#define SPIM3_EASYDMA_MAXCNT_SIZE 16
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 3
#define SPIS0_EASYDMA_MAXCNT_SIZE 16
#define SPIS1_EASYDMA_MAXCNT_SIZE 16
#define SPIS2_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 2
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 2
#define TWIM0_EASYDMA_MAXCNT_SIZE 16
#define TWIM1_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 2
#define TWIS0_EASYDMA_MAXCNT_SIZE 16
#define TWIS1_EASYDMA_MAXCNT_SIZE 16
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
#define UART0_FEATURE_ODD_PARITY_PRESENT
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 2
#define UARTE0_EASYDMA_MAXCNT_SIZE 16
#define UARTE1_EASYDMA_MAXCNT_SIZE 16
#define UARTE0_FEATURE_ODD_PARITY_PRESENT
#define UARTE1_FEATURE_ODD_PARITY_PRESENT
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_EASYDMA_MAXCNT_SIZE 15
#define SAADC_CH_NUM 8
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Low Power Comparator */
#define LPCOMP_PRESENT
#define LPCOMP_COUNT 1
#define LPCOMP_REFSEL_RESOLUTION 16
#define LPCOMP_FEATURE_HYST_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 4
#define PWM0_CH_NUM 4
#define PWM1_CH_NUM 4
#define PWM2_CH_NUM 4
#define PWM3_CH_NUM 4
#define PWM0_EASYDMA_MAXCNT_SIZE 15
#define PWM1_EASYDMA_MAXCNT_SIZE 15
#define PWM2_EASYDMA_MAXCNT_SIZE 15
#define PWM3_EASYDMA_MAXCNT_SIZE 15
/* Pulse Density Modulator */
#define PDM_PRESENT
#define PDM_COUNT 1
#define PDM_EASYDMA_MAXCNT_SIZE 15
/* Inter-IC Sound Interface */
#define I2S_PRESENT
#define I2S_COUNT 1
#define I2S_EASYDMA_MAXCNT_SIZE 14
/* Universal Serial Bus Device */
#define USBD_PRESENT
#define USBD_COUNT 1
#define USBD_EASYDMA_MAXCNT_SIZE 7
#endif // _NRF52833_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF52840_NAME_CHANGE_H
#define NRF52840_NAME_CHANGE_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the updates made to nrf52840.h and
* nrf52840_bitfields.h. The macros defined in this file were available previously. Do not use these
* macros on purpose. Use the ones defined in nrf52810.h and nrf52810_bitfields.h instead.
*/
/* IRQ */
/* Some IRQns have changed name. */
#ifndef POWER_CLOCK_IRQn
#define POWER_CLOCK_IRQn CLOCK_POWER_IRQn
#endif
#ifndef UARTE0_UART0_IRQn
#define UARTE0_UART0_IRQn UART0_UARTE0_IRQn
#endif
#ifndef SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
#define SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn SPI0_SPIM0_SPIS0_TWI0_TWIM0_TWIS0_IRQn
#endif
#ifndef SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
#define SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn SPI1_SPIM1_SPIS1_TWI1_TWIM1_TWIS1_IRQn
#endif
#ifndef CCM_AAR_IRQn
#define CCM_AAR_IRQn AAR_CCM_IRQn
#endif
#ifndef SPIM2_SPIS2_SPI2_IRQn
#define SPIM2_SPIS2_SPI2_IRQn SPI2_SPIM2_SPIS2_IRQn
#endif
#ifndef SWI0_EGU0_IRQn
#define SWI0_EGU0_IRQn EGU0_SWI0_IRQn
#endif
#ifndef SWI1_EGU1_IRQn
#define SWI1_EGU1_IRQn EGU1_SWI1_IRQn
#endif
#ifndef SWI2_EGU2_IRQn
#define SWI2_EGU2_IRQn EGU2_SWI2_IRQn
#endif
#ifndef SWI3_EGU3_IRQn
#define SWI3_EGU3_IRQn EGU3_SWI3_IRQn
#endif
#ifndef SWI4_EGU4_IRQn
#define SWI4_EGU4_IRQn EGU4_SWI4_IRQn
#endif
#ifndef SWI5_EGU5_IRQn
#define SWI5_EGU5_IRQn EGU5_SWI5_IRQn
#endif
/* Some IRQHandlers have changed name. */
#ifndef POWER_CLOCK_IRQHandler
#define POWER_CLOCK_IRQHandler CLOCK_POWER_IRQHandler
#endif
#ifndef UARTE0_UART0_IRQHandler
#define UARTE0_UART0_IRQHandler UART0_UARTE0_IRQHandler
#endif
#ifndef SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
#define SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler SPI0_SPIM0_SPIS0_TWI0_TWIM0_TWIS0_IRQHandler
#endif
#ifndef SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
#define SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler SPI1_SPIM1_SPIS1_TWI1_TWIM1_TWIS1_IRQHandler
#endif
#ifndef CCM_AAR_IRQHandler
#define CCM_AAR_IRQHandler AAR_CCM_IRQHandler
#endif
#ifndef SPIM2_SPIS2_SPI2_IRQHandler
#define SPIM2_SPIS2_SPI2_IRQHandler SPI2_SPIM2_SPIS2_IRQHandler
#endif
#ifndef SWI0_EGU0_IRQHandler
#define SWI0_EGU0_IRQHandler EGU0_SWI0_IRQHandler
#endif
#ifndef SWI1_EGU1_IRQHandler
#define SWI1_EGU1_IRQHandler EGU1_SWI1_IRQHandler
#endif
#ifndef SWI2_EGU2_IRQHandler
#define SWI2_EGU2_IRQHandler EGU2_SWI2_IRQHandler
#endif
#ifndef SWI3_EGU3_IRQHandler
#define SWI3_EGU3_IRQHandler EGU3_SWI3_IRQHandler
#endif
#ifndef SWI4_EGU4_IRQHandler
#define SWI4_EGU4_IRQHandler EGU4_SWI4_IRQHandler
#endif
#ifndef SWI5_EGU5_IRQHandler
#define SWI5_EGU5_IRQHandler EGU5_SWI5_IRQHandler
#endif
/* CC_HOST_RGF */
/* Enumerated Value Debug was renamed to DebugEnable in register HOST_IOT. */
#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Debug CC_HOST_RGF_HOST_IOT_LCS_LCS_DebugEnable
/*lint --flb "Leave library region" */
#endif /* NRF52840_NAME_CHANGE_H */

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/*
Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF52840_PERIPHERALS_H
#define _NRF52840_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
#define POWER_FEATURE_RAM_REGISTERS_PRESENT
#define POWER_FEATURE_RAM_REGISTERS_COUNT 9
#define POWER_FEATURE_VDDH_PRESENT
#define POWER_FEATURE_VDDH_DCDC_PRESENT
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
#define NVMC_FEATURE_CACHE_PRESENT
/* Floating Point Unit */
#define FPU_PRESENT
#define FPU_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* Memory Watch Unit */
#define MWU_PRESENT
#define MWU_COUNT 1
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 2
#define P0_PIN_NUM 32
#define P1_PIN_NUM 16
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
#define P1_FEATURE_PINS_PRESENT 0x0000FFFFUL
/* ACL */
#define ACL_PRESENT
#define ACL_REGIONS_COUNT 8
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 8
#define RADIO_FEATURE_IEEE_802_15_4_PRESENT
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos8dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* NFC Tag */
#define NFCT_PRESENT
#define NFCT_COUNT 1
#define NFCT_EASYDMA_MAXCNT_SIZE 9
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_FIXED_CH_NUM 12
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 6
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
#define EGU2_CH_NUM 16
#define EGU3_CH_NUM 16
#define EGU4_CH_NUM 16
#define EGU5_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 5
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER3_MAX_SIZE 32
#define TIMER4_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
#define TIMER3_CC_NUM 6
#define TIMER4_CC_NUM 6
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 3
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
#define RTC2_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 3
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 4
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM2_MAX_DATARATE 8
#define SPIM3_MAX_DATARATE 32
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 1
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM2_FEATURE_DCX_PRESENT 0
#define SPIM3_FEATURE_DCX_PRESENT 1
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM2_FEATURE_RXDELAY_PRESENT 0
#define SPIM3_FEATURE_RXDELAY_PRESENT 1
#define SPIM0_EASYDMA_MAXCNT_SIZE 16
#define SPIM1_EASYDMA_MAXCNT_SIZE 16
#define SPIM2_EASYDMA_MAXCNT_SIZE 16
#define SPIM3_EASYDMA_MAXCNT_SIZE 16
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 3
#define SPIS0_EASYDMA_MAXCNT_SIZE 16
#define SPIS1_EASYDMA_MAXCNT_SIZE 16
#define SPIS2_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 2
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 2
#define TWIM0_EASYDMA_MAXCNT_SIZE 16
#define TWIM1_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 2
#define TWIS0_EASYDMA_MAXCNT_SIZE 16
#define TWIS1_EASYDMA_MAXCNT_SIZE 16
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 2
#define UARTE0_EASYDMA_MAXCNT_SIZE 16
#define UARTE1_EASYDMA_MAXCNT_SIZE 16
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_EASYDMA_MAXCNT_SIZE 15
#define SAADC_CH_NUM 8
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Low Power Comparator */
#define LPCOMP_PRESENT
#define LPCOMP_COUNT 1
#define LPCOMP_REFSEL_RESOLUTION 16
#define LPCOMP_FEATURE_HYST_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 4
#define PWM0_CH_NUM 4
#define PWM1_CH_NUM 4
#define PWM2_CH_NUM 4
#define PWM3_CH_NUM 4
#define PWM0_EASYDMA_MAXCNT_SIZE 15
#define PWM1_EASYDMA_MAXCNT_SIZE 15
#define PWM2_EASYDMA_MAXCNT_SIZE 15
#define PWM3_EASYDMA_MAXCNT_SIZE 15
/* Pulse Density Modulator */
#define PDM_PRESENT
#define PDM_COUNT 1
#define PDM_EASYDMA_MAXCNT_SIZE 15
/* Inter-IC Sound Interface */
#define I2S_PRESENT
#define I2S_COUNT 1
#define I2S_EASYDMA_MAXCNT_SIZE 14
/* Universal Serial Bus Device */
#define USBD_PRESENT
#define USBD_COUNT 1
#define USBD_EASYDMA_MAXCNT_SIZE 7
/* ARM TrustZone Cryptocell 310 */
#define CRYPTOCELL_PRESENT
#define CRYPTOCELL_COUNT 1
#define CRYPTOCELL_VERSION 310
/*CRYPTOCELL AES engine*/
#define CC_AES_PRESENT
#define CC_AES_COUNT 1
/*CRYPTOCELL CHACHA engine*/
#define CC_CHACHA_PRESENT
#define CC_CHACHA_COUNT 1
/*CRYPTOCELL CTL interface*/
#define CC_CTL_PRESENT
#define CC_CTL_COUNT 1
/*CRYPTOCELL Data IN interface*/
#define CC_DIN_PRESENT
#define CC_DIN_COUNT 1
/*CRYPTOCELL Data OUT interface*/
#define CC_DOUT_PRESENT
#define CC_DOUT_COUNT 1
/*CRYPTOCELL HASH engine*/
#define CC_HASH_PRESENT
#define CC_HASH_COUNT 1
/*CRYPTOCELL HOST register interface*/
#define CC_HOST_RGF_PRESENT
#define CC_HOST_RGF_COUNT 1
/*CRYPTOCELL MISC interface*/
#define CC_MISC_PRESENT
#define CC_MISC_COUNT 1
/*CRYPTOCELL PKA engine*/
#define CC_PKA_PRESENT
#define CC_PKA_COUNT 1
/*CRYPTOCELL RNG engine*/
#define CC_RNG_PRESENT
#define CC_RNG_COUNT 1
/*CRYPTOCELL RNG SRAM interface*/
#define CC_RNG_SRAM_PRESENT
#define CC_RNG_SRAM_COUNT 1
/* Quad SPI */
#define QSPI_PRESENT
#define QSPI_COUNT 1
#define QSPI_EASYDMA_MAXCNT_SIZE 20
#endif // _NRF52840_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2023, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF5340_APPLICATION_NAME_CHANGE_H
#define NRF5340_APPLICATION_NAME_CHANGE_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the updates made to nrf5340_application.h and
* nrf5340_application_bitfields.h. The macros defined in this file were available previously. Do not use these
* macros on purpose. Use the ones defined in nrf5340_application.h and nrf5340_application_bitfields.h instead.
*/
/* The serial box interrupt ISRs were renamed. Adding old names as macros. */
#define SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQHandler SERIAL0_IRQHandler
#define SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQn SERIAL0_IRQn
#define SPIM1_SPIS1_TWIM1_TWIS1_UARTE1_IRQHandler SERIAL1_IRQHandler
#define SPIM1_SPIS1_TWIM1_TWIS1_UARTE1_IRQn SERIAL1_IRQn
#define SPIM2_SPIS2_TWIM2_TWIS2_UARTE2_IRQHandler SERIAL2_IRQHandler
#define SPIM2_SPIS2_TWIM2_TWIS2_UARTE2_IRQn SERIAL2_IRQn
#define SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQHandler SERIAL3_IRQHandler
#define SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQn SERIAL3_IRQn
/* DPPI */
#define DPPI_PRESENT DPPIC_PRESENT
#define DPPI_COUNT DPPIC_COUNT
#define DPPI_CH_NUM DPPIC_CH_NUM
#define DPPI_GROUP_NUM DPPIC_GROUP_NUM
/*lint --flb "Leave library region" */
#endif /* NRF5340_APPLICATION_NAME_CHANGE_H */

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/*
Copyright (c) 2010 - 2023, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF5340_PERIPHERALS_H
#define _NRF5340_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
#define CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
/* NVM instruction and data cache */
#define CACHE_PRESENT
#define CACHE_COUNT 1
/* Memory Protection Unit */
#define MPU_REGION_NUM 8
/* Regulators Peripheral */
#define REGULATORS_PRESENT
#define REGULATORS_COUNT 1
#define REGULATORS_FEATURE_VDDH_PRESENT
/* USB Regulator Peripheral */
#define USBREG_PRESENT
#define USBREG_COUNT 1
/* Volatile Memory Controller Peripheral */
#define VMC_PRESENT
#define VMC_COUNT 1
#define VMC_FEATURE_RAM_REGISTERS_PRESENT
#define VMC_FEATURE_RAM_REGISTERS_COUNT 8
/* Floating Point Unit */
#define FPU_PRESENT
#define FPU_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Inter-Processor Communication */
#define IPC_PRESENT
#define IPC_COUNT 1
#define IPC_CH_NUM 16
#define IPC_CONF_NUM 16
#define IPC_GPMEM_NUM 2
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 2
#define P0_PIN_NUM 32
#define P1_PIN_NUM 16
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
#define P1_FEATURE_PINS_PRESENT 0x0000FFFFUL
/* NFC Tag */
#define NFCT_PRESENT
#define NFCT_COUNT 1
#define NFCT_EASYDMA_MAXCNT_SIZE 9
/* Distributed Peripheral to Peripheral Interconnect */
#define DPPIC_PRESENT
#define DPPIC_COUNT 1
#define DPPIC_CH_NUM 32
#define DPPIC_GROUP_NUM 6
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 6
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
#define EGU2_CH_NUM 16
#define EGU3_CH_NUM 16
#define EGU4_CH_NUM 16
#define EGU5_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 3
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER0_CC_NUM 6
#define TIMER1_CC_NUM 6
#define TIMER2_CC_NUM 6
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 4
#define RTC1_CC_NUM 4
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 2
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 5
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM2_MAX_DATARATE 8
#define SPIM3_MAX_DATARATE 8
#define SPIM4_MAX_DATARATE 32
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM4_FEATURE_HARDWARE_CSN_PRESENT 1
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM1_FEATURE_DCX_PRESENT 0
#define SPIM2_FEATURE_DCX_PRESENT 0
#define SPIM3_FEATURE_DCX_PRESENT 0
#define SPIM4_FEATURE_DCX_PRESENT 1
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM1_FEATURE_RXDELAY_PRESENT 0
#define SPIM2_FEATURE_RXDELAY_PRESENT 0
#define SPIM3_FEATURE_RXDELAY_PRESENT 0
#define SPIM4_FEATURE_RXDELAY_PRESENT 1
#define SPIM0_EASYDMA_MAXCNT_SIZE 16
#define SPIM1_EASYDMA_MAXCNT_SIZE 16
#define SPIM2_EASYDMA_MAXCNT_SIZE 16
#define SPIM3_EASYDMA_MAXCNT_SIZE 16
#define SPIM4_EASYDMA_MAXCNT_SIZE 16
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 4
#define SPIS0_EASYDMA_MAXCNT_SIZE 16
#define SPIS1_EASYDMA_MAXCNT_SIZE 16
#define SPIS2_EASYDMA_MAXCNT_SIZE 16
#define SPIS3_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 4
#define TWIM0_EASYDMA_MAXCNT_SIZE 16
#define TWIM1_EASYDMA_MAXCNT_SIZE 16
#define TWIM2_EASYDMA_MAXCNT_SIZE 16
#define TWIM3_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 4
#define TWIS0_EASYDMA_MAXCNT_SIZE 16
#define TWIS1_EASYDMA_MAXCNT_SIZE 16
#define TWIS2_EASYDMA_MAXCNT_SIZE 16
#define TWIS3_EASYDMA_MAXCNT_SIZE 16
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 4
#define UARTE0_EASYDMA_MAXCNT_SIZE 16
#define UARTE1_EASYDMA_MAXCNT_SIZE 16
#define UARTE2_EASYDMA_MAXCNT_SIZE 16
#define UARTE3_EASYDMA_MAXCNT_SIZE 16
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 2
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
#define SAADC_CH_NUM 8
#define SAADC_EASYDMA_MAXCNT_SIZE 15
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 2
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Low Power Comparator */
#define LPCOMP_PRESENT
#define LPCOMP_COUNT 1
#define LPCOMP_REFSEL_RESOLUTION 16
#define LPCOMP_FEATURE_HYST_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 4
#define PWM0_CH_NUM 4
#define PWM1_CH_NUM 4
#define PWM2_CH_NUM 4
#define PWM3_CH_NUM 4
#define PWM0_EASYDMA_MAXCNT_SIZE 15
#define PWM1_EASYDMA_MAXCNT_SIZE 15
#define PWM2_EASYDMA_MAXCNT_SIZE 15
#define PWM3_EASYDMA_MAXCNT_SIZE 15
/* ARM TrustZone Cryptocell 310 */
#define CRYPTOCELL_PRESENT
#define CRYPTOCELL_COUNT 1
/* Quad SPI */
#define QSPI_PRESENT
#define QSPI_COUNT 1
#define QSPI_EASYDMA_MAXCNT_SIZE 20
/* Mutex*/
#define MUTEX_PRESENT
#define MUTEX_COUNT 1
/* Key management Unit */
#define KMU_PRESENT
#define KMU_COUNT 1
/* Pulse density modulation */
#define PDM_PRESENT
#define PDM_COUNT 1
/* Secure Peripheral Unit */
#define SPU_PRESENT
#define SPU_COUNT 1
#define SPU_RAMREGION_SIZE 0x2000ul
/* Inter-IC Sound Interface */
#define I2S_PRESENT
#define I2S_COUNT 1
#define I2S_EASYDMA_MAXCNT_SIZE 14
/* Universal Serial Bus Device */
#define USBD_PRESENT
#define USBD_COUNT 1
#define USBD_EASYDMA_MAXCNT_SIZE 7
/* Oscillators */
#define OSCILLATORS_PRESENT
#define OSCILLATORS_COUNT 1
#endif // _NRF5340_PERIPHERALS_H

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/*
Copyright (c) 2010 - 2023, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF5340_NETWORK_NAME_CHANGE_H
#define NRF5340_NETWORK_NAME_CHANGE_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the updates made to nrf5340_network.h and
* nrf5340_network_bitfields.h. The macros defined in this file were available previously. Do not use these
* macros on purpose. Use the ones defined in nrf5340_network.h and nrf5340_network_bitfields.h instead.
*/
/* The serial box interrupt ISRs were renamed. Adding old names as macros. */
#define SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQHandler SERIAL0_IRQHandler
#define SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQn SERIAL0_IRQn
/* DPPI */
#define DPPI_PRESENT DPPIC_PRESENT
#define DPPI_COUNT DPPIC_COUNT
#define DPPI_CH_NUM DPPIC_CH_NUM
#define DPPI_GROUP_NUM DPPIC_GROUP_NUM
/*lint --flb "Leave library region" */
#endif /* NRF5340_NETWORK_NAME_CHANGE_H */

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/*
Copyright (c) 2010 - 2023, Nordic Semiconductor ASA All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NRF5340_NETWORK_PERIPHERALS_H
#define _NRF5340_NETWORK_PERIPHERALS_H
/* Clock Peripheral */
#define CLOCK_PRESENT
#define CLOCK_COUNT 1
/* Power Peripheral */
#define POWER_PRESENT
#define POWER_COUNT 1
/* Non-Volatile Memory Controller */
#define NVMC_PRESENT
#define NVMC_COUNT 1
#define NVMC_FEATURE_CACHE_PRESENT
/* Voltage request peripheral */
#define VREQCTRL_PRESENT
#define VREQCTRL_COUNT 1
/* Volatile Memory Controller Peripheral */
#define VMC_PRESENT
#define VMC_COUNT 1
#define VMC_FEATURE_RAM_REGISTERS_PRESENT
#define VMC_FEATURE_RAM_REGISTERS_COUNT 4
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Inter-Processor Communication */
#define IPC_PRESENT
#define IPC_COUNT 1
#define IPC_CH_NUM 16
#define IPC_CONF_NUM 16
#define IPC_GPMEM_NUM 2
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 2
#define P0_PIN_NUM 32
#define P1_PIN_NUM 16
#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
#define P1_FEATURE_PINS_PRESENT 0x0000FFFFUL
/* ACL */
#define ACL_PRESENT
#define ACL_REGIONS_COUNT 8
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
#define RADIO_EASYDMA_MAXCNT_SIZE 9
#define RADIO_FEATURE_IEEE_802_15_4_PRESENT
#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_0dBm
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* Distributed Peripheral to Peripheral Interconnect */
#define DPPIC_PRESENT
#define DPPIC_COUNT 1
#define DPPIC_CH_NUM 32
#define DPPIC_GROUP_NUM 6
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 1
#define EGU0_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 3
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER0_CC_NUM 8
#define TIMER1_CC_NUM 8
#define TIMER2_CC_NUM 8
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 2
#define RTC0_CC_NUM 4
#define RTC1_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 1
#define UARTE0_EASYDMA_MAXCNT_SIZE 16
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 1
#define SPIM0_MAX_DATARATE 8
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM0_FEATURE_DCX_PRESENT 0
#define SPIM0_FEATURE_RXDELAY_PRESENT 0
#define SPIM0_EASYDMA_MAXCNT_SIZE 16
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 1
#define SPIS0_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 1
#define TWIM0_EASYDMA_MAXCNT_SIZE 16
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 1
#define TWIS0_EASYDMA_MAXCNT_SIZE 16
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 4
/* Mutex*/
#define MUTEX_PRESENT
#define MUTEX_COUNT 1
#endif // _NRF5340_NETWORK_PERIPHERALS_H