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periph/spi: add doc on low power implications
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@ -43,6 +43,19 @@
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* configures the bus with specific parameters (clock, mode) for the duration
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* of that transaction.
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*
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* # (Low-) Power Implications
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*
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* As SPI buses are shared peripherals and the interfaces implements a
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* transaction based paradigm, we leverage this for the SPI peripherals power
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* management. After calling spi_init(), the SPI peripheral **should** be
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* completely powered off (e.g. through peripheral clock gating). It **should**
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* subsequently only be powered on and enabled in between spi_acquire() and
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* spi_release() blocks.
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*
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* In case the SPI driver implementation puts the active thread to sleep during
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* data transfer (e.g. when using DMA), the implementation might need to block
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* certain power states during that time.
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*
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* @{
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* @file
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* @brief Low-level SPI peripheral driver interface definition
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