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cpu/fe310: ensure all clock modes are built

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This commit is contained in:
Alexandre Abadie 2020-08-30 10:22:35 +02:00
parent 239999fe73
commit 49e11626d3
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GPG Key ID: 1C919A403CAE1405
1 changed files with 41 additions and 38 deletions
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79
cpu/fe310/clock.c
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@ -22,7 +22,7 @@
#include "vendor/prci_driver.h"
#if !(CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFXOSC_PLL)
#if CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFROSC_PLL
static uint32_t _cpu_frequency = 0;
#endif
@ -41,58 +41,59 @@ void clock_init(void)
PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(PLL_SEL_PLL);
}
#if CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFXOSC_PLL
/* Ensure HFXOSC is enabled */
PRCI_REG(PRCI_HFXOSCCFG) = XOSC_EN(1);
if (CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFXOSC_PLL) {
/* Ensure HFXOSC is enabled */
PRCI_REG(PRCI_HFXOSCCFG) = XOSC_EN(1);
/* Wait for HFXOSC to become ready */
while ((PRCI_REG(PRCI_HFXOSCCFG) & XOSC_RDY(1)) == 0);
/* Wait for HFXOSC to become ready */
while ((PRCI_REG(PRCI_HFXOSCCFG) & XOSC_RDY(1)) == 0);
/* Select HFXOSC as reference frequency and bypass PLL */
PRCI_REG(PRCI_PLLCFG) = PLL_REFSEL(PLL_REFSEL_HFXOSC) | PLL_BYPASS(1);
/* Select HFXOSC as reference frequency and bypass PLL */
PRCI_REG(PRCI_PLLCFG) = PLL_REFSEL(PLL_REFSEL_HFXOSC) | PLL_BYPASS(1);
#if CONFIG_USE_CLOCK_HFXOSC_PLL
/* Divide final output frequency by 1 */
PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
if (CONFIG_USE_CLOCK_HFXOSC_PLL) {
/* Divide final output frequency by 1 */
PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
/* Configure PLL */
PRCI_REG(PRCI_PLLCFG) |= PLL_R(CONFIG_CLOCK_PLL_R) | PLL_F(CONFIG_CLOCK_PLL_F) | PLL_Q(CONFIG_CLOCK_PLL_Q);
/* Configure PLL */
PRCI_REG(PRCI_PLLCFG) |= PLL_R(CONFIG_CLOCK_PLL_R) | PLL_F(CONFIG_CLOCK_PLL_F) | PLL_Q(CONFIG_CLOCK_PLL_Q);
/* Disable PLL Bypass */
PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
/* Disable PLL Bypass */
PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
/* Now it is safe to check for PLL Lock */
while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);
#endif
/* Now it is safe to check for PLL Lock */
while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);
}
/* Switch over to PLL Clock source */
PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(PLL_SEL_PLL);
/* Switch over to PLL Clock source */
PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(PLL_SEL_PLL);
/* Turn off the HFROSC */
PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
#elif CONFIG_USE_CLOCK_HFROSC_PLL
PRCI_set_hfrosctrim_for_f_cpu(CONFIG_CLOCK_DESIRED_FREQUENCY, PRCI_FREQ_UNDERSHOOT);
#else /* Clock HFROSC */
/* Disable Bypass */
PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
/* Turn off the HFROSC */
PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
}
else if (CONFIG_USE_CLOCK_HFROSC_PLL) {
PRCI_set_hfrosctrim_for_f_cpu(CONFIG_CLOCK_DESIRED_FREQUENCY, PRCI_FREQ_UNDERSHOOT);
}
else { /* Clock HFROSC */
/* Disable Bypass */
PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
/* Configure trim and divider values of HFROSC */
PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(CONFIG_CLOCK_HFROSC_DIV) | ROSC_TRIM(CONFIG_CLOCK_HFROSC_TRIM) | ROSC_EN(1));
/* Configure trim and divider values of HFROSC */
PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(CONFIG_CLOCK_HFROSC_DIV) | ROSC_TRIM(CONFIG_CLOCK_HFROSC_TRIM) | ROSC_EN(1));
/* Wait for HFROSC to be ready */
while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);
/* Wait for HFROSC to be ready */
while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);
/* Don't use PLL clock source */
PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(PLL_SEL_PLL);
#endif
/* Don't use PLL clock source */
PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(PLL_SEL_PLL);
}
}
uint32_t cpu_freq(void)
{
#if CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFXOSC_PLL
return CLOCK_CORECLOCK;
#else /* Clock frequency with HFROSC cannot be determined precisely from
settings */
#if CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFROSC_PLL
/* Clock frequency with HFROSC cannot be determined precisely from
settings */
/* If not done already, estimate the CPU frequency */
if (_cpu_frequency == 0) {
/* Ignore the first run (for icache reasons) */
@ -100,5 +101,7 @@ uint32_t cpu_freq(void)
_cpu_frequency = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
}
return _cpu_frequency;
#else
return CLOCK_CORECLOCK;
#endif
}