diff --git a/cpu/mc1322x/Makefile b/cpu/mc1322x/Makefile deleted file mode 100644 index 5a9b18274d..0000000000 --- a/cpu/mc1322x/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -MODULE =cpu - -DIRS = $(RIOTCPU)/arm7_common -ifneq (,$(filter mc1322x_adc,$(USEMODULE))) - DIRS += adc -endif -ifneq (,$(filter mc1322x_asm,$(USEMODULE))) - DIRS += asm -endif -ifneq (,$(filter mc1322x,$(USEMODULE))) - DIRS += maca -endif - -include $(RIOTBASE)/Makefile.base diff --git a/cpu/mc1322x/Makefile.include b/cpu/mc1322x/Makefile.include deleted file mode 100644 index 3e773fdc4d..0000000000 --- a/cpu/mc1322x/Makefile.include +++ /dev/null @@ -1,8 +0,0 @@ -INCLUDES += -I$(RIOTCPU)/$(CPU)/include -INCLUDES += -I$(RIOTCPU)/$(CPU)/maca/include - -include $(RIOTCPU)/arm7_common/Makefile.include - -export UNDEF += $(BINDIR)cpu/mc1322x_syscalls.o $(BINDIR)cpu/syscalls.o - -export USEMODULE += arm7_common diff --git a/cpu/mc1322x/adc/Makefile b/cpu/mc1322x/adc/Makefile deleted file mode 100644 index a4edfd7d06..0000000000 --- a/cpu/mc1322x/adc/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -INCLUDES = -I$(RIOTBASE)/cpu/mc1322x/adc/include - -MODULE =mc1322x_adc - -include $(RIOTBASE)/Makefile.base diff --git a/cpu/mc1322x/adc/adc.c b/cpu/mc1322x/adc/adc.c deleted file mode 100644 index a21fedea77..0000000000 --- a/cpu/mc1322x/adc/adc.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * adc.c - implementation of the Analog to Digital Converter module of the mc1322x MCU - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#include "mc1322x-adc.h" -#include "gpio.h" - -#define ADC_CLOCK_DIVIDER_300kHz 0x50 - -#ifndef REF_OSC -#define REF_OSC 24000000UL /* reference osc. frequency */ -#endif - -#define ADC_PRESCALE_CLK 1000000 /* targeted prescale clk */ -#define ADC_PRESCALE_VALUE ((REF_OSC / ADC_PRESCALE_CLK)-1) - -#define ADC_CONVERT_TIME 23 /* function of prescale clk. has to be >= 20us */ - -#define ADC_NUM_CHANS 8 - -/** - * Initializes the ADC module. - * - * Analog Clk set to 300kHz - * Prescale Clk set to 1MHz - * Convert Time set to 23us - * Not using timers or IRQs - */ -void adc_init(void) -{ - /* configure frequencies */ - ADC->CLOCK_DIVIDER = ADC_CLOCK_DIVIDER_300kHz; - ADC->PRESCALE = ADC_PRESCALE_VALUE; - - /* power on */ - ADC->CONTROLbits.ON = 0x1; - - /* ON-TIME must be >= 10us */ - ADC->ON_TIME = 0xa; - - /* should be >= 20us (6 ADC clks) */ - ADC->CONVERT_TIME = ADC_CONVERT_TIME; - - /* automated mode */ - ADC->MODE = 0x0; - - /* don't use IRQs */ - ADC->FIFO_CONTROL = 0x0; - - /* disable all input channels */ - ADC->SEQ_1 = 0x0; - /* sequence using convert time */ - ADC->SEQ_1bits.SEQ_MODE = 0x0; - /* enable battery reference voltage channel */ - ADC->SEQ_1bits.BATT = 0x1; - - /* disable all input channels */ - ADC->SEQ_2 = 0x0; - /* sequence using convert time */ - ADC->SEQ_2bits.SEQ_MODE = 0x0; -} - -/** - * Set up a given channel 0...7 for ADC usage. - * - * \param channel The channel to set up - */ -void adc_setup_channel(uint8_t channel) -{ - switch (channel) { - case 0: - ADC->SEQ_1bits.CH0 = 0x1; - GPIO->FUNC_SEL.ADC0 = 0x1; - GPIO->PAD_DIR.ADC0 = 0x0; - GPIO->PAD_KEEP.ADC0 = 0x0; - GPIO->PAD_PU_EN.ADC0 = 0; - break; - - case 1: - ADC->SEQ_1bits.CH1 = 0x1; - GPIO->FUNC_SEL.ADC1 = 0x1; - GPIO->PAD_DIR.ADC1 = 0x0; - GPIO->PAD_KEEP.ADC1 = 0x0; - GPIO->PAD_PU_EN.ADC1 = 0; - break; - - case 2: - ADC->SEQ_1bits.CH2 = 0x1; - GPIO->FUNC_SEL.ADC2 = 0x1; - GPIO->PAD_DIR.ADC2 = 0x0; - GPIO->PAD_KEEP.ADC2 = 0x0; - GPIO->PAD_PU_EN.ADC2 = 0; - break; - - case 3: - ADC->SEQ_1bits.CH3 = 0x1; - GPIO->FUNC_SEL.ADC3 = 0x1; - GPIO->PAD_DIR.ADC3 = 0x0; - GPIO->PAD_KEEP.ADC3 = 0x0; - GPIO->PAD_PU_EN.ADC3 = 0; - break; - - case 4: - ADC->SEQ_1bits.CH4 = 0x1; - GPIO->FUNC_SEL.ADC4 = 0x1; - GPIO->PAD_DIR.ADC4 = 0x0; - GPIO->PAD_KEEP.ADC4 = 0x0; - GPIO->PAD_PU_EN.ADC4 = 0; - break; - - case 5: - ADC->SEQ_1bits.CH5 = 0x1; - GPIO->FUNC_SEL.ADC5 = 0x1; - GPIO->PAD_DIR.ADC5 = 0x0; - GPIO->PAD_KEEP.ADC5 = 0x0; - GPIO->PAD_PU_EN.ADC5 = 0; - break; - - case 6: - ADC->SEQ_1bits.CH6 = 0x1; - GPIO->FUNC_SEL.ADC6 = 0x1; - GPIO->PAD_DIR.ADC6 = 0x0; - GPIO->PAD_KEEP.ADC6 = 0x0; - GPIO->PAD_PU_EN.ADC6 = 0; - break; - - case 7: - ADC->SEQ_1bits.CH7 = 0x1; - GPIO->FUNC_SEL.ADC7 = 0x1; - GPIO->PAD_DIR.ADC7 = 0x0; - GPIO->PAD_KEEP.ADC7 = 0x0; - GPIO->PAD_PU_EN.ADC7 = 0; - break; - } -} - -/** - * Read from the ADC FIFO - * Reads a 16 bit value from the ADC FIFO. - * Bits 15:12 contain the channel the value origin. - * Bits 11:0 contain the actual measured value. - * - * \return 16 Bits containing the channel and the measurement. - */ -uint16_t adc_read(void) -{ - /* wait for ADC result */ - while (ADC->FIFO_STATUSbits.EMPTY) { - continue; - } - - /* upper 4 bits contain channel number */ - return ADC->FIFO_READ; -} - -/** - * Flushes any measured values from the ADC FIFO until FIFO is empty. - */ -void adc_flush(void) -{ - while (!ADC->FIFO_STATUSbits.EMPTY) { - ADC->FIFO_READ; - } -} - -/** - * When using several channels simultaniously this function can read - * values from the ADC FIFO and store them in an array sorted by the - * channel number. - * - * \param channels_read An array of 8 uint16_t the measured values get - * stored into. The user could use ADC_NUM_CHANS - * to asure compliancy. - */ -void adc_service(uint16_t *channels_read) -{ - while (!ADC->FIFO_STATUSbits.EMPTY) { - uint16_t tmp = ADC->FIFO_READ; - - if ((tmp >> 12) < ADC_NUM_CHANS) { - channels_read[tmp >> 12] = tmp & 0x0fff; - } - } -} diff --git a/cpu/mc1322x/adc/include/mc1322x-adc.h b/cpu/mc1322x/adc/include/mc1322x-adc.h deleted file mode 100644 index ad9533555d..0000000000 --- a/cpu/mc1322x/adc/include/mc1322x-adc.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * mc1322x-adc.h - Structure definition for registers of the - * Analog to Digital Converter module of the mc1322x MCU - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - * This file is part of RIOT. - */ - -#ifndef MC1322X_ADC_H -#define MC1322X_ADC_H - -#include -#include "adc_legacy.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define ADC_BASE (0x8000D000) - -/* Structure-based register definitions */ -/* ADC registers are all 16-bit wide with 16-bit access only */ -struct ADC_struct { - union { - uint16_t COMP[8]; - struct { - uint16_t COMP_0; - uint16_t COMP_1; - uint16_t COMP_2; - uint16_t COMP_3; - uint16_t COMP_4; - uint16_t COMP_5; - uint16_t COMP_6; - uint16_t COMP_7; - }; - }; - uint16_t BAT_COMP_OVER; - uint16_t BAT_COMP_UNDER; - union { - uint16_t SEQ_1; - struct ADC_SEQ_1 { - uint16_t CH0: 1; - uint16_t CH1: 1; - uint16_t CH2: 1; - uint16_t CH3: 1; - uint16_t CH4: 1; - uint16_t CH5: 1; - uint16_t CH6: 1; - uint16_t CH7: 1; - uint16_t BATT: 1; - uint16_t : 6; - uint16_t SEQ_MODE: 1; - } SEQ_1bits; - }; - union { - uint16_t SEQ_2; - struct ADC_SEQ_2 { - uint16_t CH0: 1; - uint16_t CH1: 1; - uint16_t CH2: 1; - uint16_t CH3: 1; - uint16_t CH4: 1; - uint16_t CH5: 1; - uint16_t CH6: 1; - uint16_t CH7: 1; - uint16_t : 7; - uint16_t SEQ_MODE: 1; - } SEQ_2bits; - }; - union { - uint16_t CONTROL; - struct ADC_CONTROL { - uint16_t ON: 1; - uint16_t TIMER1_ON: 1; - uint16_t TIMER2_ON: 1; - uint16_t SOFT_RESET: 1; - uint16_t AD1_VREFHL_EN: 1; - uint16_t AD2_VREFHL_EN: 1; - uint16_t : 6; - uint16_t COMPARE_IRQ_MASK: 1; - uint16_t SEQ1_IRQ_MASK: 1; - uint16_t SEQ2_IRQ_MASK: 1; - uint16_t FIFO_IRQ_MASK: 1; - } CONTROLbits; - }; - uint16_t TRIGGERS; - uint16_t PRESCALE; - uint16_t reserved1; - uint16_t FIFO_READ; - uint16_t FIFO_CONTROL; - union { - uint16_t FIFO_STATUS; - struct ADC_FIFO_STATUS { - uint16_t LEVEL: 4; - uint16_t FULL: 1; - uint16_t EMPTY: 1; - uint16_t : 10; - } FIFO_STATUSbits; - }; - uint16_t reserved2[5]; - uint16_t SR_1_HIGH; - uint16_t SR_1_LOW; - uint16_t SR_2_HIGH; - uint16_t SR_2_LOW; - uint16_t ON_TIME; - uint16_t CONVERT_TIME; - uint16_t CLOCK_DIVIDER; - uint16_t reserved3; - union { - uint16_t OVERRIDE; - struct ADC_OVERRIDE { - uint16_t MUX1: 4; - uint16_t MUX2: 4; - uint16_t AD1_ON: 1; - uint16_t AD2_ON: 1; - uint16_t : 6; - } OVERRIDEbits; - }; - uint16_t IRQ; - uint16_t MODE; - uint16_t RESULT_1; - uint16_t RESULT_2; -}; - -static volatile struct ADC_struct *const ADC = (void *)(ADC_BASE); - -/* function prototypes */ -void adc_setup_channel(uint8_t channel); -void adc_flush(void); -void adc_service(uint16_t *channels_read); - -#ifdef __cplusplus -} -#endif - -#endif /* MC1322X_ADC_H */ diff --git a/cpu/mc1322x/asm/Makefile b/cpu/mc1322x/asm/Makefile deleted file mode 100644 index 82c3626ff9..0000000000 --- a/cpu/mc1322x/asm/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -INCLUDES = -I$(RIOTBASE)/cpu/mc1322x/asm/include - -MODULE =mc1322x_asm - -include $(RIOTBASE)/Makefile.base diff --git a/cpu/mc1322x/asm/asm.c b/cpu/mc1322x/asm/asm.c deleted file mode 100644 index a0f40e7d6d..0000000000 --- a/cpu/mc1322x/asm/asm.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * asm.c - implementation of some basic encryptions using the mc1322x ASM module - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#include "asm.h" - -/** - * Turns on the ASM module and runs a self test. - * The self test needs 3330 clocks. - */ -void asm_turn_on(void) -{ - ASM->CONTROL_1_bits.ON = 1; - ASM->CONTROL_1_bits.NORMAL_MODE = 1; - ASM->CONTROL_1_bits.SELF_TEST = 1; - ASM->CONTROL_0_bits.START = 1; - - /* if the self test fails, this will never be true */ - while (!ASM->STATUS_bits.TEST_PASS) { - continue; - } - - ASM->CONTROL_1_bits.SELF_TEST = 0; -} - -/** - * Turns the ASM module off. - */ -void asm_turn_off(void) -{ - ASM->CONTROL_1_bits.ON = 0; -} - -/** - * For CTR encryption/decryption run this on each 128 bit block with the same CTR instance. - * This function blocks until the encryption/decryption finished after 13 clocks. - * - * \param keys The 128 bit key. \sa asm_keys_t - * \param data A 128 bit block to encrypt/decrypt. Holds the encrypted/decrypted - * data when finished \sa asm_data_t - * \param ctr Structure holding the counter for the encryption/decrpytion. The user - * is responsible to provide a decend counter function. \sa asm_ctr_t - */ -void asm_ctr_encryption_blocking(asm_keys_t *keys, asm_data_t *data, asm_ctr_t *ctr) -{ - ASM->ENC_KEY_0 = keys->value_0; - ASM->ENC_KEY_1 = keys->value_1; - ASM->ENC_KEY_2 = keys->value_2; - ASM->ENC_KEY_3 = keys->value_3; - - ASM->CONTROL_1_bits.CTR = 1; - - ASM->DATA_0 = data->value_0; - ASM->DATA_1 = data->value_1; - ASM->DATA_2 = data->value_2; - ASM->DATA_3 = data->value_3; - - ASM->COUNTER_0 = ctr->value_0; - ASM->COUNTER_1 = ctr->value_1; - ASM->COUNTER_2 = ctr->value_2; - ASM->COUNTER_3 = ctr->value_3; - - ASM->CONTROL_0_bits.START = 1; - - while (!ASM->STATUS_bits.DONE) { - continue; - } - - data->value_0 = ASM->COUNTER_RESULT_0; - data->value_1 = ASM->COUNTER_RESULT_1; - data->value_2 = ASM->COUNTER_RESULT_2; - data->value_3 = ASM->COUNTER_RESULT_3; -} - -/** - * Usage of the MAC functions. - * 1. Initialize with the keys. ( asm_cbc_mac_init(keys) ) - * 2. Update for each 128 bit block of data ( asm_cbc_mac_update(data) ) - * 3. Finish and read the computed data ( asm_cbc_mac_finish(data) ) - */ - -/** - * Initialize a MAC stream. - * \param keys Holding the 128 bit key \sa asm_keys_t - */ -void asm_cbc_mac_init(asm_keys_t *keys) -{ - ASM->CONTROL_0_bits.CLEAR = 1; - - ASM->ENC_KEY_0 = keys->value_0; - ASM->ENC_KEY_1 = keys->value_1; - ASM->ENC_KEY_2 = keys->value_2; - ASM->ENC_KEY_3 = keys->value_3; - - ASM->CONTROL_1_bits.CBC = 1; -} - -/** - * Updates a MAC stream. - * \param data Structure holding 128 bits of data. \sa asm_data_t - */ -void asm_cbc_mac_update_blocking(asm_data_t *data) -{ - ASM->DATA_0 = data->value_0; - ASM->DATA_1 = data->value_1; - ASM->DATA_2 = data->value_2; - ASM->DATA_3 = data->value_3; - - ASM->CONTROL_0_bits.START = 1; - - while (!ASM->STATUS_bits.DONE) { - continue; - } -} - -/** - * Finishes a MAC stream - * \param data Structure holding the result of the MAC computation. \sa asm_data_t - */ -void asm_cbc_mac_finish(asm_data_t *data) -{ - data->value_0 = ASM->CBC_MAC_RESULT_0; - data->value_1 = ASM->CBC_MAC_RESULT_1; - data->value_2 = ASM->CBC_MAC_RESULT_2; - data->value_3 = ASM->CBC_MAC_RESULT_3; - - ASM->CONTROL_0_bits.CLEAR = 1; -} - -/** - * Initialize a MAC stream for combined mode. - * \param keys Holding the 128 bit key \sa asm_keys_t - */ -void asm_ctr_cbc_mac_init(asm_keys_t *keys) -{ - asm_cbc_mac_init(keys); -} - -/** - * Updates a MAC stream and encrypts data. - * \param data Structure holding 128 bits of data to use in MAC stream and to encrypt. - Holds the encrypted data when finished. \sa asm_data_t - * \param ctr Structure holding the counter for the encryption/decrpytion. The user - * is responsible to provide a decend counter function. \sa asm_ctr_t - */ -void asm_ctr_cbc_mac_update(asm_data_t *data, asm_ctr_t *ctr) -{ - ASM->DATA_0 = data->value_0; - ASM->DATA_1 = data->value_1; - ASM->DATA_2 = data->value_2; - ASM->DATA_3 = data->value_3; - - ASM->COUNTER_0 = ctr->value_0; - ASM->COUNTER_1 = ctr->value_1; - ASM->COUNTER_2 = ctr->value_2; - ASM->COUNTER_3 = ctr->value_3; - - ASM->CONTROL_0_bits.START = 1; - - while (!ASM->STATUS_bits.DONE) { - continue; - } - - data->value_0 = ASM->COUNTER_RESULT_0; - data->value_1 = ASM->COUNTER_RESULT_1; - data->value_2 = ASM->COUNTER_RESULT_2; - data->value_3 = ASM->COUNTER_RESULT_3; -} -/** - * Finishes a MAC stream for combined mode - * \param data Structure holding the result of the MAC computation. \sa asm_data_t - */ -void asm_ctr_cbc_mac_finish(asm_data_t *data) -{ - asm_cbc_mac_finish(data); -} diff --git a/cpu/mc1322x/asm/include/asm.h b/cpu/mc1322x/asm/include/asm.h deleted file mode 100644 index db69eef9ce..0000000000 --- a/cpu/mc1322x/asm/include/asm.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * asm.h - defines registers for the Advanced Security Module of the mc1322x - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef ASM_H -#define ASM_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define ASM_BASE_ADDRESS 0x80008000 - -struct ASM_struct { - uint32_t ENC_KEY_0; ///< Encryption key 0:31 - uint32_t ENC_KEY_1; ///< Encryption key 32:63 - uint32_t ENC_KEY_2; ///< Encryption key 64:95 - uint32_t ENC_KEY_3; ///< Encryption key 96:127 - uint32_t DATA_0; ///< Data 0:31 - uint32_t DATA_1; ///< Data 32:63 - uint32_t DATA_2; ///< Data 64:95 - uint32_t DATA_3; ///< Data 96:127 - uint32_t COUNTER_0; ///< Counter 0:31 - uint32_t COUNTER_1; ///< Counter 32:63 - uint32_t COUNTER_2; ///< Counter 64:95 - uint32_t COUNTER_3; ///< Counter 96:127 - uint32_t COUNTER_RESULT_0; ///< Result of CTR calculation 0:31 - uint32_t COUNTER_RESULT_1; ///< Result of CTR calculation 32:63 - uint32_t COUNTER_RESULT_2; ///< Result of CTR calculation 64:95 - uint32_t COUNTER_RESULT_3; ///< Result of CTR calculation 96:127 - uint32_t CBC_MAC_RESULT_0; ///< Result of CBC-MAC 0:31 - uint32_t CBC_MAC_RESULT_1; ///< Result of CBC-MAC 32:63 - uint32_t CBC_MAC_RESULT_2; ///< Result of CBC-MAC 64:95 - uint32_t CBC_MAC_RESULT_3; ///< Result of CBC-MAC 96:127 - union { - uint32_t CONTROL_0; ///< Control 0 register - struct ASM_CONTROL_0 { - uint32_t : 24; - uint32_t START: 1; ///< Start calculation - uint32_t CLEAR: 1; ///< Clear all configurations - uint32_t LOAD_MAC: 1; ///< Load an initila MAC value to continue - uint32_t : 4; - uint32_t CLEAR_IRQ; ///< Clear ASM IRQ bit - } CONTROL_0_bits; - }; - union { - uint32_t CONTROL_1; ///< Control 1 register - struct ASM_CONTROL_1 { - uint32_t ON: 1; ///< Turn ASM module on - uint32_t NORMAL_MODE: 1;///< exit boot mode - uint32_t BYPASS: 1; ///< Data passes through unmodified - uint32_t : 21; - uint32_t CBC: 1; ///< enable CBC-MAC mode - uint32_t CTR: 1; ///< enable CTR mode - uint32_t SELF_TEST: 1; ///< switch to self test mode - uint32_t : 4; - uint32_t MASK_IRQ: 1; ///< disables the ASM IRQ - } CONTROL_1_bits; - }; - union { - uint32_t STATUS; ///< status register - struct ASM_STATUS { - uint32_t : 24; - uint32_t DONE: 1; ///< operation is done - uint32_t TEST_PASS: 1; ///< self test did pass - uint32_t : 6; - } STATUS_bits; - }; - uint32_t reserved; - uint32_t CBC_MAC_0; ///< Result of MAC calculation 0:31 - uint32_t CBC_MAC_1; ///< Result of MAC calculation 32:63 - uint32_t CBC_MAC_2; ///< Result of MAC calculation 64:95 - uint32_t CBC_MAC_3; ///< Result of MAC calculation 96:127 -}; - -static volatile struct ASM_struct *const ASM = (void *)(ASM_BASE_ADDRESS); - -struct ASM_Container { - uint32_t value_0; - uint32_t value_1; - uint32_t value_2; - uint32_t value_3; -}; -typedef struct ASM_Container asm_keys_t; -typedef struct ASM_Container asm_data_t; -typedef struct ASM_Container asm_ctr_t; - -/* function prototypes */ - -void asm_turn_on(void); -void asm_turn_off(void); -void asm_ctr_encryption_blocking(asm_keys_t *keys, asm_data_t *data, asm_ctr_t *ctr); -void asm_cbc_mac_init(asm_keys_t *keys); -void asm_cbc_mac_update_blocking(asm_data_t *data); -void asm_cbc_mac_finish(asm_data_t *data); -void asm_ctr_cbc_mac_init(asm_keys_t *keys); -void asm_ctr_cbc_mac_update(asm_data_t *data, asm_ctr_t *ctr); -void asm_ctr_cbc_mac_finish(asm_data_t *data); - -#ifdef __cplusplus -} -#endif - -#endif /* ASM_H */ diff --git a/cpu/mc1322x/cpu.c b/cpu/mc1322x/cpu.c deleted file mode 100644 index bb37ad61b8..0000000000 --- a/cpu/mc1322x/cpu.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * cpu.c - MC1322X architecture common support functions - * Copyright (C) 2013 Oliver Hahm - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#include "mc1322x.h" -#include "cpu.h" -#include "lpm.h" -#include "arm_cpu.h" - -__attribute__((naked,noreturn)) void arm_reset(void) -{ - dINT(); - CRM->SW_RST = SW_RST_VAL; - while(1); -} - -enum lpm_mode lpm_set(enum lpm_mode target) { - (void) target; - return LPM_ON; -} - -/****************************************************************************** -** Function name: install_irq -** -** Descriptions: Install interrupt handler. -** A wrapper to register_isr to be consistant to lpc2387 -** implementation. -** parameters: Interrupt number, interrupt handler address, -** interrupt priority -** Returned value: true or false, return false if IntNum is out of range -** -******************************************************************************/ - -bool install_irq(int int_number, void *handler_addr, int priority) -{ - (void) priority; - register_isr(int_number, handler_addr); - return (true); -} diff --git a/cpu/mc1322x/gpio.c b/cpu/mc1322x/gpio.c deleted file mode 100644 index 750039f0b1..0000000000 --- a/cpu/mc1322x/gpio.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * gpio.c - GPIO driver for redbee - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - * This file is part of RIOT. - */ - -#include "gpio.h" - -static inline void gpio_pad_dir(volatile uint64_t data) -{ - GPIO->PAD_DIR0 = (data & 0xffffffff); - GPIO->PAD_DIR1 = (data >> 32); -} - -static inline void gpio_data(volatile uint64_t data) -{ - GPIO->DATA0 = (data & 0xffffffff); - GPIO->DATA1 = (data >> 32); -} - -static inline uint64_t gpio_data_get(volatile uint64_t bits) { - uint64_t rdata = 0; - - rdata = GPIO->DATA0 & (bits & 0xffffffff); - rdata |= (GPIO->DATA1 & (bits >> 32)) << 32; - - return rdata; -} - -static inline void gpio_pad_pu_en(volatile uint64_t data) -{ - GPIO->PAD_PU_EN0 = (data & 0xffffffff); - GPIO->PAD_PU_EN1 = (data >> 32); -} - -static inline void gpio_data_sel(volatile uint64_t data) -{ - GPIO->DATA_SEL0 = (data & 0xffffffff); - GPIO->DATA_SEL1 = (data >> 32); -} - -static inline void gpio_pad_pu_sel(volatile uint64_t data) -{ - GPIO->PAD_PU_SEL0 = (data & 0xffffffff); - GPIO->PAD_PU_SEL1 = (data >> 32); -} - -static inline void gpio_data_set(volatile uint64_t data) -{ - GPIO->DATA_SET0 = (data & 0xffffffff); - GPIO->DATA_SET1 = (data >> 32); -} - -static inline void gpio_data_reset(volatile uint64_t data) -{ - GPIO->DATA_RESET0 = (data & 0xffffffff); - GPIO->DATA_RESET1 = (data >> 32); -} - -static inline void gpio_pad_dir_set(volatile uint64_t data) -{ - GPIO->PAD_DIR_SET0 = (data & 0xffffffff); - GPIO->PAD_DIR_SET1 = (data >> 32); -} - -static inline void gpio_pad_dir_reset(volatile uint64_t data) -{ - GPIO->PAD_DIR_RESET0 = (data & 0xffffffff); - GPIO->PAD_DIR_RESET1 = (data >> 32); -} diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c deleted file mode 100644 index 12ee52e020..0000000000 --- a/cpu/mc1322x/hwtimer_cpu.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * hwtimer_cpu.c - architecture dependent hardware timer functionality - * Copyright (C) 2013 Oliver Hahm - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#include -#include "mc1322x.h" -#include "cpu.h" -#include "arch/hwtimer_arch.h" -#include "irq.h" - -#include - -/* High level interrupt handler */ -static void (*int_handler)(int); - -#define TMRx_ANY_INTERRUPT 0xa800 - -void tmr_isr(void) { - /* detemine which timer caused the interrupt */ - if (TMR0->SCTRLbits.TCF && TMR0->SCTRLbits.TCFIE) { - TMR0->SCTRLbits.TCF = 0; - TMR0->CSCTRLbits.TCF1 = 0; - TMR0->ENBL &= ~(1<<0); - int_handler(0); - } - else if (TMR1->SCTRLbits.TCF && TMR1->SCTRLbits.TCFIE) { - TMR1->SCTRLbits.TCF = 0; - TMR1->CSCTRLbits.TCF1 = 0; - TMR0->ENBL &= ~(1<<1); - int_handler(1); - } - else if (TMR2->SCTRLbits.TCF && TMR2->SCTRLbits.TCFIE) { - TMR2->SCTRLbits.TCF = 0; - TMR2->CSCTRLbits.TCF1 = 0; - TMR0->ENBL &= ~(1<<2); - int_handler(2); - } - else if (TMR3->SCTRLbits.TCF && TMR3->SCTRLbits.TCFIE) { - TMR3->SCTRLbits.TCF = 0; - TMR3->CSCTRLbits.TCF1 = 0; - TMR0->ENBL &= ~(1<<3); - int_handler(3); - } -} - -void timer_x_init(volatile struct TMR_struct* const TMRx) { - /* Reset the timer */ - - /* Clear status */ - TMRx->SCTRL = 0; - /* disable interrupt */ - TMRx->CSCTRL =0x0000; - /* Reload/initialize to zero */ - TMRx->LOAD = 0; - - /* disable comparison */ - TMRx->COMP1 = 0; - TMRx->CMPLD1 = 0; - - /* set counter to zero */ - TMRx->CNTR = TMRx->LOAD; - - /* set timer control bits */ - TMRx->CTRLbits.COUNT_MODE = 1; /* use rising edge of primary source */ - TMRx->CTRLbits.PRIMARY_CNT_SOURCE = 0x0f; /* Perip. clock with 128 prescale (for 24MHz = 187500Hz) */ - TMRx->CTRLbits.SECONDARY_CNT_SOURCE = 0x00; /* don't need this */ - TMRx->CTRLbits.ONCE = 0x01; /* don't keep counting */ - TMRx->CTRLbits.LENGTH = 0x00; /* continue counting */ - TMRx->CTRLbits.DIR = 0x00; /* count up */ - TMRx->CTRLbits.CO_INIT = 0x00; /* other counters cannot force a reinitialization of this counter*/ - TMRx->CTRLbits.OUTPUT_MODE = 0x00; /* OFLAG is asserted while counter is active */ -} - -void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { - int_handler = handler; - - /* TODO: do scaling voodoo */ - (void) fcpu; - - /* disable all timers */ - TMR0->ENBL = 0; - timer_x_init(TMR0); - timer_x_init(TMR1); - timer_x_init(TMR2); - timer_x_init(TMR3); - - register_isr(INT_NUM_TMR, &tmr_isr); - hwtimer_arch_enable_interrupt(); -} - -/*---------------------------------------------------------------------------*/ -void hwtimer_arch_enable_interrupt(void) { - /* this enables timer interrupts in general by using the ITC. - * Timer specific interrupt control is given by the TMRx structs. */ - //enable_irq(INT_NUM_TMR); - ITC->INTENABLEbits.TMR = 1; -} - -/*---------------------------------------------------------------------------*/ -void hwtimer_arch_disable_interrupt(void) { - /* this disables timer interrupts in general by using the ITC. - * Timer specific interrupt control is given by the TMRx structs. */ - //disable_irq(INT_NUM_TMR); - ITC->INTENABLEbits.TMR = 0; -} - -/*---------------------------------------------------------------------------*/ -void hwtimer_arch_set(unsigned long offset, short timer) { - /* get corresponding struct for the given ::timer parameter */ - struct TMR_struct* tmr = (void *) TMR_BASE + (timer * TMR_OFFSET); - - /* disable IRQs and save the status register */ - uint32_t cpsr = disableIRQ(); - - TMR0->ENBL &= ~(1<COMP1 = tmr->CNTR + offset; /* load the current value + offset into the compare register */ - tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ - tmr->CSCTRLbits.TCF1EN = 1; /* enable intterupts when TCF1 is set \ */ - TMR0->ENBL |= (1<SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/ - - /* restore status register */ - restoreIRQ(cpsr); -} - -/*---------------------------------------------------------------------------*/ -void hwtimer_arch_set_absolute(unsigned long value, short timer) { - /* get corresponding struct for the given ::timer parameter */ - struct TMR_struct* tmr = (void *) TMR_BASE + (timer * TMR_OFFSET); - - /* disable IRQs and save the status register */ - uint32_t cpsr = disableIRQ(); - - TMR0->ENBL &= ~(1<COMP1 = value; /* load the value into the compare register */ - tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ - tmr->CSCTRLbits.TCF1EN = 1; /* enable interrupts when TCF1 is set \ */ - TMR0->ENBL |= (1<SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/ - - /* restore status register */ - restoreIRQ(cpsr); -} - -/*---------------------------------------------------------------------------*/ -void hwtimer_arch_unset(short timer) { - /* get corresponding struct for the given ::timer parameter */ - struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); - - tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ - tmr->CSCTRLbits.TCF1EN = 0; /* disable interrupts for TCF1 */ - tmr->SCTRLbits.TCFIE = 0; /* disable interrupts for TCF */ -} - -/*---------------------------------------------------------------------------*/ -unsigned long hwtimer_arch_now(void) { - return TMR0->CNTR; -} diff --git a/cpu/mc1322x/include/cpu.h b/cpu/mc1322x/include/cpu.h deleted file mode 100644 index c74e90e020..0000000000 --- a/cpu/mc1322x/include/cpu.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2013 Oliver Hahm - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @defgroup mc1322x Freescale MC1322x - * @ingroup cpu - * @brief Freescale MC1322x specific code - * @{ - */ - -#ifndef CPU_H -#define CPU_H - -#include -#include "arm_cpu.h" -#include "mc1322x.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief End of user stack memory - */ -extern uintptr_t __stack_start; - -/** - * @brief Install a interrupt service routine - * - * @param[in] int_number interrupt source - * @param[in] handler_addr interrupt function - * @param[in] priority interrupt priority - * - * @return true on success - * @return false on error - */ -bool install_irq(int int_number, void *handler_addr, int priority); - -#ifdef __cplusplus -} -#endif - -#endif /* CPU_H */ -/** @} */ diff --git a/cpu/mc1322x/include/cpu_conf.h b/cpu/mc1322x/include/cpu_conf.h deleted file mode 100644 index 83f215cd83..0000000000 --- a/cpu/mc1322x/include/cpu_conf.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * cpu.h - mc1322x specific definitions - * Copyright (C) 2013 Oliver Hahm - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef CPUCONF_H_ -#define CPUCONF_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @ingroup conf - * @ingroup mc1322x - * - * @{ - */ - -/** - * @file - * @brief MC1322X CPUconfiguration - * - * @author Oliver Hahm - */ - -/** - * @name Stdlib configuration - * @{ - */ -#define __FOPEN_MAX__ 4 -#define __FILENAME_MAX__ 12 -/** @} */ - -/** - * @name Kernel configuration - * @{ - */ -#define THREAD_EXTRA_STACKSIZE_PRINTF_FLOAT (4096) -#define THREAD_EXTRA_STACKSIZE_PRINTF (2048) - -#ifndef THREAD_STACKSIZE_DEFAULT -#define THREAD_STACKSIZE_DEFAULT (512) -#endif - -#define THREAD_STACKSIZE_IDLE (160) -/** @} */ - -/** - * @name Compiler specifics - * @{ - */ -#define CC_CONF_INLINE inline -#define CC_CONF_USED __attribute__((used)) -#define CC_CONF_NONNULL(...) __attribute__((nonnull(__VA_ARGS__))) -#define CC_CONF_WARN_UNUSED_RESULT __attribute__((warn_unused_result)) -/** @} */ - -/** - * @name UART0 buffer size definition for compatibility reasons - * - * TODO: remove once the remodeling of the uart0 driver is done - * @{ - */ -#ifndef UART0_BUFSIZE -#define UART0_BUFSIZE (64) -#endif -/** @} */ - -#ifdef __cplusplus -} -#endif - -/** @} */ -#endif /* CPUCONF_H_ */ diff --git a/cpu/mc1322x/include/gpio.h b/cpu/mc1322x/include/gpio.h deleted file mode 100644 index ec022b150e..0000000000 --- a/cpu/mc1322x/include/gpio.h +++ /dev/null @@ -1,166 +0,0 @@ -/* - * gpio.h - GPIO driver for redbee - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef GPIO_H -#define GPIO_H - -// TODO: why do we need to include this for macro expansion? -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Structure-based GPIO access - Example usage: - - GPIO->FUNC_SEL0 |= 0x00008000; // set a whole register - - GPIO->FUNC_SEL_08 = 2; // set just one pin - - #define MY_PIN GPIO_08 - GPIO->FUNC_SEL.MY_PIN = 2; // same, to allow #define for pin names - GPIO->DATA.MY_PIN = 1; - - gpio_set(GPIO_08); // efficiently set or clear a single output bit - gpio_reset(GPIO_08); -*/ - -// GPIO to Function Alias macros: - -#define ADC0 GPIO_30 -#define ADC1 GPIO_31 -#define ADC2 GPIO_32 -#define ADC3 GPIO_33 -#define ADC4 GPIO_34 -#define ADC5 GPIO_35 -#define ADC6 GPIO_36 -#define ADC7 GPIO_37 -#define TDO GPIO_49 -#define TDI GPIO_48 -#define TCK GPIO_47 -#define TMS GPIO_46 -#define U2RTS GPIO_21 -#define U2CTS GPIO_20 -#define U2RX GPIO_19 -#define U2TX GPIO_18 -#define U1RTS GPIO_17 -#define U1CTS GPIO_16 -#define U1RX GPIO_15 -#define U1TX GPIO_14 -#define SDA GPIO_13 -#define SCL GPIO_12 -#define TMR3 GPIO_11 -#define TMR2 GPIO_10 -#define TMR1 GPIO_09 -#define TMR0 GPIO_08 -#define SCK GPIO_07 -#define MOSI GPIO_06 -#define MISO GPIO_05 -#define SS GPIO_04 -#define BTCK GPIO_03 -#define FSYN GPIO_02 -#define SSIRX GPIO_01 -#define SSITX GPIO_00 -#define KBI7 GPIO_29 -#define KBI6 GPIO_28 -#define KBI5 GPIO_27 -#define KBI4 GPIO_26 -#define KBI3 GPIO_25 -#define KBI2 GPIO_24 -#define KBI1 GPIO_23 -#define KBI0 GPIO_22 -#define TXON GPIO_44 -#define RXON GPIO_45 -#define ANT1 GPIO_42 -#define ANT2 GPIO_43 -#define VREF2H GPIO_38 -#define VREF2L GPIO_39 -#define VREF1H GPIO_40 -#define VREF1L GPIO_41 -#define MDO0 GPIO_51 -#define MDO1 GPIO_52 -#define MDO2 GPIO_53 -#define MDO3 GPIO_54 -#define MDO4 GPIO_55 -#define MDO5 GPIO_56 -#define MDO6 GPIO_57 -#define MDO7 GPIO_58 -#define MSEO0 GPIO_59 -#define MSEO1 GPIO_60 -#define RDY GPIO_61 -#define EVTO GPIO_62 -#define MCKO GPIO_50 -#define EVTI GPIO_63 - - -#define _V(x,n,i) uint32_t x##_##i : n; -#define _REP(x,n) \ - _V(x,n,00) _V(x,n,01) _V(x,n,02) _V(x,n,03) _V(x,n,04) _V(x,n,05) _V(x,n,06) _V(x,n,07) \ - _V(x,n,08) _V(x,n,09) _V(x,n,10) _V(x,n,11) _V(x,n,12) _V(x,n,13) _V(x,n,14) _V(x,n,15) \ - _V(x,n,16) _V(x,n,17) _V(x,n,18) _V(x,n,19) _V(x,n,20) _V(x,n,21) _V(x,n,22) _V(x,n,23) \ - _V(x,n,24) _V(x,n,25) _V(x,n,26) _V(x,n,27) _V(x,n,28) _V(x,n,29) _V(x,n,30) _V(x,n,31) \ - _V(x,n,32) _V(x,n,33) _V(x,n,34) _V(x,n,35) _V(x,n,36) _V(x,n,37) _V(x,n,38) _V(x,n,39) \ - _V(x,n,40) _V(x,n,41) _V(x,n,42) _V(x,n,43) _V(x,n,44) _V(x,n,45) _V(x,n,46) _V(x,n,47) \ - _V(x,n,48) _V(x,n,49) _V(x,n,50) _V(x,n,51) _V(x,n,52) _V(x,n,53) _V(x,n,54) _V(x,n,55) \ - _V(x,n,56) _V(x,n,57) _V(x,n,58) _V(x,n,59) _V(x,n,60) _V(x,n,61) _V(x,n,62) _V(x,n,63) - -struct GPIO_struct { -#define _IO(x) \ - union { struct { uint32_t x##0; uint32_t x##1; }; \ - struct { _REP(x, 1) }; \ - struct GPIO_##x { _REP(GPIO, 1) } x; }; -#define _IO_2bit(x) \ - union { struct { uint32_t x##0; uint32_t x##1; uint32_t x##2; uint32_t x##3; }; \ - struct { _REP(x, 2) }; \ - struct GPIO_##x { _REP(GPIO, 2) } x; }; - - _IO(PAD_DIR); - _IO(DATA); - _IO(PAD_PU_EN); - _IO_2bit(FUNC_SEL); - _IO(DATA_SEL); - _IO(PAD_PU_SEL); - _IO(PAD_HYST_EN); - _IO(PAD_KEEP); - _IO(DATA_SET); - _IO(DATA_RESET); - _IO(PAD_DIR_SET); - _IO(PAD_DIR_RESET); -}; -#undef _IO -#undef _IO_2bit - -/* Build an enum lookup to map GPIO_08 -> 8 */ -#undef _V -#define _V(x,n,i) __NUM_GPIO_GPIO_##i, -enum { _REP(0,0) }; - -/* Macros to set or reset a data pin in the fastest possible way */ -#define gpio_set(gpio_xx) __gpio_set(gpio_xx) -#define __gpio_set(gpio_xx) \ - ((__NUM_GPIO_##gpio_xx < 32) \ - ? (GPIO->DATA_SET0 = (1 << (__NUM_GPIO_##gpio_xx - 0))) \ - : (GPIO->DATA_SET1 = (1 << (__NUM_GPIO_##gpio_xx - 32)))) -#define gpio_reset(gpio_xx) __gpio_reset(gpio_xx) -#define __gpio_reset(gpio_xx) \ - ((__NUM_GPIO_##gpio_xx < 32) \ - ? (GPIO->DATA_RESET0 = (1 << (__NUM_GPIO_##gpio_xx - 0))) \ - : (GPIO->DATA_RESET1 = (1 << (__NUM_GPIO_##gpio_xx - 32)))) - -#undef _REP -#undef _V - -static volatile struct GPIO_struct * const GPIO = (void *) (0x80000000); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/cpu/mc1322x/include/mc1322x.h b/cpu/mc1322x/include/mc1322x.h deleted file mode 100644 index 82003d0268..0000000000 --- a/cpu/mc1322x/include/mc1322x.h +++ /dev/null @@ -1,451 +0,0 @@ -/* - * mc1322x.h - mc1322x specific definitions - * Copyright (C) 2013, 2014 Oliver Hahm - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef MC1322X_H -#define MC1322X_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/*-----------------------------------------------------------------*/ -/* System Management */ -#define SW_RST_VAL (0x87651234) - -#define CRM_BASE (0x80003000) - -/* Structure-based CRM access */ -struct CRM_struct { - union { - uint32_t SYS_CNTL; - struct CRM_SYS_CNTL { - uint32_t PWR_SOURCE:2; - uint32_t PADS_1P8V_SEL:1; - uint32_t :1; - uint32_t JTAG_SECU_OFF:1; - uint32_t XTAL32_EXISTS:1; - uint32_t :2; - uint32_t XTAL_CLKDIV:6; - uint32_t :18; - } SYS_CNTLbits; - }; - union { - uint32_t WU_CNTL; - struct CRM_WU_CNTL { - uint32_t TIMER_WU_EN:1; - uint32_t RTC_WU_EN:1; - uint32_t HOST_WAKE:1; - uint32_t AUTO_ADC:1; - uint32_t EXT_WU_EN:4; - uint32_t EXT_WU_EDGE:4; - uint32_t EXT_WU_POL:4; - uint32_t TIMER_WU_IEN:1; - uint32_t RTC_WU_IEN:1; - uint32_t :2; - uint32_t EXT_WU_IEN:4; - uint32_t :4; - uint32_t EXT_OUT_POL:4; - } WU_CNTLbits; - }; - union { - uint32_t SLEEP_CNTL; - struct CRM_SLEEP_CNTL { - uint32_t HIB:1; - uint32_t DOZE:1; - uint32_t :2; - uint32_t RAM_RET:2; - uint32_t MCU_RET:1; - uint32_t DIG_PAD_EN:1; - uint32_t :24; - } SLEEP_CNTLbits; - }; - union { - uint32_t BS_CNTL; - struct CRM_BS_CNTL { - uint32_t BS_EN:1; - uint32_t WAIT4IRQ:1; - uint32_t BS_MAN_EN:1; - uint32_t :2; - uint32_t ARM_OFF_TIME:6; - uint32_t :18; - } BS_CNTLbits; - }; - union { - uint32_t COP_CNTL; - struct CRM_COP_CNTL { - uint32_t COP_EN:1; - uint32_t COP_OUT:1; - uint32_t COP_WP:1; - uint32_t :5; - uint32_t COP_TIMEOUT:7; - uint32_t :1; - uint32_t COP_COUNT:7; - uint32_t :9; - } COP_CNTLbits; - }; - uint32_t COP_SERVICE; - union { - uint32_t STATUS; - struct CRM_STATUS { - uint32_t SLEEP_SYNC:1; - uint32_t HIB_WU_EVT:1; - uint32_t DOZE_WU_EVT:1; - uint32_t RTC_WU_EVT:1; - uint32_t EXT_WU_EVT:4; - uint32_t :1; - uint32_t CAL_DONE:1; - uint32_t COP_EVT:1; - uint32_t :6; - uint32_t VREG_BUCK_RDY:1; - uint32_t VREG_1P8V_RDY:1; - uint32_t VREG_1P5V_RDY:1; - uint32_t :12; - } STATUSbits; - }; - union { - uint32_t MOD_STATUS; - struct CRM_MOD_STATUS { - uint32_t ARM_EN:1; - uint32_t MACA_EN:1; - uint32_t ASM_EN:1; - uint32_t SPI_EN:1; - uint32_t GPIO_EN:1; - uint32_t UART1_EN:1; - uint32_t UART2_EN:1; - uint32_t TMR_EN:1; - uint32_t RIF_EN:1; - uint32_t I2C_EN:1; - uint32_t SSI_EN:1; - uint32_t SPIF_EN:1; - uint32_t ADC_EN:1; - uint32_t :1; - uint32_t JTA_EN:1; - uint32_t NEX_EN:1; - uint32_t :1; - uint32_t AIM_EN:1; - uint32_t :14; - } MOD_STATUSbits; - }; - uint32_t WU_COUNT; - uint32_t WU_TIMEOUT; - uint32_t RTC_COUNT; - uint32_t RTC_TIMEOUT; - uint32_t reserved1; - union { - uint32_t CAL_CNTL; - struct CRM_CAL_CNTL { - uint32_t CAL_TIMEOUT:16; - uint32_t CAL_EN:1; - uint32_t CAL_IEN:1; - uint32_t :14; - } CAL_CNTLbits; - }; - uint32_t CAL_COUNT; - union { - uint32_t RINGOSC_CNTL; - struct CRM_RINGOSC_CNTL { - uint32_t ROSC_EN:1; - uint32_t :3; - uint32_t ROSC_FTUNE:5; - uint32_t ROSC_CTUNE:4; - uint32_t :19; - } RINGOSC_CNTLbits; - }; - union { - uint32_t XTAL_CNTL; - struct CRM_XTAL_CNTL { - uint32_t :8; - uint32_t XTAL_IBIAS_SEL:4; - uint32_t :4; - uint32_t XTAL_FTUNE:5; - uint32_t XTAL_CTUNE:5; - uint32_t :6; - } XTAL_CNTLbits; - }; - union { - uint32_t XTAL32_CNTL; - struct CRM_XTAL32_CNTL { - uint32_t XTAL32_EN:1; - uint32_t :3; - uint32_t XTAL32_GAIN:2; - uint32_t :26; - } XTAL32_CNTLbits; - }; - union { - uint32_t VREG_CNTL; - struct CRM_VREG_CNTL { - uint32_t BUCK_EN:1; - uint32_t BUCK_SYNC_REC_EN:1; - uint32_t BUCK_BYPASS_EN:1; - uint32_t VREG_1P5V_EN:2; - uint32_t VREG_1P5V_SEL:2; - uint32_t VREG_1P8V_EN:1; - uint32_t BUCK_CLKDIV:4; - uint32_t :20; - } VREG_CNTLbits; - }; - uint32_t reserved2; - uint32_t SW_RST; - uint32_t reserved3; - uint32_t reserved4; - uint32_t reserved5; - uint32_t reserved6; -}; - -static volatile struct CRM_struct * const CRM = (void*) (CRM_BASE); - - -/*-----------------------------------------------------------------*/ -/* TIMERS */ - -/* Timer registers are all 16-bit wide with 16-bit access only */ -#define TMR_OFFSET (0x20) -#define TMR_BASE (0x80007000) -#define TMR0_BASE (TMR_BASE) -#define TMR1_BASE (TMR_BASE + TMR_OFFSET*1) -#define TMR2_BASE (TMR_BASE + TMR_OFFSET*2) -#define TMR3_BASE (TMR_BASE + TMR_OFFSET*3) - -struct TMR_struct { - uint16_t COMP1; - uint16_t COMP2; - uint16_t CAPT; - uint16_t LOAD; - uint16_t HOLD; - uint16_t CNTR; - union { - uint16_t CTRL; - struct TMR_CTRL { - uint16_t OUTPUT_MODE:3; - uint16_t CO_INIT:1; - uint16_t DIR:1; - uint16_t LENGTH:1; - uint16_t ONCE:1; - uint16_t SECONDARY_CNT_SOURCE:2; - uint16_t PRIMARY_CNT_SOURCE:4; - uint16_t COUNT_MODE:3; - } CTRLbits; - }; - union { - uint16_t SCTRL; - struct TMR_SCTRL { - uint16_t OEN:1; - uint16_t OPS:1; - uint16_t FORCE:1; - uint16_t VAL:1; - uint16_t EEOF:1; - uint16_t MSTR:1; - uint16_t CAPTURE_MODE:2; - uint16_t INPUT:1; - uint16_t IPS:1; - uint16_t IEFIE:1; - uint16_t IEF:1; - uint16_t TOFIE:1; - uint16_t TOF:1; - uint16_t TCFIE:1; - uint16_t TCF:1; - } SCTRLbits; - }; - uint16_t CMPLD1; - uint16_t CMPLD2; - union { - uint16_t CSCTRL; - struct TMR_CSCTRL { - uint16_t CL1:2; - uint16_t CL2:2; - uint16_t TCF1:1; - uint16_t TCF2:1; - uint16_t TCF1EN:1; - uint16_t TCF2EN:1; - uint16_t :5; - uint16_t FILT_EN:1; - uint16_t DBG_EN:2; - } CSCTRLbits; - }; - - uint16_t reserved[4]; - - union { - uint16_t ENBL; - struct TMR_ENBL { - union { - struct { - uint16_t ENBL:4; - }; - struct { - uint16_t ENBL3:1; - uint16_t ENBL2:1; - uint16_t ENBL1:1; - uint16_t ENBL0:1; - }; - }; - uint16_t :12; - } ENBLbits; - }; -}; - -static volatile struct TMR_struct * const TMR0 = (void *) (TMR0_BASE); -static volatile struct TMR_struct * const TMR1 = (void *) (TMR1_BASE); -static volatile struct TMR_struct * const TMR2 = (void *) (TMR2_BASE); -static volatile struct TMR_struct * const TMR3 = (void *) (TMR3_BASE); - -/* Get timer pointer from timer number */ -#define TMR_ADDR(x) (*(volatile struct TMR_struct *)(((uint32_t)(x) * TMR_OFFSET) + TMR_BASE)) - -/* Get timer number from the timer pointer. */ -#define TMR_NUM(x) (((uint32_t)(x) - TMR_BASE) / TMR_OFFSET) - -/*-----------------------------------------------------------------*/ -/* Interrupts */ -#define INTBASE (0x80020000) - -/* Structure-based ITC access */ -#define __INTERRUPT_union(x) \ - union { \ - uint32_t x; \ - struct ITC_##x { \ - uint32_t ASM:1; \ - uint32_t UART1:1; \ - uint32_t UART2:1; \ - uint32_t CRM:1; \ - uint32_t I2C:1; \ - uint32_t TMR:1; \ - uint32_t SPIF:1; \ - uint32_t MACA:1; \ - uint32_t SSI:1; \ - uint32_t ADC:1; \ - uint32_t SPI:1; \ - uint32_t :21; \ - } x##bits; \ - }; - -struct ITC_struct { - union { - uint32_t INTCNTL; - struct ITC_INTCNTL { - uint32_t :19; - uint32_t FIAD:1; - uint32_t NIAD:1; - uint32_t :11; - } INTCNTLbits; - }; - uint32_t NIMASK; - uint32_t INTENNUM; - uint32_t INTDISNUM; - __INTERRUPT_union(INTENABLE); - __INTERRUPT_union(INTTYPE); - uint32_t reserved[4]; - uint32_t NIVECTOR; - uint32_t FIVECTOR; - __INTERRUPT_union(INTSRC); - __INTERRUPT_union(INTFRC); - __INTERRUPT_union(NIPEND); - __INTERRUPT_union(FIPEND); -}; -#undef __INTERRUPT_union - -static volatile struct ITC_struct * const ITC = (void *) (INTBASE); - -/* Old register definitions, for compatibility */ -#ifndef REG_NO_COMPAT - -#define INTCNTL_OFF (0x0) -#define INTENNUM_OFF (0x8) -#define INTDISNUM_OFF (0xC) -#define INTENABLE_OFF (0x10) -#define INTSRC_OFF (0x30) -#define INTFRC_OFF (0x34) -#define NIPEND_OFF (0x38) - -static volatile uint32_t * const INTCNTL = ((volatile uint32_t *) (INTBASE + INTCNTL_OFF)); -static volatile uint32_t * const INTENNUM = ((volatile uint32_t *) (INTBASE + INTENNUM_OFF)); -static volatile uint32_t * const INTDISNUM = ((volatile uint32_t *) (INTBASE + INTDISNUM_OFF)); -static volatile uint32_t * const INTENABLE = ((volatile uint32_t *) (INTBASE + INTENABLE_OFF)); -static volatile uint32_t * const INTSRC = ((volatile uint32_t *) (INTBASE + INTSRC_OFF)); -static volatile uint32_t * const INTFRC = ((volatile uint32_t *) (INTBASE + INTFRC_OFF)); -static volatile uint32_t * const NIPEND = ((volatile uint32_t *) (INTBASE + NIPEND_OFF)); - -enum interrupt_nums { - INT_NUM_ASM = 0, - INT_NUM_UART1, - INT_NUM_UART2, - INT_NUM_CRM, - INT_NUM_I2C, - INT_NUM_TMR, - INT_NUM_SPIF, - INT_NUM_MACA, - INT_NUM_SSI, - INT_NUM_ADC, - INT_NUM_SPI, -}; - -#define global_irq_disable() (set_bit(*INTCNTL,20)) -#define global_irq_enable() (clear_bit(*INTCNTL,20)) - -#define enable_irq(irq) (*INTENNUM = irq) -#define disable_irq(irq) (*INTDISNUM = irq) - -#define safe_irq_disable(x) volatile uint32_t saved_irq; saved_irq = *INTENABLE; disable_irq(x) -#define irq_restore() *INTENABLE = saved_irq - -#endif /* REG_NO_COMPAT */ - -/* Macro to safely disable all interrupts for a block of code. - Use it like this: - disable_int({ - asdf = 1234; - printf("hi\r\n"); - }); -*/ -#define __int_top() volatile uint32_t saved_intenable -#define __int_disable() saved_intenable = ITC->INTENABLE; ITC->INTENABLE = 0 -#define __int_enable() ITC->INTENABLE = saved_intenable -#define disable_int(x) do { \ - __int_top(); \ - __int_disable(); \ - x; \ - __int_enable(); } while(0) - -extern void register_isr(uint8_t interrupt, void (*isr)(void)); - -extern void tmr_isr(void) __attribute__((weak)); - -extern void crm_isr(void) __attribute__((weak)); -extern void rtc_isr(void) __attribute__((weak)); -extern void kbi4_isr(void) __attribute__((weak)); -extern void kbi5_isr(void) __attribute__((weak)); -extern void kbi6_isr(void) __attribute__((weak)); -extern void kbi7_isr(void) __attribute__((weak)); - -extern void cal_isr(void) __attribute__((weak)); - -extern void uart1_isr(void) __attribute__((weak)); -extern void uart2_isr(void) __attribute__((weak)); - -extern void maca_isr(void) __attribute__((weak)); - -extern void asm_isr(void) __attribute__((weak)); - -extern void i2c_isr(void) __attribute__((weak)); - -extern void spif_isr(void) __attribute__((weak)); - -extern void ssi_isr(void) __attribute__((weak)); - -extern void adc_isr(void) __attribute__((weak)); - -extern void spi_isr(void) __attribute__((weak)); - -#ifdef __cplusplus -} -#endif - -#endif /* MC1322X_H */ diff --git a/cpu/mc1322x/isr.c b/cpu/mc1322x/isr.c deleted file mode 100644 index 5ffbeafb21..0000000000 --- a/cpu/mc1322x/isr.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * isr.c - mc1322x specific isr - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#include "mc1322x.h" - -#define MAX_IRQ_INDEX 10 - -static void (*isr_funcs[11])(void) = { - asm_isr, - uart1_isr, - uart2_isr, - crm_isr, - i2c_isr, - tmr_isr, - spif_isr, - maca_isr, - ssi_isr, - adc_isr, - spi_isr -}; - -void register_isr(uint8_t interrupt, void (*isr)(void)) { - if (interrupt <= MAX_IRQ_INDEX) { - isr_funcs[interrupt] = isr; - } -} - -void isr(void) -{ - /* pending interrupt? */ - while (ITC->NIPEND) { - /* get interrupt source, range 0-10 */ - /* call corresponding ISR */ - if (isr_funcs[ITC->NIVECTOR]) { - (isr_funcs[ITC->NIVECTOR])(); - } - } -} diff --git a/cpu/mc1322x/maca/Makefile b/cpu/mc1322x/maca/Makefile deleted file mode 100644 index 19a39ee15d..0000000000 --- a/cpu/mc1322x/maca/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -INCLUDES += -I$(RIOTCPU)/$(CPU)/include \ - -I$(RIOTCPU)/$(CPU)/maca/include \ - -I$(RIOTBOARDS)/redbee-econotag/drivers/include - -MODULE = mc1322x - -include $(RIOTBASE)/Makefile.base diff --git a/cpu/mc1322x/maca/include/maca.h b/cpu/mc1322x/maca/include/maca.h deleted file mode 100644 index 567bc89ed8..0000000000 --- a/cpu/mc1322x/maca/include/maca.h +++ /dev/null @@ -1,546 +0,0 @@ -/* - * maca.h - The MACA driver for the Redbee EconoTag - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef MACA_H_ -#define MACA_H_ -#include - -#include "radio/types.h" - -#include "maca_packet.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Broadcast address - */ -#define MC1322X_BROADCAST_ADDRESS (0xFFFF) - -/*********************************************************/ -/* function definitions */ -/*********************************************************/ - -/* functions for the initialization and turning on and off of the MACA */ -void maca_init ( void ); -void maca_on ( void ); -void maca_off ( void ); - -/* function to check if MACA is running right */ -void maca_check ( void ); - -/* functions to configure MACA */ -void maca_set_power ( uint8_t power ); -void maca_set_channel ( uint8_t channel ); -radio_address_t maca_set_address (radio_address_t addr ); -radio_address_t maca_get_address ( void ); -uint16_t maca_set_pan(uint16_t pan); -uint16_t maca_get_pan(void); - -/* get Link Quality Indicator */ -extern uint8_t (*get_lqi) ( void ); - - -/* interface to configure demodulator */ -#define MACA_DEMOD_DCD 1 /* -96dBm, 22.2mA */ -#define MACA_DEMOD_NCD 0 /* -100dBm, 24.2mA */ -void set_demodulator_type ( uint8_t type ); - -/* macro for setting checksum filtering */ -extern volatile uint8_t fcs_mode; -#define MACA_SET_FCS_MODE(x) fcs_mode = (x) - -/* MACA_SET_PRM_MODE(PROMISC) to disable address filtering */ -/* MACA_SET_PRM_MODE(AUTOACK) to enable address filtering AND autoack */ -extern volatile uint8_t prm_mode; -#define MACA_SET_PRM_MODE(x) prm_mode = (x) - -/* functions working on maca_packet_t */ -void maca_set_tx_packet ( volatile maca_packet_t *packet ); -volatile maca_packet_t* maca_get_rx_packet ( void ); -volatile maca_packet_t* maca_get_free_packet ( void ); -void maca_free_packet ( volatile maca_packet_t *packet ); -void maca_free_all_packets ( void ); - -extern volatile maca_packet_t *maca_rx_head, *maca_tx_head; -extern volatile uint32_t maca_entry; - -extern void maca_rx_callback ( volatile maca_packet_t *packet ) __attribute__((weak)); -extern void maca_tx_callback ( volatile maca_packet_t *packet ) __attribute__((weak)); - -/* internal lowlevel MACA functions */ -void _maca_reset ( void ); -void _maca_init_phy ( void ); -void _maca_flyback_init ( void ); -void _maca_resume_maca_sync ( void ); -void _maca_radio_init ( void ); -uint32_t _maca_init_from_flash ( uint32_t address ); - -#define MACA_MAX_PACKET_SIZE (MACA_MAX_PAYLOAD_SIZE + 2) /* +2 for checksum */ - -/*********************************************************/ -/* register definitions */ -/*********************************************************/ - -#define MACA_BASE_ADDRESS (0x80004000) - -struct MACA_struct { - union { - // Reset the MACA Module - uint32_t RESET; - struct MACA_RESET { - uint32_t RST:1; // MACA Reset - uint32_t CLK_ON:1; // MACA Clk on/off - uint32_t :30; - } RESETbits; - }; - union { - // Write: random generator seed - // Read: get random data - uint32_t RANDOM; - struct MACA_RANDOM { - uint32_t :32; - } RANDOMbits; - }; - union { - // Control register of the MACA - uint32_t CONTROL; - struct MACA_CONTROL { - uint32_t SEQUENCE :3; // set new mode of operation (see MACA_CONTROL_SEQUENCE_*) - uint32_t MODE :2; // transmission access mode (see MACA_CONTROL_MODE_*) - uint32_t TM :1; // test mode (see MACA_CONTROL_TM_*) - uint32_t :1; // LFSR reserved - uint32_t AUTO :1; // restart Rx automatically (see MACA_CONTROL_AUTO_*) - uint32_t BCN :1; // filter beacon only (see MACA_CONTROL_BCN_*) - uint32_t ASAP :1; // start action sequence ASAP (see MACA_CONTROL_ASAP_*) - uint32_t REL :1; // clk selector (see MACA_CONTROL_REL_*) - uint32_t PRM :1; // promiscuous mode (see MACA_CONTROL_PRM_*) - uint32_t NOFC :1; // no frame check (see MACA_CONTROL_NOFC_*) - uint32_t ROLE :1; // current role - uint32_t :1; // reserved - uint32_t RSTO :1; // reset slot offset (see MACA_CONTROL_RSTO_*) - uint32_t PRE_COUNT :4; // preamble repeat counter (btween 0-15) - uint32_t ISM :1; // ISM reserved - uint32_t :11; - } CONTROLbits; - }; - union { - uint32_t STATUS; - struct - { - uint32_t COMPLETE_CODE :4; // complete code (see MACA_STATUS_COMPLETECODE_*) - uint32_t :8; // reserved - uint32_t OVR :1; // Rx buffer overrun (see MACA_STATUS_OVR_*) - uint32_t BUSY :1; // channel busy detection (see MACA_STATUS_BUSY_*) - uint32_t CRC :1; // checksum failed (see MACA_STATUS_CRC_*) - uint32_t TO :1; // time-out (see MACA_STATUS_TO_*) - uint32_t :16; // reserved - } STATUSbits; - }; - union { - uint32_t FRMPND; - struct - { - uint32_t PND :1; // Ack Frame Pending Status (see MACA_FRMPND_PND_*) - uint32_t :31; // reserved - } FRMPNbits; - }; - union { - uint32_t MC1322x_ID; - struct - { - uint32_t MC1322x_ID :8; // the 9bit MC1322x ID (see MACA_MC1322x_ID_*) - uint32_t :24; // reserved - } MC1322x_IDbits; - }; - union { - uint32_t TMREN; - struct - { - uint32_t STRT :1; // enable start clk circuit (see MACA_TMREN_STRT_*) - uint32_t CPL :1; // enable complete clk circuit (see MACA_TMREN_CPL_*) - uint32_t SFT :1; // enable soft complete clk circ (see MACA_TMREN_SFT_*) - uint32_t :29; // reserved - } TMRENbits; - }; - union { - uint32_t TMRDIS; - struct - { - uint32_t STRT :1; // disable start clk circuit (see MACA_TMRDIS_STRT_*) - uint32_t CPL :1; // disable complete clk circuit (see MACA_TMRDIS_CPL_*) - uint32_t SFT :1; // disable soft complete clk circ (see MACA_TMRDIS_SFT_*) - uint32_t STRT_OFF :1; // abort start clk (see MACA_TMRDIS_STRTOFF_*) - uint32_t CPL_OFF :1; // abort complete clk (see MACA_TMRDIS_CPLOFF_*) - uint32_t SFT_OFF :1; // abort soft complete clk (see MACA_TMRDIS_SFT_OFF_*) - uint32_t :26; // reserved - } TMRDISbits; - }; - uint32_t CLK; // sets a new absolute clock value - // Ensure that the timers are not active - uint32_t STARTCLK; // see (9.7.10) - uint32_t CPLCLK; // see (9.7.11) - uint32_t SFTCLK; // see (9.7.12) - uint32_t CLKOFFSET; // see (9.7.13) - uint32_t RELCLK; // see (9.7.14) - uint32_t CPLTIM; // see (9.7.15) - union { - uint32_t SLOTOFFSET; // see (9.7.16) - struct - { - uint32_t TX_SLOT_OFFSET :12; - uint32_t :4; - uint32_t RX_SLOT_OFFSEt :12; - uint32_t :4; - } SLOTOFFSETbits; - }; - uint32_t TIMESTAMP; // see (9.7.17) - uint32_t DMARX; // see (9.7.18) - uint32_t DMATX; // see (9.7.19) - uint32_t DMAPOLL; // see (9.7.20) - union { - uint32_t TXLEN; // see (9.7.21) - struct - { - uint32_t TX_LEN :15; // Tx payload length - uint32_t :17; // reserved - } TXLENbits; - }; - union { - uint32_t TXSEQNR; // see (9.7.22) - struct - { - uint32_t TXSEQN :8; // Tx sequ. number - uint32_t :24; // reserved - } TXSEQNRbits; - }; - union { - uint32_t SETRXLVL; // see (9.7.23) - struct - { - uint32_t FIFO_LVL :16; // FIFO level - uint32_t :16; // reserved - } SETRXLVLbits; - }; - union { - uint32_t GETRXLVL; // see (9.7.24) - struct - { - uint32_t RECVBYTES :16; // received bytes - uint32_t :16; // reserved - } GETRXLVLbits; - }; - union { - uint32_t IRQ; // read only see (9.7.25) - struct - { - uint32_t ACPL :1; // Action Complete Interrupt - uint32_t POLL :1; // Poll Indication Interrupt - uint32_t DI :1; // Data Indication Interrupt - uint32_t :6; // reserved - uint32_t LVL :1; // FIFO Level Interrupt - uint32_t SFT :1; // Soft Complete Clk Interrupt - uint32_t FLT :1; // Filter Failed Interrupt - uint32_t CRC :1; // Checksum Failed Interrupt - uint32_t CM :1; // Complete Clock Interrupt - uint32_t SYNC :1; // Sync Detected Interrupt - uint32_t STRT :1; // Action Started Interrupt - uint32_t :16; // reserved - } IRQbits; - }; - union { - uint32_t CLRIRQ; // write only see (9.7.26) - // write 1 to clear - struct - { - uint32_t ACPL :1; // Clear Action Complete Interrupt - uint32_t POLL :1; // Clear Poll Indication Interrupt - uint32_t DI :1; // Clear Data Indication Interrupt - uint32_t :6; // reserved - uint32_t LVL :1; // Clear FIFO Level Interrupt - uint32_t SFT :1; // Clear Soft Complete Clk Interrupt - uint32_t FLT :1; // Clear Filter Failed Interrupt - uint32_t CRC :1; // Clear Checksum Failed Interrupt - uint32_t CM :1; // Clear Complete Clock Interrupt - uint32_t SYNC :1; // Clear Sync Detected Interrupt - uint32_t STRT :1; // Clear Action Started Interrupt - uint32_t :16; // reserved - } CLRIRQbits; - }; - union { - uint32_t SETIRQ; // write only see (9.7.27) - // write 1 to set IRQ - struct - { - uint32_t ACPL :1; // Trigger Action Complete Interrupt - uint32_t POLL :1; // Trigger Poll Indication Interrupt - uint32_t DI :1; // Trigger Data Indication Interrupt - uint32_t :6; // reserved - uint32_t LVL :1; // Trigger FIFO Level Interrupt - uint32_t SFT :1; // Trigger Soft Complete Clk Interrupt - uint32_t FLT :1; // Trigger Filter Failed Interrupt - uint32_t CRC :1; // Trigger Checksum Failed Interrupt - uint32_t CM :1; // Trigger Complete Clock Interrupt - uint32_t SYNC :1; // Trigger Sync Detected Interrupt - uint32_t STRT :1; // Trigger Action Started Interrupt - uint32_t :16; // reserved - } SETIRQbits; - }; - union { - uint32_t MASKIRQ; // write only see (9.7.28) - // write 1 to enable IRQ - struct - { - uint32_t ACPL :1; // Enable Action Complete Interrupt - uint32_t POLL :1; // Enable Poll Indication Interrupt - uint32_t DI :1; // Enable Data Indication Interrupt - uint32_t WU :1; // reserved but needed?? - uint32_t RST :1; // reserved but needed?? - uint32_t :4; // reserved - uint32_t LVL :1; // Enable FIFO Level Interrupt - uint32_t SFT :1; // Enable Soft Complete Clk Interrupt - uint32_t FLT :1; // Enable Filter Failed Interrupt - uint32_t CRC :1; // Enable Checksum Failed Interrupt - uint32_t CM :1; // Enable Complete Clock Interrupt - uint32_t SYNC :1; // Enable Sync Detected Interrupt - uint32_t STRT :1; // Enable Action Started Interrupt - uint32_t :16; // reserved - } MASKIRQbits; - }; - union { - uint32_t MACPANID; // see (9.7.29) - struct - { - uint32_t PANID :16; // MAC PAN ID for the 802.15.4 std network - } MACPANIDbits; - }; - union { - uint32_t MAC16ADDR; // see (9.7.30) - struct - { - uint32_t ADDR :16; // reflects the MAC short address - } MAC16ADDRbits; - }; - uint32_t MAC64HI; // see (9.7.31) - uint32_t MAC64LO; // see (9.7.32) - union { - uint32_t FLTREJ; // see (9.7.33) - struct - { - uint32_t BCN :1; // Reject Beacon packets - uint32_t DATA :1; // Reject Data packets - uint32_t ACK :1; // Reject ACK packets - uint32_t CMD :1; // Reject MAC CMD packets - uint32_t :4; // reserved - uint32_t POLL :1; // Accept POLL packets - uint32_t :7; // reserved - uint32_t FC_MASK :16; // Frame Control Mask - } FLTREJbits; - }; - union { - uint32_t CLKDIV; // see (9.7.34) - struct - { - uint32_t Divider :16; // prescale value for the MACA transmit clk - uint32_t :16; // reserved - } CLKDIVbits; - }; - union { - uint32_t WARMUP; // see (9.7.35) - struct - { - uint32_t Rx_WARMUP :12; // receiver warmup time - uint32_t :4; // reserved - uint32_t Tx_WARMUP :12; // transmitter warmuptime - uint32_t :4; // reserved - } WARMUPbits; - }; - uint32_t PREAMBLE; // see (9.7.36) - uint32_t FRAMESYNC0; // see (9.7.37) - uint32_t FRAMESYNC1; // see (9.7.38) - union { - uint32_t TXACKDELAY; // see (9.7.39) - struct - { - uint32_t TXACKDELAY :12; // Tx Acknowledgement Delay - uint32_t :4; // reserved - uint32_t TXPOLLDELAY :12; // Tx Poll Delay - uint32_t :4; // reserved - } TXACKDELAYbits; - }; - union { - uint32_t RXACKDELAY; // see (9.7.40) - struct - { - uint32_t RXACKDELAY :12; // Rx Acknowledgement Delay - uint32_t :4; // reserved - uint32_t RXAUTODELAY :12; // time to disable receiver before restarting - uint32_t :4; // reserved - } RXACKDELAYbits; - }; - union { - uint32_t EOFDELAY; // see (9.7.41) - struct - { - uint32_t EOFDELAY :12; // End Of Frame Delay - uint32_t :20; // reserved - } EOFDELAYbits; - }; - union { - uint32_t CCADELAY; // see (9.7.42) - struct - { - uint32_t CCADELAY :12; // CCA Delay - uint32_t :4; // reserved - uint32_t CCALENGTH :12; // Length of time to perform CCA - uint32_t :4; // reserved - } CCADELAYbits; - }; - union { - uint32_t RXEND; // see (9.7.43) - struct - { - uint32_t RXACK_END :12; // Rx Acknowledgement Window End in Normal Mode - uint32_t :4; // reserved - uint32_t RXSLOTTED_END :12; // Rx Acknowledgement Window End in slotted CSMA-CA mode - uint32_t :4; // reserved - } RXENDbits; - }; - union { - uint32_t TXCCADELAY; // see (9.7.44) - struct - { - uint32_t TXCCADELAY :12; // Delay from end of CCA to Tx start - uint32_t :20; // reserved - } TXCCADELAYbits; - }; - uint32_t KEY3; // see (9.7.45) - uint32_t KEY2; // see (9.7.45) - uint32_t KEY1; // see (9.7.45) - uint32_t KEY0; // see (9.7.45) - union { - uint32_t OPTIONS; // see (9.7.46) - struct - { - uint32_t POLL :1; // enables writing to DMAPOLL - uint32_t PLL_TX :1; // responde to PLL unlock only while transmition - uint32_t PLL_IGNORE :1; // ignore PLL unlock signal - uint32_t SEED_KEY :1; // generation can be seeded - uint32_t :28; // reserved - } OPTIONSbits; - }; - -}; - -static volatile struct MACA_struct * const MACA = (void *) (MACA_BASE_ADDRESS + 0x04); // +4 because base + 0x00 is reserved - -#define MACA_CONTROL_SEQUENCE_NOP 0 -#define MACA_CONTROL_SEQUENCE_ABORT 1 -#define MACA_CONTROL_SEQUENCE_WAIT 2 -#define MACA_CONTROL_SEQUENCE_TX 3 -#define MACA_CONTROL_SEQUENCE_RX 4 -#define MACA_CONTROL_SEQUENCE_TXPOLL 5 -#define MACA_CONTROL_SEQUENCE_CCA 6 -#define MACA_CONTROL_SEQUENCE_ED 7 - -#define MACA_CONTROL_MODE_NOCCA 0 -#define MACA_CONTROL_MODE_NONSLOTTED_CSMACA 1 -#define MACA_CONTROL_MODE_SLOTTED_CSMACA 2 -#define MACA_CONTROL_MODE_RESERVED 3 - -#define MACA_CONTROL_TM_NORMAL 0 -#define MACA_CONTROL_TM_TM 1 - -#define MACA_CONTROL_AUTO_OFF 0 -#define MACA_CONTROL_AUTO_ON 1 - -#define MACA_CONTROL_BCN_OFF 0 -#define MACA_CONTROL_BCN_ON 1 - -#define MACA_CONTROL_ASAP_OFF 0 -#define MACA_CONTROL_ASAP_ON 1 - -#define MACA_CONTROL_REL_ABSOLUTE 0 -#define MACA_CONTROL_REL_RELATIVE 1 - -#define MACA_CONTROL_PRM_OFF 0 -#define MACA_CONTROL_PRM_ON 1 - -#define MACA_CONTROL_NOFC_OFF 0 -#define MACA_CONTROL_USE_FCS 0 -#define MACA_CONTROL_NOFC_ON 1 -#define MACA_CONTROL_NO_FCS 1 - -#define MACA_CONTROL_ROLE_NOPAN 0 -#define MACA_CONTROL_ROLE_PAN 1 - -#define MACA_CONTROL_RSTO_DONOT_RST 0 -#define MACA_CONTROL_RSTO_DO_RST 1 - -#define MACA_STATUS_COMPLETECODE_SUCCESS 0 -#define MACA_STATUS_COMPLETECODE_TIMEOUT 1 -#define MACA_STATUS_COMPLETECODE_CHANBUSY 2 -#define MACA_STATUS_COMPLETECODE_CRC_FAIL 3 -#define MACA_STATUS_COMPLETECODE_ABORTED 4 -#define MACA_STATUS_COMPLETECODE_NOACK 5 -#define MACA_STATUS_COMPLETECODE_NODATA 6 -#define MACA_STATUS_COMPLETECODE_LATESTART 7 -#define MACA_STATUS_COMPLETECODE_EXTTIMEOUT 8 -#define MACA_STATUS_COMPLETECODE_EXTPNDTIMEOUT 9 -#define MACA_STATUS_COMPLETECODE_PLLUNLOCK 12 -#define MACA_STATUS_COMPLETECODE_EXTABORT 13 -#define MACA_STATUS_COMPLETECODE_NOTCOMPLETE 14 -#define MACA_STATUS_COMPLETECODE_DMABUSERROR 15 - -#define MACA_STATUS_OVR_FALSE 0 -#define MACA_STATUS_OVR_TRUE 1 - -#define MACA_STATUS_BUSY_FALSE 0 -#define MACA_STATUS_BUSY_TRUE 1 - -#define MACA_STATUS_CRC_OK 0 -#define MACA_STATUS_CRC_ERROR 1 - -#define MACA_STATUS_TO_FALSE 0 -#define MACA_STATUS_TO_TRUE 1 - -#define MACA_FRMPND_PND_NODATA 0 -#define MACA_FRMPND_PND_DATAAVAIL 1 - -#define MACA_MC1322x_ID_ENGINEERING 0 -#define MACA_MC1322x_ID_MC13224_1 1 -#define MACA_MC1322x_ID_MC13224_2 9 -#define MACA_MC1322x_ID_MC13226 17 - - -#define MACA_TMREN_STRT_ENABLE 1 - -#define MACA_TMREN_CPL_ENABLE 1 - -#define MACA_TMREN_SFT_ENABLE 1 - -#define MACA_TMRDIS_STRT_DISABLE 1 - -#define MACA_TMRDIS_CPL_DISABLE 1 - -#define MACA_TMRDIS_SFT_DISABLE 1 - -#define MACA_TMRDIS_STRTOFF_ABORT 1 - -#define MACA_TMRDIS_CPLOFF_ABORT 1 - -#define MACA_TMRDIS_SFTOFF_ABORT 1 - - -#ifdef __cplusplus -} -#endif - -#endif // MACA_H_ diff --git a/cpu/mc1322x/maca/include/maca_packet.h b/cpu/mc1322x/maca/include/maca_packet.h deleted file mode 100644 index 389340f3c6..0000000000 --- a/cpu/mc1322x/maca/include/maca_packet.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * maca_packet.h - defines a rxtx packet for the MACA driver - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef PACKET_H -#define PACKET_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* does not include 2 byte FCS checksum */ -#ifndef MACA_MAX_PAYLOAD_SIZE -#define MACA_MAX_PAYLOAD_SIZE 125 -#endif - -#define PACKET_STATS 0 - -/** - * @brief MC1322x internal MACA packet format */ -struct packet { - uint8_t length; /**< does not include FCS checksum */ - volatile struct packet *left; /**< pointer to left neighbor in queue */ - volatile struct packet *right; /**< pointer to right neighbor in queue */ - uint8_t offset; /**< offset into data for first byte of the - * packet payload - * On TX this should be 0 - * On RX this should be 1 since the maca - * puts the length as the first byte - */ - uint8_t lqi; /**< link quality indicator */ - uint8_t status; /**< packet status */ - uint32_t rx_time; /**< receiving timestamp */ -#if PACKET_STATS - uint8_t seen; - uint8_t post_tx; - uint8_t get_free; - uint8_t rxd; -#endif - uint8_t data[MACA_MAX_PAYLOAD_SIZE+2+1]; /**< +2 for FCS; + 1 since maca - * returns the length as the - * first byte */ -}; -typedef struct packet maca_packet_t; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/cpu/mc1322x/maca/maca.c b/cpu/mc1322x/maca/maca.c deleted file mode 100644 index 758204a3d1..0000000000 --- a/cpu/mc1322x/maca/maca.c +++ /dev/null @@ -1,1082 +0,0 @@ -/* - * maca.c - The MACA driver for the Redbee EconoTag - * Copyright (C) 2013 Thomas Eichinger - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ -#include - -#include "maca.h" -#include "maca_packet.h" -#include "nvm.h" -#include "mc1322x.h" - -// number of packets in the maca_packet_pool -#ifndef MACA_NUM_PACKETS -#define MACA_NUM_PACKETS 32 -#endif - -/* for 250kHz clock */ -#define MACA_CLOCK_DIV 95 -/* (32 chips/sym) * (sym/4bits) * (8bits/byte) = (64 chips/byte) */ -/* (8 chips/clk) * (byte/64 chips) = byte/8clks */ -#define CLK_PER_BYTE 8 - -#ifndef RECV_SOFTIMEOUT -#define RECV_SOFTIMEOUT (1024*128*CLK_PER_BYTE) -#endif - -#ifndef CPL_TIMEOUT -#define CPL_TIMEOUT (2*128*CLK_PER_BYTE) -#endif - - - -static volatile maca_packet_t maca_packet_pool[MACA_NUM_PACKETS]; - -static volatile maca_packet_t *maca_free_head; -static volatile maca_packet_t *maca_rx_end; -static volatile maca_packet_t *maca_tx_end; -static volatile maca_packet_t *maca_dma_tx; -static volatile maca_packet_t *maca_dma_rx; - -volatile maca_packet_t *maca_rx_head; -volatile maca_packet_t *maca_tx_head; - -static volatile maca_packet_t maca_dummy_ack; - -uint8_t (*get_lqi)(void) = (void *) 0x0000e04d; - -#define MACA_NO_POST 0 -#define MACA_TX_POST 1 -#define MACA_RX_POST 2 -#define MACA_MAX_POST 3 -static volatile uint8_t maca_last_post = MACA_NO_POST; - -void maca_init ( void ) { - _maca_reset(); - _maca_radio_init(); - _maca_flyback_init(); - _maca_init_phy(); - maca_set_channel ( 0 ); - maca_set_power ( 0 ); - - maca_free_head = 0; - maca_tx_head = 0; - maca_rx_head = 0; - maca_rx_end = 0; - maca_tx_end = 0; - maca_dma_rx = 0; - maca_dma_tx = 0; - - maca_free_all_packets(); - - // promiscuous, no CCA - MACA->CONTROLbits.PRM = MACA_CONTROL_PRM_ON; - MACA->CONTROLbits.MODE = MACA_CONTROL_MODE_NOCCA; - - enable_irq ( INT_NUM_MACA ); - ITC->INTFRCbits.MACA = 1; -} - -void _maca_reset ( void ) { - volatile uint32_t c; - - MACA->RESETbits.RST = 1; - - for ( c = 0; c < 100; c++ ) { - continue; - } - - MACA->RESETbits.CLK_ON = 1; - MACA->CONTROLbits.SEQUENCE = MACA_CONTROL_SEQUENCE_NOP; - - for ( c = 0; c < 400000; c++ ) { - continue; - } - - // clear all interrupts - MACA->CLRIRQ = 0xffff; -} - -void maca_on ( void ) { - - // turn on the radio regulators - CRM->VREG_CNTLbits.BUCK_EN = 0x0; - CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 0x0; - CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0x0; - CRM->VREG_CNTLbits.VREG_1P5V_EN = 0x3; - CRM->VREG_CNTLbits.VREG_1P5V_SEL = 0x3; - CRM->VREG_CNTLbits.VREG_1P8V_EN = 0x0; - CRM->VREG_CNTLbits.BUCK_CLKDIV = 0xf; - - // reinitialize phy - _maca_reset(); - _maca_init_phy(); - - enable_irq ( INT_NUM_MACA ); - ITC->INTFRCbits.MACA = 0x1; -} - -void maca_off ( void ) { - disable_irq ( INT_NUM_MACA ); - - // turn off radio regulators - CRM->VREG_CNTL = 0x00000f00; - - MACA->RESETbits.RST = 0x1; -} - -void maca_free_all_packets ( void ) { - volatile uint32_t i; - safe_irq_disable ( INT_NUM_MACA ); - - maca_free_head = 0; - - for ( i = 0; i < MACA_NUM_PACKETS; i++ ) { - maca_free_packet ( ( volatile maca_packet_t * ) & ( maca_packet_pool[i] ) ); - } - - maca_rx_head = 0; - maca_rx_end = 0; - maca_tx_head = 0; - maca_tx_end = 0; - - irq_restore(); - - // force MACA interrupt if there are pending irqs - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 0x1; - } -} - -void _maca_bound_check ( volatile maca_packet_t *packet ) { - volatile uint32_t i; - - if ( !packet || packet == &maca_dummy_ack ) { - return; - } - - for ( i = 0; i < MACA_NUM_PACKETS; i++ ) { - if ( packet == &maca_packet_pool[i] ) { - return; - } - } - - // bad packet bounds! next, nirvana... - printf ( "bad packet bounds! Halting... \n" ); - - while ( 1 ) { - continue; - } -} - -void maca_free_packet ( volatile maca_packet_t *packet ) { - safe_irq_disable ( INT_NUM_MACA ); - - // _maca_bound_check( packet ); - - if ( !packet || packet == &maca_dummy_ack ) { - return; - } - - // _maca_bound_check( maca_free_head ); - - packet->length = 0; - packet->offset = 0; - packet->left = maca_free_head; - packet->right = 0; - - maca_free_head = packet; - - // _maca_bound_check( maca_free_head ); - - irq_restore(); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 0x1; - } -} - -volatile maca_packet_t *maca_get_free_packet ( void ) { - volatile maca_packet_t *packet; - - safe_irq_disable ( INT_NUM_MACA ); - // _maca_bound_check( maca_free_head ); - - packet = maca_free_head; - - if ( packet ) { - maca_free_head = packet->left; - maca_free_head->right = 0; - } - - // _maca_bound_check( maca_free_head ); - - irq_restore(); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 0x1; - } - - return packet; -} - -volatile maca_packet_t *maca_get_rx_packet ( void ) { - volatile maca_packet_t *packet; - safe_irq_disable ( INT_NUM_MACA ); - - // maca_bound_check ( maca_rx_head ); - - packet = maca_rx_head; - - if ( packet ) { - maca_rx_head = packet->left; - maca_rx_head->right = 0; - } - - irq_restore (); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 0x1; - } - - return packet; -} - -void maca_set_tx_packet ( volatile maca_packet_t *packet ) { - safe_irq_disable ( INT_NUM_MACA ); - - // maca_bound_check ( packet ); - - if ( !packet ) { - return; - } - - if ( !maca_tx_head ) { - // start a new queue - maca_tx_end = packet; - maca_tx_end->left = 0; - maca_tx_end->right = 0; - maca_tx_head = maca_tx_end; - } - else { - // add packet to the end of the queue - maca_tx_end->left = packet; - packet->right = maca_tx_end; - // move the queue - maca_tx_end = packet; - maca_tx_end->left = 0; - } - - irq_restore (); - - if ( ITC->NIPENDbits.MACA || maca_last_post == MACA_NO_POST ) { - ITC->INTFRCbits.MACA = 0x1; - } - - if ( maca_last_post == MACA_RX_POST ) { - MACA->SFTCLK = MACA->CLK + CLK_PER_BYTE; - } - - return; -} - -void _maca_post_receive ( void ) { - maca_last_post = MACA_RX_POST; - - // from the libmc1322x implementation: - // "this sets the rxlen field - // this is undocumented but very important - // you will not receive anything without setting it" - MACA->TXLEN = ( MACA_MAX_PACKET_SIZE<<16 ); - - if ( !maca_dma_rx ) { - maca_dma_rx = maca_get_free_packet (); - - if ( !maca_dma_rx ) { - MACA->SFTCLK = MACA->CLK + RECV_SOFTIMEOUT; - MACA->TMRENbits.SFT = 0x1; - - // no free buffers, so don't start reception - enable_irq ( INT_NUM_MACA ); - return; - } - } - - // maca_bound_check ( maca_dma_rx ); - // maca_bound_check ( maca_dma_tx ); - - // load starting addess - MACA->DMARX = ( uint32_t ) & ( maca_dma_rx->data[0] ); - // wind up a timer for timeout - MACA->SFTCLK = MACA->CLK + RECV_SOFTIMEOUT; - // enable the soft complete clk circuit - MACA->TMRENbits.SFT = 0x1; - // start the receive sequence - MACA->CONTROLbits.ASAP = MACA_CONTROL_ASAP_ON; - MACA->CONTROLbits.PRE_COUNT = 0x4; - MACA->CONTROLbits.NOFC = MACA_CONTROL_NOFC_OFF; // aka use FCS - MACA->CONTROLbits.PRM = MACA_CONTROL_PRM_ON; - MACA->CONTROLbits.AUTO = MACA_CONTROL_AUTO_ON; - MACA->CONTROLbits.SEQUENCE = MACA_CONTROL_SEQUENCE_RX; -} - -void _maca_post_transmit ( void ) { - safe_irq_disable ( INT_NUM_MACA ); - - maca_last_post = MACA_TX_POST; - maca_dma_tx = maca_tx_head; - - MACA->TXSEQNRbits.TXSEQN = maca_dma_tx->data[2]; - MACA->TXLENbits.TX_LEN = ( uint16_t ) ( ( maca_dma_tx->length ) + 2 ); - // set rx length to ACK length - MACA->TXLEN = ( uint32_t ) ( 3<<16 ); - // load data starting address - MACA->DMATX = ( uint32_t ) & ( maca_dma_tx->data[0 + maca_dma_tx->offset] ); - - if ( !maca_dma_rx ) { - maca_dma_rx = maca_get_free_packet(); - - if ( !maca_dma_rx ) { - printf ( "tried to fill MACA->DMARX in maca_post_tx but there are no packet buffers left" ); - maca_dma_rx = &maca_dummy_ack; - } - } - - // maca_bound_check ( maca_dma_rx ); - // maca_bound_check ( maca_dma_tx ); - - MACA->DMARX = ( uint32_t ) & ( maca_dma_rx->data[0] ); - - // disable soft timeout clk and start clk - MACA->TMRDISbits.SFT = MACA_TMRDIS_SFT_DISABLE; - MACA->TMRDISbits.CPL = MACA_TMRDIS_CPL_DISABLE; - - // set cpl clk to a long range and enable it - // for the case MACA locks - MACA->CPLCLK = MACA->CLK + CPL_TIMEOUT; - MACA->TMRENbits.CPL = 0x1; - - irq_restore (); - - MACA->CONTROLbits.ASAP = MACA_CONTROL_ASAP_ON; - MACA->CONTROLbits.PRE_COUNT = 0x4; - MACA->CONTROLbits.PRM = MACA_CONTROL_PRM_ON; - MACA->CONTROLbits.MODE = MACA_CONTROL_MODE_NOCCA; - MACA->CONTROLbits.SEQUENCE = MACA_CONTROL_SEQUENCE_TX; - -} - -void _maca_free_tx_head ( void ) { - volatile maca_packet_t *packet; - safe_irq_disable ( INT_NUM_MACA ); - - packet = maca_tx_head; - maca_tx_head = maca_tx_head->left; - - if ( maca_tx_head == 0 ) { - maca_tx_end = 0; - } - - maca_free_packet ( packet ); - - irq_restore (); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 1; - } - - return; -} - -void _maca_add_to_rx ( volatile maca_packet_t *packet ) { - safe_irq_disable ( INT_NUM_MACA ); - - if ( !packet ) { - printf ( "packet null passed to _maca_add_to_rx\n" ); - return; - } - - packet->offset = 1; // first byte is the length - - if ( maca_rx_head == 0 ) { - // start a new queue - maca_rx_end = packet; - maca_rx_end->left = 0; - maca_rx_end->right = 0; - maca_rx_head = maca_rx_end; - } - else { - // enqueue packet - maca_rx_end->left = packet; - packet->right = maca_rx_end; - maca_rx_end = packet; - maca_rx_end->left = 0; - } - - irq_restore(); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 1; - } - - return; -} - -void _maca_decode_status ( void ) { - volatile uint32_t code; - - code = MACA->STATUSbits.COMPLETE_CODE; - - switch ( code ) { - case MACA_STATUS_COMPLETECODE_ABORTED: { - printf ( "maca: aborted\n" ); - _maca_resume_maca_sync (); - break; - } - - case MACA_STATUS_COMPLETECODE_NOTCOMPLETE: { - printf ( "maca: not completed\n" ); - _maca_resume_maca_sync (); - break; - } - - case MACA_STATUS_COMPLETECODE_TIMEOUT: { - printf ( "maca: timeout\n" ); - _maca_resume_maca_sync (); - break; - } - - case MACA_STATUS_COMPLETECODE_NOACK: { - printf ( "maca: no ack\n" ); - _maca_resume_maca_sync (); - break; - } - - case MACA_STATUS_COMPLETECODE_EXTTIMEOUT: { - printf ( "maca: ext timeout\n" ); - _maca_resume_maca_sync (); - break; - } - - case MACA_STATUS_COMPLETECODE_EXTPNDTIMEOUT: { - printf ( "maca: ext pnd timeout\n" ); - _maca_resume_maca_sync (); - break; - } - case MACA_STATUS_COMPLETECODE_SUCCESS: { - printf ( "maca: success\n" ); - _maca_resume_maca_sync (); - break; - } - - default: { - printf ( "maca status: %x", MACA->STATUSbits.COMPLETE_CODE ); - _maca_resume_maca_sync (); - } - } -} - -void maca_isr ( void ) { - //maca_entry++; - - if ( MACA->STATUSbits.OVR ) { - printf ( "maca overrun\n" ); - } - - if ( MACA->STATUSbits.BUSY ) { - printf ( "maca busy\n" ); - } - - if ( MACA->STATUSbits.CRC ) { - printf ( "maca crc error\n" ); - } - - if ( MACA->STATUSbits.TO ) { - printf ( "maca timeout\n" ); - } - - if ( MACA->IRQbits.DI ) { - MACA->CLRIRQbits.DI = 0x1; - maca_dma_rx->length = MACA->GETRXLVLbits.RECVBYTES - 2; // packet length doesn't include length - maca_dma_rx->lqi = get_lqi(); - maca_dma_rx->rx_time = MACA->TIMESTAMP; - - // does the packet need an ACK? - if ( MACA->CONTROLbits.PRM == MACA_CONTROL_PRM_OFF && - ( maca_dma_rx->data[1] & 0x20 ) ) { - volatile uint32_t wait_clk; - wait_clk = MACA->CLK + 200; - - while ( MACA->CLK < wait_clk ) { - continue; - } - } - - if ( maca_rx_callback != 0 ) { - maca_rx_callback ( maca_dma_rx ); - } - - _maca_add_to_rx ( maca_dma_rx ); - maca_dma_rx = 0; - } - - // filter faild - if ( MACA->IRQbits.FLT ) { - printf ( "maca filter faild\n" ); - _maca_resume_maca_sync (); - MACA->CLRIRQbits.FLT = 0x1; - } - - // CRC checksum faild - if ( MACA->IRQbits.CRC ) { - printf ( "maca crc checksum faild\n" ); - _maca_resume_maca_sync (); - MACA->CLRIRQbits.CRC = 0x1; - } - - // softclock interrupt - if ( MACA->IRQbits.SFT ) { - MACA->CLRIRQbits.SFT = 0x1; - } - - // poll interrupt - if ( MACA->IRQbits.POLL ) { - MACA->CLRIRQbits.POLL = 0x1; - } - - // action complete interrupt - if ( MACA->IRQbits.ACPL ) { - if ( maca_last_post == MACA_TX_POST ) { - maca_tx_head->status = MACA->STATUSbits.COMPLETE_CODE; - - if ( maca_tx_callback != 0 ) { - maca_tx_callback ( maca_tx_head ); - } - - maca_dma_tx = 0x0; - _maca_free_tx_head (); - maca_last_post = MACA_NO_POST; - } - - _maca_resume_maca_sync (); - MACA->CLRIRQbits.ACPL = 0x1; - } - - _maca_decode_status (); - - // this should never happen ... - if ( MACA->IRQ != 0 ) { - printf ( "MACA->IRQ is %x", (unsigned int) MACA->IRQ ); - } - - if ( maca_tx_head != 0 ) { - _maca_post_transmit (); - } - else { - _maca_post_receive (); - } -} - -void _maca_init_phy ( void ) { - MACA->CLKDIV = MACA_CLOCK_DIV; - MACA->WARMUP = 0x00180012; - MACA->EOFDELAY = 0x00000004; - MACA->CCADELAY = 0x001a0022; - MACA->TXCCADELAY = 0x00000025; - MACA->FRAMESYNC0 = 0x000000a7; - MACA->CLK = 0x00000008; - MACA->RXACKDELAY = 0x0000001e; - MACA->RXEND = 0x000000b4; - MACA->TXACKDELAY = 0x00000044; - MACA->MASKIRQbits.ACPL = 0x1; - MACA->MASKIRQbits.CM = 0x1; - MACA->MASKIRQbits.FLT = 0x1; - MACA->MASKIRQbits.CRC = 0x1; - MACA->MASKIRQbits.DI = 0x1; - MACA->MASKIRQbits.SFT = 0x1; - MACA->MASKIRQbits.RST = 0x1; - MACA->SLOTOFFSET = 0x00350000; -} - -#define MTOC_BASE 0x80009a00 //Modem Tracking Oscillator Controller -void _maca_flyback_init ( void ) { - uint32_t val8, tmp; - - val8 = * ( volatile uint32_t * ) ( MTOC_BASE+8 ); - tmp = val8 | 0x0000f7df; - * ( volatile uint32_t * ) ( MTOC_BASE+8 ) = tmp; - * ( volatile uint32_t * ) ( MTOC_BASE+12 ) = 0x00ffffff; - * ( volatile uint32_t * ) ( MTOC_BASE+16 ) = ( ( ( uint32_t ) 0x00ffffff ) >>12 ); - * ( volatile uint32_t * ) ( MTOC_BASE ) = 16; -} - -#define MACA_MAX_SEQ_1 2 -const uint32_t maca_addr_seq_1[MACA_MAX_SEQ_1] = { - 0x80003048, - 0x8000304c, -}; - -const uint32_t maca_data_seq_1[MACA_MAX_SEQ_1] = { - 0x00000f78, - 0x00607707, -}; - - -#define MACA_MAX_SEQ_2 2 -const uint32_t maca_addr_seq_2[MACA_MAX_SEQ_2] = { - 0x8000a050, - 0x8000a054, -}; - -const uint32_t maca_data_seq_2[MACA_MAX_SEQ_2] = { - 0x0000047b, - 0x0000007b, -}; - -#define MACA_MAX_CAL3_SEQ_1 3 -const uint32_t maca_addr_cal3_seq_1[MACA_MAX_CAL3_SEQ_1] = { 0x80009400,0x80009a04,0x80009a00, }; -const uint32_t maca_data_cal3_seq_1[MACA_MAX_CAL3_SEQ_1] = {0x00020017,0x8185a0a4,0x8c900025, }; - -#define MACA_MAX_CAL3_SEQ_2 2 -const uint32_t maca_addr_cal3_seq_2[MACA_MAX_CAL3_SEQ_2] = { 0x80009a00,0x80009a00,}; -const uint32_t maca_data_cal3_seq_2[MACA_MAX_CAL3_SEQ_2] = { 0x8c900021,0x8c900027,}; - -#define MACA_MAX_CAL3_SEQ_3 1 -const uint32_t maca_addr_cal3_seq_3[MACA_MAX_CAL3_SEQ_3] = { 0x80009a00 }; -const uint32_t maca_data_cal3_seq_3[MACA_MAX_CAL3_SEQ_3] = { 0x8c900000 }; - -#define MACA_MAX_CAL5 4 -const uint32_t maca_addr_cal5[MACA_MAX_CAL5] = { - 0x80009400, - 0x8000a050, - 0x8000a054, - 0x80003048, -}; -const uint32_t maca_data_cal5[MACA_MAX_CAL5] = { - 0x00000017, - 0x00000000, - 0x00000000, - 0x00000f00, -}; - -#define MACA_MAX_DATA 43 -const uint32_t maca_addr_reg_rep[MACA_MAX_DATA] = { - 0x80004118,0x80009204,0x80009208,0x8000920c, - 0x80009210,0x80009300,0x80009304,0x80009308, - 0x8000930c,0x80009310,0x80009314,0x80009318, - 0x80009380,0x80009384,0x80009388,0x8000938c, - 0x80009390,0x80009394,0x8000a008,0x8000a018, - 0x8000a01c,0x80009424,0x80009434,0x80009438, - 0x8000943c,0x80009440,0x80009444,0x80009448, - 0x8000944c,0x80009450,0x80009460,0x80009464, - 0x8000947c,0x800094e0,0x800094e4,0x800094e8, - 0x800094ec,0x800094f0,0x800094f4,0x800094f8, - 0x80009470,0x8000981c,0x80009828 -}; - -const uint32_t maca_data_reg_rep[MACA_MAX_DATA] = { - 0x00180012,0x00000605,0x00000504,0x00001111, - 0x0fc40000,0x20046000,0x4005580c,0x40075801, - 0x4005d801,0x5a45d800,0x4a45d800,0x40044000, - 0x00106000,0x00083806,0x00093807,0x0009b804, - 0x000db800,0x00093802,0x00000015,0x00000002, - 0x0000000f,0x0000aaa0,0x01002020,0x016800fe, - 0x8e578248,0x000000dd,0x00000946,0x0000035a, - 0x00100010,0x00000515,0x00397feb,0x00180358, - 0x00000455,0x00000001,0x00020003,0x00040014, - 0x00240034,0x00440144,0x02440344,0x04440544, - 0x0ee7fc00,0x00000082,0x0000002a -}; - -uint8_t ctov[16] = { - 0x0b,0x0b,0x0b,0x0a, - 0x0d,0x0d,0x0c,0x0c, - 0x0f,0x0e,0x0e,0x0e, - 0x11,0x10,0x10,0x0f -}; - -#define _INIT_CTOV_WORD_1 0x00dfbe77 -#define _INIT_CTOV_WORD_2 0x023126e9 -uint8_t get_ctov ( uint32_t r0, uint32_t r1 ) { - r0 = r0 * _INIT_CTOV_WORD_1; - r0 += ( r1 << 22 ); - r0 += _INIT_CTOV_WORD_2; - - r0 = ( uint32_t ) ( ( ( int32_t ) r0 ) >>25 ); - return ( uint8_t ) r0; -} - -static uint8_t _ram_values[4]; - -void _maca_radio_init ( void ) { - volatile uint32_t c; - - // sequence 1 - for ( c = 0; c < MACA_MAX_SEQ_1; c++ ) { - if ( ( uint32_t ) maca_addr_seq_1[c] != CRM->VREG_CNTL ) { - * ( ( volatile uint32_t * ) ( maca_addr_seq_1[c] ) ) = maca_data_seq_1[c]; - } - } - - // sequence 1 delay - for ( c = 0; c < 0x161a8; c++ ) { - continue; - } - - // sequence 2 - for ( c = 0; c < MACA_MAX_SEQ_2; c++ ) { - * ( ( volatile uint32_t * ) ( maca_addr_seq_2[c] ) ) = maca_data_seq_2[c]; - } - - // modem value - * ( ( volatile uint32_t * ) 0x80009000 ) = 0x80050100; - - // cal 3 seq 1 - for ( c = 0; c < MACA_MAX_CAL3_SEQ_1; c++ ) { - * ( ( volatile uint32_t * ) ( maca_addr_cal3_seq_1[c] ) ) = maca_data_cal3_seq_1[c]; - } - - // cal 3 delay - for ( c = 0; c < 0x11194; c++ ) { - continue; - } - - // cal 3 seq 2 - for ( c = 0; c < MACA_MAX_CAL3_SEQ_2; c++ ) { - * ( ( volatile uint32_t * ) ( maca_addr_cal3_seq_2[c] ) ) = maca_data_cal3_seq_2[c]; - } - - // cal 3 delay - for ( c = 0; c < 0x11194; c++ ) { - continue; - } - - // cal 3 seq 3 - for ( c = 0; c < MACA_MAX_CAL3_SEQ_3; c++ ) { - * ( ( volatile uint32_t * ) ( maca_addr_cal3_seq_3[c] ) ) = maca_data_cal3_seq_3[c]; - } - - // cal 5 - for ( c = 0; c < MACA_MAX_CAL5; c++ ) { - if ( ( uint32_t ) maca_addr_cal5[c] != CRM->VREG_CNTL ) { - * ( ( volatile uint32_t * ) ( maca_addr_cal5[c] ) ) = maca_data_cal5[c]; - } - } - - /*reg replacment */ - for ( c = 0; c < MACA_MAX_DATA; c++ ) { - * ( ( volatile uint32_t * ) ( maca_addr_reg_rep[c] ) ) = maca_data_reg_rep[c]; - } - - _maca_init_from_flash ( 0x1f000 ); - - for ( c=0; c<4; c++ ) { - printf ( " 0x%02x\n\r", _ram_values[c] ); - } - - for ( c=0; c<16; c++ ) { - ctov[c] = get_ctov ( c, _ram_values[3] ); - } -} - -const uint32_t PSMVAL[19] = { - 0x0000080f, 0x0000080f, 0x0000080f, - 0x0000080f, 0x0000081f, 0x0000081f, - 0x0000081f, 0x0000080f, 0x0000080f, - 0x0000080f, 0x0000001f, 0x0000000f, - 0x0000000f, 0x00000816, 0x0000001b, - 0x0000000b, 0x00000802, 0x00000817, - 0x00000003, -}; - -const uint32_t PAVAL[19] = { - 0x000022c0, 0x000022c0, 0x000022c0, - 0x00002280, 0x00002303, 0x000023c0, - 0x00002880, 0x000029f0, 0x000029f0, - 0x000029f0, 0x000029c0, 0x00002bf0, - 0x000029f0, 0x000028a0, 0x00002800, - 0x00002ac0, 0x00002880, 0x00002a00, - 0x00002b00, -}; - -const uint32_t AIMVAL[19] = { - 0x000123a0, 0x000163a0, 0x0001a3a0, - 0x0001e3a0, 0x000223a0, 0x000263a0, - 0x0002a3a0, 0x0002e3a0, 0x000323a0, - 0x000363a0, 0x0003a3a0, 0x0003a3a0, - 0x0003e3a0, 0x000423a0, 0x000523a0, - 0x000423a0, 0x0004e3a0, 0x0004e3a0, - 0x0004e3a0, -}; - -// #define MRRF_BASE 0x80009400 // Modem Radio Receiver Functions -// void _set_demodulator_type ( uint8_t demod ) { -// uint32_t val = *(uint32_t*)(MRRF_BASE); -// if ( demod == MACA_DEMOD_NCD ) { -// val = (val & ~1); -// } -// else { -// val = (val | 1); -// } -// *(uint32_t*)(MRRF_BASE) = val; -// } - -#define ADDR_POW1 0x8000a014 -#define ADDR_POW2 (ADDR_POW1 + 12) -#define ADDR_POW3 (ADDR_POW1 + 64) - -void maca_set_power ( uint8_t power ) { - safe_irq_disable ( INT_NUM_MACA ); - - * ( ( uint32_t * ) ( ADDR_POW1 ) ) = PSMVAL[power]; - -#ifdef USE_PA - * ( ( uint32_t * ) ( ADDR_POW2 ) ) = 0xffffdfff & PAVAL[power]; /* single port */ -#else - * ( ( uint32_t * ) ( ADDR_POW2 ) ) = 0x00002000 | PAVAL[power]; /* dual port */ -#endif - - * ( ( uint32_t * ) ( ADDR_POW3 ) ) = AIMVAL[power]; - irq_restore(); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 1; - } -} - -const uint8_t VCODivI[16] = { - 0x2f, 0x2f, 0x2f, 0x2f, - 0x2f, 0x2f, 0x2f, 0x2f, - 0x2f, 0x30, 0x30, 0x30, - 0x30, 0x30, 0x30, 0x30, -}; - -const uint32_t VCODivF[16] = { - 0x00355555, 0x006aaaaa, 0x00a00000, 0x00d55555, - 0x010aaaaa, 0x01400000, 0x01755555, 0x01aaaaaa, - 0x01e00000, 0x00155555, 0x004aaaaa, 0x00800000, - 0x00b55555, 0x00eaaaaa, 0x01200000, 0x01555555, -}; - -#define ADDR_CHAN1 0x80009800 -#define ADDR_CHAN2 (ADDR_CHAN1+12) -#define ADDR_CHAN3 (ADDR_CHAN1+16) -#define ADDR_CHAN4 (ADDR_CHAN1+48) - -void maca_set_channel ( uint8_t chan ) { - volatile uint32_t tmp; - safe_irq_disable ( INT_NUM_MACA ); - - tmp = * ( uint32_t * ) ( ADDR_CHAN1 ); - tmp = tmp & 0xbfffffff; - * ( ( uint32_t * ) ( ADDR_CHAN1 ) ) = tmp; - - * ( ( uint32_t * ) ( ADDR_CHAN2 ) ) = VCODivI[chan]; - * ( ( uint32_t * ) ( ADDR_CHAN3 ) ) = VCODivF[chan]; - - tmp = * ( ( uint32_t * ) ( ADDR_CHAN4 ) ); - tmp = tmp | 2; - * ( ( uint32_t * ) ( ADDR_CHAN4 ) ) = tmp; - - tmp = * ( ( uint32_t * ) ( ADDR_CHAN4 ) ); - tmp = tmp | 4; - * ( ( uint32_t * ) ( ADDR_CHAN4 ) ) = tmp; - - tmp = tmp & 0xffffe0ff; - tmp = tmp | ( ( ( ctov[chan] ) <<8 ) &0x1f00 ); - * ( ( uint32_t * ) ( ADDR_CHAN4 ) ) = tmp; - - irq_restore(); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 1; - } -} - -radio_address_t maca_set_address (radio_address_t addr) { - safe_irq_disable ( INT_NUM_MACA ); - - MACA->MAC16ADDR = addr; - - irq_restore(); - - if ( ITC->NIPENDbits.MACA ) { - ITC->INTFRCbits.MACA = 1; - } - return MACA->MAC16ADDR; -} - -radio_address_t maca_get_address ( void ) { - return MACA->MAC16ADDR; -} - -uint16_t maca_set_pan(uint16_t pan) -{ - safe_irq_disable(INT_NUM_MACA); - - MACA->MACPANIDbits.PANID = pan; - - irq_restore(); - - if (ITC->NIPENDbits.MACA) { - ITC->INTFRCbits.MACA = 1; - } - - return MACA->MACPANIDbits.PANID; -} - -uint16_t maca_get_pan(void) -{ - return MACA->MACPANIDbits.PANID; -} - -#define MACA_ROM_END 0x0013ffff -#define MACA_ENTRY_EOF 0x00000e0f -uint32_t _exec_init_entry ( volatile uint32_t *entries, uint8_t *value_buffer ) { - if ( entries[0] <= MACA_ROM_END ) { - if ( entries[0] == 0 ) { - /* do delay */ - printf ( "init_entry: delay 0x%08x\n", (unsigned int) entries[1] ); - - for ( volatile uint32_t i=0; i < entries[1]; i++ ) { - continue; - } - - return 2; - } - else if ( entries[0] == 1 ) { - /* do bit set/clear */ - printf ( "init_entry: bit set/clear 0x%08x 0x%08x 0x%08x\n", (unsigned int) entries[1], - (unsigned int) entries[2], - (unsigned int) entries[3] ); - * ( uint32_t * ) ( entries[2] ) = ( * ( uint32_t * ) ( entries[2] ) & entries[1] ) | ( entries[3] & entries[1] ); - return 4; - } - else if ( entries[0] >= 16 && entries[0] < 0xfff1 ) { - /* store bytes in value_buffer */ - printf ( "init_entry: store in value_buffer 0x%02x position %d\n", (unsigned int) entries[1], - (unsigned int) ( entries[0]>>4 ) - 1 ); - value_buffer[ ( entries[0]>>4 )-1] = entries[1]; - return 2; - } - else if ( entries[0] == MACA_ENTRY_EOF ) { - printf ( "init_entry: EOF \n" ); - return 0; - } - else { - /* invalid */ - printf ( "init_entry: invalid code 0x%08x\n", (unsigned int) entries[0] ); - return 0; - } - } - else { - /* address not in ROM */ - /* store value in address command */ - printf ( "init_entry: address value pair - *0x%08x = 0x%08x\n", (unsigned int) entries[0], - (unsigned int) entries[1] ); - - if ( entries[0] != CRM->VREG_CNTL ) { - * ( uint32_t * ) ( entries[0] ) = entries[1]; - } - else { - printf ( "skipping CRM->VREG_CNTL\n" ); - } - - return 2; - } -} - -#define MACA_FLASH_INIT_MAGIC 0x00000abc -uint32_t _maca_init_from_flash ( uint32_t addr ) { - nvm_type_t type = 0; - nvm_err_t err; - - volatile uint32_t buffer[8]; - volatile uint32_t i = 0; - volatile uint32_t j = 0; - - err = nvm_detect ( g_nvm_internal_interface_c, &type ); - printf ( "nvm_detect returned type 0x%08x err 0x%02x\n", type, err ); - - nvm_setsvar ( 0 ); - err = nvm_read ( g_nvm_internal_interface_c, type, ( uint8_t * ) buffer, addr, 8 ); - i += 8; - printf ( "nvm_read returned: 0x%02x\n", err ); - - for ( j = 0; j < 4; j++ ) { - printf ( "0x%08x\n", (unsigned int) buffer[j] ); - } - - if ( buffer[0] == MACA_FLASH_INIT_MAGIC ) { - volatile uint32_t length; - length = buffer[1] & 0x0000ffff; - - while ( i < ( length-4 ) ) { - nvm_read ( g_nvm_internal_interface_c, type, ( uint8_t * ) buffer, addr+i, 32 ); - i += 4 * _exec_init_entry ( buffer, _ram_values ); - } - } - else { - i = 0; - } - - nvm_setsvar ( 1 ); - return i; -} - -void _maca_resume_maca_sync ( void ) { - volatile uint32_t clk; - volatile uint32_t tsm_rx_steps; - volatile uint32_t last_warmup_step; - volatile uint32_t last_warmup_data; - volatile uint32_t last_warmdown_step; - volatile uint32_t last_warmdown_data; - volatile uint32_t i; - - safe_irq_disable ( INT_NUM_MACA ); - - /* manual TSM modem shutdown */ - /* read TSM_RX_STEPS */ - tsm_rx_steps = * ( volatile uint32_t * ) ( 0x80009204 ); - /* isolate the RX_WU_STEPS */ - /* shift left to align with 32-bit addressing */ - last_warmup_step = ( tsm_rx_steps & 0x1f ) << 2; - /* Read "current" TSM step and save this value for later */ - last_warmup_data = ( * ( ( volatile uint32_t * ) ( 0x80009300 + last_warmup_step ) ) ); - - /* isolate the RX_WD_STEPS */ - /* right-shift bits down to bit 0 position */ - /* left-shift to align with 32-bit addressing */ - last_warmdown_step = ( ( tsm_rx_steps & 0x1f00 ) >> 8 ) << 2; - /* write "last warmdown data" to current TSM step to shutdown rx */ - last_warmdown_data = ( * ( ( volatile uint32_t * ) ( 0x80009300 + last_warmdown_step ) ) ); - ( * ( ( volatile uint32_t * ) ( 0x80009300 + last_warmup_step ) ) ) = last_warmdown_data; - - /* Abort */ - MACA->CONTROLbits.SEQUENCE = MACA_CONTROL_SEQUENCE_ABORT; - - /* Wait ~8us */ - for ( clk = MACA->CLK, i = 0; MACA->CLK - clk < 3 && i < 300; i++ ) { - continue; - } - - /* NOP */ - MACA->CONTROLbits.SEQUENCE = MACA_CONTROL_SEQUENCE_NOP; - - /* Wait ~8us */ - for ( clk = MACA->CLK, i = 0; MACA->CLK - clk < 3 && i < 300; i++ ) { - continue; - } - - /* restore original "last warmup step" data to TSM (VERY IMPORTANT!!!) */ - ( * ( ( volatile uint32_t * ) ( 0x80009300 + last_warmup_step ) ) ) = last_warmup_data; - - /* Clear all MACA interrupts - we should have gotten the ABORT IRQ */ - MACA->CLRIRQ = 0xffff; - - irq_restore(); -} diff --git a/cpu/mc1322x/mc1322x.lds b/cpu/mc1322x/mc1322x.lds deleted file mode 100644 index 753c7f0573..0000000000 --- a/cpu/mc1322x/mc1322x.lds +++ /dev/null @@ -1,271 +0,0 @@ -/* vim: set syntax=rpcgen : */ -/* Script for -z combreloc: combine and sort reloc sections */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_startup) - -MEMORY - { - ram (rwx) : org = 0x00400000, l = 96K - } - -SECTIONS -{ - -SYS_STACK_SIZE = 1024; -IRQ_STACK_SIZE = 256; -FIQ_STACK_SIZE = 256; -SVC_STACK_SIZE = 256; -ABT_STACK_SIZE = 16; -UND_STACK_SIZE = 16; -HEAP_SIZE = 4096; - - /* Read-only sections, merged into text segment: */ - PROVIDE (__executable_start = 0x00400000); . = 0x00400000; - .text : - { - *(.startup) - *(.irq) - *(.text .stub .text.* .gnu.linkonce.t.*) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) - } =0 - - .interp : { *(.interp) } - .note.gnu.build-id : { *(.note.gnu.build-id) } - .hash : { *(.hash) } - .gnu.hash : { *(.gnu.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rel.dyn : - { - *(.rel.init) - *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) - *(.rel.fini) - *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) - *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) - *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) - *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) - *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) - *(.rel.ctors) - *(.rel.dtors) - *(.rel.got) - *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) - } - .rela.dyn : - { - *(.rela.init) - *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) - *(.rela.fini) - *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) - *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) - *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) - *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) - *(.rela.ctors) - *(.rela.dtors) - *(.rela.got) - *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) - } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : - { - KEEP (*(.init)) - } =0 - .plt : { *(.plt) } - .fini : - { - KEEP (*(.fini)) - } =0 - PROVIDE (__etext = .); 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We want to adjust up to - the same address within the page on the next page up. */ - -/* . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); */ - - . = ALIGN(4); - . = DATA_SEGMENT_ALIGN(4,4); - - /* Exception handling */ - .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } - .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } - /* Thread Local Storage sections */ - .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } - .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - } - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } - .jcr : { KEEP (*(.jcr)) } - .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) } - .dynamic : { *(.dynamic) } - . = DATA_SEGMENT_RELRO_END (0, .); - .got : { *(.got.plt) *(.got) } - .data : - { - /* changed from __data_start = . ; */ - _data = . ; - *(.data .data.* .gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - } - .data1 : { *(.data1) } - _edata = .; PROVIDE (edata = .); - - .stack : { - __stack_start__ = . ; - - . += IRQ_STACK_SIZE; - . = ALIGN (4); - __irq_stack_top__ = . ; - - . += FIQ_STACK_SIZE; - . = ALIGN (4); - __fiq_stack_top__ = . ; - - . += SVC_STACK_SIZE; - . = ALIGN (4); - __svc_stack_top__ = . ; - - . += ABT_STACK_SIZE; - . = ALIGN (4); - __abt_stack_top__ = . ; - - . += UND_STACK_SIZE; - . = ALIGN (4); - __und_stack_top__ = . ; - - . += SYS_STACK_SIZE; - . = ALIGN (4); - __sys_stack_top__ = . ; - - __stack_end__ = .; - } - - - __bss_start = .; - __bss_start__ = .; - .bss : - { - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - /* Align here to ensure that the .bss section occupies space up to - _end. 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See the file LICENSE in the top level - * directory for more details. - */ - -#include -#include -#include -#include -#include "irq.h" - -extern uintptr_t __heap_start; ///< start of heap memory space -extern uintptr_t __heap_end; ///< maximum for end of heap memory space - -/// current position in heap -static caddr_t heap = (caddr_t)&__heap_start; -/// maximum position in heap -static const caddr_t heap_max = (caddr_t)&__heap_end; -// start position in heap -static const caddr_t heap_start = (caddr_t)&__heap_start; - -/*-----------------------------------------------------------------------------------*/ -caddr_t _sbrk_r(struct _reent *r, ptrdiff_t incr) -{ - uint32_t cpsr = disableIRQ(); - - /* check all heaps for a chunk of the requested size */ - caddr_t new_heap = heap + incr; - - if( new_heap <= heap_max ) { - caddr_t prev_heap = heap; - heap = new_heap; - - r->_errno = 0; - restoreIRQ(cpsr); - return prev_heap; - } - restoreIRQ(cpsr); - - r->_errno = ENOMEM; - return NULL; -} diff --git a/cpu/mc1322x/startup.s b/cpu/mc1322x/startup.s deleted file mode 100644 index 614315bcc4..0000000000 --- a/cpu/mc1322x/startup.s +++ /dev/null @@ -1,203 +0,0 @@ -/* - * Copyright (c) 2010, Mariano Alvira and other contributors - * to the MC1322x project (http:/*mc1322x.devl.org) and Contiki. - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * This file is part of the Contiki OS. - * - * - */ - - -/* -The following lincence is for all parts of this code done by -Martin Thomas. Code from others used here may have other license terms. - -Copyright (C) 2004 Martin THOMAS - -Permission is hereby granted, free of charge, to any person obtaining a copy of -this software and associated documentation files (the "Software"), to deal in -the Software without restriction, including without limitation the rights to -use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of -the Software, and to permit persons to whom the Software is furnished to do so, -subject to the following conditions: - -! The above copyright notice and this permission notice shall be included in all -! copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS -FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR -COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER -IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN -CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -/* - * startup.s - mc1322x specific startup code - * Copyright (C) 2013 Thomas Eichinger - * - * This source code is licensed under the GNU Lesser General Public License, - * Version 2. See the file LICENSE for more details. - * - * This file is part of RIOT. - */ - -/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */ -.set USR_MODE, 0x10 /* Normal User Mode */ -.set FIQ_MODE, 0x11 /* FIQ Processing Fast Interrupts Mode */ -.set IRQ_MODE, 0x12 /* IRQ Processing Standard Interrupts Mode */ -.set SVC_MODE, 0x13 /* Supervisor Processing Software Interrupts Mode */ -.set ABT_MODE, 0x17 /* Abort Processing memory Faults Mode */ -.set UND_MODE, 0x1B /* Undefined Processing Undefined Instructions Mode */ -.set SYS_MODE, 0x1F /* System Running Priviledged Operating System Tasks Mode */ - -.set IRQ_DISABLE, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */ -.set FIQ_DISABLE, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */ - - - .section .startup - - .set _rom_data_init, 0x108d0 - .global _startup - .func _startup - -_startup: - b _begin /* reset - _start */ - ldr PC, Undef_Addr /* Undefined Instruction */ - ldr PC, SWI_Addr /* Software Interrupt */ - ldr PC, PAbt_Addr /* Prefetch Abort */ - ldr PC, DAbt_Addr /* Data Abort */ - ldr PC, _not_used - ldr PC, IRQ_Addr /* Interrupt Request Interrupt (load from VIC) */ - ldr PC, _fiq - - /* these vectors are used for rom patching */ -.org 0x20 -.code 16 -_RPTV_0_START: - bx lr /* do nothing */ - -.org 0x60 -_RPTV_1_START: - bx lr /* do nothing */ - -.org 0xa0 -_RPTV_2_START: - bx lr /* do nothing */ - -.org 0xe0 -_RPTV_3_START: - bx lr /* do nothing */ - -.org 0x120 -ROM_var_start: .word 0 -.org 0x7ff -ROM_var_end: .word 0 - -.code 32 -.align -_begin: - /* FIQ mode stack */ - msr CPSR_c, #(FIQ_MODE | IRQ_DISABLE | FIQ_DISABLE) - ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */ - - /* IRQ mode stack */ - msr CPSR_c, #(IRQ_MODE | IRQ_DISABLE | FIQ_DISABLE) - ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */ - - /* Supervisor mode stack */ - msr CPSR_c, #(SVC_MODE | IRQ_DISABLE | FIQ_DISABLE) - ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */ - - /* Undefined mode stack */ - msr CPSR_c, #(UND_MODE | IRQ_DISABLE | FIQ_DISABLE) - ldr sp, =__und_stack_top__ /* set the UND stack pointer */ - - /* Abort mode stack */ - msr CPSR_c, #(ABT_MODE | IRQ_DISABLE | FIQ_DISABLE) - ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */ - - /* System mode stack */ - msr CPSR_c, #(SYS_MODE | IRQ_DISABLE | FIQ_DISABLE) - ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */ - - /* call the rom_data_init function in ROM */ - /* initializes ROM_var space defined by ROM_var_start and ROM_var_end */ - /* this area is used by ROM functions (e.g. nvm_read) */ - ldr r12,=_rom_data_init - mov lr,pc - bx r12 - - msr CPSR_c, #(SYS_MODE) - - /* Clear BSS */ -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ -clbss_l: - str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blt clbss_l - - bl bootloader - b kernel_init - -/* Exception vector handlers branching table */ -Undef_Addr: .word UNDEF_Routine -SWI_Addr: .word ctx_switch -PAbt_Addr: .word PABT_Routine -DAbt_Addr: .word DABT_Routine -_not_used: .word not_used -IRQ_Addr: .word arm_irq_handler -_fiq: .word fiq - .balignl 16, 0xdeadbeef - -/* - * These are defined in the board-specific linker script. - */ -.globl _bss_start -_bss_start: - .word __bss_start - - .globl _bss_end -_bss_end: - .word _end - -.align 5 -not_used: - - .align 5 -/*irq: -// -// .align 5*/ -fiq: - - .align 5 diff --git a/cpu/mc1322x/syscalls.c b/cpu/mc1322x/syscalls.c deleted file mode 100644 index bb057712c7..0000000000 --- a/cpu/mc1322x/syscalls.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * syscalls.c - arm system calls - * Copyright (C) 2013 Oliver Hahm - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @file - * @ingroup cpu_arm7_common - * @brief LPC2387 NewLib system calls implementation - * - * @author Michael Baar - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "arm_cpu.h" -#include "board_uart0.h" -/* core */ -#include "kernel.h" -#include "irq.h" -#if defined MODULE_RTC -#include "periph/rtc.h" -#elif defined MODULE_VTIMER -#include "vtimer.h" -#endif - -#define DEBUG_SYSCALLS 0 -#if DEBUG_SYSCALLS -#define PRINTF(...) printf(__VA_ARGS__) -#else -#define PRINTF(...) -#endif - -/** - * @name Heaps (defined in linker script) - * @{ - */ - -extern uintptr_t __heap1_start; ///< start of heap memory space -extern uintptr_t __heap1_max; ///< maximum for end of heap memory space -extern uintptr_t __heap2_start; ///< start of heap memory space -extern uintptr_t __heap2_max; ///< maximum for end of heap memory space -extern uintptr_t __heap3_start; ///< start of heap memory space -extern uintptr_t __heap3_max; ///< maximum for end of heap memory space - -/*-----------------------------------------------------------------------------------*/ -void __assert_func(const char *file, int line, const char *func, const char *failedexpr) -{ - printf("#!assertion %s failed\n\t%s() in %s:%d\n", failedexpr, func, file, line); - _exit(3); -} -/*-----------------------------------------------------------------------------------*/ -void __assert(const char *file, int line, const char *failedexpr) -{ - __assert_func(file, line, "?", failedexpr); -} - -/*---------------------------------------------------------------------------*/ -int _isatty_r(struct _reent *r, int fd) -{ - r->_errno = 0; - - if (fd == STDOUT_FILENO || fd == STDERR_FILENO) { - return 1; - } - else { - return 0; - } -} -/*---------------------------------------------------------------------------*/ -_off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int whence) -{ - /* to get rid of gcc warnings */ - (void) fd; - (void) pos; - (void) whence; - _off_t result = -1; - PRINTF("lseek [%i] pos %li whence %i\n", fd, pos, whence); - - r->_errno = ENODEV; - - PRINTF("lseek returned %li (0 is success)\n", result); - return result; -} -/*---------------------------------------------------------------------------*/ -int _open_r(struct _reent *r, const char *name, int mode) -{ - /* to get rid of gcc warnings */ - (void) name; - (void) mode; - int ret = -1; - PRINTF("open '%s' mode %#x\n", name, mode); - - r->_errno = ENODEV; // no such device - - PRINTF("open [%i] errno %i\n", ret, r->_errno); - return ret; -} -/*---------------------------------------------------------------------------*/ -int _stat_r(struct _reent *r, char *name, struct stat *st) -{ - /* to get rid of gcc warnings */ - (void) name; - (void) st; - int ret = -1; - PRINTF("_stat_r '%s' \n", name); - r->_errno = ENODEV; // no such device - PRINTF("_stat_r [%i] errno %i\n", ret, r->_errno); - return ret; -} -/*---------------------------------------------------------------------------*/ -int _fstat_r(struct _reent *r, int fd, struct stat *st) -{ - int ret = -1; - - r->_errno = 0; - memset(st, 0, sizeof(*st)); - - if (fd == STDOUT_FILENO || fd == STDERR_FILENO) { - st->st_mode = S_IFCHR; - ret = 0; - } - else { - r->_errno = ENODEV; - } - - return ret; -} -/*---------------------------------------------------------------------------*/ -int _write_r(struct _reent *r, int fd, const void *data, unsigned int count) -{ - int result = EOF; - r->_errno = EBADF; - - switch(fd) { - case STDOUT_FILENO: - case STDERR_FILENO: - result = uart0_puts((char *)data, count); - break; - - default: - PRINTF("write [%i] data @%p count %i\n", fd, data, count); - - PRINTF("write [%i] returned %i errno %i\n", fd, result, r->_errno); - break; - } - - return result; -} -/*---------------------------------------------------------------------------*/ -int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count) -{ - /* to get rid of gcc warnings */ - (void) fd; - (void) buffer; - (void) count; - int result = -1; - r->_errno = EBADF; - PRINTF("read [%i] buffer @%p count %i\n", fd, buffer, count); - PRINTF("read [%i] returned %i\n", fd, result); - - return result; -} -/*---------------------------------------------------------------------------*/ -int _close_r(struct _reent *r, int fd) -{ - (void) fd; - int result = -1; - r->_errno = EBADF; - PRINTF("close [%i]\n", fd); - PRINTF("close returned %i errno %i\n", result, errno); - - return result; -} -/*---------------------------------------------------------------------------*/ -int _unlink_r(struct _reent *r, char *path) -{ - /* get rid of gcc warnings */ - (void) path; - - int result = -1; - r->_errno = ENODEV; - PRINTF("unlink '%s'\n", path); - PRINTF("unlink returned %i errno %i\n", result, errno); - - return result; -} -/*---------------------------------------------------------------------------*/ -void _exit(int n) -{ - printf("#!exit %i: resetting\n", n); - - stdio_flush(); - arm_reset(); - - while (1); -} -/*---------------------------------------------------------------------------*/ -pid_t _getpid(void) -{ - return (pid_t) sched_active_pid; -} -/*---------------------------------------------------------------------------*/ -__attribute__ ((weak)) -int _kill_r(struct _reent *r, int pid, int sig) -{ - (void) r; - (void) pid; - (void) sig; - /* not implemented */ - r->_errno = ESRCH; /* no such process */ - return -1; -} - -void _init(void) {} -void _fini(void) {} - -/** - * @brief Send a signal to a thread - * - * @param[in] pid the pid to send to - * @param[in] sig the signal to send - * - * @return TODO - */ -__attribute__ ((weak)) -int _kill(int pid, int sig) -{ - (void) pid; - (void) sig; - /* not implemented */ - errno = ESRCH; /* no such process */ - return -1; -}