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boards/common: fix typos

This commit is contained in:
Kaspar Schleiser 2019-10-23 21:13:10 +02:00
parent 6a191fe9ff
commit 4fb244d415
7 changed files with 11 additions and 11 deletions

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@ -13,5 +13,5 @@ To enable only a specific bank, simply add `USEMODULE += atmega_pcintN` to your
Makefile. To enable all interrupts you can use `USEMODULE += atmega_pcint`. Makefile. To enable all interrupts you can use `USEMODULE += atmega_pcint`.
In case you want to add a new CPU, simply provide an `atmega_pcint.h` with your In case you want to add a new CPU, simply provide an `atmega_pcint.h` with your
CPU and adapt your Makefile.dep and Makefile.featues files. CPU and adapt your Makefile.dep and Makefile.features files.
*/ */

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@ -91,7 +91,7 @@ extern "C" {
* ATmega2560 * ATmega2560
* ========== * ==========
* The timer driver only supports the four 16-bit timers (Timer1, Timer3, * The timer driver only supports the four 16-bit timers (Timer1, Timer3,
* Timer4, Timer5), so those are the only onces we can use here. * Timer4, Timer5), so those are the only ones we can use here.
* *
* *
* ATmega32U4 * ATmega32U4

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@ -108,7 +108,7 @@
/** /**
* @brief MTD drive start address in SPI flash memory * @brief MTD drive start address in SPI flash memory
* *
* Defines the start adress of the MTD system device in the SPI * Defines the start address of the MTD system device in the SPI
* flash memory. It can be overridden by \ref esp32_app_spec_conf * flash memory. It can be overridden by \ref esp32_app_spec_conf
* "application-specific board configuration" * "application-specific board configuration"
* *

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@ -135,7 +135,7 @@ void msp430_init_dco(void)
unsigned int oldcapture = 0; unsigned int oldcapture = 0;
unsigned int i; unsigned int i;
BCSCTL1 = 0xa4; /* ACLK is devided by 4. RSEL=6 no division for MCLK BCSCTL1 = 0xa4; /* ACLK is divided by 4. RSEL=6 no division for MCLK
and SSMCLK. XT2 is off. */ and SSMCLK. XT2 is off. */
/* Init FLL to desired frequency using the 32762Hz crystal */ /* Init FLL to desired frequency using the 32762Hz crystal */
@ -151,15 +151,15 @@ void msp430_init_dco(void)
for (i = 0xffff; i > 0; i--); /* Delay for XTAL to settle */ for (i = 0xffff; i > 0; i--); /* Delay for XTAL to settle */
CCTL2 = CCIS0 + CM0 + CAP; /* Define CCR2, CAP, ACLK */ CCTL2 = CCIS0 + CM0 + CAP; /* Define CCR2, CAP, ACLK */
TACTL = TASSEL1 + TACLR + MC1; /* SMCLK, continous mode */ TACTL = TASSEL1 + TACLR + MC1; /* SMCLK, continuous mode */
while (1) { while (1) {
unsigned int compare; unsigned int compare;
while ((CCTL2 & CCIFG) != CCIFG); /* Wait until capture occured! */ while ((CCTL2 & CCIFG) != CCIFG); /* Wait until capture occurred! */
CCTL2 &= ~CCIFG; /* Capture occured, clear flag */ CCTL2 &= ~CCIFG; /* Capture occurred, clear flag */
compare = CCR2; /* Get current captured SMCLK */ compare = CCR2; /* Get current captured SMCLK */
compare = compare - oldcapture; /* SMCLK difference */ compare = compare - oldcapture; /* SMCLK difference */
oldcapture = CCR2; /* Save current captured SMCLK */ oldcapture = CCR2; /* Save current captured SMCLK */

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@ -369,7 +369,7 @@ static void download_main(int event)
} }
if (strcmp(parsed_response_buf, "OK\r\n") == 0) { if (strcmp(parsed_response_buf, "OK\r\n") == 0) {
printf("Baud sync sucessful\r\n"); printf("Baud sync successful\r\n");
state = CHIP_ID; state = CHIP_ID;
event = BEGIN; event = BEGIN;
break; break;
@ -851,7 +851,7 @@ static void download_main(int event)
// would be nice if we could simply jump to the user's code, but // would be nice if we could simply jump to the user's code, but
// Philips didn't think of that. The interrupt vector table stays // Philips didn't think of that. The interrupt vector table stays
// mapped to the bootloader, so jumping to zero only runs the // mapped to the bootloader, so jumping to zero only runs the
// bootloader again. Intead, we need to download a tiny ARM // bootloader again. Instead, we need to download a tiny ARM
// program that reconfigures the hardware and then jumps to zero. // program that reconfigures the hardware and then jumps to zero.
//snprintf(buf, sizeof(buf), "G %d A\r\n", 0); //snprintf(buf, sizeof(buf), "G %d A\r\n", 0);
snprintf(buf, sizeof(buf), "W %u %u\r\n", chip->ram_addr, chip->bootprog[0] * 4); snprintf(buf, sizeof(buf), "W %u %u\r\n", chip->ram_addr, chip->bootprog[0] * 4);

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@ -113,7 +113,7 @@ int read_intel_hex(const char *filename)
/* parses a line of intel hex code, stores the data in bytes[] */ /* parses a line of intel hex code, stores the data in bytes[] */
/* and the beginning address in addr, and returns a 1 if the */ /* and the beginning address in addr, and returns a 1 if the */
/* line was valid, or a 0 if an error occured. The variable */ /* line was valid, or a 0 if an error occurred. The variable */
/* num gets the number of bytes that were stored into bytes[] */ /* num gets the number of bytes that were stored into bytes[] */

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@ -131,7 +131,7 @@ static void report_open_error(const char *filename, int err)
printf("You don't have permission to access %s\r\n", filename); printf("You don't have permission to access %s\r\n", filename);
} }
//printf("Attemping to find more information about %s....\r\n", filename); //printf("Attempting to find more information about %s....\r\n", filename);
r = stat(filename, &info); r = stat(filename, &info);
if (r < 0) { if (r < 0) {