diff --git a/cpu/efm32/periph/rtt_series0.c b/cpu/efm32/periph/rtt_series0.c
index 86b8846169..abe3c3d10d 100644
--- a/cpu/efm32/periph/rtt_series0.c
+++ b/cpu/efm32/periph/rtt_series0.c
@@ -34,10 +34,47 @@ typedef struct {
 
 static rtt_state_t rtt_state;
 
+/* prescaler of 32768 = 1 s of resolution and overflow each 194 days */
+#if RTT_FREQUENCY == 1
+#define RTT_CMU_CLK_DIV cmuClkDiv_32768
+#elif RTT_FREQUENCY == 2
+#define RTT_CMU_CLK_DIV cmuClkDiv_16384
+#elif RTT_FREQUENCY == 4
+#define RTT_CMU_CLK_DIV cmuClkDiv_8192
+#elif RTT_FREQUENCY == 8
+#define RTT_CMU_CLK_DIV cmuClkDiv_4096
+#elif RTT_FREQUENCY == 16
+#define RTT_CMU_CLK_DIV cmuClkDiv_2048
+#elif RTT_FREQUENCY == 32
+#define RTT_CMU_CLK_DIV cmuClkDiv_1024
+#elif RTT_FREQUENCY == 64
+#define RTT_CMU_CLK_DIV cmuClkDiv_512
+#elif RTT_FREQUENCY == 128
+#define RTT_CMU_CLK_DIV cmuClkDiv_256
+#elif RTT_FREQUENCY == 256
+#define RTT_CMU_CLK_DIV cmuClkDiv_128
+#elif RTT_FREQUENCY == 512
+#define RTT_CMU_CLK_DIV cmuClkDiv_64
+#elif RTT_FREQUENCY == 1024
+#define RTT_CMU_CLK_DIV cmuClkDiv_32
+#elif RTT_FREQUENCY == 2048
+#define RTT_CMU_CLK_DIV cmuClkDiv_16
+#elif RTT_FREQUENCY == 4096
+#define RTT_CMU_CLK_DIV cmuClkDiv_8
+#elif RTT_FREQUENCY == 8192
+#define RTT_CMU_CLK_DIV cmuClkDiv_4
+#elif RTT_FREQUENCY == 16384
+#define RTT_CMU_CLK_DIV cmuClkDiv_2
+#elif RTT_FREQUENCY == 32768
+#define RTT_CMU_CLK_DIV cmuClkDiv_1
+#else
+#warning "no matching prescaler for RTT_FREQUENCY"
+#endif
+
 void rtt_init(void)
 {
-    /* prescaler of 32768 = 1 s of resolution and overflow each 194 days */
-    CMU_ClockDivSet(cmuClock_RTC, cmuClkDiv_32768);
+    /* setup prescaler */
+    CMU_ClockDivSet(cmuClock_RTC, RTT_CMU_CLK_DIV);
 
     /* enable clocks */
     CMU_ClockEnable(cmuClock_CORELE, true);
diff --git a/cpu/efm32/periph/rtt_series1.c b/cpu/efm32/periph/rtt_series1.c
index c67e60b2cf..cb1abd8d6b 100644
--- a/cpu/efm32/periph/rtt_series1.c
+++ b/cpu/efm32/periph/rtt_series1.c
@@ -35,6 +35,43 @@ typedef struct {
 
 static rtt_state_t rtt_state;
 
+/* prescaler of 32768 = 1 s of resolution and overflow each 194 days */
+#if RTT_FREQUENCY == 1
+#define RTT_CMU_CLK_DIV rtccCntPresc_32768
+#elif RTT_FREQUENCY == 2
+#define RTT_CMU_CLK_DIV rtccCntPresc_16384
+#elif RTT_FREQUENCY == 4
+#define RTT_CMU_CLK_DIV rtccCntPresc_8192
+#elif RTT_FREQUENCY == 8
+#define RTT_CMU_CLK_DIV rtccCntPresc_4096
+#elif RTT_FREQUENCY == 16
+#define RTT_CMU_CLK_DIV rtccCntPresc_2048
+#elif RTT_FREQUENCY == 32
+#define RTT_CMU_CLK_DIV rtccCntPresc_1024
+#elif RTT_FREQUENCY == 64
+#define RTT_CMU_CLK_DIV rtccCntPresc_512
+#elif RTT_FREQUENCY == 128
+#define RTT_CMU_CLK_DIV rtccCntPresc_256
+#elif RTT_FREQUENCY == 256
+#define RTT_CMU_CLK_DIV rtccCntPresc_128
+#elif RTT_FREQUENCY == 512
+#define RTT_CMU_CLK_DIV rtccCntPresc_64
+#elif RTT_FREQUENCY == 1024
+#define RTT_CMU_CLK_DIV rtccCntPresc_32
+#elif RTT_FREQUENCY == 2048
+#define RTT_CMU_CLK_DIV rtccCntPresc_16
+#elif RTT_FREQUENCY == 4096
+#define RTT_CMU_CLK_DIV rtccCntPresc_8
+#elif RTT_FREQUENCY == 8192
+#define RTT_CMU_CLK_DIV rtccCntPresc_4
+#elif RTT_FREQUENCY == 16384
+#define RTT_CMU_CLK_DIV rtccCntPresc_2
+#elif RTT_FREQUENCY == 32768
+#define RTT_CMU_CLK_DIV rtccCntPresc_1
+#else
+#warning "no matching prescaler for RTT_FREQUENCY"
+#endif
+
 void rtt_init(void)
 {
     /* enable clocks */
@@ -45,7 +82,7 @@ void rtt_init(void)
     RTCC_Init_TypeDef init = RTCC_INIT_DEFAULT;
 
     init.enable = false;
-    init.presc = rtccCntPresc_32768;
+    init.presc = RTT_CMU_CLK_DIV;
 
     RTCC_Reset();
     RTCC_Init(&init);