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Merge pull request #13037 from benpicco/lpc23xx_i2c
cpu/lpc2387: implement periph/i2c
This commit is contained in:
benpicco
GitHub
commit
50a5845b15
@ -3,6 +3,7 @@ CPU_MODEL = lpc2388
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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@ -101,6 +101,33 @@ static const adc_conf_t adc_config[] = {
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};
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#define ADC_NUMOF (1)
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C0,
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.speed = I2C_SPEED_NORMAL,
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.irq_prio = 5,
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.pinsel_sda = 1,
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.pinsel_scl = 1,
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.pinsel_msk_sda = BIT22, /* P0.27 */
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.pinsel_msk_scl = BIT24, /* P0.28 */
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},
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{
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.dev = I2C1,
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.speed = I2C_SPEED_NORMAL,
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.irq_prio = 5,
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.pinsel_sda = 1,
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.pinsel_scl = 1,
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.pinsel_msk_sda = BIT6 | BIT7, /* P0.19 */
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.pinsel_msk_scl = BIT8 | BIT9, /* P0.20 */
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},
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};
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#define I2C_NUMOF (2)
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/** @} */
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#ifdef __cplusplus
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@ -2,6 +2,7 @@ CPU = lpc2387
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_spi
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@ -155,6 +155,25 @@ static const adc_conf_t adc_config[] = {
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{ /* JP3 */
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.dev = I2C2,
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.speed = I2C_SPEED_NORMAL,
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.irq_prio = 5,
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.pinsel_sda = 0,
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.pinsel_scl = 0,
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.pinsel_msk_sda = BIT21, /* P0.10 */
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.pinsel_msk_scl = BIT23, /* P0.11 */
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},
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};
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/* used in arithmetic preprocessor expression, so no ARRAY_SIZE() */
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#define I2C_NUMOF (1)
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/** @} */
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#ifdef __cplusplus
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}
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@ -195,7 +195,40 @@ typedef struct {
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uint32_t pinsel_msk; /**< PINSEL Mask for ADC pin */
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} adc_conf_t;
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/**
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* @brief Override I2C clock speed values
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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I2C_SPEED_LOW = 10000, /**< low speed mode: ~10 kbit/s */
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I2C_SPEED_NORMAL = 100000, /**< normal mode: ~100 kbit/s */
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I2C_SPEED_FAST = 400000, /**< fast mode: ~400 kbit/s */
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} i2c_speed_t;
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/* @} */
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/**
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* @brief I2C device configuration
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*/
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typedef struct {
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lpc23xx_i2c_t *dev; /**< pointer to the I2C device */
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i2c_speed_t speed; /**< I2C bus speed */
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uint8_t irq_prio; /**< priority of the I2C IRQ */
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uint8_t pinsel_sda; /**< PINSEL# of the SDA pin */
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uint8_t pinsel_scl; /**< PINSEL# of the SCL pin */
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uint32_t pinsel_msk_sda;/**< SDA PINSEL Mask */
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uint32_t pinsel_msk_scl;/**< SCL PINSEL Mask */
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} i2c_conf_t;
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/* @} */
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/**
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* @name Use shared I2C functions
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* @{
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*/
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#define PERIPH_I2C_NEED_READ_REG
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#define PERIPH_I2C_NEED_WRITE_REG
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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29
cpu/lpc2387/include/vendor/lpc23xx.h
vendored
29
cpu/lpc2387/include/vendor/lpc23xx.h
vendored
@ -771,8 +771,35 @@ typedef struct {
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#define U3FDR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x28))
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#define U3TER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x30))
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/**
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* @brief Generic I2C register map
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*/
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typedef struct {
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REG32 CONSET; /**< Control Set Register */
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REG32 STAT; /**< Status Register */
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REG32 DAT; /**< Data Register */
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REG32 ADR; /**< Slave Address Register */
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REG32 SCLH; /**< Duty Cycle High Half Word */
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REG32 SCLL; /**< Duty Cycle Low Half Word */
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REG32 CONCLR; /**< Control Clear Register */
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} lpc23xx_i2c_t;
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/* I2C Control Set Register */
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#define I2CONSET_AA 0x00000004 /**< Assert acknowledge */
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#define I2CONSET_SI 0x00000008 /**< Interrupt flag */
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#define I2CONSET_STO 0x00000010 /**< STOP flag */
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#define I2CONSET_STA 0x00000020 /**< START flag */
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#define I2CONSET_I2EN 0x00000040 /**< Interface enable */
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/* I2C Control clear Register */
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#define I2CONCLR_AAC 0x00000004 /**< clear Assert ACK */
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#define I2CONCLR_SIC 0x00000008 /**< clear Interrupt */
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#define I2CONCLR_STAC 0x00000020 /**< clear START flag */
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#define I2CONCLR_I2ENC 0x00000040 /**< Interface disable */
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/* I2C Interface 0 */
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#define I2C0_BASE_ADDR 0xE001C000
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#define I2C0 ((lpc23xx_i2c_t *)I2C0_BASE_ADDR)
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#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
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#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
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#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
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@ -783,6 +810,7 @@ typedef struct {
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/* I2C Interface 1 */
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#define I2C1_BASE_ADDR 0xE005C000
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#define I2C1 ((lpc23xx_i2c_t *)I2C1_BASE_ADDR)
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#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
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#define I21STAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
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#define I21DAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
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@ -793,6 +821,7 @@ typedef struct {
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/* I2C Interface 2 */
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#define I2C2_BASE_ADDR 0xE0080000
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#define I2C2 ((lpc23xx_i2c_t *)I2C2_BASE_ADDR)
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#define I22CONSET (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x00))
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#define I22STAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x04))
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#define I22DAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x08))
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484
cpu/lpc2387/periph/i2c.c
Normal file
484
cpu/lpc2387/periph/i2c.c
Normal file
@ -0,0 +1,484 @@
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/*
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* Copyright (C) 2020 Beuth Hochschule für Technik Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_lpc2387
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* @ingroup drivers_periph_i2c
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* @{
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*
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* @file
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* @brief Low-level I2C driver implementation for lpc23xx
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*
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* @author Benjamin Valentin <benpicco@beuth-hochschule.de>
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*
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* @}
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*/
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#include <assert.h>
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#include <stdint.h>
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#include <errno.h>
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#include "cpu.h"
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#include "board.h"
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#include "byteorder.h"
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#include "periph_conf.h"
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#include "periph/i2c.h"
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#include "sched.h"
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#include "thread.h"
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#include "mutex.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#if I2C_NUMOF > 0
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static void I2C0_IRQHandler(void) __attribute__((interrupt("IRQ")));
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#endif
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#if I2C_NUMOF > 1
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static void I2C1_IRQHandler(void) __attribute__((interrupt("IRQ")));
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#endif
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#if I2C_NUMOF > 2
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static void I2C2_IRQHandler(void) __attribute__((interrupt("IRQ")));
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#endif
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/**
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* We only ever need two buffers for read/write reg
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*/
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#define TRX_BUFS_MAX (2)
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static struct i2c_ctx {
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mutex_t lock;
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mutex_t tx_done;
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uint8_t *buf[TRX_BUFS_MAX];
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uint8_t *buf_end[TRX_BUFS_MAX];
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uint8_t *cur;
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uint8_t *end;
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int res;
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uint8_t addr[TRX_BUFS_MAX];
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uint8_t buf_num;
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uint8_t buf_cur;
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} ctx[I2C_NUMOF] = {
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#if I2C_NUMOF > 0
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{ .lock = MUTEX_INIT, .tx_done = MUTEX_INIT_LOCKED },
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#endif
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#if I2C_NUMOF > 1
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{ .lock = MUTEX_INIT, .tx_done = MUTEX_INIT_LOCKED },
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#endif
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#if I2C_NUMOF > 2
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{ .lock = MUTEX_INIT, .tx_done = MUTEX_INIT_LOCKED },
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#endif
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};
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static void poweron(lpc23xx_i2c_t *i2c)
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{
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switch ((uint32_t)i2c) {
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case I2C0_BASE_ADDR:
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PCONP |= PCI2C0;
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break;
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case I2C1_BASE_ADDR:
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PCONP |= PCI2C1;
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break;
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case I2C2_BASE_ADDR:
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PCONP |= PCI2C2;
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break;
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}
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}
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static void poweroff(lpc23xx_i2c_t *i2c)
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{
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switch ((uint32_t)i2c) {
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case I2C0_BASE_ADDR:
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PCONP &= ~PCI2C0;
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break;
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case I2C1_BASE_ADDR:
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PCONP &= ~PCI2C1;
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break;
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case I2C2_BASE_ADDR:
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PCONP &= ~PCI2C2;
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break;
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}
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}
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int i2c_acquire(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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mutex_lock(&ctx[dev].lock);
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poweron(i2c_config[dev].dev);
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return 0;
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}
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void i2c_release(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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poweroff(i2c_config[dev].dev);
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mutex_unlock(&ctx[dev].lock);
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}
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static void _set_baud(lpc23xx_i2c_t *i2c, uint32_t baud)
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{
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uint32_t pclksel, prescale;
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lpc2387_pclk_scale(CLOCK_CORECLOCK, baud, &pclksel, &prescale);
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switch ((uint32_t)i2c) {
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case I2C0_BASE_ADDR:
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PCLKSEL0 &= ~(BIT14 | BIT15);
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PCLKSEL0 |= pclksel << 14;
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I20SCLL = prescale / 2;
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I20SCLH = prescale / 2;
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break;
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case I2C1_BASE_ADDR:
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PCLKSEL1 &= ~(BIT6 | BIT7);
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PCLKSEL1 |= pclksel << 6;
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I21SCLL = prescale / 2;
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I21SCLH = prescale / 2;
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break;
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case I2C2_BASE_ADDR:
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PCLKSEL1 &= ~(BIT20 | BIT21);
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PCLKSEL1 |= pclksel << 20;
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I22SCLL = prescale / 2;
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I22SCLH = prescale / 2;
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break;
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}
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}
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static unsigned _get_irq(i2c_t dev)
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{
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switch ((uint32_t)i2c_config[dev].dev) {
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case I2C0_BASE_ADDR:
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return I2C0_INT;
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case I2C1_BASE_ADDR:
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return I2C1_INT;
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case I2C2_BASE_ADDR:
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return I2C2_INT;
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}
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return 0;
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}
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static void _install_irq(i2c_t dev)
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{
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switch (dev) {
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#if I2C_NUMOF > 0
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case 0:
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install_irq(_get_irq(dev), I2C0_IRQHandler, i2c_config[dev].irq_prio);
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break;
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#endif
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#if I2C_NUMOF > 1
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case 1:
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install_irq(_get_irq(dev), I2C1_IRQHandler, i2c_config[dev].irq_prio);
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break;
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#endif
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#if I2C_NUMOF > 2
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case 2:
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install_irq(_get_irq(dev), I2C2_IRQHandler, i2c_config[dev].irq_prio);
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break;
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#endif
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}
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}
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void i2c_init(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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const i2c_conf_t *cfg = &i2c_config[dev];
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lpc23xx_i2c_t *i2c = cfg->dev;
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poweron(i2c);
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/* configure SDA & SCL pins */
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*(&PINSEL0 + cfg->pinsel_sda) |= cfg->pinsel_msk_sda;
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*(&PINSEL0 + cfg->pinsel_scl) |= cfg->pinsel_msk_scl;
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/* clear control register */
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i2c->CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC
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| I2CONCLR_I2ENC;
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_set_baud(i2c, cfg->speed);
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_install_irq(dev);
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/* enable the interface */
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i2c->CONSET = I2CONSET_I2EN;
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poweroff(i2c);
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}
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static void _end_tx(i2c_t dev, unsigned res)
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{
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ctx[dev].res = res;
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mutex_unlock(&ctx[dev].tx_done);
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}
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static void _next_buffer(i2c_t dev)
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{
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/* We only need two buffers max.
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This can only be called for the first buffer
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as there is no next buffer for the second buffer */
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assert(ctx[dev].buf_cur == 0);
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lpc23xx_i2c_t *i2c = i2c_config[dev].dev;
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/* if mode (read/write) changed, send START again */
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if (ctx[dev].addr[0] != ctx[dev].addr[1]) {
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i2c->CONSET = I2CONSET_STA;
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}
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|
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ctx[dev].cur = ctx[dev].buf[1];
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ctx[dev].end = ctx[dev].buf_end[1];
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ctx[dev].buf_cur = 1;
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}
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static void irq_handler(i2c_t dev)
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{
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lpc23xx_i2c_t *i2c = i2c_config[dev].dev;
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unsigned stat = i2c->STAT;
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DEBUG("[i2c] STAT: %x\n", stat);
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switch (stat) {
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case 0x00: /* Bus Error */
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DEBUG("[i2c] Bus Error\n");
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_end_tx(dev, -EIO);
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break;
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case 0x08: /* A Start Condition is issued. */
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case 0x10: /* A repeated Start Condition is issued */
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ctx[dev].cur = ctx[dev].buf[ctx[dev].buf_cur];
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i2c->DAT = ctx[dev].addr[ctx[dev].buf_cur];
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i2c->CONSET = I2CONSET_AA;
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i2c->CONCLR = I2CONCLR_STAC;
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break;
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case 0x20: /* Address NACK (write) */
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case 0x48: /* Address NACK (read) */
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/* slave did not ACK address - send STOP */
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i2c->CONSET = I2CONSET_STO | I2CONSET_AA;
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_end_tx(dev, -ENXIO);
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break;
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case 0x18: /* Master Transmit, SLA_R has been sent */
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i2c->DAT = *ctx[dev].cur++;
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i2c->CONSET = I2CONSET_AA;
|
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break;
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case 0x28: /* Data byte has been transmitted */
|
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if (ctx[dev].cur == ctx[dev].end) {
|
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/* we transmitted all buffers */
|
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if (ctx[dev].buf_cur == ctx[dev].buf_num) {
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i2c->CONSET = I2CONSET_STO | I2CONSET_AA;
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_end_tx(dev, 0);
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||||
break;
|
||||
} else {
|
||||
_next_buffer(dev);
|
||||
}
|
||||
}
|
||||
|
||||
i2c->DAT = *ctx[dev].cur++;
|
||||
i2c->CONSET = I2CONSET_AA;
|
||||
break;
|
||||
|
||||
case 0x30: /* Data NACK */
|
||||
i2c->CONSET = I2CONSET_STO | I2CONSET_AA;
|
||||
_end_tx(dev, 0);
|
||||
break;
|
||||
|
||||
case 0x38: /* Arbitration has been lost */
|
||||
i2c->CONSET = I2CONSET_STA | I2CONSET_AA;
|
||||
break;
|
||||
|
||||
case 0x40: /* Master Receive, SLA_R has been sent */
|
||||
|
||||
/* if we only want to read one byte, send NACK already */
|
||||
if (ctx[dev].cur + 1 == ctx[dev].end) {
|
||||
i2c->CONCLR = I2CONCLR_AAC;
|
||||
} else {
|
||||
i2c->CONSET = I2CONSET_AA;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x50: /* Data byte has been received */
|
||||
|
||||
*ctx[dev].cur++ = i2c->DAT;
|
||||
|
||||
if (ctx[dev].cur == ctx[dev].end) {
|
||||
i2c->CONCLR = I2CONCLR_AAC;
|
||||
} else {
|
||||
i2c->CONSET = I2CONSET_AA;
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case 0x58: /* Data received, NACK */
|
||||
*ctx[dev].cur = i2c->DAT;
|
||||
|
||||
if (ctx[dev].buf_cur != ctx[dev].buf_num) {
|
||||
i2c->CONSET = I2CONSET_AA;
|
||||
_next_buffer(dev);
|
||||
} else {
|
||||
i2c->CONSET = I2CONSET_AA | I2CONSET_STO;
|
||||
_end_tx(dev, 0);
|
||||
}
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
/* clear interrupt flag */
|
||||
i2c->CONCLR = I2CONCLR_SIC;
|
||||
}
|
||||
|
||||
static void _init_buffer(i2c_t dev, uint8_t idx, uint8_t addr,
|
||||
uint8_t *data, size_t len)
|
||||
{
|
||||
ctx[dev].addr[idx] = addr;
|
||||
ctx[dev].buf[idx] = data;
|
||||
ctx[dev].buf_end[idx] = data + len;
|
||||
|
||||
ctx[dev].buf_num = idx;
|
||||
|
||||
ctx[dev].buf_cur = 0;
|
||||
ctx[dev].cur = ctx[dev].buf[0];
|
||||
ctx[dev].end = ctx[dev].buf_end[0];
|
||||
}
|
||||
|
||||
int i2c_read_bytes(i2c_t dev, uint16_t addr,
|
||||
void *data, size_t len, uint8_t flags)
|
||||
{
|
||||
assert(dev < I2C_NUMOF);
|
||||
lpc23xx_i2c_t *i2c = i2c_config[dev].dev;
|
||||
|
||||
/* Check for wrong arguments given */
|
||||
if (data == NULL || len == 0) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* TODO: 10 bit addresses */
|
||||
if (flags) {
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
_init_buffer(dev, 0, 1 | (addr << 1), (void*)data, len);
|
||||
|
||||
/* set Start flag */
|
||||
i2c->CONSET = I2CONSET_STA;
|
||||
|
||||
mutex_lock(&ctx[dev].tx_done);
|
||||
return ctx[dev].res;
|
||||
}
|
||||
|
||||
int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len,
|
||||
uint8_t flags)
|
||||
{
|
||||
assert(dev < I2C_NUMOF);
|
||||
lpc23xx_i2c_t *i2c = i2c_config[dev].dev;
|
||||
|
||||
/* Check for wrong arguments given */
|
||||
if (data == NULL || len == 0) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* TODO: 10 bit addresses */
|
||||
if (flags) {
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
_init_buffer(dev, 0, addr << 1, (void*)data, len);
|
||||
|
||||
/* set Start flag */
|
||||
i2c->CONSET = I2CONSET_STA;
|
||||
|
||||
mutex_lock(&ctx[dev].tx_done);
|
||||
return ctx[dev].res;
|
||||
}
|
||||
|
||||
int i2c_read_regs(i2c_t dev, uint16_t addr, uint16_t reg,
|
||||
void *data, size_t len, uint8_t flags)
|
||||
{
|
||||
assert(dev < I2C_NUMOF);
|
||||
lpc23xx_i2c_t *i2c = i2c_config[dev].dev;
|
||||
|
||||
/* Check for wrong arguments given */
|
||||
if (data == NULL || len == 0) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* TODO: 10 bit addresses */
|
||||
if (flags & ~I2C_REG16) {
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
/* Handle endianness of register if 16 bit */
|
||||
if (flags & I2C_REG16) {
|
||||
reg = htons(reg); /* Make sure register is in big-endian on I2C bus */
|
||||
}
|
||||
|
||||
_init_buffer(dev, 0, addr << 1, (void*)®, (flags & I2C_REG16) ? 2 : 1);
|
||||
_init_buffer(dev, 1, 1 | (addr << 1), (void*)data, len);
|
||||
|
||||
/* set Start flag */
|
||||
i2c->CONSET = I2CONSET_STA;
|
||||
|
||||
mutex_lock(&ctx[dev].tx_done);
|
||||
return ctx[dev].res;
|
||||
}
|
||||
|
||||
int i2c_write_regs(i2c_t dev, uint16_t addr, uint16_t reg,
|
||||
const void *data, size_t len, uint8_t flags)
|
||||
{
|
||||
assert(dev < I2C_NUMOF);
|
||||
lpc23xx_i2c_t *i2c = i2c_config[dev].dev;
|
||||
|
||||
/* Check for wrong arguments given */
|
||||
if (data == NULL || len == 0) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* TODO: 10 bit addresses */
|
||||
if (flags & ~I2C_REG16) {
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
/* Handle endianness of register if 16 bit */
|
||||
if (flags & I2C_REG16) {
|
||||
reg = htons(reg); /* Make sure register is in big-endian on I2C bus */
|
||||
}
|
||||
|
||||
_init_buffer(dev, 0, addr << 1, (void*)®, (flags & I2C_REG16) ? 2 : 1);
|
||||
_init_buffer(dev, 1, addr << 1, (void*)data, len);
|
||||
|
||||
/* set Start flag */
|
||||
i2c->CONSET = I2CONSET_STA;
|
||||
|
||||
mutex_lock(&ctx[dev].tx_done);
|
||||
return ctx[dev].res;
|
||||
}
|
||||
|
||||
#if I2C_NUMOF > 0
|
||||
static void I2C0_IRQHandler(void)
|
||||
{
|
||||
irq_handler(0);
|
||||
VICVectAddr = 0; /* Acknowledge Interrupt */
|
||||
}
|
||||
#endif
|
||||
#if I2C_NUMOF > 1
|
||||
static void I2C1_IRQHandler(void)
|
||||
{
|
||||
irq_handler(1);
|
||||
VICVectAddr = 0; /* Acknowledge Interrupt */
|
||||
}
|
||||
#endif
|
||||
#if I2C_NUMOF > 2
|
||||
static void I2C2_IRQHandler(void)
|
||||
{
|
||||
irq_handler(2);
|
||||
VICVectAddr = 0; /* Acknowledge Interrupt */
|
||||
}
|
||||
#endif
|
||||
@ -19,6 +19,7 @@
|
||||
*/
|
||||
|
||||
#include <errno.h>
|
||||
#include "kernel_defines.h"
|
||||
|
||||
#include "at24mac.h"
|
||||
#include "at24mac_params.h"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user