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cpu/stm32/periph_adc: use L4 lines instead of L4 models

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The ASCR register is available and has to be set for all STM32L471xx, STM32L475xx, STM32L476xx, STM32L485xx and STM32L486xx MCUs. Instead of using the CPU model for conditional compilation, the CPU line is used to support all MCU of that lines.
This commit is contained in:
Gunar Schorcht 2023-05-10 09:04:12 +02:00
parent ccba70ff61
commit 5483235c61
1 changed files with 4 additions and 2 deletions
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6
cpu/stm32/periph/adc_l4.c
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@ -154,8 +154,10 @@ int adc_init(adc_t line)
if (adc_config[line].pin != GPIO_UNDEF) {
gpio_init_analog(adc_config[line].pin);
}
#if defined(CPU_MODEL_STM32L476RG) || defined(CPU_MODEL_STM32L475VG)
/* On STM32L475xx/476xx/486xx devices, before any conversion of an input channel coming
#if defined(CPU_LINE_STM32L486xx) || defined(CPU_LINE_STM32L485xx) || \
defined(CPU_LINE_STM32L476xx) || defined(CPU_LINE_STM32L475xx) || \
defined(CPU_LINE_STM32L471xx)
/* On STM32L47xx/48xx devices, before any conversion of an input channel coming
from GPIO pads, it is necessary to configure the corresponding GPIOx_ASCR register in
the GPIO, in addition to the I/O configuration in analog mode. */
_port(adc_config[line].pin)->ASCR |= (1 << _pin_num(adc_config[line].pin));