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boards/stm32-based: adapted UART configuration

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This commit is contained in:
Hauke Petersen 2016-12-07 17:03:52 +01:00
parent 625d804fcb
commit 55c6c4582b
20 changed files with 439 additions and 462 deletions
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21
boards/f4vi1/include/periph_conf.h
View File

@ -78,28 +78,29 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @name UART configuration
* @brief UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART6,
.rcc_mask = RCC_APB2ENR_USART6EN,
.rx_pin = GPIO_PIN(PORT_C,7),
.tx_pin = GPIO_PIN(PORT_C,6),
.af = GPIO_AF8,
.rx_pin = GPIO_PIN(PORT_C, 7),
.tx_pin = GPIO_PIN(PORT_C, 6),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB2,
.irqn = USART6_IRQn,
.irqn = USART6_IRQn
#ifdef UART_USE_DMA
.dma_stream = 14,
.dma_chan = 5
},
#endif
}
};
/* assign ISR vector names */
#define UART_0_ISR isr_usart6
#define UART_0_DMA_ISR isr_dma2_stream6
#define UART_0_ISR (isr_usart6)
#define UART_0_DMA_ISR (isr_dma2_stream6)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

28
boards/fox/include/periph_conf.h
View File

@ -93,25 +93,25 @@ static const timer_conf_t timer_config[] = {
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rcc_pin = RCC_APB1ENR_USART2EN,
.bus = APB1,
.irqn = USART2_IRQn
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rcc_pin = RCC_APB2ENR_USART1EN,
.bus = APB2,
.irqn = USART1_IRQn
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.bus = APB2,
.irqn = USART1_IRQn
}
};
#define UART_0_ISR isr_usart2
#define UART_1_ISR isr_usart1
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

28
boards/iotlab-common/include/periph_conf_common.h
View File

@ -94,25 +94,25 @@ static const timer_conf_t timer_config[] = {
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART1,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rcc_pin = RCC_APB2ENR_USART1EN,
.bus = APB2,
.irqn = USART1_IRQn
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.bus = APB2,
.irqn = USART1_IRQn
},
{
.dev = USART2,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rcc_pin = RCC_APB1ENR_USART2EN,
.bus = APB1,
.irqn = USART2_IRQn
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.bus = APB1,
.irqn = USART2_IRQn
}
};
#define UART_0_ISR isr_usart1
#define UART_1_ISR isr_usart2
#define UART_0_ISR (isr_usart1)
#define UART_1_ISR (isr_usart2)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

53
boards/limifrog-v1/include/periph_conf.h
View File

@ -71,37 +71,36 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @brief UART configuration
* @{
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART3
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART3EN))
#define UART_0_CLK (CLOCK_CORECLOCK)
#define UART_0_IRQ USART3_IRQn
#define UART_0_ISR isr_usart3
#define UART_0_BUS_FREQ 32000000
/* UART 0 pin configuration */
#define UART_0_RX_PIN GPIO_PIN(PORT_C, 11)
#define UART_0_TX_PIN GPIO_PIN(PORT_C, 10)
#define UART_0_AF GPIO_AF7
#define UART_0_ISR (isr_usart3)
#define UART_1_ISR (isr_usart1)
/* UART 1 device configuration */
#define UART_1_DEV USART1 /* Panasonic PAN1740 BLE module */
#define UART_1_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_CLK (CLOCK_CORECLOCK)
#define UART_1_IRQ USART1_IRQn
#define UART_1_ISR isr_usart1
#define UART_0_BUS_FREQ 32000000
/* UART 1 pin configuration */
#define UART_1_RX_PIN GPIO_PIN(PORT_A, 10)
#define UART_1_TX_PIN GPIO_PIN(PORT_A, 9)
#define UART_1_AF GPIO_AF7
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**

39
boards/msbiot/include/periph_conf.h
View File

@ -131,45 +131,54 @@ static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A,3),
.tx_pin = GPIO_PIN(PORT_A,2),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A,10),
.tx_pin = GPIO_PIN(PORT_A,9),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 15,
.dma_chan = 4
#endif
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_D,9),
.tx_pin = GPIO_PIN(PORT_D,8),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 3,
.dma_chan = 4
#endif
},
};
/* assign ISR vector names */
#define UART_0_ISR isr_usart2
#define UART_0_DMA_ISR isr_dma1_stream6
#define UART_1_ISR isr_usart1
#define UART_1_DMA_ISR isr_dma2_stream7
#define UART_2_ISR isr_usart3
#define UART_2_DMA_ISR isr_dma1_stream3
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
#define UART_1_ISR (isr_usart1)
#define UART_1_DMA_ISR (isr_dma2_stream7)
#define UART_2_ISR (isr_usart3)
#define UART_2_DMA_ISR (isr_dma1_stream3)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))

58
boards/nucleo-f030/include/periph_conf.h
View File

@ -63,42 +63,38 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @}
* @brief UART configuration
* @{
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB2,
.irqn = USART1_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_IRQ USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT GPIOA
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_RX_PIN 3
#define UART_0_TX_PIN 2
#define UART_0_AF 1
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
/* UART 1 device configuration */
#define UART_1_DEV USART1
#define UART_1_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_CLKDIS() (periph_clk_dis(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_IRQ USART1_IRQn
#define UART_1_ISR isr_usart1
/* UART 1 pin configuration */
#define UART_1_PORT GPIOB
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
#define UART_1_RX_PIN 7
#define UART_1_TX_PIN 6
#define UART_1_AF 0
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @brief ADC configuration
* @{

58
boards/nucleo-f070/include/periph_conf.h
View File

@ -63,42 +63,38 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @}
* @brief UART configuration
* @{
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART3_4_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_IRQ USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT GPIOA
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_RX_PIN 3
#define UART_0_TX_PIN 2
#define UART_0_AF 1
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart3_8)
/* UART 1 device configuration */
#define UART_1_DEV USART3
#define UART_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART3EN))
#define UART_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_USART3EN))
#define UART_1_IRQ USART3_4_IRQn
#define UART_1_ISR isr_usart3_8
/* UART 1 pin configuration */
#define UART_1_PORT GPIOC
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOCEN))
#define UART_1_RX_PIN 11
#define UART_1_TX_PIN 10
#define UART_1_AF 1
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @brief ADC configuration
* @{

58
boards/nucleo-f072/include/periph_conf.h
View File

@ -62,42 +62,38 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @}
* @brief UART configuration
* @{
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB2,
.irqn = USART1_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_IRQ USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT GPIOA
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_RX_PIN 3
#define UART_0_TX_PIN 2
#define UART_0_AF 1
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
/* UART 1 device configuration */
#define UART_1_DEV USART1
#define UART_1_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_CLKDIS() (periph_clk_dis(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_IRQ USART1_IRQn
#define UART_1_ISR isr_usart1
/* UART 1 pin configuration */
#define UART_1_PORT GPIOB
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
#define UART_1_RX_PIN 7
#define UART_1_TX_PIN 6
#define UART_1_AF 0
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @brief ADC configuration
* @{

57
boards/nucleo-f091/include/periph_conf.h
View File

@ -61,39 +61,36 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @}
* @brief UART configuration
* @{
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB2,
.irqn = USART1_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_IRQ USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT GPIOA
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_RX_PIN 3
#define UART_0_TX_PIN 2
#define UART_0_AF 1
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
/* UART 1 device configuration */
#define UART_1_DEV USART1
#define UART_1_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_CLKDIS() (periph_clk_dis(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_IRQ USART1_IRQn
#define UART_1_ISR isr_usart1
/* UART 1 pin configuration */
#define UART_1_PORT GPIOB
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
#define UART_1_RX_PIN 7
#define UART_1_TX_PIN 6
#define UART_1_AF 0
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**

44
boards/nucleo-f103/include/periph_conf.h
View File

@ -90,39 +90,39 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @brief UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rcc_pin = RCC_APB1ENR_USART2EN,
.bus = APB1,
.irqn = USART2_IRQn
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rcc_pin = RCC_APB2ENR_USART1EN,
.bus = APB2,
.irqn = USART1_IRQn
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.bus = APB2,
.irqn = USART1_IRQn
},
{
.dev = USART3,
.rx_pin = GPIO_PIN(PORT_B, 11),
.tx_pin = GPIO_PIN(PORT_B, 10),
.rcc_pin = RCC_APB1ENR_USART3EN,
.bus = APB1,
.irqn = USART3_IRQn
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_B, 11),
.tx_pin = GPIO_PIN(PORT_B, 10),
.bus = APB1,
.irqn = USART3_IRQn
}
};
#define UART_0_ISR isr_usart2
#define UART_1_ISR isr_usart1
#define UART_2_ISR isr_usart3
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
#define UART_2_ISR (isr_usart3)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

98
boards/nucleo-f207/include/periph_conf.h
View File

@ -104,76 +104,64 @@ static const timer_conf_t timer_config[] = {
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**
* @brief UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_mode = GPIO_IN,
.tx_mode = GPIO_OUT,
.rts_pin = GPIO_PIN(PORT_D, 12),
.cts_pin = GPIO_PIN(PORT_D, 11),
.rts_mode = GPIO_OUT,
.cts_mode = GPIO_IN,
.af = GPIO_AF7,
.irqn = USART3_IRQn,
.dma_stream = 3,
.dma_chan = 4,
.hw_flow_ctrl = 0
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 3,
.dma_chan = 4
#endif
},
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_D, 6),
.tx_pin = GPIO_PIN(PORT_D, 5),
.rx_mode = GPIO_IN,
.tx_mode = GPIO_OUT,
.rts_pin = GPIO_PIN(PORT_D, 4),
.cts_pin = GPIO_PIN(PORT_D, 3),
.rts_mode = GPIO_OUT,
.cts_mode = GPIO_IN,
.af = GPIO_AF7,
.irqn = USART2_IRQn,
.dma_stream = 6,
.dma_chan = 4,
.hw_flow_ctrl = 1
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_D, 6),
.tx_pin = GPIO_PIN(PORT_D, 5),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_mode = GPIO_IN,
.tx_mode = GPIO_OUT,
.rts_pin = GPIO_PIN(PORT_A, 12),
.cts_pin = GPIO_PIN(PORT_A, 11),
.rts_mode = GPIO_OUT,
.cts_mode = GPIO_IN,
.af = GPIO_AF7,
.irqn = USART1_IRQn,
.dma_stream = 7,
.dma_chan = 4,
.hw_flow_ctrl = 1
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 7,
.dma_chan = 4
#endif
}
};
/* assign ISR vector names */
#define UART_0_ISR isr_usart3
#define UART_0_DMA_ISR isr_dma1_stream3
#define UART_0_ISR (isr_usart3)
#define UART_0_DMA_ISR (isr_dma1_stream3)
#define UART_1_ISR isr_usart2
#define UART_1_DMA_ISR isr_dma1_stream6
#define UART_1_ISR (isr_usart2)
#define UART_1_DMA_ISR (isr_dma1_stream6)
#define UART_2_ISR isr_usart1
#define UART_2_DMA_ISR isr_dma1_stream7
#define UART_2_ISR (isr_usart1)
#define UART_2_DMA_ISR (isr_dma1_stream7)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

80
boards/nucleo-f303/include/periph_conf.h
View File

@ -74,53 +74,47 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @brief UART configuration
* @{
*/
#define UART_NUMOF (3U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_2_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_B, 11),
.tx_pin = GPIO_PIN(PORT_B, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLK (CLOCK_CORECLOCK / 2) /* UART clock runs with 36MHz (F_CPU / 2) */
#define UART_0_IRQ_CHAN USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_PORT GPIOA
#define UART_0_TX_PIN 2
#define UART_0_RX_PIN 3
#define UART_0_AF 7
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
#define UART_2_ISR (isr_usart3)
/* UART 1 device configuration */
#define UART_1_DEV USART1
#define UART_1_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_1_CLK (CLOCK_CORECLOCK / 1) /* UART clock runs with 72MHz (F_CPU / 1) */
#define UART_1_IRQ_CHAN USART1_IRQn
#define UART_1_ISR isr_usart1
/* UART 1 pin configuration */
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_1_PORT GPIOA
#define UART_1_TX_PIN 9
#define UART_1_RX_PIN 10
#define UART_1_AF 7
/* UART 2 device configuration */
#define UART_2_DEV USART3
#define UART_2_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART3EN))
#define UART_2_CLK (CLOCK_CORECLOCK / 2) /* UART clock runs with 36MHz (F_CPU / 2) */
#define UART_2_IRQ_CHAN USART3_IRQn
#define UART_2_ISR isr_usart3
/* UART 2 pin configuration */
#define UART_2_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
#define UART_2_PORT GPIOB
#define UART_2_TX_PIN 10
#define UART_2_RX_PIN 11
#define UART_2_AF 7
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**

34
boards/nucleo-f334/include/periph_conf.h
View File

@ -80,25 +80,25 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @}
* @brief UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_0_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLK (CLOCK_CORECLOCK / 2) /* UART clock runs with 32MHz (F_CPU / 1) */
#define UART_0_IRQ_CHAN USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT GPIOA
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_RX_PIN 3
#define UART_0_TX_PIN 2
#define UART_0_AF 7
#define UART_0_ISR (isr_usart2)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**

15
boards/nucleo-f401/include/periph_conf.h
View File

@ -83,21 +83,22 @@ static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A,3),
.tx_pin = GPIO_PIN(PORT_A,2),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
}
};
/* assign ISR vector names */
#define UART_0_ISR isr_usart2
#define UART_0_DMA_ISR isr_dma1_stream6
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

15
boards/nucleo-f446/include/periph_conf.h
View File

@ -83,21 +83,22 @@ static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A,3),
.tx_pin = GPIO_PIN(PORT_A,2),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
}
};
/* assign ISR vector names */
#define UART_0_ISR isr_usart2
#define UART_0_DMA_ISR isr_dma1_stream6
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

36
boards/nucleo-l1/include/periph_conf.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014-2016 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
@ -14,6 +14,7 @@
* @brief Peripheral MCU configuration for the nucleo-l1 board
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef PERIPH_CONF_H_
@ -81,23 +82,26 @@ static const timer_conf_t timer_config[] = {
#define RTC_NUMOF (1U)
/**
* @brief UART configuration
* @brief UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_0_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_0_CLK (CLOCK_CORECLOCK) /* UART clock runs with 32MHz (F_CPU / 1) */
#define UART_0_IRQ USART2_IRQn
#define UART_0_ISR isr_usart2
#define UART_0_BUS_FREQ 32000000
/* UART 0 pin configuration */
#define UART_0_RX_PIN GPIO_PIN(PORT_A, 3)
#define UART_0_TX_PIN GPIO_PIN(PORT_A, 2)
#define UART_0_AF GPIO_AF7
#define UART_0_ISR (isr_usart2)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @brief SPI configuration

16
boards/spark-core/include/periph_conf.h
View File

@ -88,21 +88,21 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @brief UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rcc_pin = RCC_APB1ENR_USART2EN,
.bus = APB1,
.irqn = USART2_IRQn
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.bus = APB1,
.irqn = USART2_IRQn
}
};
#define UART_0_ISR isr_usart2
#define UART_0_ISR (isr_usart2)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

55
boards/stm32f0discovery/include/periph_conf.h
View File

@ -61,39 +61,36 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @name UART configuration
* @brief UART configuration
* @{
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB2,
.irqn = USART1_IRQn,
},
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART1
#define UART_0_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_0_CLKDIS() (periph_clk_dis(APB2, RCC_APB2ENR_USART1EN))
#define UART_0_IRQ USART1_IRQn
#define UART_0_ISR isr_usart1
/* UART 0 pin configuration */
#define UART_0_PORT GPIOB
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
#define UART_0_RX_PIN 7
#define UART_0_TX_PIN 6
#define UART_0_AF 0
#define UART_0_ISR (isr_usart1)
#define UART_1_ISR (isr_usart2)
/* UART 1 device configuration */
#define UART_1_DEV USART2
#define UART_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_USART2EN))
#define UART_1_IRQ USART2_IRQn
#define UART_1_ISR isr_usart2
/* UART 1 pin configuration */
#define UART_1_PORT GPIOA
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_1_RX_PIN 3
#define UART_1_TX_PIN 2
#define UART_1_AF 1
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**

80
boards/stm32f3discovery/include/periph_conf.h
View File

@ -76,53 +76,47 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief UART configuration
* @brief UART configuration
* @{
*/
#define UART_NUMOF (3U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_2_EN 1
#define UART_IRQ_PRIO 1
static const uart_conf_t uart_config[] = {
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn
},
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_D, 6),
.tx_pin = GPIO_PIN(PORT_D, 5),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn
}
};
/* UART 0 device configuration */
#define UART_0_DEV USART1
#define UART_0_CLKEN() (periph_clk_en(APB2, RCC_APB2ENR_USART1EN))
#define UART_0_CLK (CLOCK_CORECLOCK / 1) /* UART clock runs with 72MHz (F_CPU / 1) */
#define UART_0_IRQ_CHAN USART1_IRQn
#define UART_0_ISR isr_usart1
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
#define UART_0_PORT GPIOA
#define UART_0_TX_PIN 9
#define UART_0_RX_PIN 10
#define UART_0_AF 7
#define UART_0_ISR (isr_usart1)
#define UART_1_ISR (isr_usart2)
#define UART_2_ISR (isr_usart3)
/* UART 1 device configuration */
#define UART_1_DEV USART2
#define UART_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART2EN))
#define UART_1_CLK (CLOCK_CORECLOCK / 2) /* UART clock runs with 36MHz (F_CPU / 2) */
#define UART_1_IRQ_CHAN USART2_IRQn
#define UART_1_ISR isr_usart2
/* UART 1 pin configuration */
#define UART_1_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIODEN))
#define UART_1_PORT GPIOD
#define UART_1_TX_PIN 5
#define UART_1_RX_PIN 6
#define UART_1_AF 7
/* UART 1 device configuration */
#define UART_2_DEV USART3
#define UART_2_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_USART3EN))
#define UART_2_CLK (CLOCK_CORECLOCK / 2) /* UART clock runs with 36MHz (F_CPU / 2) */
#define UART_2_IRQ_CHAN USART3_IRQn
#define UART_2_ISR isr_usart3
/* UART 1 pin configuration */
#define UART_2_PORT_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIODEN))
#define UART_2_PORT GPIOD
#define UART_2_TX_PIN 8
#define UART_2_RX_PIN 9
#define UART_2_AF 7
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**

28
boards/stm32f4discovery/include/periph_conf.h
View File

@ -84,34 +84,38 @@ static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A,3),
.tx_pin = GPIO_PIN(PORT_A,2),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_D,9),
.tx_pin = GPIO_PIN(PORT_D,8),
.af = GPIO_AF7,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 3,
.dma_chan = 4
#endif
}
};
/* assign ISR vector names */
#define UART_0_ISR isr_usart2
#define UART_0_DMA_ISR isr_dma1_stream6
#define UART_1_ISR isr_usart3
#define UART_1_DMA_ISR isr_dma1_stream3
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
#define UART_1_ISR (isr_usart3)
#define UART_1_DMA_ISR (isr_dma1_stream3)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */