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Merge pull request #20601 from maribu/cpu/msp430/clock
cpu/msp430: clean up and fix clock driver
This commit is contained in:
commit
5a7bcc9f87
@ -2,6 +2,7 @@ INCLUDES += -I$(RIOTCPU)/msp430/include/
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INCLUDES += -I$(RIOTCPU)/msp430/include/$(subst msp430_,,$(CPU_FAM))
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INCLUDES += -I$(RIOTCPU)/msp430/include/$(subst msp430_,,$(CPU_FAM))
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CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL))
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CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL))
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CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))
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# include the msp430 common Makefile
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# include the msp430 common Makefile
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include $(RIOTMAKE)/arch/msp430.inc.mk
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include $(RIOTMAKE)/arch/msp430.inc.mk
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@ -20,16 +20,14 @@
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* @}
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* @}
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*/
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdint.h>
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#include "debug.h"
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#include "busy_wait.h"
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#include "busy_wait.h"
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#include "macros/math.h"
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#include "macros/math.h"
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#include "macros/units.h"
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#include "macros/units.h"
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#include "modules.h"
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#include "periph_conf.h"
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#include "periph_conf.h"
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#include "periph_cpu.h"
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#ifdef RSEL3
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#ifdef RSEL3
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#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2 | RSEL3)
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#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2 | RSEL3)
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@ -52,8 +50,15 @@ static inline bool is_valid_low_freq(uint32_t freq) {
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return (freq == 32768);
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return (freq == 32768);
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}
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}
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/* As high speed crystal anything between 450 kHz and 8 MHz is allowed */
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/* Valid parameter range for the high speed crystal by family:
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* MSP430 x1xx: 450 kHz <= f <= 8 MHz
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* MSP430 F2xx / G2xx: 400 kHz <= f <= 16 MHz
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*/
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static inline bool is_valid_high_freq(uint32_t freq) {
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static inline bool is_valid_high_freq(uint32_t freq) {
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if (IS_ACTIVE(CPU_FAM_MSP430_F2XX_G2XX)) {
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return ((freq >= KHZ(400)) && (freq <= MHZ(16)));
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}
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return ((freq >= KHZ(450)) && (freq <= MHZ(8)));
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return ((freq >= KHZ(450)) && (freq <= MHZ(8)));
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}
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}
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@ -69,8 +74,7 @@ static inline bool is_valid_high_freq(uint32_t freq) {
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static void check_config(void)
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static void check_config(void)
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{
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{
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/* LFXT1 can either be a low frequency 32.768 kHz watch crystal or a
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/* LFXT1 can either be a low frequency 32.768 kHz watch crystal or a
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* high frequency crustal between 450 kHz and 8 MHz. We cannot function
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* high frequency crystal. We cannot function without this crystal */
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* without this crystal */
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if (!is_valid_low_freq(clock_params.lfxt1_frequency)
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if (!is_valid_low_freq(clock_params.lfxt1_frequency)
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&& !is_valid_high_freq(clock_params.lfxt1_frequency)) {
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&& !is_valid_high_freq(clock_params.lfxt1_frequency)) {
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extern void lfxt1_frequency_invalid(void);
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extern void lfxt1_frequency_invalid(void);
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@ -78,7 +82,8 @@ static void check_config(void)
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}
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}
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/* XT2 is not required and may be configured as 0 Hz to indicate its
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/* XT2 is not required and may be configured as 0 Hz to indicate its
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* absence. If it is present, we require 450 kHz <= XT <= 8 MHz */
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* absence. If it is present, it must but a valid frequency for a high
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* frequency crystal. */
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if ((clock_params.xt2_frequency != 0) &&
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if ((clock_params.xt2_frequency != 0) &&
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!is_valid_high_freq(clock_params.xt2_frequency)) {
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!is_valid_high_freq(clock_params.xt2_frequency)) {
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extern void xt2_frequency_invalid(void);
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extern void xt2_frequency_invalid(void);
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@ -319,10 +324,10 @@ void default_clock_init(void)
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/* if DCO is not used at all, disable it to preserve power */
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/* if DCO is not used at all, disable it to preserve power */
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if (clock_params.target_dco_frequency == 0) {
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if (clock_params.target_dco_frequency == 0) {
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/* Setting bit SCG0 in the status register (r2) disables the DCO.
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/* Setting bit SCG0 in the status register (SR) disables the DCO.
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* We do so in assembly, as r2 is not memory mapped. */
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* We do so in assembly, as r2 is not memory mapped. */
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__asm__ __volatile__ (
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__asm__ __volatile__ (
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"bis %[scg0], r2" "\n\t"
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"bis %[scg0], SR" "\n\t"
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: /* no outputs */
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: /* no outputs */
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: /* inputs: */
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: /* inputs: */
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[scg0] "i"(SCG0) /* bitmask to set SCGO0 as immediate */
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[scg0] "i"(SCG0) /* bitmask to set SCGO0 as immediate */
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