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mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-12-30 17:01:19 +01:00

board/msbiot: ajusted GPIO clken defines

This commit is contained in:
Hauke Petersen 2015-01-15 14:24:17 +01:00
parent 23ecb09f12
commit 63b2bbd684

View File

@ -198,97 +198,97 @@ extern "C" {
/* GPIO channel 0 config */
#define GPIO_0_PORT GPIOA /* User Button 2 */
#define GPIO_0_PIN 0
#define GPIO_0_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_0_CLK 0 /* 0: PORT A, 1: B ... */
#define GPIO_0_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PA)
#define GPIO_0_IRQ EXTI0_IRQn
/* GPIO channel 1 config */
#define GPIO_1_PORT GPIOA
#define GPIO_1_PIN 1
#define GPIO_1_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_1_CLK 0
#define GPIO_1_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI1_PA)
#define GPIO_1_IRQ EXTI1_IRQn
/* GPIO channel 2 config */
#define GPIO_2_PORT GPIOA /* CC1101 GDO1 */
#define GPIO_2_PIN 6
#define GPIO_2_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_2_CLK 0
#define GPIO_2_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI6_PA)
#define GPIO_2_IRQ EXTI9_5_IRQn
/* GPIO channel 3 config */
#define GPIO_3_PORT GPIOA /* CC3000 SPI_IRQ */
#define GPIO_3_PIN 10
#define GPIO_3_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_3_CLK 0
#define GPIO_3_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI10_PA)
#define GPIO_3_IRQ EXTI15_10_IRQn
/* GPIO channel 4 config */
#define GPIO_4_PORT GPIOB
#define GPIO_4_PIN 0
#define GPIO_4_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_4_CLK 1
#define GPIO_4_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PB)
#define GPIO_4_IRQ EXTI0_IRQn
/* GPIO channel 5 config */
#define GPIO_5_PORT GPIOB /* BEEPER Input */
#define GPIO_5_PIN 9
#define GPIO_5_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_5_CLK 1
#define GPIO_5_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI9_PB)
#define GPIO_5_IRQ EXTI9_5_IRQn
/* GPIO channel 6 config */
#define GPIO_6_PORT GPIOB /* IMU-9150 INT */
#define GPIO_6_PIN 11
#define GPIO_6_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_6_CLK 1
#define GPIO_6_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI11_PB)
#define GPIO_6_IRQ EXTI15_10_IRQn
/* GPIO channel 7 config */
#define GPIO_7_PORT GPIOB /* CC1101 CS */
#define GPIO_7_PIN 12
#define GPIO_7_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_7_CLK 1
#define GPIO_7_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI12_PB)
#define GPIO_7_IRQ EXTI15_10_IRQn
/* GPIO channel 8 config */
#define GPIO_8_PORT GPIOB /* User Button 1 */
#define GPIO_8_PIN 13
#define GPIO_8_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_8_CLK 1
#define GPIO_8_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI13_PB)
#define GPIO_8_IRQ EXTI15_10_IRQn
/* GPIO channel 9 config */
#define GPIO_9_PORT GPIOC /* TCA6416 Reset */
#define GPIO_9_PIN 0
#define GPIO_9_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_9_CLK 2
#define GPIO_9_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PC)
#define GPIO_9_IRQ EXTI0_IRQn
/* GPIO channel 10 config */
#define GPIO_10_PORT GPIOC /* CC3000 CS */
#define GPIO_10_PIN 1
#define GPIO_10_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_10_CLK 2
#define GPIO_10_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI1_PC)
#define GPIO_10_IRQ EXTI1_IRQn
/* GPIO channel 11 config */
#define GPIO_11_PORT GPIOC /* CC1101 GDO 0 */
#define GPIO_11_PIN 4
#define GPIO_11_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_11_CLK 2
#define GPIO_11_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI4_PC)
#define GPIO_11_IRQ EXTI4_IRQn
/* GPIO channel 12 config */
#define GPIO_12_PORT GPIOC /* CC1101 GDO 2 */
#define GPIO_12_PIN 5
#define GPIO_12_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_12_CLK 2
#define GPIO_12_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI5_PC)
#define GPIO_12_IRQ EXTI9_5_IRQn
/* GPIO channel 13 config */
#define GPIO_13_PORT GPIOC /* TCA6416 INT */
#define GPIO_13_PIN 8
#define GPIO_13_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_13_CLK 2
#define GPIO_13_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI8_PC)
#define GPIO_13_IRQ EXTI9_5_IRQn
/* GPIO channel 14 config */
#define GPIO_14_PORT GPIOC /* CC3000 VBAT_SW_EN */
#define GPIO_14_PIN 13
#define GPIO_14_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_14_CLK 2
#define GPIO_14_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI13_PC)
#define GPIO_14_IRQ EXTI15_10_IRQn
/* GPIO channel 15 config */
#define GPIO_15_PORT GPIOD /* Micro SD Sockel CS */
#define GPIO_15_PIN 2
#define GPIO_15_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
#define GPIO_15_CLK 3
#define GPIO_15_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI2_PD)
#define GPIO_15_IRQ EXTI2_IRQn
/** @} */