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cpu/kinetis_common: Use gpio_init_port for PWM pin handling
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@ -131,28 +131,22 @@ static const adc_conf_t adc_config[] = {
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#define PWM_0_CLK CLOCK_CORECLOCK
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#define PWM_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
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#define PWM_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
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/* PWM 0 pin configuration */
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#define PWM_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTC_MASK))
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/* Arduino Connector D3 */
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#define PWM_0_PORT_CH0 PORTA
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#define PWM_0_PIN_CH0 1
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#define PWM_0_FTMCHAN_CH0 6
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#define PWM_0_PIN_AF_CH0 3
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#define PWM_0_CH0_GPIO GPIO_PIN(PORT_A, 1)
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#define PWM_0_CH0_FTMCHAN 6
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#define PWM_0_CH0_AF 3
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/* Arduino Connector D5 */
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#define PWM_0_PORT_CH1 PORTA
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#define PWM_0_PIN_CH1 2
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#define PWM_0_FTMCHAN_CH1 7
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#define PWM_0_PIN_AF_CH1 3
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#define PWM_0_CH1_GPIO GPIO_PIN(PORT_A, 2)
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#define PWM_0_CH1_FTMCHAN 7
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#define PWM_0_CH1_AF 3
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/* Arduino Connector D6 */
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#define PWM_0_PORT_CH2 PORTC
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#define PWM_0_PIN_CH2 2
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#define PWM_0_FTMCHAN_CH2 1
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#define PWM_0_PIN_AF_CH2 4
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#define PWM_0_CH2_GPIO GPIO_PIN(PORT_C, 2)
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#define PWM_0_CH2_FTMCHAN 1
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#define PWM_0_CH2_AF 4
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/* Arduino Connector D7 */
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#define PWM_0_PORT_CH3 PORTC
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#define PWM_0_PIN_CH3 3
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#define PWM_0_FTMCHAN_CH3 2
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#define PWM_0_PIN_AF_CH3 4
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#define PWM_0_CH3_GPIO GPIO_PIN(PORT_C, 3)
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#define PWM_0_CH3_FTMCHAN 2
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#define PWM_0_CH3_AF 4
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/** @} */
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@ -171,17 +171,13 @@ static const adc_conf_t adc_config[] = {
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#define PWM_0_CLKDIS() (BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_FTM0_SHIFT) = 0)
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/* PWM 0 pin configuration */
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#define PWM_0_PORT_CLKEN() (BITBAND_REG32(SIM->SCGC5, SIM_SCGC5_PORTC_SHIFT) = 1)
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#define PWM_0_CH0_GPIO GPIO_PIN(PORT_C, 1)
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#define PWM_0_CH0_FTMCHAN 0
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#define PWM_0_CH0_AF 4
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#define PWM_0_PIN_CH0 1
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#define PWM_0_FTMCHAN_CH0 0
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#define PWM_0_PORT_CH0 PORTC
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#define PWM_0_PIN_AF_CH0 4
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#define PWM_0_PIN_CH1 2
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#define PWM_0_FTMCHAN_CH1 1
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#define PWM_0_PORT_CH1 PORTC
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#define PWM_0_PIN_AF_CH1 4
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#define PWM_0_CH1_GPIO GPIO_PIN(PORT_C, 2)
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#define PWM_0_CH1_FTMCHAN 1
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#define PWM_0_CH1_AF 4
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/* PWM 1 device configuration */
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#define PWM_1_DEV FTM1
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@ -191,21 +187,16 @@ static const adc_conf_t adc_config[] = {
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#define PWM_1_CLKDIS() (BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_FTM1_SHIFT) = 0)
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/* PWM 1 pin configuration */
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#define PWM_1_PORT_CLKEN() (BITBAND_REG32(SIM->SCGC5, SIM_SCGC5_PORTA_SHIFT) = 1)
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#define PWM_1_CH0_GPIO GPIO_PIN(PORT_A, 12)
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#define PWM_1_CH0_FTMCHAN 0
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#define PWM_1_CH0_AF 3
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#define PWM_1_PIN_CH0 12
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#define PWM_1_FTMCHAN_CH0 0
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#define PWM_1_PORT_CH0 PORTA
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#define PWM_1_PIN_AF_CH0 3
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#define PWM_1_PIN_CH1 13
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#define PWM_1_FTMCHAN_CH1 1
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#define PWM_1_PORT_CH1 PORTA
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#define PWM_1_PIN_AF_CH1 3
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#define PWM_1_CH1_GPIO GPIO_PIN(PORT_A, 13)
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#define PWM_1_CH1_FTMCHAN 1
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#define PWM_1_CH1_AF 3
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/** @} */
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/**
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* @name SPI configuration
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* @{
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@ -149,27 +149,22 @@ static const adc_conf_t adc_config[] = {
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#define PWM_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
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#define PWM_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
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/* PWM 0 pin configuration */
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#define PWM_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTA_MASK))
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#define PWM_0_PIN_CH0 4
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#define PWM_0_FTMCHAN_CH0 1
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#define PWM_0_PORT_CH0 PORTA
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#define PWM_0_PIN_AF_CH0 3
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#define PWM_0_CH0_GPIO GPIO_PIN(PORT_A, 4)
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#define PWM_0_CH0_FTMCHAN 1
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#define PWM_0_CH0_AF 3
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#define PWM_0_PIN_CH1 4
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#define PWM_0_FTMCHAN_CH1 4
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#define PWM_0_PORT_CH1 PORTD
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#define PWM_0_PIN_AF_CH1 4
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#define PWM_0_CH1_GPIO GPIO_PIN(PORT_D, 4)
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#define PWM_0_CH1_FTMCHAN 4
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#define PWM_0_CH1_AF 4
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#define PWM_0_PIN_CH2 6
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#define PWM_0_FTMCHAN_CH2 6
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#define PWM_0_PORT_CH2 PORTD
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#define PWM_0_PIN_AF_CH2 4
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#define PWM_0_CH2_GPIO GPIO_PIN(PORT_D, 6)
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#define PWM_0_CH2_FTMCHAN 6
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#define PWM_0_CH2_AF 4
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#define PWM_0_PIN_CH3 1
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#define PWM_0_FTMCHAN_CH3 1
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#define PWM_0_PORT_CH3 PORTA
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#define PWM_0_PIN_AF_CH3 3
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#define PWM_0_CH3_GPIO GPIO_PIN(PORT_A, 1)
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#define PWM_0_CH3_FTMCHAN 1
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#define PWM_0_CH3_AF 3
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/** @} */
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@ -1,7 +1,7 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2014 PHYTEC Messtechnik GmbH
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* Copyright (C) 2015 Eistec AB
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* Copyright (C) 2015-2016 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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@ -35,56 +35,56 @@
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#if PWM_0_EN
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static const uint8_t ftm0chan[] = {
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#if PWM_0_CHANNELS > 0
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PWM_0_FTMCHAN_CH0,
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PWM_0_CH0_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 1
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PWM_0_FTMCHAN_CH1,
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PWM_0_CH1_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 2
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PWM_0_FTMCHAN_CH2,
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PWM_0_CH2_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 3
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PWM_0_FTMCHAN_CH3,
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PWM_0_CH3_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 4
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PWM_0_FTMCHAN_CH4,
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PWM_0_CH4_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 5
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PWM_0_FTMCHAN_CH5,
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PWM_0_CH5_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 6
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PWM_0_FTMCHAN_CH6,
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PWM_0_CH6_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 7
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PWM_0_FTMCHAN_CH7,
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PWM_0_CH7_FTMCHAN,
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#endif
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};
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#endif
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#if PWM_1_EN
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static const uint8_t ftm1chan[] = {
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#if PWM_1_CHANNELS > 0
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PWM_1_FTMCHAN_CH0,
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PWM_1_CH0_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 1
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PWM_1_FTMCHAN_CH1,
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PWM_1_CH1_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 2
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PWM_1_FTMCHAN_CH2,
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PWM_1_CH2_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 3
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PWM_1_FTMCHAN_CH3,
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PWM_1_CH3_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 4
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PWM_1_FTMCHAN_CH4,
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PWM_1_CH4_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 5
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PWM_1_FTMCHAN_CH5,
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PWM_1_CH5_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 6
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PWM_1_FTMCHAN_CH6,
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PWM_1_CH6_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 7
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PWM_1_FTMCHAN_CH7,
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PWM_1_CH7_FTMCHAN,
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#endif
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};
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#endif
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@ -158,60 +158,58 @@ uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
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#if PWM_0_EN
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case PWM_0:
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PWM_0_PORT_CLKEN();
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#if PWM_0_CHANNELS > 0
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PWM_0_PORT_CH0->PCR[PWM_0_PIN_CH0] = PORT_PCR_MUX(PWM_0_PIN_AF_CH0);
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gpio_init_port(PWM_0_CH0_GPIO, PORT_PCR_MUX(PWM_0_CH0_AF));
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#endif
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#if PWM_0_CHANNELS > 1
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PWM_0_PORT_CH1->PCR[PWM_0_PIN_CH1] = PORT_PCR_MUX(PWM_0_PIN_AF_CH1);
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gpio_init_port(PWM_0_CH1_GPIO, PORT_PCR_MUX(PWM_0_CH1_AF));
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#endif
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#if PWM_0_CHANNELS > 2
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PWM_0_PORT_CH2->PCR[PWM_0_PIN_CH2] = PORT_PCR_MUX(PWM_0_PIN_AF_CH2);
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gpio_init_port(PWM_0_CH2_GPIO, PORT_PCR_MUX(PWM_0_CH2_AF));
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#endif
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#if PWM_0_CHANNELS > 3
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PWM_0_PORT_CH3->PCR[PWM_0_PIN_CH3] = PORT_PCR_MUX(PWM_0_PIN_AF_CH3);
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gpio_init_port(PWM_0_CH3_GPIO, PORT_PCR_MUX(PWM_0_CH3_AF));
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#endif
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#if PWM_0_CHANNELS > 4
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PWM_0_PORT_CH4->PCR[PWM_0_PIN_CH4] = PORT_PCR_MUX(PWM_0_PIN_AF_CH4);
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gpio_init_port(PWM_0_CH4_GPIO, PORT_PCR_MUX(PWM_0_CH4_AF));
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#endif
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#if PWM_0_CHANNELS > 5
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PWM_0_PORT_CH5->PCR[PWM_0_PIN_CH5] = PORT_PCR_MUX(PWM_0_PIN_AF_CH5);
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gpio_init_port(PWM_0_CH5_GPIO, PORT_PCR_MUX(PWM_0_CH5_AF));
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#endif
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#if PWM_0_CHANNELS > 6
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PWM_0_PORT_CH6->PCR[PWM_0_PIN_CH6] = PORT_PCR_MUX(PWM_0_PIN_AF_CH6);
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gpio_init_port(PWM_0_CH6_GPIO, PORT_PCR_MUX(PWM_0_CH6_AF));
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#endif
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#if PWM_0_CHANNELS > 7
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PWM_0_PORT_CH7->PCR[PWM_0_PIN_CH7] = PORT_PCR_MUX(PWM_0_PIN_AF_CH7);
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gpio_init_port(PWM_0_CH7_GPIO, PORT_PCR_MUX(PWM_0_CH7_AF));
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#endif
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break;
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#endif
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#if PWM_1_EN
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case PWM_1:
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PWM_1_PORT_CLKEN();
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#if PWM_1_CHANNELS > 0
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PWM_1_PORT_CH0->PCR[PWM_1_PIN_CH0] = PORT_PCR_MUX(PWM_1_PIN_AF_CH0);
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gpio_init_port(PWM_1_CH0_GPIO, PORT_PCR_MUX(PWM_1_CH0_AF));
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#endif
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#if PWM_1_CHANNELS > 1
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PWM_1_PORT_CH1->PCR[PWM_1_PIN_CH1] = PORT_PCR_MUX(PWM_1_PIN_AF_CH1);
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gpio_init_port(PWM_1_CH1_GPIO, PORT_PCR_MUX(PWM_1_CH1_AF));
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#endif
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#if PWM_1_CHANNELS > 2
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PWM_1_PORT_CH2->PCR[PWM_1_PIN_CH2] = PORT_PCR_MUX(PWM_1_PIN_AF_CH2);
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gpio_init_port(PWM_1_CH2_GPIO, PORT_PCR_MUX(PWM_1_CH2_AF));
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#endif
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#if PWM_1_CHANNELS > 3
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PWM_1_PORT_CH3->PCR[PWM_1_PIN_CH3] = PORT_PCR_MUX(PWM_1_PIN_AF_CH3);
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gpio_init_port(PWM_1_CH3_GPIO, PORT_PCR_MUX(PWM_1_CH3_AF));
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#endif
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#if PWM_1_CHANNELS > 4
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PWM_1_PORT_CH4->PCR[PWM_1_PIN_CH4] = PORT_PCR_MUX(PWM_1_PIN_AF_CH4);
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gpio_init_port(PWM_1_CH4_GPIO, PORT_PCR_MUX(PWM_1_CH4_AF));
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#endif
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#if PWM_1_CHANNELS > 5
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PWM_1_PORT_CH5->PCR[PWM_1_PIN_CH5] = PORT_PCR_MUX(PWM_1_PIN_AF_CH5);
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gpio_init_port(PWM_1_CH5_GPIO, PORT_PCR_MUX(PWM_1_CH5_AF));
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#endif
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#if PWM_1_CHANNELS > 6
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PWM_1_PORT_CH6->PCR[PWM_1_PIN_CH6] = PORT_PCR_MUX(PWM_1_PIN_AF_CH6);
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gpio_init_port(PWM_1_CH6_GPIO, PORT_PCR_MUX(PWM_1_CH6_AF));
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#endif
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#if PWM_1_CHANNELS > 7
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PWM_1_PORT_CH7->PCR[PWM_1_PIN_CH7] = PORT_PCR_MUX(PWM_1_PIN_AF_CH7);
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gpio_init_port(PWM_1_CH7_GPIO, PORT_PCR_MUX(PWM_1_CH7_AF));
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#endif
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break;
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#endif
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