diff --git a/cpu/stm32/periph/pm.c b/cpu/stm32/periph/pm.c
index 5425aec391..d91800414b 100644
--- a/cpu/stm32/periph/pm.c
+++ b/cpu/stm32/periph/pm.c
@@ -53,7 +53,8 @@
 #define PM_STOP_CONFIG  (PWR_CR1_LPMS_0)
 #elif defined(CPU_FAM_STM32F7)
 #define PM_STOP_CONFIG  (PWR_CR1_LPDS | PWR_CR1_FPDS | PWR_CR1_LPUDS)
-#elif defined(CPU_FAM_STM32WB)
+#elif defined(CPU_FAM_STM32MP1)
+#define PM_STOP_CONFIG  (0)
 #else
 #define PM_STOP_CONFIG  (PWR_CR_LPDS | PWR_CR_FPDS)
 #endif
@@ -74,6 +75,8 @@
 #define PM_STANDBY_CONFIG   (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1)
 #elif defined(CPU_FAM_STM32F7)
 #define PM_STANDBY_CONFIG   (PWR_CR1_PDDS | PWR_CR1_CSBF)
+#elif defined(CPU_FAM_STM32MP1)
+#define PM_STANDBY_CONFIG   (0)
 #else
 #define PM_STANDBY_CONFIG   (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF)
 #endif
@@ -92,6 +95,9 @@
 #elif defined(CPU_FAM_STM32F7)
 #define PWR_CR_REG     PWR->CR1
 #define PWR_WUP_REG    PWR->CSR2
+#elif defined(CPU_FAM_STM32MP1)
+#define PWR_CR_REG     PWR->CR1
+#define PWR_WUP_REG    PWR->MCUWKUPENR
 #else
 #define PWR_CR_REG     PWR->CR
 #define PWR_WUP_REG    PWR->CSR
@@ -102,7 +108,7 @@ void pm_set(unsigned mode)
     int deep;
 
     switch (mode) {
-#ifdef STM32_PM_STANDBY
+#if defined(STM32_PM_STANDBY) && !defined(CPU_FAM_STM32MP1)
         case STM32_PM_STANDBY:
             PWR_CR_REG &= ~(PM_STOP_CONFIG | PM_STANDBY_CONFIG);
             PWR_CR_REG |= PM_STANDBY_CONFIG;