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Merge pull request #3155 from haukepetersen/opt_cortex_startup

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cpu: centralized startup code for cortexm CPUs
This commit is contained in:
Hauke Petersen 2015-06-17 00:01:56 +02:00
commit 765c013834
35 changed files with 2540 additions and 3447 deletions
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2
cpu/Makefile.include.cortexm_common
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@ -33,7 +33,7 @@ export INCLUDES += -I$(RIOTCPU)/$(CPU)/include
# Explicitly tell the linker to link the startup code.
# Without this the interrupt vectors will not be linked correctly!
ifeq ($(COMMON_STARTUP),)
export UNDEF += $(BINDIR)cpu/startup.o
export UNDEF += $(BINDIR)cpu/vectors.o
endif
# CPU depends on the cortex-m common module, so include it:

264
cpu/cc2538/startup.c
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@ -1,264 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_cc2538
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Ian Martin <ian@locicontrols.com>
*/
#include <stdint.h>
#include "board.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate;) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero;) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
while (1) {
asm("nop");
}
}
void isr_nmi(void)
{
while (1) {
asm("nop");
}
}
void isr_mem_manage(void)
{
while (1) {
asm("nop");
}
}
void isr_debug_mon(void)
{
while (1) {
asm("nop");
}
}
void isr_hard_fault(void)
{
while (1) {
asm("nop");
}
}
void isr_bus_fault(void)
{
while (1) {
asm("nop");
}
}
void isr_usage_fault(void)
{
while (1) {
asm("nop");
}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* CC2538 specific interrupt vector */
void isr_gpioa(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_gpiob(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_gpioc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_gpiod(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ssi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_watchdog(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer0_chan0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer0_chan1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer1_chan0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer1_chan1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer2_chan0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer2_chan1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_comp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rfcoretx(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rfcoreerr(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_icepick(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_aes(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pka(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sleepmode(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_mactimer(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ssi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer3_chan0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer3_chan1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dmaerr(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors"), aligned(CC2538_VTOR_ALIGN)))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* CC2538 specific peripheral handlers */
(void*) isr_gpioa, /* 16 GPIO Port A */
(void*) isr_gpiob, /* 17 GPIO Port B */
(void*) isr_gpioc, /* 18 GPIO Port C */
(void*) isr_gpiod, /* 19 GPIO Port D */
(void*) (0UL), /* 20 none */
(void*) isr_uart0, /* 21 UART0 Rx and Tx */
(void*) isr_uart1, /* 22 UART1 Rx and Tx */
(void*) isr_ssi0, /* 23 SSI0 Rx and Tx */
(void*) isr_i2c, /* 24 I2C Master and Slave */
(void*) (0UL), /* 25 Reserved */
(void*) (0UL), /* 26 Reserved */
(void*) (0UL), /* 27 Reserved */
(void*) (0UL), /* 28 Reserved */
(void*) (0UL), /* 29 Reserved */
(void*) isr_adc, /* 30 ADC Sequence 0 */
(void*) (0UL), /* 31 Reserved */
(void*) (0UL), /* 32 Reserved */
(void*) (0UL), /* 33 Reserved */
(void*) isr_watchdog, /* 34 Watchdog timer, timer 0 */
(void*) isr_timer0_chan0, /* 35 Timer 0 subtimer A */
(void*) isr_timer0_chan1, /* 36 Timer 0 subtimer B */
(void*) isr_timer1_chan0, /* 37 Timer 1 subtimer A */
(void*) isr_timer1_chan1, /* 38 Timer 1 subtimer B */
(void*) isr_timer2_chan0, /* 39 Timer 2 subtimer A */
(void*) isr_timer2_chan1, /* 40 Timer 2 subtimer B */
(void*) isr_comp, /* 41 Analog Comparator 0 */
(void*) isr_rfcoretx, /* 42 RFCore Rx/Tx */
(void*) isr_rfcoreerr, /* 43 RFCore Error */
(void*) isr_icepick, /* 44 IcePick */
(void*) isr_flash, /* 45 FLASH Control */
(void*) isr_aes, /* 46 AES */
(void*) isr_pka, /* 47 PKA */
(void*) isr_sleepmode, /* 48 Sleep Timer */
(void*) isr_mactimer, /* 49 MacTimer */
(void*) isr_ssi1, /* 50 SSI1 Rx and Tx */
(void*) isr_timer3_chan0, /* 51 Timer 3 subtimer A */
(void*) isr_timer3_chan1, /* 52 Timer 3 subtimer B */
(void*) (0UL), /* 53 Reserved */
(void*) (0UL), /* 54 Reserved */
(void*) (0UL), /* 55 Reserved */
(void*) (0UL), /* 56 Reserved */
(void*) (0UL), /* 57 Reserved */
(void*) (0UL), /* 58 Reserved */
(void*) (0UL), /* 59 Reserved */
(void*) isr_usb, /* 60 USB 2538 */
(void*) (0UL), /* 61 Reserved */
(void*) isr_dma, /* 62 uDMA */
(void*) isr_dmaerr, /* 63 uDMA Error */
};
#if UPDATE_CCA
/**
* @brief Flash Customer Configuration Area (CCA)
*
* Defines bootloader backdoor configuration, boot image validity and base address, and flash page lock bits.
*/
__attribute__((section(".flashcca"), used))
const uint32_t cca[] = {
/* Bootloader Backdoor Configuration: */
0xe0ffffff | (CCA_BACKDOOR_ENABLE << 28) | (CCA_BACKDOOR_ACTIVE_LEVEL << 27) | (CCA_BACKDOOR_PORT_A_PIN << 24),
0x00000000, /**< Image Valid */
(uintptr_t)interrupt_vector, /**< Application Entry Point */
/* Unlock all pages and debug: */
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
};
#endif
/** @} */

168
cpu/cc2538/vectors.c Normal file
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@ -0,0 +1,168 @@
/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_cc2538
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Ian Martin <ian@locicontrols.com>
*/
#include <stdint.h>
#include "cpu.h"
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* CC2538 specific interrupt vectors */
WEAK_DEFAULT void isr_gpioa(void);
WEAK_DEFAULT void isr_gpiob(void);
WEAK_DEFAULT void isr_gpioc(void);
WEAK_DEFAULT void isr_gpiod(void);
WEAK_DEFAULT void isr_uart0(void);
WEAK_DEFAULT void isr_uart1(void);
WEAK_DEFAULT void isr_ssi0(void);
WEAK_DEFAULT void isr_i2c(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_watchdog(void);
WEAK_DEFAULT void isr_timer0_chan0(void);
WEAK_DEFAULT void isr_timer0_chan1(void);
WEAK_DEFAULT void isr_timer1_chan0(void);
WEAK_DEFAULT void isr_timer1_chan1(void);
WEAK_DEFAULT void isr_timer2_chan0(void);
WEAK_DEFAULT void isr_timer2_chan1(void);
WEAK_DEFAULT void isr_comp(void);
WEAK_DEFAULT void isr_rfcoretx(void);
WEAK_DEFAULT void isr_rfcoreerr(void);
WEAK_DEFAULT void isr_icepick(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_aes(void);
WEAK_DEFAULT void isr_pka(void);
WEAK_DEFAULT void isr_sleepmode(void);
WEAK_DEFAULT void isr_mactimer(void);
WEAK_DEFAULT void isr_ssi1(void);
WEAK_DEFAULT void isr_timer3_chan0(void);
WEAK_DEFAULT void isr_timer3_chan1(void);
WEAK_DEFAULT void isr_usb(void);
WEAK_DEFAULT void isr_dma(void);
WEAK_DEFAULT void isr_dmaerr(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M3 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* CC2538 specific peripheral handlers */
(void*) isr_gpioa, /* 16 GPIO Port A */
(void*) isr_gpiob, /* 17 GPIO Port B */
(void*) isr_gpioc, /* 18 GPIO Port C */
(void*) isr_gpiod, /* 19 GPIO Port D */
(void*) (0UL), /* 20 none */
(void*) isr_uart0, /* 21 UART0 Rx and Tx */
(void*) isr_uart1, /* 22 UART1 Rx and Tx */
(void*) isr_ssi0, /* 23 SSI0 Rx and Tx */
(void*) isr_i2c, /* 24 I2C Master and Slave */
(void*) (0UL), /* 25 Reserved */
(void*) (0UL), /* 26 Reserved */
(void*) (0UL), /* 27 Reserved */
(void*) (0UL), /* 28 Reserved */
(void*) (0UL), /* 29 Reserved */
(void*) isr_adc, /* 30 ADC Sequence 0 */
(void*) (0UL), /* 31 Reserved */
(void*) (0UL), /* 32 Reserved */
(void*) (0UL), /* 33 Reserved */
(void*) isr_watchdog, /* 34 Watchdog timer, timer 0 */
(void*) isr_timer0_chan0, /* 35 Timer 0 subtimer A */
(void*) isr_timer0_chan1, /* 36 Timer 0 subtimer B */
(void*) isr_timer1_chan0, /* 37 Timer 1 subtimer A */
(void*) isr_timer1_chan1, /* 38 Timer 1 subtimer B */
(void*) isr_timer2_chan0, /* 39 Timer 2 subtimer A */
(void*) isr_timer2_chan1, /* 40 Timer 2 subtimer B */
(void*) isr_comp, /* 41 Analog Comparator 0 */
(void*) isr_rfcoretx, /* 42 RFCore Rx/Tx */
(void*) isr_rfcoreerr, /* 43 RFCore Error */
(void*) isr_icepick, /* 44 IcePick */
(void*) isr_flash, /* 45 FLASH Control */
(void*) isr_aes, /* 46 AES */
(void*) isr_pka, /* 47 PKA */
(void*) isr_sleepmode, /* 48 Sleep Timer */
(void*) isr_mactimer, /* 49 MacTimer */
(void*) isr_ssi1, /* 50 SSI1 Rx and Tx */
(void*) isr_timer3_chan0, /* 51 Timer 3 subtimer A */
(void*) isr_timer3_chan1, /* 52 Timer 3 subtimer B */
(void*) (0UL), /* 53 Reserved */
(void*) (0UL), /* 54 Reserved */
(void*) (0UL), /* 55 Reserved */
(void*) (0UL), /* 56 Reserved */
(void*) (0UL), /* 57 Reserved */
(void*) (0UL), /* 58 Reserved */
(void*) (0UL), /* 59 Reserved */
(void*) isr_usb, /* 60 USB 2538 */
(void*) (0UL), /* 61 Reserved */
(void*) isr_dma, /* 62 uDMA */
(void*) isr_dmaerr, /* 63 uDMA Error */
};
#if UPDATE_CCA
/**
* @brief Flash Customer Configuration Area (CCA)
*
* Defines bootloader backdoor configuration, boot image validity and base address, and flash page lock bits.
*/
__attribute__((section(".flashcca"), used))
const uint32_t cca[] = {
/* Bootloader Backdoor Configuration: */
0xe0ffffff | (CCA_BACKDOOR_ENABLE << 28) | (CCA_BACKDOOR_ACTIVE_LEVEL << 27) | (CCA_BACKDOOR_PORT_A_PIN << 24),
0x00000000, /**< Image Valid */
(uintptr_t)interrupt_vector, /**< Application Entry Point */
/* Unlock all pages and debug: */
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
0xffffffff,
};
#endif
/** @} */

118
cpu/cortexm_common/include/vectors_cortexm.h Normal file
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@ -0,0 +1,118 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_cortexm_common
* @{
*
* @file
* @brief Default interrupt vectors shared by Cortex-M based CPUs
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef VECTORS_DEFAULT_H_
#define VECTORS_DEFAULT_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Use this macro to make interrupt functions overridable with the
* dummy_handler as fallback in case they are not implemented
*/
#define WEAK_DEFAULT __attribute__((weak,alias("dummy_handler")))
/**
* @brief Put this macro in front of the array holding the interrupt vectors
*/
#define ISR_VECTORS __attribute__((used,section(".vectors")))
/**
* @brief This function is the default entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the board (sync clock, setup std-IO)
* 4. initialize the newlib (optional, on when newlib is used)
* 5. initialize and start RIOTs kernel
*/
void reset_handler_default(void);
/**
* @brief Non-maskable interrupt handler
*
* Non-maskable interrupts have the highest priority other than the reset event
* and can not be masked (surprise surprise...). They can be triggered by
* software and some peripherals. So far, they are not used in RIOT.
*/
void nmi_default(void);
/**
* @brief Hard fault exception handler
*
* Hard faults are triggered on errors during exception processing. Typical
* causes of hard faults are access to un-aligned pointers on Cortex-M0 CPUs
* and calls of function pointers that are set to NULL.
*/
void hard_fault_default(void);
/* The following four exceptions are only present for Cortex-M3 and -M4 CPUs */
#if defined(CPU_ARCH_CORTEX_M3) || defined(CPU_ARCH_CORTEX_M4) || \
defined(CPU_ARCH_CORTEX_M4F)
/**
* @brief Memory management exception handler
*
* Memory management exceptions are triggered on access to protected memory
* regions.
*/
void mem_manage_default(void);
/**
* @brief Bus fault exception handler
*
* Bus faults are triggered on errors that are related to memory transactions.
*/
void bus_fault_default(void);
/**
* @brief Usage fault exception handler
*
* Usage fault exceptions are triggered by faults related to the execution of
* instructions, e.g. execution of undefined opcodes, illegal alignment, or
* or invalid exception return codes.
*/
void usage_fault_default(void);
/**
* @brief Debug monitor exception handler
*
* The debug monitor exception is triggered, when a software debug event occurs
* while in debug mode.
*/
void debug_mon_default(void);
#endif
/**
* @brief Default handler used as weak alias for not implemented ISR vectors
*
* Per default, all interrupt handlers are mapped to the dummy handler using a
* weak symbol. This means the handlers can be (should be) overwritten in the
* RIOT code by just implementing a function with the name of the targeted
* interrupt routine.
*/
void dummy_handler_default(void);
#ifdef __cplusplus
}
#endif
#endif /* VECTORS_DEFAULT_H_ */
/** @} */

142
cpu/cortexm_common/vectors_cortexm.c Normal file
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@ -0,0 +1,142 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_cortexm_common
* @{
*
* @file
* @brief Default implementations for Cortex-M specific interrupt and
* exception handlers
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "board.h"
#include "panic.h"
#include "kernel_internal.h"
#include "vectors_cortexm.h"
/**
* @brief Memory markers, defined in the linker script
* @{
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/** @} */
/** @brief Interrupt stack canary value
*
* @note 0xe7fe is the ARM Thumb machine code equivalent of asm("bl #-2\n") or
* 'while (1);', i.e. an infinite loop.
*/
#define STACK_CANARY_WORD 0xE7FEE7FEu
/**
* @brief Required by g++ cross compiler
*/
void *__dso_handle;
/**
* @brief Pre-start routine for CPU-specific settings
*/
__attribute__((weak)) void pre_startup (void)
{
}
/**
* @brief Post-start routine for CPU-specific settings
*/
__attribute__((weak)) void post_startup (void)
{
}
void reset_handler_default(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
pre_startup();
/* fill stack space with canary values */
for (dst = &_sstack; dst < &_estack; ) {
*(dst++) = STACK_CANARY_WORD;
}
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
post_startup();
/* initialize the board (which also initiates CPU initialization) */
board_init();
#if MODULE_NEWLIB
/* initialize std-c library (this must be done after board_init) */
extern void __libc_init_array(void);
__libc_init_array();
#endif
/* startup the kernel */
kernel_init();
}
void nmi_default(void)
{
core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
}
void hard_fault_default(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT HANDLER");
}
#if defined(CPU_ARCH_CORTEX_M3) || defined(CPU_ARCH_CORTEX_M4) || \
defined(CPU_ARCH_CORTEX_M4F)
void mem_manage_default(void)
{
core_panic(PANIC_MEM_MANAGE, "MEM MANAGE HANDLER");
}
void bus_fault_default(void)
{
core_panic(PANIC_BUS_FAULT, "BUS FAULT HANDLER");
}
void usage_fault_default(void)
{
core_panic(PANIC_USAGE_FAULT, "USAGE FAULT HANDLER");
}
void debug_mon_default(void)
{
core_panic(PANIC_DEBUG_MON, "DEBUG MON HANDLER");
}
#endif
void dummy_handler_default(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}

2
cpu/k60/Makefile.include
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@ -23,7 +23,7 @@ export CFLAGS += -DCPU_ARCH_$(ARCH)
export COMMON_STARTUP = $(KINETIS_COMMON)
# add the CPU specific system calls implementations for the linker
export UNDEF += $(BINDIR)cpu/interrupt_vector.o
export UNDEF += $(BINDIR)cpu/vector.o
export UNDEF += $(BINDIR)cpu/ssp.o
include $(RIOTCPU)/Makefile.include.cortexm_common

490
cpu/k60/interrupt_vector.c
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@ -1,490 +0,0 @@
/*
* Copyright (C) 2015 Eistec AB
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_k60
* @{
*
* @file
*
* @brief Interrupt vector for K60 MCU.
*
* @author Joakim Gebart <joakim.gebart@eistec.se>
*
* @note It is not necessary to modify this file to define custom interrupt
* service routines. All symbols are defined weak, it is only necessary to
* define a function with the same name in another file to override the default
* interrupt handlers.
*/
/**
* @name Interrupt vector definition
* @{
*/
#include "cpu.h"
#include "fault_handlers.h"
#include "wdog.h"
extern void *_estack[];
extern void *_sstack[];
typedef void (*ISR_func)(void);
/**
* @brief Unconditional jump to isr_unhandled()
*
* This function is only necessary since we can not declare weak aliases to
* functions outside the translation unit (.c-file). The default isr_unhandled()
* is defined in kinetis_common/fault_handlers.c.
*/
void isr_default_handler(void) __attribute__((naked));
void isr_default_handler(void)
{
__ASM volatile ("b isr_unhandled\n");
}
/**
* @brief Early reset handler used to instrument the stack before it becomes in use.
*
* This function will fill the interrupt context-stack with canary values so
* that it can be checked to measure stack usage, similar to CREATE_STACKTEST in
* @ref thread_create
*/
void pre_reset_handler(void);
/** @brief Interrupt stack canary value
*
* @note 0xe7fe is the ARM Thumb machine code equivalent of asm("bl #-2\n") or
* 'while (1);', i.e. an infinite loop.
*/
#define STACK_CANARY_WORD 0xE7FEE7FEu
void pre_reset_handler(void)
{
/*
* Important: Keep this function as simple as possible, we must not use any
* stack space or we will crash, since we will overwrite all of the stack.
*/
/* Disable watchdog first, it is necessary to do within 256 cycles.
* After this we will completely overwrite the stack so all necessary
* variables must be stored in registers or as immediate values in the
* machine code. */
wdog_disable();
/*
* The register keyword suggests to the compiler to place the variable in a
* register instead of on the stack. Using the register keyword is not a
* guarantee that the variable will be placed in a register. However, this
* function has been verified manually by disassembling the GCC output to
* ensure no stack is being used until after the write loop is finished.
*/
register uint32_t *p;
/* Fill stack space with canary values */
for (p = (uint32_t *)_sstack; p < (uint32_t *)_estack; ++p) {
*p = STACK_CANARY_WORD;
}
/* Now launch the real reset handler. */
__ASM volatile("b reset_handler\n");
/* reset_handler should never return */
while (1);
}
#define ISR_VECTOR_SECTION __attribute__ ((used,section(".vector_table")))
#define UNHANDLED_ALIAS __attribute__((weak, alias("isr_default_handler")));
/* ARM Cortex defined interrupt vectors */
/**
* @brief Default reset handler.
*/
void reset_handler(void) __attribute__((naked));
void isr_nmi(void) UNHANDLED_ALIAS;
void isr_hard_fault(void) UNHANDLED_ALIAS;
void isr_mem_manage(void) UNHANDLED_ALIAS;
void isr_bus_fault(void) UNHANDLED_ALIAS;
void isr_usage_fault(void) UNHANDLED_ALIAS;
void isr_reserved(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
/* void isr_reserved(void) UNHANDLED_ALIAS; */
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_svc(void) UNHANDLED_ALIAS;
void isr_debug_mon(void) UNHANDLED_ALIAS;
/* void _isr_reserved(void) UNHANDLED_ALIAS; */
void isr_pendsv(void) UNHANDLED_ALIAS;
void isr_systick(void) UNHANDLED_ALIAS;
/* device-specific (freescale) defined interrupt vectors */
void isr_dma0_complete(void) UNHANDLED_ALIAS;
void isr_dma1_complete(void) UNHANDLED_ALIAS;
void isr_dma2_complete(void) UNHANDLED_ALIAS;
void isr_dma3_complete(void) UNHANDLED_ALIAS;
void isr_dma4_complete(void) UNHANDLED_ALIAS;
void isr_dma5_complete(void) UNHANDLED_ALIAS;
void isr_dma6_complete(void) UNHANDLED_ALIAS;
void isr_dma7_complete(void) UNHANDLED_ALIAS;
void isr_dma8_complete(void) UNHANDLED_ALIAS;
void isr_dma9_complete(void) UNHANDLED_ALIAS;
void isr_dma10_complete(void) UNHANDLED_ALIAS;
void isr_dma11_complete(void) UNHANDLED_ALIAS;
void isr_dma12_complete(void) UNHANDLED_ALIAS;
void isr_dma13_complete(void) UNHANDLED_ALIAS;
void isr_dma14_complete(void) UNHANDLED_ALIAS;
void isr_dma15_complete(void) UNHANDLED_ALIAS;
void isr_dma_error(void) UNHANDLED_ALIAS;
void isr_mcm(void) UNHANDLED_ALIAS;
void isr_flash_command_complete(void) UNHANDLED_ALIAS;
void isr_flash_read_collision(void) UNHANDLED_ALIAS;
void isr_low_voltage(void) UNHANDLED_ALIAS;
void isr_llwu(void) UNHANDLED_ALIAS;
void isr_watchdog(void) UNHANDLED_ALIAS;
void isr_random_number_generator(void) UNHANDLED_ALIAS;
void isr_i2c0(void) UNHANDLED_ALIAS;
void isr_i2c1(void) UNHANDLED_ALIAS;
void isr_spi0(void) UNHANDLED_ALIAS;
void isr_spi1(void) UNHANDLED_ALIAS;
void isr_spi2(void) UNHANDLED_ALIAS;
void isr_can0_ored_msg_buffer(void) UNHANDLED_ALIAS;
void isr_can0_bus_off(void) UNHANDLED_ALIAS;
void isr_can0_error(void) UNHANDLED_ALIAS;
void isr_can0_tx_warn(void) UNHANDLED_ALIAS;
void isr_can0_rx_warn(void) UNHANDLED_ALIAS;
void isr_can0_wake_up(void) UNHANDLED_ALIAS;
void isr_i2s0_tx(void) UNHANDLED_ALIAS;
void isr_i2s0_rx(void) UNHANDLED_ALIAS;
void isr_can1_ored_msg_buffer(void) UNHANDLED_ALIAS;
void isr_can1_bus_off(void) UNHANDLED_ALIAS;
void isr_can1_error(void) UNHANDLED_ALIAS;
void isr_can1_tx_warn(void) UNHANDLED_ALIAS;
void isr_can1_rx_warn(void) UNHANDLED_ALIAS;
void isr_can1_wake_up(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_uart0_lon(void) UNHANDLED_ALIAS;
void isr_uart0_status(void) UNHANDLED_ALIAS;
void isr_uart0_error(void) UNHANDLED_ALIAS;
void isr_uart1_status(void) UNHANDLED_ALIAS;
void isr_uart1_error(void) UNHANDLED_ALIAS;
void isr_uart2_status(void) UNHANDLED_ALIAS;
void isr_uart2_error(void) UNHANDLED_ALIAS;
void isr_uart3_status(void) UNHANDLED_ALIAS;
void isr_uart3_error(void) UNHANDLED_ALIAS;
void isr_uart4_status(void) UNHANDLED_ALIAS;
void isr_uart4_error(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_adc0(void) UNHANDLED_ALIAS;
void isr_adc1(void) UNHANDLED_ALIAS;
void isr_cmp0(void) UNHANDLED_ALIAS;
void isr_cmp1(void) UNHANDLED_ALIAS;
void isr_cmp2(void) UNHANDLED_ALIAS;
void isr_ftm0(void) UNHANDLED_ALIAS;
void isr_ftm1(void) UNHANDLED_ALIAS;
void isr_ftm2(void) UNHANDLED_ALIAS;
void isr_cmt(void) UNHANDLED_ALIAS;
void isr_rtc_alarm(void) UNHANDLED_ALIAS;
void isr_rtc_seconds(void) UNHANDLED_ALIAS;
void isr_pit0(void) UNHANDLED_ALIAS;
void isr_pit1(void) UNHANDLED_ALIAS;
void isr_pit2(void) UNHANDLED_ALIAS;
void isr_pit3(void) UNHANDLED_ALIAS;
void isr_pdb(void) UNHANDLED_ALIAS;
void isr_usb_otg(void) UNHANDLED_ALIAS;
void isr_usb_charger_detect(void) UNHANDLED_ALIAS;
void isr_enet_1588_timer(void) UNHANDLED_ALIAS;
void isr_enet_tx(void) UNHANDLED_ALIAS;
void isr_enet_rx(void) UNHANDLED_ALIAS;
void isr_enet_error_misc(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_sdhc(void) UNHANDLED_ALIAS;
void isr_dac0(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_tsi(void) UNHANDLED_ALIAS;
void isr_mcg(void) UNHANDLED_ALIAS;
void isr_lptmr0(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_porta_pin_detect(void) UNHANDLED_ALIAS;
void isr_portb_pin_detect(void) UNHANDLED_ALIAS;
void isr_portc_pin_detect(void) UNHANDLED_ALIAS;
void isr_portd_pin_detect(void) UNHANDLED_ALIAS;
void isr_porte_pin_detect(void) UNHANDLED_ALIAS;
/* void isr_reserved(void) UNHANDLED_ALIAS; */
/* void isr_reserved(void) UNHANDLED_ALIAS; */
void isr_software(void) UNHANDLED_ALIAS;
/**
* @brief Interrupt vector definition
*/
const ISR_func isr_vector[256] ISR_VECTOR_SECTION = {
/* ARM Cortex defined interrupt vectors */
(ISR_func)_estack,
pre_reset_handler,
isr_nmi,
isr_hard_fault,
isr_mem_manage,
isr_bus_fault,
isr_usage_fault,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_svc,
isr_debug_mon,
isr_reserved,
isr_pendsv,
isr_systick,
/* Device-specific (Freescale defined) interrupt vectors */
isr_dma0_complete,
isr_dma1_complete,
isr_dma2_complete,
isr_dma3_complete,
isr_dma4_complete,
isr_dma5_complete,
isr_dma6_complete,
isr_dma7_complete,
isr_dma8_complete,
isr_dma9_complete,
isr_dma10_complete,
isr_dma11_complete,
isr_dma12_complete,
isr_dma13_complete,
isr_dma14_complete,
isr_dma15_complete,
isr_dma_error,
isr_mcm,
isr_flash_command_complete,
isr_flash_read_collision,
isr_low_voltage,
isr_llwu,
isr_watchdog,
isr_random_number_generator,
isr_i2c0,
isr_i2c1,
isr_spi0,
isr_spi1,
isr_spi2,
isr_can0_ored_msg_buffer,
isr_can0_bus_off,
isr_can0_error,
isr_can0_tx_warn,
isr_can0_rx_warn,
isr_can0_wake_up,
isr_i2s0_tx,
isr_i2s0_rx,
isr_can1_ored_msg_buffer,
isr_can1_bus_off,
isr_can1_error,
isr_can1_tx_warn,
isr_can1_rx_warn,
isr_can1_wake_up,
isr_reserved,
isr_uart0_lon,
isr_uart0_status,
isr_uart0_error,
isr_uart1_status,
isr_uart1_error,
isr_uart2_status,
isr_uart2_error,
isr_uart3_status,
isr_uart3_error,
isr_uart4_status,
isr_uart4_error,
isr_reserved,
isr_reserved,
isr_adc0,
isr_adc1,
isr_cmp0,
isr_cmp1,
isr_cmp2,
isr_ftm0,
isr_ftm1,
isr_ftm2,
isr_cmt,
isr_rtc_alarm,
isr_rtc_seconds,
isr_pit0,
isr_pit1,
isr_pit2,
isr_pit3,
isr_pdb,
isr_usb_otg,
isr_usb_charger_detect,
isr_enet_1588_timer,
isr_enet_tx,
isr_enet_rx,
isr_enet_error_misc,
isr_reserved,
isr_sdhc,
isr_dac0,
isr_reserved,
isr_tsi,
isr_mcg,
isr_lptmr0,
isr_reserved,
isr_porta_pin_detect,
isr_portb_pin_detect,
isr_portc_pin_detect,
isr_portd_pin_detect,
isr_porte_pin_detect,
isr_reserved,
isr_reserved,
isr_software, /* Vector 110 */
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved,
isr_reserved /* vector 255 */
};
/** @} */
/** @} */

419
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/*
* Copyright (C) 2015 Eistec AB
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_k60
* @{
*
* @file
*
* @brief Interrupt vector for K60 MCU.
*
* @author Joakim Gebart <joakim.gebart@eistec.se>
*
* @note It is not necessary to modify this file to define custom interrupt
* service routines. All symbols are defined weak, it is only necessary to
* define a function with the same name in another file to override the default
* interrupt handlers.
*/
/**
* @name Interrupt vector definition
* @{
*/
#include "cpu.h"
#include "vectors_cortexm.h"
#include "wdog.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _estack;
void pre_startup (void)
{
/* disable the WDOG */
wdog_disable();
}
void dummy_handler(void)
{
dummy_handler_default();
}
/* Cortex-M specific interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* K60 specific interrupt vector */
WEAK_DEFAULT void isr_dma0_complete(void);
WEAK_DEFAULT void isr_dma1_complete(void);
WEAK_DEFAULT void isr_dma2_complete(void);
WEAK_DEFAULT void isr_dma3_complete(void);
WEAK_DEFAULT void isr_dma4_complete(void);
WEAK_DEFAULT void isr_dma5_complete(void);
WEAK_DEFAULT void isr_dma6_complete(void);
WEAK_DEFAULT void isr_dma7_complete(void);
WEAK_DEFAULT void isr_dma8_complete(void);
WEAK_DEFAULT void isr_dma9_complete(void);
WEAK_DEFAULT void isr_dma10_complete(void);
WEAK_DEFAULT void isr_dma11_complete(void);
WEAK_DEFAULT void isr_dma12_complete(void);
WEAK_DEFAULT void isr_dma13_complete(void);
WEAK_DEFAULT void isr_dma14_complete(void);
WEAK_DEFAULT void isr_dma15_complete(void);
WEAK_DEFAULT void isr_dma_error(void);
WEAK_DEFAULT void isr_mcm(void);
WEAK_DEFAULT void isr_flash_command_complete(void);
WEAK_DEFAULT void isr_flash_read_collision(void);
WEAK_DEFAULT void isr_low_voltage(void);
WEAK_DEFAULT void isr_llwu(void);
WEAK_DEFAULT void isr_watchdog(void);
WEAK_DEFAULT void isr_random_number_generator(void);
WEAK_DEFAULT void isr_i2c0(void);
WEAK_DEFAULT void isr_i2c1(void);
WEAK_DEFAULT void isr_spi0(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_can0_ored_msg_buffer(void);
WEAK_DEFAULT void isr_can0_bus_off(void);
WEAK_DEFAULT void isr_can0_error(void);
WEAK_DEFAULT void isr_can0_tx_warn(void);
WEAK_DEFAULT void isr_can0_rx_warn(void);
WEAK_DEFAULT void isr_can0_wake_up(void);
WEAK_DEFAULT void isr_i2s0_tx(void);
WEAK_DEFAULT void isr_i2s0_rx(void);
WEAK_DEFAULT void isr_can1_ored_msg_buffer(void);
WEAK_DEFAULT void isr_can1_bus_off(void);
WEAK_DEFAULT void isr_can1_error(void);
WEAK_DEFAULT void isr_can1_tx_warn(void);
WEAK_DEFAULT void isr_can1_rx_warn(void);
WEAK_DEFAULT void isr_can1_wake_up(void);
/* void dummy_handler(void); */
WEAK_DEFAULT void isr_uart0_lon(void);
WEAK_DEFAULT void isr_uart0_status(void);
WEAK_DEFAULT void isr_uart0_error(void);
WEAK_DEFAULT void isr_uart1_status(void);
WEAK_DEFAULT void isr_uart1_error(void);
WEAK_DEFAULT void isr_uart2_status(void);
WEAK_DEFAULT void isr_uart2_error(void);
WEAK_DEFAULT void isr_uart3_status(void);
WEAK_DEFAULT void isr_uart3_error(void);
WEAK_DEFAULT void isr_uart4_status(void);
WEAK_DEFAULT void isr_uart4_error(void);
/* void dummy_handler(void); */
/* void dummy_handler(void); */
WEAK_DEFAULT void isr_adc0(void);
WEAK_DEFAULT void isr_adc1(void);
WEAK_DEFAULT void isr_cmp0(void);
WEAK_DEFAULT void isr_cmp1(void);
WEAK_DEFAULT void isr_cmp2(void);
WEAK_DEFAULT void isr_ftm0(void);
WEAK_DEFAULT void isr_ftm1(void);
WEAK_DEFAULT void isr_ftm2(void);
WEAK_DEFAULT void isr_cmt(void);
WEAK_DEFAULT void isr_rtc_alarm(void);
WEAK_DEFAULT void isr_rtc_seconds(void);
WEAK_DEFAULT void isr_pit0(void);
WEAK_DEFAULT void isr_pit1(void);
WEAK_DEFAULT void isr_pit2(void);
WEAK_DEFAULT void isr_pit3(void);
WEAK_DEFAULT void isr_pdb(void);
WEAK_DEFAULT void isr_usb_otg(void);
WEAK_DEFAULT void isr_usb_charger_detect(void);
WEAK_DEFAULT void isr_enet_1588_timer(void);
WEAK_DEFAULT void isr_enet_tx(void);
WEAK_DEFAULT void isr_enet_rx(void);
WEAK_DEFAULT void isr_enet_error_misc(void);
/* void dummy_handler(void); */
WEAK_DEFAULT void isr_sdhc(void);
WEAK_DEFAULT void isr_dac0(void);
/* void dummy_handler(void); */
WEAK_DEFAULT void isr_tsi(void);
WEAK_DEFAULT void isr_mcg(void);
WEAK_DEFAULT void isr_lptmr0(void);
/* void dummy_handler(void); */
WEAK_DEFAULT void isr_porta_pin_detect(void);
WEAK_DEFAULT void isr_portb_pin_detect(void);
WEAK_DEFAULT void isr_portc_pin_detect(void);
WEAK_DEFAULT void isr_portd_pin_detect(void);
WEAK_DEFAULT void isr_porte_pin_detect(void);
/* void dummy_handler(void); */
/* void dummy_handler(void); */
WEAK_DEFAULT void isr_software(void);
/**
* @brief Interrupt vector definition
*/
__attribute__((section(".vector_table")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void *)(&_estack), /* pointer to the top of the empty stack */
/* Cortex-M4 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* K60 specific peripheral handlers */
(void*) isr_dma0_complete,
(void*) isr_dma1_complete,
(void*) isr_dma2_complete,
(void*) isr_dma3_complete,
(void*) isr_dma4_complete,
(void*) isr_dma5_complete,
(void*) isr_dma6_complete,
(void*) isr_dma7_complete,
(void*) isr_dma8_complete,
(void*) isr_dma9_complete,
(void*) isr_dma10_complete,
(void*) isr_dma11_complete,
(void*) isr_dma12_complete,
(void*) isr_dma13_complete,
(void*) isr_dma14_complete,
(void*) isr_dma15_complete,
(void*) isr_dma_error,
(void*) isr_mcm,
(void*) isr_flash_command_complete,
(void*) isr_flash_read_collision,
(void*) isr_low_voltage,
(void*) isr_llwu,
(void*) isr_watchdog,
(void*) isr_random_number_generator,
(void*) isr_i2c0,
(void*) isr_i2c1,
(void*) isr_spi0,
(void*) isr_spi1,
(void*) isr_spi2,
(void*) isr_can0_ored_msg_buffer,
(void*) isr_can0_bus_off,
(void*) isr_can0_error,
(void*) isr_can0_tx_warn,
(void*) isr_can0_rx_warn,
(void*) isr_can0_wake_up,
(void*) isr_i2s0_tx,
(void*) isr_i2s0_rx,
(void*) isr_can1_ored_msg_buffer,
(void*) isr_can1_bus_off,
(void*) isr_can1_error,
(void*) isr_can1_tx_warn,
(void*) isr_can1_rx_warn,
(void*) isr_can1_wake_up,
(void*) dummy_handler,
(void*) isr_uart0_lon,
(void*) isr_uart0_status,
(void*) isr_uart0_error,
(void*) isr_uart1_status,
(void*) isr_uart1_error,
(void*) isr_uart2_status,
(void*) isr_uart2_error,
(void*) isr_uart3_status,
(void*) isr_uart3_error,
(void*) isr_uart4_status,
(void*) isr_uart4_error,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) isr_adc0,
(void*) isr_adc1,
(void*) isr_cmp0,
(void*) isr_cmp1,
(void*) isr_cmp2,
(void*) isr_ftm0,
(void*) isr_ftm1,
(void*) isr_ftm2,
(void*) isr_cmt,
(void*) isr_rtc_alarm,
(void*) isr_rtc_seconds,
(void*) isr_pit0,
(void*) isr_pit1,
(void*) isr_pit2,
(void*) isr_pit3,
(void*) isr_pdb,
(void*) isr_usb_otg,
(void*) isr_usb_charger_detect,
(void*) isr_enet_1588_timer,
(void*) isr_enet_tx,
(void*) isr_enet_rx,
(void*) isr_enet_error_misc,
(void*) dummy_handler,
(void*) isr_sdhc,
(void*) isr_dac0,
(void*) dummy_handler,
(void*) isr_tsi,
(void*) isr_mcg,
(void*) isr_lptmr0,
(void*) dummy_handler,
(void*) isr_porta_pin_detect,
(void*) isr_portb_pin_detect,
(void*) isr_portc_pin_detect,
(void*) isr_portd_pin_detect,
(void*) isr_porte_pin_detect,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) isr_software, /* Vector 110 */
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler,
(void*) dummy_handler /* vector 255 */
};
/** @} */

7
cpu/kinetis_common/Makefile.include
View File

@ -4,11 +4,8 @@ export INCLUDES += -I$(RIOTCPU)/kinetis_common/include
# Add search path for linker scripts
export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
# add the CPU specific startup code for the linker
export UNDEF += $(BINDIR)kinetis_common/startup.o
# add the CPU specific fault handlers for the linker
export UNDEF += $(BINDIR)kinetis_common/fault_handlers.o
# add the CPU specific code for the linker
export UNDEF += $(BINDIR)kinetis_common/fcfield.o
# Define a recipe to build the watchdog disable binary, used when flashing
$(RIOTCPU)/kinetis_common/dist/wdog-disable.bin: $(RIOTCPU)/kinetis_common/dist/wdog-disable.s

61
cpu/kinetis_common/fault_handlers.c
View File

@ -1,61 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kinetis_common_fhandlers
* @{
*
* @file
* @brief Fault Handlers for Freescale Kinetis MCUs
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
*
* @}
*/
#include <stdint.h>
#include "cpu.h"
#include "panic.h"
#include "fault_handlers.h"
void isr_nmi(void)
{
core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
void isr_mem_manage(void)
{
core_panic(PANIC_MEM_MANAGE, "MEM MANAGE HANDLER");
}
void isr_bus_fault(void)
{
core_panic(PANIC_BUS_FAULT, "BUS FAULT");
}
void isr_usage_fault(void)
{
core_panic(PANIC_USAGE_FAULT, "ISR USAGE FAULT");
}
void isr_debug_mon(void)
{
core_panic(PANIC_DEBUG_MON, "DEBUG MON HANDLER");
}
void isr_unhandled(void)
{
core_panic(PANIC_DUMMY_HANDLER, "UNHANDLED ISR");
}

44
cpu/kinetis_common/fcfield.c Normal file
View File

@ -0,0 +1,44 @@
/*
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
* Copyright (C) 2015 Eistec AB
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kinetis_common
* @{
*
* @file
* @brief Default FCF code for Freescale Kinetis MCUs
*
* @author Johann Fischer <j.fischer@phytec.de>
* @author Joakim Gebart <joakim.gebart@eistec.se>
*
* @}
*/
#include <stdint.h>
/* fcfield table */
__attribute__((weak, section(".fcfield")))
const uint8_t flash_configuration_field[] = {
0xff, /* backdoor comparison key 3., offset: 0x0 */
0xff, /* backdoor comparison key 2., offset: 0x1 */
0xff, /* backdoor comparison key 1., offset: 0x2 */
0xff, /* backdoor comparison key 0., offset: 0x3 */
0xff, /* backdoor comparison key 7., offset: 0x4 */
0xff, /* backdoor comparison key 6., offset: 0x5 */
0xff, /* backdoor comparison key 5., offset: 0x6 */
0xff, /* backdoor comparison key 4., offset: 0x7 */
0xff, /* non-volatile p-flash protection 1 - low register, offset: 0x8 */
0xff, /* non-volatile p-flash protection 1 - high register, offset: 0x9 */
0xff, /* non-volatile p-flash protection 0 - low register, offset: 0xa */
0xff, /* non-volatile p-flash protection 0 - high register, offset: 0xb */
0xfe, /* non-volatile flash security register, offset: 0xc */
0xff, /* non-volatile flash option register, offset: 0xd */
0xff, /* non-volatile eeram protection register, offset: 0xe */
0xff, /* non-volatile d-flash protection register, offset: 0xf */
};

71
cpu/kinetis_common/include/fault_handlers.h
View File

@ -1,71 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @defgroup cpu_kinetis_common_fhandlers Kinetis Fault Handlers
* @ingroup cpu_kinetis_common
* @brief Fault Handlers for Freescale Kinetis MCUs.
*
* @{
* @file
* @brief Interface definition for the Kinetis Fault Handlers.
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
*/
#ifndef FAULT_HANDLERS_H
#define FAULT_HANDLERS_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Non Maskable Interrupt
*/
void isr_nmi(void);
/**
* @brief HardFault
*/
void isr_hard_fault(void);
/**
* @brief MemManage
*/
void isr_mem_manage(void);
/**
* @brief BusFault
*/
void isr_bus_fault(void);
/**
* @brief UsageFault
*/
void isr_usage_fault(void);
/**
* @brief Debug Interrupt
*/
void isr_debug_mon(void);
/**
* @brief Default handler, called in case no interrupt handler was defined.
*/
void isr_unhandled(void);
#ifdef __cplusplus
}
#endif
#endif /* FAULT_HANDLERS_H */
/** @} */

129
cpu/kinetis_common/startup.c
View File

@ -1,129 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
* Copyright (C) 2015 Eistec AB
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kinetis_common
* @{
*
* @file
* @brief Startup code for Freescale Kinetis MCUs
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
* @author Joakim Gebart <joakim.gebart@eistec.se>
*
* @}
*/
#include <stdint.h>
#include "cpu_conf.h"
#include "wdog.h"
/**
* @name Memory markers as defined in the linker script
* @{
*/
extern uint32_t _sfixed[];
extern uint32_t _efixed[];
extern uint32_t _etext[];
extern uint32_t _srelocate[];
extern uint32_t _erelocate[];
extern uint32_t _szero[];
extern uint32_t _ezero[];
extern uint32_t _sstack[];
extern uint32_t _ramcode_start[];
extern uint32_t _ramcode_end[];
extern uint32_t _ramcode_load[];
extern uint32_t _vector_ram_start[];
extern uint32_t _vector_ram_end[];
extern uint32_t _vector_rom[];
/** @} */
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 0. disable the Watchdog Timer
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = _etext;
/* disable the WDOG */
wdog_disable();
/* load .data section from flash to ram */
for (dst = _srelocate; dst < _erelocate;) {
*(dst++) = *(src++);
}
/* default .bss section to zero */
for (dst = _szero; dst < _ezero;) {
*(dst++) = 0;
}
/* copy .ramcode from flash to RAM */
src = _ramcode_load;
for (dst = _ramcode_start; dst < _ramcode_end;) {
*(dst++) = *(src++);
}
/*
* Copy ISR vector from flash to RAM.
*
* To use this CPU feature, define RAMVECT_SIZE=0x400 when building and write
* the new vector table address in RAM to SCB->VTOR.
*/
src = _vector_rom;
for (dst = _vector_ram_start; dst < _vector_ram_end;) {
*(dst++) = *(src++);
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/* fcfield table */
__attribute__((weak, section(".fcfield")))
const uint8_t flash_configuration_field[] = {
0xff, /* backdoor comparison key 3., offset: 0x0 */
0xff, /* backdoor comparison key 2., offset: 0x1 */
0xff, /* backdoor comparison key 1., offset: 0x2 */
0xff, /* backdoor comparison key 0., offset: 0x3 */
0xff, /* backdoor comparison key 7., offset: 0x4 */
0xff, /* backdoor comparison key 6., offset: 0x5 */
0xff, /* backdoor comparison key 5., offset: 0x6 */
0xff, /* backdoor comparison key 4., offset: 0x7 */
0xff, /* non-volatile p-flash protection 1 - low register, offset: 0x8 */
0xff, /* non-volatile p-flash protection 1 - high register, offset: 0x9 */
0xff, /* non-volatile p-flash protection 0 - low register, offset: 0xa */
0xff, /* non-volatile p-flash protection 0 - high register, offset: 0xb */
0xfe, /* non-volatile flash security register, offset: 0xc */
0xff, /* non-volatile flash option register, offset: 0xd */
0xff, /* non-volatile eeram protection register, offset: 0xe */
0xff, /* non-volatile d-flash protection register, offset: 0xf */
};

2
cpu/kw2x/Makefile.include
View File

@ -23,6 +23,6 @@ export CFLAGS += -DCPU_ARCH_$(ARCH)
export COMMON_STARTUP = $(KINETIS_COMMON)
# add the CPU specific system calls implementations for the linker
export UNDEF += $(BINDIR)cpu/interrupt-vector.o
export UNDEF += $(BINDIR)cpu/vector.o
include $(RIOTCPU)/Makefile.include.cortexm_common

176
cpu/kw2x/interrupt-vector.c → cpu/kw2x/vector.c
View File

@ -1,6 +1,6 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
@ -21,89 +21,91 @@
*/
#include <stdint.h>
#include "cpu_conf.h"
#include "fault_handlers.h"
#include "vectors_cortexm.h"
#include "wdog.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _estack;
extern void reset_handler(void);
void pre_startup (void)
{
/* disable the WDOG */
wdog_disable();
}
void dummy_handler(void)
{
isr_unhandled();
dummy_handler_default();
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__((weak, alias("dummy_handler")));
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* MKW22D512 specific interrupt vector */
void isr_dma0(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma1(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma2(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma3(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma4(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma5(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma6(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma7(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma8(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma9(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma10(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma11(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma12(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma13(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma14(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma15(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma_error(void) __attribute__((weak, alias("dummy_handler")));
void isr_mcm(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftfl(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftfl_collision(void) __attribute__((weak, alias("dummy_handler")));
void isr_pmc(void) __attribute__((weak, alias("dummy_handler")));
void isr_llwu(void) __attribute__((weak, alias("dummy_handler")));
void isr_wdog_ewm(void) __attribute__((weak, alias("dummy_handler")));
void isr_rng(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2c0(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2c1(void) __attribute__((weak, alias("dummy_handler")));
void isr_spi0(void) __attribute__((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2s0_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2s0_rx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart0_rx_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart0_err(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart1_rx_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart1_err(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart2_rx_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart2_err(void) __attribute__((weak, alias("dummy_handler")));
void isr_adc0(void) __attribute__((weak, alias("dummy_handler")));
void isr_cmp0(void) __attribute__((weak, alias("dummy_handler")));
void isr_cmp1(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftm0(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftm1(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftm2(void) __attribute__((weak, alias("dummy_handler")));
void isr_cmt(void) __attribute__((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__((weak, alias("dummy_handler")));
void isr_rtc_seconds(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit0(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit1(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit2(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit3(void) __attribute__((weak, alias("dummy_handler")));
void isr_pdb0(void) __attribute__((weak, alias("dummy_handler")));
void isr_usb0(void) __attribute__((weak, alias("dummy_handler")));
void isr_usbdcd(void) __attribute__((weak, alias("dummy_handler")));
void isr_dac0(void) __attribute__((weak, alias("dummy_handler")));
void isr_mcg(void) __attribute__((weak, alias("dummy_handler")));
void isr_lptmr0(void) __attribute__((weak, alias("dummy_handler")));
void isr_porta(void) __attribute__((weak, alias("dummy_handler")));
void isr_portb(void) __attribute__((weak, alias("dummy_handler")));
void isr_portc(void) __attribute__((weak, alias("dummy_handler")));
void isr_portd(void) __attribute__((weak, alias("dummy_handler")));
void isr_porte(void) __attribute__((weak, alias("dummy_handler")));
void isr_swi(void) __attribute__((weak, alias("dummy_handler")));
WEAK_DEFAULT void isr_dma0(void);
WEAK_DEFAULT void isr_dma1(void);
WEAK_DEFAULT void isr_dma2(void);
WEAK_DEFAULT void isr_dma3(void);
WEAK_DEFAULT void isr_dma4(void);
WEAK_DEFAULT void isr_dma5(void);
WEAK_DEFAULT void isr_dma6(void);
WEAK_DEFAULT void isr_dma7(void);
WEAK_DEFAULT void isr_dma8(void);
WEAK_DEFAULT void isr_dma9(void);
WEAK_DEFAULT void isr_dma10(void);
WEAK_DEFAULT void isr_dma11(void);
WEAK_DEFAULT void isr_dma12(void);
WEAK_DEFAULT void isr_dma13(void);
WEAK_DEFAULT void isr_dma14(void);
WEAK_DEFAULT void isr_dma15(void);
WEAK_DEFAULT void isr_dma_error(void);
WEAK_DEFAULT void isr_mcm(void);
WEAK_DEFAULT void isr_ftfl(void);
WEAK_DEFAULT void isr_ftfl_collision(void);
WEAK_DEFAULT void isr_pmc(void);
WEAK_DEFAULT void isr_llwu(void);
WEAK_DEFAULT void isr_wdog_ewm(void);
WEAK_DEFAULT void isr_rng(void);
WEAK_DEFAULT void isr_i2c0(void);
WEAK_DEFAULT void isr_i2c1(void);
WEAK_DEFAULT void isr_spi0(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_i2s0_tx(void);
WEAK_DEFAULT void isr_i2s0_rx(void);
WEAK_DEFAULT void isr_uart0_rx_tx(void);
WEAK_DEFAULT void isr_uart0_err(void);
WEAK_DEFAULT void isr_uart1_rx_tx(void);
WEAK_DEFAULT void isr_uart1_err(void);
WEAK_DEFAULT void isr_uart2_rx_tx(void);
WEAK_DEFAULT void isr_uart2_err(void);
WEAK_DEFAULT void isr_adc0(void);
WEAK_DEFAULT void isr_cmp0(void);
WEAK_DEFAULT void isr_cmp1(void);
WEAK_DEFAULT void isr_ftm0(void);
WEAK_DEFAULT void isr_ftm1(void);
WEAK_DEFAULT void isr_ftm2(void);
WEAK_DEFAULT void isr_cmt(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_rtc_seconds(void);
WEAK_DEFAULT void isr_pit0(void);
WEAK_DEFAULT void isr_pit1(void);
WEAK_DEFAULT void isr_pit2(void);
WEAK_DEFAULT void isr_pit3(void);
WEAK_DEFAULT void isr_pdb0(void);
WEAK_DEFAULT void isr_usb0(void);
WEAK_DEFAULT void isr_usbdcd(void);
WEAK_DEFAULT void isr_dac0(void);
WEAK_DEFAULT void isr_mcg(void);
WEAK_DEFAULT void isr_lptmr0(void);
WEAK_DEFAULT void isr_porta(void);
WEAK_DEFAULT void isr_portb(void);
WEAK_DEFAULT void isr_portc(void);
WEAK_DEFAULT void isr_portd(void);
WEAK_DEFAULT void isr_porte(void);
WEAK_DEFAULT void isr_swi(void);
/* interrupt vector table */
__attribute__((section(".vector_table")))
@ -111,21 +113,23 @@ const void *interrupt_vector[] = {
/* Stack pointer */
(void *)(&_estack), /* pointer to the top of the empty stack */
/* Cortex-M4 handlers */
(void *) reset_handler, /* entry point of the program */
(void *) isr_nmi, /* non maskable interrupt handler */
(void *) isr_hard_fault, /* if you end up here its not good */
(void *) isr_mem_manage, /* memory controller interrupt */
(void *) isr_bus_fault, /* also not good to end up here */
(void *) isr_usage_fault, /* autsch */
(void *)(0UL), /* Reserved */
(void *)(0UL), /* Reserved */
(void *)(0UL), /* Reserved */
(void *)(0UL), /* Reserved */
(void *) isr_svc, /* system call interrupt */
(void *) isr_debug_mon, /* debug interrupt */
(void *)(0UL), /* Reserved */
(void *) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void *) isr_systick, /* SysTick interrupt, not used in RIOT */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* MKW22D512 specific peripheral handlers */
(void *) isr_dma0, /* DMA channel 0 transfer complete */
(void *) isr_dma1, /* DMA channel 1 transfer complete */

215
cpu/lpc1768/startup.c
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@ -1,215 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_lpc1768
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdio.h>
#include <stdint.h>
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
while (1) {asm ("nop");}
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
puts("##### HARD FAULT #####");
while (1) {asm ("nop");}
}
void isr_bus_fault(void)
{
puts("##### BUS FAULT #####");
while (1) {asm ("nop");}
}
void isr_usage_fault(void)
{
puts("##### USAGE FAULT #####");
while (1) {asm ("nop");}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* LPC1768 specific interrupt vector */
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pwm1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ssp0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ssp1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pll0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eint0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eint1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eint2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eint3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_bod(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2s(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_enet(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rit(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_mcpwm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_qei(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pll1(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* called on memory fault */
(void*) isr_bus_fault, /* called on bus fault */
(void*) isr_usage_fault, /* callee on usage fault */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug monitor interrupt */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* LPC specific peripheral handlers */
(void*) isr_wdt, /* watchdog timer */
(void*) isr_timer0, /* timer0 */
(void*) isr_timer1, /* timer1 */
(void*) isr_timer2, /* timer2 */
(void*) isr_timer3, /* timer3 */
(void*) isr_uart0, /* uart0 */
(void*) isr_uart1, /* uart1 */
(void*) isr_uart2, /* uart2 */
(void*) isr_uart3, /* uart3 */
(void*) isr_pwm1, /* pwm1 */
(void*) isr_i2c0, /* i2c0 */
(void*) isr_i2c1, /* i2c1 */
(void*) isr_i2c2, /* i2c2 */
(void*) isr_spi, /* spi */
(void*) isr_ssp0, /* ssp0 */
(void*) isr_ssp1, /* ssp1 */
(void*) isr_pll0, /* pll0 (main pll) */
(void*) isr_rtc, /* real time clock */
(void*) isr_eint0, /* external interrupt 0 */
(void*) isr_eint1, /* external interrupt 1 */
(void*) isr_eint2, /* external interrupt 2 */
(void*) isr_eint3, /* external interrupt 3 */
(void*) isr_adc, /* a/d converter */
(void*) isr_bod, /* brown out detect */
(void*) isr_usb, /* usb */
(void*) isr_can, /* can */
(void*) isr_dma, /* gp dma */
(void*) isr_i2s, /* i2s */
(void*) isr_enet, /* ethernet */
(void*) isr_rit, /* repetitive interrupt timer */
(void*) isr_mcpwm, /* motor control pwm */
(void*) isr_qei, /* quadrature encoder interface */
(void*) isr_pll1, /* pll1 (usb pll) */
};

129
cpu/lpc1768/vectors.c Normal file
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@ -0,0 +1,129 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_lpc1768
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* LPC1768 specific interrupt vector */
WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_timer0(void);
WEAK_DEFAULT void isr_timer1(void);
WEAK_DEFAULT void isr_timer2(void);
WEAK_DEFAULT void isr_timer3(void);
WEAK_DEFAULT void isr_uart0(void);
WEAK_DEFAULT void isr_uart1(void);
WEAK_DEFAULT void isr_uart2(void);
WEAK_DEFAULT void isr_uart3(void);
WEAK_DEFAULT void isr_pwm1(void);
WEAK_DEFAULT void isr_i2c0(void);
WEAK_DEFAULT void isr_i2c1(void);
WEAK_DEFAULT void isr_i2c2(void);
WEAK_DEFAULT void isr_spi(void);
WEAK_DEFAULT void isr_ssp0(void);
WEAK_DEFAULT void isr_ssp1(void);
WEAK_DEFAULT void isr_pll0(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_eint0(void);
WEAK_DEFAULT void isr_eint1(void);
WEAK_DEFAULT void isr_eint2(void);
WEAK_DEFAULT void isr_eint3(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_bod(void);
WEAK_DEFAULT void isr_usb(void);
WEAK_DEFAULT void isr_can(void);
WEAK_DEFAULT void isr_dma(void);
WEAK_DEFAULT void isr_i2s(void);
WEAK_DEFAULT void isr_enet(void);
WEAK_DEFAULT void isr_rit(void);
WEAK_DEFAULT void isr_mcpwm(void);
WEAK_DEFAULT void isr_qei(void);
WEAK_DEFAULT void isr_pll1(void);
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M3 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* LPC specific peripheral handlers */
(void*) isr_wdt, /* watchdog timer */
(void*) isr_timer0, /* timer0 */
(void*) isr_timer1, /* timer1 */
(void*) isr_timer2, /* timer2 */
(void*) isr_timer3, /* timer3 */
(void*) isr_uart0, /* uart0 */
(void*) isr_uart1, /* uart1 */
(void*) isr_uart2, /* uart2 */
(void*) isr_uart3, /* uart3 */
(void*) isr_pwm1, /* pwm1 */
(void*) isr_i2c0, /* i2c0 */
(void*) isr_i2c1, /* i2c1 */
(void*) isr_i2c2, /* i2c2 */
(void*) isr_spi, /* spi */
(void*) isr_ssp0, /* ssp0 */
(void*) isr_ssp1, /* ssp1 */
(void*) isr_pll0, /* pll0 (main pll) */
(void*) isr_rtc, /* real time clock */
(void*) isr_eint0, /* external interrupt 0 */
(void*) isr_eint1, /* external interrupt 1 */
(void*) isr_eint2, /* external interrupt 2 */
(void*) isr_eint3, /* external interrupt 3 */
(void*) isr_adc, /* a/d converter */
(void*) isr_bod, /* brown out detect */
(void*) isr_usb, /* usb */
(void*) isr_can, /* can */
(void*) isr_dma, /* gp dma */
(void*) isr_i2s, /* i2s */
(void*) isr_enet, /* ethernet */
(void*) isr_rit, /* repetitive interrupt timer */
(void*) isr_mcpwm, /* motor control pwm */
(void*) isr_qei, /* quadrature encoder interface */
(void*) isr_pll1, /* pll1 (usb pll) */
};

191
cpu/nrf51822/startup.c
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@ -1,191 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "board.h"
#include "cpu.h"
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* make sure all RAM blocks are turned on
* -> see NRF51822 Product Anomaly Notice (PAN) #16 for more details
*/
NRF_POWER->RAMON = 0xf;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY ISR HANDLER");
}
void isr_nmi(void)
{
core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* nRF51822qfaa specific interrupt vector */
void isr_power_clock(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_radio(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi0_twi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1_twi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_gpiote(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_temp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rng(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ecb(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ccm_aar(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_qdec(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_lpcomp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi5(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* nRF51 specific peripheral handlers */
(void*) isr_power_clock, /* power_clock */
(void*) isr_radio, /* radio */
(void*) isr_uart0, /* uart0 */
(void*) isr_spi0_twi0, /* spi0_twi0 */
(void*) isr_spi1_twi1, /* spi1_twi1 */
(void*) (0UL), /* reserved */
(void*) isr_gpiote, /* gpiote */
(void*) isr_adc, /* adc */
(void*) isr_timer0, /* timer0 */
(void*) isr_timer1, /* timer1 */
(void*) isr_timer2, /* timer2 */
(void*) isr_rtc0, /* rtc0 */
(void*) isr_temp, /* temp */
(void*) isr_rng, /* rng */
(void*) isr_ecb, /* ecb */
(void*) isr_ccm_aar, /* ccm_aar */
(void*) isr_wdt, /* wdt */
(void*) isr_rtc1, /* rtc1 */
(void*) isr_qdec, /* qdec */
(void*) isr_lpcomp, /* lpcomp */
(void*) isr_swi0, /* swi0 */
(void*) isr_swi1, /* swi1 */
(void*) isr_swi2, /* swi2 */
(void*) isr_swi3, /* swi3 */
(void*) isr_swi4, /* swi4 */
(void*) isr_swi5, /* swi5 */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
};

127
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@ -0,0 +1,127 @@
/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "cpu.h"
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
void pre_startup(void)
{
/* make sure all RAM blocks are turned on
* -> see NRF51822 Product Anomaly Notice (PAN) #16 for more details */
NRF_POWER->RAMON = 0xf;
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* nRF51822 specific interrupt vectors */
WEAK_DEFAULT void isr_power_clock(void);
WEAK_DEFAULT void isr_radio(void);
WEAK_DEFAULT void isr_uart0(void);
WEAK_DEFAULT void isr_spi0_twi0(void);
WEAK_DEFAULT void isr_spi1_twi1(void);
WEAK_DEFAULT void isr_gpiote(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_timer0(void);
WEAK_DEFAULT void isr_timer1(void);
WEAK_DEFAULT void isr_timer2(void);
WEAK_DEFAULT void isr_rtc0(void);
WEAK_DEFAULT void isr_temp(void);
WEAK_DEFAULT void isr_rng(void);
WEAK_DEFAULT void isr_ecb(void);
WEAK_DEFAULT void isr_ccm_aar(void);
WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
WEAK_DEFAULT void isr_swi0(void);
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
WEAK_DEFAULT void isr_swi4(void);
WEAK_DEFAULT void isr_swi5(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M0 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* nRF51 specific peripheral handlers */
(void*) isr_power_clock, /* power_clock */
(void*) isr_radio, /* radio */
(void*) isr_uart0, /* uart0 */
(void*) isr_spi0_twi0, /* spi0_twi0 */
(void*) isr_spi1_twi1, /* spi1_twi1 */
(void*) (0UL), /* reserved */
(void*) isr_gpiote, /* gpiote */
(void*) isr_adc, /* adc */
(void*) isr_timer0, /* timer0 */
(void*) isr_timer1, /* timer1 */
(void*) isr_timer2, /* timer2 */
(void*) isr_rtc0, /* rtc0 */
(void*) isr_temp, /* temp */
(void*) isr_rng, /* rng */
(void*) isr_ecb, /* ecb */
(void*) isr_ccm_aar, /* ccm_aar */
(void*) isr_wdt, /* wdt */
(void*) isr_rtc1, /* rtc1 */
(void*) isr_qdec, /* qdec */
(void*) isr_lpcomp, /* lpcomp */
(void*) isr_swi0, /* swi0 */
(void*) isr_swi1, /* swi1 */
(void*) isr_swi2, /* swi2 */
(void*) isr_swi3, /* swi3 */
(void*) isr_swi4, /* swi4 */
(void*) isr_swi5, /* swi5 */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
};

232
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@ -1,232 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_sam3x8e
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
void isr_bus_fault(void)
{
core_panic(PANIC_BUS_FAULT, "BUS FAULT");
}
void isr_usage_fault(void)
{
core_panic(PANIC_USAGE_FAULT, "USAGE FAULT");
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* SAM3X8E specific interrupt vector */
void isr_supc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rstc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pmc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_efc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_efc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_smc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pioa(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_piob(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pioc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_piod(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_hsmci(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_twi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_twi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ssc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc8(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pwm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dacc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dmac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uotghs(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_trng(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_emac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* SAM3X8E specific peripheral handlers */
(void*) isr_supc, /* 0 supply controller */
(void*) isr_rstc, /* 1 reset controller */
(void*) isr_rtc, /* 2 real time clock */
(void*) isr_rtt, /* 3 real timer timer */
(void*) isr_wdt, /* 4 watchdog timer */
(void*) isr_pmc, /* 5 power management controller */
(void*) isr_efc0, /* 6 enhanced flash controller 0 */
(void*) isr_efc1, /* 7 enhanced flash controller 1 */
(void*) isr_uart, /* 8 universal asynchronous receiver transceiver */
(void*) isr_smc, /* 9 static memory controller */
(void*) (0UL),
(void*) isr_pioa, /* 11 GPIO port A */
(void*) isr_piob, /* 12 GPIO port B */
(void*) isr_pioc, /* 13 GPIO port C */
(void*) isr_piod, /* 14 GPIO port D */
(void*) (0UL),
(void*) (0UL),
(void*) isr_usart0, /* 17 USART0 */
(void*) isr_usart1, /* 18 USART1 */
(void*) isr_usart2, /* 19 USART2 */
(void*) isr_usart3, /* 20 USART3 */
(void*) isr_hsmci, /* 21 multimedia card interface */
(void*) isr_twi0, /* 22 two-wire interface 0 */
(void*) isr_twi1, /* 23 two-wire interface 1 */
(void*) isr_spi0, /* 24 serial peripheral interface */
(void*) (0UL),
(void*) isr_ssc, /* 26 synchronous serial controller */
(void*) isr_tc0, /* 27 timer counter 0 */
(void*) isr_tc1, /* 28 timer counter 1 */
(void*) isr_tc2, /* 29 timer counter 2 */
(void*) isr_tc3, /* 30 timer counter 3 */
(void*) isr_tc4, /* 31 timer counter 4 */
(void*) isr_tc5, /* 32 timer counter 5 */
(void*) isr_tc6, /* 33 timer counter 6 */
(void*) isr_tc7, /* 34 timer counter 7 */
(void*) isr_tc8, /* 35 timer counter 8 */
(void*) isr_pwm, /* 36 pulse width modulation controller */
(void*) isr_adc, /* 37 ADC controller */
(void*) isr_dacc, /* 38 DAC controller */
(void*) isr_dmac, /* 39 DMA controller */
(void*) isr_uotghs, /* 40 USB OTG high speed */
(void*) isr_trng, /* 41 true random number generator */
(void*) isr_emac, /* 42 Ethernet MAC*/
(void*) isr_can0, /* 43 CAN controller 0*/
(void*) isr_can1, /* 44 CAN controller 1*/
};

148
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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_sam3x8e
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* SAM3X8E specific interrupt vector */
WEAK_DEFAULT void isr_supc(void);
WEAK_DEFAULT void isr_rstc(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_rtt(void);
WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_pmc(void);
WEAK_DEFAULT void isr_efc0(void);
WEAK_DEFAULT void isr_efc1(void);
WEAK_DEFAULT void isr_uart(void);
WEAK_DEFAULT void isr_smc(void);
WEAK_DEFAULT void isr_pioa(void);
WEAK_DEFAULT void isr_piob(void);
WEAK_DEFAULT void isr_pioc(void);
WEAK_DEFAULT void isr_piod(void);
WEAK_DEFAULT void isr_usart0(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3(void);
WEAK_DEFAULT void isr_hsmci(void);
WEAK_DEFAULT void isr_twi0(void);
WEAK_DEFAULT void isr_twi1(void);
WEAK_DEFAULT void isr_spi0(void);
WEAK_DEFAULT void isr_ssc(void);
WEAK_DEFAULT void isr_tc0(void);
WEAK_DEFAULT void isr_tc1(void);
WEAK_DEFAULT void isr_tc2(void);
WEAK_DEFAULT void isr_tc3(void);
WEAK_DEFAULT void isr_tc4(void);
WEAK_DEFAULT void isr_tc5(void);
WEAK_DEFAULT void isr_tc6(void);
WEAK_DEFAULT void isr_tc7(void);
WEAK_DEFAULT void isr_tc8(void);
WEAK_DEFAULT void isr_pwm(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_dacc(void);
WEAK_DEFAULT void isr_dmac(void);
WEAK_DEFAULT void isr_uotghs(void);
WEAK_DEFAULT void isr_trng(void);
WEAK_DEFAULT void isr_emac(void);
WEAK_DEFAULT void isr_can0(void);
WEAK_DEFAULT void isr_can1(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M3 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* SAM3X8E specific peripheral handlers */
(void*) isr_supc, /* 0 supply controller */
(void*) isr_rstc, /* 1 reset controller */
(void*) isr_rtc, /* 2 real time clock */
(void*) isr_rtt, /* 3 real timer timer */
(void*) isr_wdt, /* 4 watchdog timer */
(void*) isr_pmc, /* 5 power management controller */
(void*) isr_efc0, /* 6 enhanced flash controller 0 */
(void*) isr_efc1, /* 7 enhanced flash controller 1 */
(void*) isr_uart, /* 8 universal asynchronous receiver transceiver */
(void*) isr_smc, /* 9 static memory controller */
(void*) (0UL),
(void*) isr_pioa, /* 11 GPIO port A */
(void*) isr_piob, /* 12 GPIO port B */
(void*) isr_pioc, /* 13 GPIO port C */
(void*) isr_piod, /* 14 GPIO port D */
(void*) (0UL),
(void*) (0UL),
(void*) isr_usart0, /* 17 USART0 */
(void*) isr_usart1, /* 18 USART1 */
(void*) isr_usart2, /* 19 USART2 */
(void*) isr_usart3, /* 20 USART3 */
(void*) isr_hsmci, /* 21 multimedia card interface */
(void*) isr_twi0, /* 22 two-wire interface 0 */
(void*) isr_twi1, /* 23 two-wire interface 1 */
(void*) isr_spi0, /* 24 serial peripheral interface */
(void*) (0UL),
(void*) isr_ssc, /* 26 synchronous serial controller */
(void*) isr_tc0, /* 27 timer counter 0 */
(void*) isr_tc1, /* 28 timer counter 1 */
(void*) isr_tc2, /* 29 timer counter 2 */
(void*) isr_tc3, /* 30 timer counter 3 */
(void*) isr_tc4, /* 31 timer counter 4 */
(void*) isr_tc5, /* 32 timer counter 5 */
(void*) isr_tc6, /* 33 timer counter 6 */
(void*) isr_tc7, /* 34 timer counter 7 */
(void*) isr_tc8, /* 35 timer counter 8 */
(void*) isr_pwm, /* 36 pulse width modulation controller */
(void*) isr_adc, /* 37 ADC controller */
(void*) isr_dacc, /* 38 DAC controller */
(void*) isr_dmac, /* 39 DMA controller */
(void*) isr_uotghs, /* 40 USB OTG high speed */
(void*) isr_trng, /* 41 true random number generator */
(void*) isr_emac, /* 42 Ethernet MAC*/
(void*) isr_can0, /* 43 CAN controller 0*/
(void*) isr_can1, /* 44 CAN controller 1*/
};

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cpu/samd21/startup.c
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_samd21
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
while (1) {asm ("nop");}
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
while (1) {asm ("nop");}
}
void isr_bus_fault(void)
{
while (1) {asm ("nop");}
}
void isr_usage_fault(void)
{
while (1) {asm ("nop");}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* SAMR21 specific interrupt vector */
void isr_pm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sysctrl(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eic(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_nvmctrl(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dmac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_evsys(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tcc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tcc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tcc2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ptc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* Atmel specific peripheral handlers */
(void*) isr_pm, /* 0 Power Manager */
(void*) isr_sysctrl, /* 1 System Control */
(void*) isr_wdt, /* 2 Watchdog Timer */
(void*) isr_rtc, /* 3 Real-Time Counter */
(void*) isr_eic, /* 4 External Interrupt Controller */
(void*) isr_nvmctrl, /* 5 Non-Volatile Memory Controller */
(void*) isr_dmac, /* 6 Direct Memory Access Controller */
(void*) isr_usb, /* 7 Universal Serial Bus */
(void*) isr_evsys, /* 8 Event System Interface */
(void*) isr_sercom0, /* 9 Serial Communication Interface 0 */
(void*) isr_sercom1, /* 10 Serial Communication Interface 1 */
(void*) isr_sercom2, /* 11 Serial Communication Interface 2 */
(void*) isr_sercom3, /* 12 Serial Communication Interface 3 */
(void*) isr_sercom4, /* 13 Serial Communication Interface 4 */
(void*) isr_sercom5, /* 14 Serial Communication Interface 5 */
(void*) isr_tcc0, /* 15 Timer Counter Control 0 */
(void*) isr_tcc1, /* 16 Timer Counter Control 1 */
(void*) isr_tcc2, /* 17 Timer Counter Control 2 */
(void*) isr_tc3, /* 18 Basic Timer Counter 0 */
(void*) isr_tc4, /* 19 Basic Timer Counter 1 */
(void*) isr_tc5, /* 20 Basic Timer Counter 2 */
(void*) isr_tc6, /* 21 Basic Timer Counter 3 */
(void*) isr_tc7, /* 22 Basic Timer Counter 4 */
(void*) isr_adc, /* 23 Analog Digital Converter */
(void*) isr_ac, /* 24 Analog Comparators */
(void*) isr_dac, /* 25 Digital Analog Converter */
(void*) isr_ptc, /* 26 Peripheral Touch Controller */
(void*) isr_i2c /* 27 Inter-IC Sound Interface */
};

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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_samd21
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* SAMR21 specific interrupt vector */
WEAK_DEFAULT void isr_pm(void);
WEAK_DEFAULT void isr_sysctrl(void);
WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_eic(void);
WEAK_DEFAULT void isr_nvmctrl(void);
WEAK_DEFAULT void isr_dmac(void);
WEAK_DEFAULT void isr_usb(void);
WEAK_DEFAULT void isr_evsys(void);
WEAK_DEFAULT void isr_sercom0(void);
WEAK_DEFAULT void isr_sercom1(void);
WEAK_DEFAULT void isr_sercom2(void);
WEAK_DEFAULT void isr_sercom3(void);
WEAK_DEFAULT void isr_sercom4(void);
WEAK_DEFAULT void isr_sercom5(void);
WEAK_DEFAULT void isr_tcc0(void);
WEAK_DEFAULT void isr_tcc1(void);
WEAK_DEFAULT void isr_tcc2(void);
WEAK_DEFAULT void isr_tc3(void);
WEAK_DEFAULT void isr_tc4(void);
WEAK_DEFAULT void isr_tc5(void);
WEAK_DEFAULT void isr_tc6(void);
WEAK_DEFAULT void isr_tc7(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_ac(void);
WEAK_DEFAULT void isr_dac(void);
WEAK_DEFAULT void isr_ptc(void);
WEAK_DEFAULT void isr_i2c(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M0+ handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* Atmel specific peripheral handlers */
(void*) isr_pm, /* 0 Power Manager */
(void*) isr_sysctrl, /* 1 System Control */
(void*) isr_wdt, /* 2 Watchdog Timer */
(void*) isr_rtc, /* 3 Real-Time Counter */
(void*) isr_eic, /* 4 External Interrupt Controller */
(void*) isr_nvmctrl, /* 5 Non-Volatile Memory Controller */
(void*) isr_dmac, /* 6 Direct Memory Access Controller */
(void*) isr_usb, /* 7 Universal Serial Bus */
(void*) isr_evsys, /* 8 Event System Interface */
(void*) isr_sercom0, /* 9 Serial Communication Interface 0 */
(void*) isr_sercom1, /* 10 Serial Communication Interface 1 */
(void*) isr_sercom2, /* 11 Serial Communication Interface 2 */
(void*) isr_sercom3, /* 12 Serial Communication Interface 3 */
(void*) isr_sercom4, /* 13 Serial Communication Interface 4 */
(void*) isr_sercom5, /* 14 Serial Communication Interface 5 */
(void*) isr_tcc0, /* 15 Timer Counter Control 0 */
(void*) isr_tcc1, /* 16 Timer Counter Control 1 */
(void*) isr_tcc2, /* 17 Timer Counter Control 2 */
(void*) isr_tc3, /* 18 Basic Timer Counter 0 */
(void*) isr_tc4, /* 19 Basic Timer Counter 1 */
(void*) isr_tc5, /* 20 Basic Timer Counter 2 */
(void*) isr_tc6, /* 21 Basic Timer Counter 3 */
(void*) isr_tc7, /* 22 Basic Timer Counter 4 */
(void*) isr_adc, /* 23 Analog Digital Converter */
(void*) isr_ac, /* 24 Analog Comparators */
(void*) isr_dac, /* 25 Digital Analog Converter */
(void*) isr_ptc, /* 26 Peripheral Touch Controller */
(void*) isr_i2c /* 27 Inter-IC Sound Interface */
};

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/*
* Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
* 2015 FreshTemp, LLC.
* 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_saml21
* @{
*
* @file startup.c
* @brief Startup code and interrupt vector definition
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
void isr_nmi(void)
{
core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* SAML21 specific interrupt vector */
void isr_pm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eic(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_nvmctrl(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dmac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_evsys(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sercom5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tcc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tcc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tcc2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ptc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_aes(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_trng(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M0+ handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* Atmel SAML21 specific peripheral handlers */
(void*) isr_pm, /* 0 Power Manager */
(void*) isr_wdt, /* 1 Watchdog Timer */
(void*) isr_rtc, /* 2 Real-Time Counter */
(void*) isr_eic, /* 3 External Interrupt Controller */
(void*) isr_nvmctrl, /* 4 Non-Volatile Memory Controller */
(void*) isr_dmac, /* 5 Direct Memory Access Controller */
(void*) isr_usb, /* 6 Universal Serial Bus */
(void*) isr_evsys, /* 7 Event System Interface */
(void*) isr_sercom0, /* 8 Serial Communication Interface 0 */
(void*) isr_sercom1, /* 9 Serial Communication Interface 1 */
(void*) isr_sercom2, /* 10 Serial Communication Interface 2 */
(void*) isr_sercom3, /* 11 Serial Communication Interface 3 */
(void*) isr_sercom4, /* 12 Serial Communication Interface 4 */
(void*) isr_sercom5, /* 13 Serial Communication Interface 5 */
(void*) isr_tcc0, /* 14 Timer Counter Control 0 */
(void*) isr_tcc1, /* 15 Timer Counter Control 1 */
(void*) isr_tcc2, /* 16 Timer Counter Control 2 */
(void*) isr_tc0, /* 17 Basic Timer Counter 0 */
(void*) isr_tc1, /* 18 Basic Timer Counter 1 */
(void*) isr_tc2, /* 19 Basic Timer Counter 2 */
(void*) isr_tc3, /* 20 Basic Timer Counter 3 */
(void*) isr_tc4, /* 21 Basic Timer Counter 4 */
(void*) isr_adc, /* 22 Analog Digital Converter */
(void*) isr_ac, /* 23 Analog Comparators */
(void*) isr_dac, /* 24 Digital Analog Converter */
(void*) isr_ptc, /* 25 Peripheral Touch Controller */
(void*) isr_aes, /* 26 AES */
(void*) isr_trng, /* 27 TRNG True Random Number Generator */
};

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/*
* Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
* 2015 FreshTemp, LLC.
* 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_saml21
* @{
*
* @file startup.c
* @brief Startup code and interrupt vector definition
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* SAML21 specific interrupt vector */
WEAK_DEFAULT void isr_pm(void);
WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_eic(void);
WEAK_DEFAULT void isr_nvmctrl(void);
WEAK_DEFAULT void isr_dmac(void);
WEAK_DEFAULT void isr_usb(void);
WEAK_DEFAULT void isr_evsys(void);
WEAK_DEFAULT void isr_sercom0(void);
WEAK_DEFAULT void isr_sercom1(void);
WEAK_DEFAULT void isr_sercom2(void);
WEAK_DEFAULT void isr_sercom3(void);
WEAK_DEFAULT void isr_sercom4(void);
WEAK_DEFAULT void isr_sercom5(void);
WEAK_DEFAULT void isr_tcc0(void);
WEAK_DEFAULT void isr_tcc1(void);
WEAK_DEFAULT void isr_tcc2(void);
WEAK_DEFAULT void isr_tc0(void);
WEAK_DEFAULT void isr_tc1(void);
WEAK_DEFAULT void isr_tc2(void);
WEAK_DEFAULT void isr_tc3(void);
WEAK_DEFAULT void isr_tc4(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_ac(void);
WEAK_DEFAULT void isr_dac(void);
WEAK_DEFAULT void isr_ptc(void);
WEAK_DEFAULT void isr_aes(void);
WEAK_DEFAULT void isr_trng(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M0+ handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* Atmel SAML21 specific peripheral handlers */
(void*) isr_pm, /* 0 Power Manager */
(void*) isr_wdt, /* 1 Watchdog Timer */
(void*) isr_rtc, /* 2 Real-Time Counter */
(void*) isr_eic, /* 3 External Interrupt Controller */
(void*) isr_nvmctrl, /* 4 Non-Volatile Memory Controller */
(void*) isr_dmac, /* 5 Direct Memory Access Controller */
(void*) isr_usb, /* 6 Universal Serial Bus */
(void*) isr_evsys, /* 7 Event System Interface */
(void*) isr_sercom0, /* 8 Serial Communication Interface 0 */
(void*) isr_sercom1, /* 9 Serial Communication Interface 1 */
(void*) isr_sercom2, /* 10 Serial Communication Interface 2 */
(void*) isr_sercom3, /* 11 Serial Communication Interface 3 */
(void*) isr_sercom4, /* 12 Serial Communication Interface 4 */
(void*) isr_sercom5, /* 13 Serial Communication Interface 5 */
(void*) isr_tcc0, /* 14 Timer Counter Control 0 */
(void*) isr_tcc1, /* 15 Timer Counter Control 1 */
(void*) isr_tcc2, /* 16 Timer Counter Control 2 */
(void*) isr_tc0, /* 17 Basic Timer Counter 0 */
(void*) isr_tc1, /* 18 Basic Timer Counter 1 */
(void*) isr_tc2, /* 19 Basic Timer Counter 2 */
(void*) isr_tc3, /* 20 Basic Timer Counter 3 */
(void*) isr_tc4, /* 21 Basic Timer Counter 4 */
(void*) isr_adc, /* 22 Analog Digital Converter */
(void*) isr_ac, /* 23 Analog Comparators */
(void*) isr_dac, /* 24 Digital Analog Converter */
(void*) isr_ptc, /* 25 Peripheral Touch Controller */
(void*) isr_aes, /* 26 AES */
(void*) isr_trng, /* 27 TRNG True Random Number Generator */
};

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f0
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
{
core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* STM32F051R8 specific interrupt vector */
void isr_wwdg(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pvd(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rcc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti0_1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti2_3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti4_15(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ts(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch2_3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch4_5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc1_comp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_brk_up_trg_com(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim6_dac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim14(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim15(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim16(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim17(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3_8(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_cec(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg, /* windowed watchdog */
(void*) isr_pvd, /* power control */
(void*) isr_rtc, /* real time clock */
(void*) isr_flash, /* flash memory controller */
(void*) isr_rcc, /* reset and clock control */
(void*) isr_exti0_1, /* external interrupt lines 0 and 1 */
(void*) isr_exti2_3, /* external interrupt lines 2 and 3 */
(void*) isr_exti4_15, /* external interrupt lines 4 to 15 */
(void*) isr_ts, /* touch sensing input*/
(void*) isr_dma1_ch1, /* direct memory access controller 1, channel 1*/
(void*) isr_dma1_ch2_3, /* direct memory access controller 1, channel 2 and 3*/
(void*) isr_dma1_ch4_5, /* direct memory access controller 1, channel 4 and 5*/
(void*) isr_adc1_comp, /* analog digital converter */
(void*) isr_tim1_brk_up_trg_com, /* timer 1 break, update, trigger and communication */
(void*) isr_tim1_cc, /* timer 1 capture compare */
(void*) isr_tim2, /* timer 2 */
(void*) isr_tim3, /* timer 3 */
(void*) isr_tim6_dac, /* timer 6 and digital to analog converter */
(void*) isr_tim7, /* timer 7 */
(void*) isr_tim14, /* timer 14 */
(void*) isr_tim15, /* timer 15 */
(void*) isr_tim16, /* timer 16 */
(void*) isr_tim17, /* timer 17 */
(void*) isr_i2c1, /* I2C 1 */
(void*) isr_i2c2, /* I2C 2 */
(void*) isr_spi1, /* SPI 1 */
(void*) isr_spi2, /* SPI 2 */
(void*) isr_usart1, /* USART 1 */
(void*) isr_usart2, /* USART 2 */
(void*) isr_usart3_8, /* USART 3 to 8 */
(void*) isr_cec, /* consumer electronics control */
(void*) (0UL) /* reserved */
};

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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f0
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* STM32F0 specific interrupt vectors */
WEAK_DEFAULT void isr_wwdg(void);
WEAK_DEFAULT void isr_pvd(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_rcc(void);
WEAK_DEFAULT void isr_exti0_1(void);
WEAK_DEFAULT void isr_exti2_3(void);
WEAK_DEFAULT void isr_exti4_15(void);
WEAK_DEFAULT void isr_ts(void);
WEAK_DEFAULT void isr_dma1_ch1(void);
WEAK_DEFAULT void isr_dma1_ch2_3(void);
WEAK_DEFAULT void isr_dma1_ch4_5(void);
WEAK_DEFAULT void isr_adc1_comp(void);
WEAK_DEFAULT void isr_tim1_brk_up_trg_com(void);
WEAK_DEFAULT void isr_tim1_cc(void);
WEAK_DEFAULT void isr_tim2(void);
WEAK_DEFAULT void isr_tim3(void);
WEAK_DEFAULT void isr_tim6_dac(void);
WEAK_DEFAULT void isr_tim7(void);
WEAK_DEFAULT void isr_tim14(void);
WEAK_DEFAULT void isr_tim15(void);
WEAK_DEFAULT void isr_tim16(void);
WEAK_DEFAULT void isr_tim17(void);
WEAK_DEFAULT void isr_i2c1(void);
WEAK_DEFAULT void isr_i2c2(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3_8(void);
WEAK_DEFAULT void isr_cec(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M0 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg, /* windowed watchdog */
(void*) isr_pvd, /* power control */
(void*) isr_rtc, /* real time clock */
(void*) isr_flash, /* flash memory controller */
(void*) isr_rcc, /* reset and clock control */
(void*) isr_exti0_1, /* external interrupt lines 0 and 1 */
(void*) isr_exti2_3, /* external interrupt lines 2 and 3 */
(void*) isr_exti4_15, /* external interrupt lines 4 to 15 */
(void*) isr_ts, /* touch sensing input*/
(void*) isr_dma1_ch1, /* direct memory access controller 1, channel 1*/
(void*) isr_dma1_ch2_3, /* direct memory access controller 1, channel 2 and 3*/
(void*) isr_dma1_ch4_5, /* direct memory access controller 1, channel 4 and 5*/
(void*) isr_adc1_comp, /* analog digital converter */
(void*) isr_tim1_brk_up_trg_com, /* timer 1 break, update, trigger and communication */
(void*) isr_tim1_cc, /* timer 1 capture compare */
(void*) isr_tim2, /* timer 2 */
(void*) isr_tim3, /* timer 3 */
(void*) isr_tim6_dac, /* timer 6 and digital to analog converter */
(void*) isr_tim7, /* timer 7 */
(void*) isr_tim14, /* timer 14 */
(void*) isr_tim15, /* timer 15 */
(void*) isr_tim16, /* timer 16 */
(void*) isr_tim17, /* timer 17 */
(void*) isr_i2c1, /* I2C 1 */
(void*) isr_i2c2, /* I2C 2 */
(void*) isr_spi1, /* SPI 1 */
(void*) isr_spi2, /* SPI 2 */
(void*) isr_usart1, /* USART 1 */
(void*) isr_usart2, /* USART 2 */
(void*) isr_usart3_8, /* USART 3 to 8 */
(void*) isr_cec, /* consumer electronics control */
(void*) (0UL) /* reserved */
};

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f1
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
void isr_bus_fault(void)
{
core_panic(PANIC_BUS_FAULT, "BUS FAULT");
}
void isr_usage_fault(void)
{
core_panic(PANIC_USAGE_FAULT, "USAGE FAULT");
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* stm32f1 specific interrupt vector */
void isr_wwdg(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pvd(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tamper(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rcc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc1_2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_hp_can1_tx(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_lp_can1_rx0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1_rx1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1_sce(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti9_5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_brk(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_up(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_trg_com(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti15_10(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_alarm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_wakeup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_brk(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_up(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_trg_com(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_fsmc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sdio(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch4_5(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors"))) __attribute__((used))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg,
(void*) isr_pvd,
(void*) isr_tamper,
(void*) isr_rtc,
(void*) isr_flash,
(void*) isr_rcc,
(void*) isr_exti0,
(void*) isr_exti1,
(void*) isr_exti2,
(void*) isr_exti3,
(void*) isr_exti4,
(void*) isr_dma1_ch1,
(void*) isr_dma1_ch2,
(void*) isr_dma1_ch3,
(void*) isr_dma1_ch4,
(void*) isr_dma1_ch5,
(void*) isr_dma1_ch6,
(void*) isr_dma1_ch7,
(void*) isr_adc1_2,
(void*) isr_usb_hp_can1_tx,
(void*) isr_usb_lp_can1_rx0,
(void*) isr_can1_rx1,
(void*) isr_can1_sce,
(void*) isr_exti9_5,
(void*) isr_tim1_brk,
(void*) isr_tim1_up,
(void*) isr_tim1_trg_com,
(void*) isr_tim1_cc,
(void*) isr_tim2,
(void*) isr_tim3,
(void*) isr_tim4,
(void*) isr_i2c1_ev,
(void*) isr_i2c1_er,
(void*) isr_i2c2_ev,
(void*) isr_i2c2_er,
(void*) isr_spi1,
(void*) isr_spi2,
(void*) isr_usart1,
(void*) isr_usart2,
(void*) isr_usart3,
(void*) isr_exti15_10,
(void*) isr_rtc_alarm,
(void*) isr_usb_wakeup,
(void*) isr_tim8_brk,
(void*) isr_tim8_up,
(void*) isr_tim8_trg_com,
(void*) isr_tim8_cc,
(void*) isr_adc3,
(void*) isr_fsmc,
(void*) isr_sdio,
(void*) isr_tim5,
(void*) isr_spi3,
(void*) isr_uart4,
(void*) isr_uart5,
(void*) isr_tim6,
(void*) isr_tim7,
(void*) isr_dma2_ch1,
(void*) isr_dma2_ch2,
(void*) isr_dma2_ch3,
(void*) isr_dma2_ch4_5,
};

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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f1
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* STM32F1 specific interrupt vectors */
WEAK_DEFAULT void isr_wwdg(void);
WEAK_DEFAULT void isr_pvd(void);
WEAK_DEFAULT void isr_tamper(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_rcc(void);
WEAK_DEFAULT void isr_exti0(void);
WEAK_DEFAULT void isr_exti1(void);
WEAK_DEFAULT void isr_exti2(void);
WEAK_DEFAULT void isr_exti3(void);
WEAK_DEFAULT void isr_exti4(void);
WEAK_DEFAULT void isr_dma1_ch1(void);
WEAK_DEFAULT void isr_dma1_ch2(void);
WEAK_DEFAULT void isr_dma1_ch3(void);
WEAK_DEFAULT void isr_dma1_ch4(void);
WEAK_DEFAULT void isr_dma1_ch5(void);
WEAK_DEFAULT void isr_dma1_ch6(void);
WEAK_DEFAULT void isr_dma1_ch7(void);
WEAK_DEFAULT void isr_adc1_2(void);
WEAK_DEFAULT void isr_usb_hp_can1_tx(void);
WEAK_DEFAULT void isr_usb_lp_can1_rx0(void);
WEAK_DEFAULT void isr_can1_rx1(void);
WEAK_DEFAULT void isr_can1_sce(void);
WEAK_DEFAULT void isr_exti9_5(void);
WEAK_DEFAULT void isr_tim1_brk(void);
WEAK_DEFAULT void isr_tim1_up(void);
WEAK_DEFAULT void isr_tim1_trg_com(void);
WEAK_DEFAULT void isr_tim1_cc(void);
WEAK_DEFAULT void isr_tim2(void);
WEAK_DEFAULT void isr_tim3(void);
WEAK_DEFAULT void isr_tim4(void);
WEAK_DEFAULT void isr_i2c1_ev(void);
WEAK_DEFAULT void isr_i2c1_er(void);
WEAK_DEFAULT void isr_i2c2_ev(void);
WEAK_DEFAULT void isr_i2c2_er(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3(void);
WEAK_DEFAULT void isr_exti15_10(void);
WEAK_DEFAULT void isr_rtc_alarm(void);
WEAK_DEFAULT void isr_usb_wakeup(void);
WEAK_DEFAULT void isr_tim8_brk(void);
WEAK_DEFAULT void isr_tim8_up(void);
WEAK_DEFAULT void isr_tim8_trg_com(void);
WEAK_DEFAULT void isr_tim8_cc(void);
WEAK_DEFAULT void isr_adc3(void);
WEAK_DEFAULT void isr_fsmc(void);
WEAK_DEFAULT void isr_sdio(void);
WEAK_DEFAULT void isr_tim5(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_uart4(void);
WEAK_DEFAULT void isr_uart5(void);
WEAK_DEFAULT void isr_tim6(void);
WEAK_DEFAULT void isr_tim7(void);
WEAK_DEFAULT void isr_dma2_ch1(void);
WEAK_DEFAULT void isr_dma2_ch2(void);
WEAK_DEFAULT void isr_dma2_ch3(void);
WEAK_DEFAULT void isr_dma2_ch4_5(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M3 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg,
(void*) isr_pvd,
(void*) isr_tamper,
(void*) isr_rtc,
(void*) isr_flash,
(void*) isr_rcc,
(void*) isr_exti0,
(void*) isr_exti1,
(void*) isr_exti2,
(void*) isr_exti3,
(void*) isr_exti4,
(void*) isr_dma1_ch1,
(void*) isr_dma1_ch2,
(void*) isr_dma1_ch3,
(void*) isr_dma1_ch4,
(void*) isr_dma1_ch5,
(void*) isr_dma1_ch6,
(void*) isr_dma1_ch7,
(void*) isr_adc1_2,
(void*) isr_usb_hp_can1_tx,
(void*) isr_usb_lp_can1_rx0,
(void*) isr_can1_rx1,
(void*) isr_can1_sce,
(void*) isr_exti9_5,
(void*) isr_tim1_brk,
(void*) isr_tim1_up,
(void*) isr_tim1_trg_com,
(void*) isr_tim1_cc,
(void*) isr_tim2,
(void*) isr_tim3,
(void*) isr_tim4,
(void*) isr_i2c1_ev,
(void*) isr_i2c1_er,
(void*) isr_i2c2_ev,
(void*) isr_i2c2_er,
(void*) isr_spi1,
(void*) isr_spi2,
(void*) isr_usart1,
(void*) isr_usart2,
(void*) isr_usart3,
(void*) isr_exti15_10,
(void*) isr_rtc_alarm,
(void*) isr_usb_wakeup,
(void*) isr_tim8_brk,
(void*) isr_tim8_up,
(void*) isr_tim8_trg_com,
(void*) isr_tim8_cc,
(void*) isr_adc3,
(void*) isr_fsmc,
(void*) isr_sdio,
(void*) isr_tim5,
(void*) isr_spi3,
(void*) isr_uart4,
(void*) isr_uart5,
(void*) isr_tim6,
(void*) isr_tim7,
(void*) isr_dma2_ch1,
(void*) isr_dma2_ch2,
(void*) isr_dma2_ch3,
(void*) isr_dma2_ch4_5,
};

286
cpu/stm32f3/startup.c
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@ -1,286 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f3
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "board.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
while (1) {asm ("nop");}
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
while (1) {asm ("nop");}
}
void isr_bus_fault(void)
{
while (1) {asm ("nop");}
}
void isr_usage_fault(void)
{
while (1) {asm ("nop");}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* STM32F3 specific interrupt vector */
void isr_wwdg(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pvd(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tamp_stamp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rcc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_channel7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc1_2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_hp_can_tx(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_lp_can_rx0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can_rx1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can_sce(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_brk_tim15(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_up_tim16(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_trg_com_tim17(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_alarm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usbwakeup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_brk(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_up(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_trg_com(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim6_dac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_channel1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_channel2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_channel3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_channel4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_channel5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_comp1_2_3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_comp4_5_6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_comp7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_hp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_lp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usbwakeup_rmp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_fpu(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M4 handlers */
(void*) reset_handler, /* */
(void*) isr_nmi, /* */
(void*) isr_hard_fault, /* */
(void*) isr_mem_manage, /* */
(void*) isr_bus_fault, /* */
(void*) isr_usage_fault, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* */
(void*) isr_debug_mon, /* */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* */
(void*) isr_systick, /* */
/* STMF3 specific peripheral handlers */
(void*) isr_wwdg, /* */
(void*) isr_pvd, /* */
(void*) isr_tamp_stamp, /* */
(void*) isr_rtc_wkup, /* */
(void*) isr_flash, /* */
(void*) isr_rcc, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_dma1_channel1, /* */
(void*) isr_dma1_channel2, /* */
(void*) isr_dma1_channel3, /* */
(void*) isr_dma1_channel4, /* */
(void*) isr_dma1_channel5, /* */
(void*) isr_dma1_channel6, /* */
(void*) isr_dma1_channel7, /* */
(void*) isr_adc1_2, /* */
(void*) isr_usb_hp_can_tx, /* */
(void*) isr_usb_lp_can_rx0, /* */
(void*) isr_can_rx1, /* */
(void*) isr_can_sce, /* */
(void*) isr_exti, /* */
(void*) isr_tim1_brk_tim15, /* */
(void*) isr_tim1_up_tim16, /* */
(void*) isr_tim1_trg_com_tim17, /* */
(void*) isr_tim1_cc, /* */
(void*) isr_tim2, /* */
(void*) isr_tim3, /* */
(void*) isr_tim4, /* */
(void*) isr_i2c1_ev, /* */
(void*) isr_i2c1_er, /* */
(void*) isr_i2c2_ev, /* */
(void*) isr_i2c2_er, /* */
(void*) isr_spi1, /* */
(void*) isr_spi2, /* */
(void*) isr_usart1, /* */
(void*) isr_usart2, /* */
(void*) isr_usart3, /* */
(void*) isr_exti, /* */
(void*) isr_rtc_alarm, /* */
(void*) isr_usbwakeup, /* */
(void*) isr_tim8_brk, /* */
(void*) isr_tim8_up, /* */
(void*) isr_tim8_trg_com, /* */
(void*) isr_tim8_cc, /* */
(void*) isr_adc3, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_spi3, /* */
(void*) isr_uart4, /* */
(void*) isr_uart5, /* */
(void*) isr_tim6_dac, /* */
(void*) isr_tim7, /* */
(void*) isr_dma2_channel1, /* */
(void*) isr_dma2_channel2, /* */
(void*) isr_dma2_channel3, /* */
(void*) isr_dma2_channel4, /* */
(void*) isr_dma2_channel5, /* */
(void*) isr_adc4, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_comp1_2_3, /* */
(void*) isr_comp4_5_6, /* */
(void*) isr_comp7, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_usb_hp, /* */
(void*) isr_usb_lp, /* */
(void*) isr_usbwakeup_rmp, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_fpu, /* */
};

204
cpu/stm32f3/vectors.c Normal file
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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f3
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* STM32F3 specific interrupt vectors */
WEAK_DEFAULT void isr_wwdg(void);
WEAK_DEFAULT void isr_pvd(void);
WEAK_DEFAULT void isr_tamp_stamp(void);
WEAK_DEFAULT void isr_rtc_wkup(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_rcc(void);
WEAK_DEFAULT void isr_exti(void);
WEAK_DEFAULT void isr_dma1_channel1(void);
WEAK_DEFAULT void isr_dma1_channel2(void);
WEAK_DEFAULT void isr_dma1_channel3(void);
WEAK_DEFAULT void isr_dma1_channel4(void);
WEAK_DEFAULT void isr_dma1_channel5(void);
WEAK_DEFAULT void isr_dma1_channel6(void);
WEAK_DEFAULT void isr_dma1_channel7(void);
WEAK_DEFAULT void isr_adc1_2(void);
WEAK_DEFAULT void isr_usb_hp_can_tx(void);
WEAK_DEFAULT void isr_usb_lp_can_rx0(void);
WEAK_DEFAULT void isr_can_rx1(void);
WEAK_DEFAULT void isr_can_sce(void);
WEAK_DEFAULT void isr_tim1_brk_tim15(void);
WEAK_DEFAULT void isr_tim1_up_tim16(void);
WEAK_DEFAULT void isr_tim1_trg_com_tim17(void);
WEAK_DEFAULT void isr_tim1_cc(void);
WEAK_DEFAULT void isr_tim2(void);
WEAK_DEFAULT void isr_tim3(void);
WEAK_DEFAULT void isr_tim4(void);
WEAK_DEFAULT void isr_i2c1_ev(void);
WEAK_DEFAULT void isr_i2c1_er(void);
WEAK_DEFAULT void isr_i2c2_ev(void);
WEAK_DEFAULT void isr_i2c2_er(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3(void);
WEAK_DEFAULT void isr_rtc_alarm(void);
WEAK_DEFAULT void isr_usbwakeup(void);
WEAK_DEFAULT void isr_tim8_brk(void);
WEAK_DEFAULT void isr_tim8_up(void);
WEAK_DEFAULT void isr_tim8_trg_com(void);
WEAK_DEFAULT void isr_tim8_cc(void);
WEAK_DEFAULT void isr_adc3(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_uart4(void);
WEAK_DEFAULT void isr_uart5(void);
WEAK_DEFAULT void isr_tim6_dac(void);
WEAK_DEFAULT void isr_tim7(void);
WEAK_DEFAULT void isr_dma2_channel1(void);
WEAK_DEFAULT void isr_dma2_channel2(void);
WEAK_DEFAULT void isr_dma2_channel3(void);
WEAK_DEFAULT void isr_dma2_channel4(void);
WEAK_DEFAULT void isr_dma2_channel5(void);
WEAK_DEFAULT void isr_adc4(void);
WEAK_DEFAULT void isr_comp1_2_3(void);
WEAK_DEFAULT void isr_comp4_5_6(void);
WEAK_DEFAULT void isr_comp7(void);
WEAK_DEFAULT void isr_usb_hp(void);
WEAK_DEFAULT void isr_usb_lp(void);
WEAK_DEFAULT void isr_usbwakeup_rmp(void);
WEAK_DEFAULT void isr_fpu(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M4 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STMF3 specific peripheral handlers */
(void*) isr_wwdg, /* */
(void*) isr_pvd, /* */
(void*) isr_tamp_stamp, /* */
(void*) isr_rtc_wkup, /* */
(void*) isr_flash, /* */
(void*) isr_rcc, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_exti, /* */
(void*) isr_dma1_channel1, /* */
(void*) isr_dma1_channel2, /* */
(void*) isr_dma1_channel3, /* */
(void*) isr_dma1_channel4, /* */
(void*) isr_dma1_channel5, /* */
(void*) isr_dma1_channel6, /* */
(void*) isr_dma1_channel7, /* */
(void*) isr_adc1_2, /* */
(void*) isr_usb_hp_can_tx, /* */
(void*) isr_usb_lp_can_rx0, /* */
(void*) isr_can_rx1, /* */
(void*) isr_can_sce, /* */
(void*) isr_exti, /* */
(void*) isr_tim1_brk_tim15, /* */
(void*) isr_tim1_up_tim16, /* */
(void*) isr_tim1_trg_com_tim17, /* */
(void*) isr_tim1_cc, /* */
(void*) isr_tim2, /* */
(void*) isr_tim3, /* */
(void*) isr_tim4, /* */
(void*) isr_i2c1_ev, /* */
(void*) isr_i2c1_er, /* */
(void*) isr_i2c2_ev, /* */
(void*) isr_i2c2_er, /* */
(void*) isr_spi1, /* */
(void*) isr_spi2, /* */
(void*) isr_usart1, /* */
(void*) isr_usart2, /* */
(void*) isr_usart3, /* */
(void*) isr_exti, /* */
(void*) isr_rtc_alarm, /* */
(void*) isr_usbwakeup, /* */
(void*) isr_tim8_brk, /* */
(void*) isr_tim8_up, /* */
(void*) isr_tim8_trg_com, /* */
(void*) isr_tim8_cc, /* */
(void*) isr_adc3, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_spi3, /* */
(void*) isr_uart4, /* */
(void*) isr_uart5, /* */
(void*) isr_tim6_dac, /* */
(void*) isr_tim7, /* */
(void*) isr_dma2_channel1, /* */
(void*) isr_dma2_channel2, /* */
(void*) isr_dma2_channel3, /* */
(void*) isr_dma2_channel4, /* */
(void*) isr_dma2_channel5, /* */
(void*) isr_adc4, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_comp1_2_3, /* */
(void*) isr_comp4_5_6, /* */
(void*) isr_comp7, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_usb_hp, /* */
(void*) isr_usb_lp, /* */
(void*) isr_usbwakeup_rmp, /* */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_fpu, /* */
};

306
cpu/stm32f4/startup.c
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@ -1,306 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f4
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* Required by g++ cross compiler
*/
void *__dso_handle;
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
while (1) {asm ("nop");}
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
while (1) {asm ("nop");}
}
void isr_bus_fault(void)
{
while (1) {asm ("nop");}
}
void isr_usage_fault(void)
{
while (1) {asm ("nop");}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* STM32F4 specific interrupt vector */
void isr_wwdg(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pvd(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tamp_stamp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rcc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1_tx(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1_rx0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1_rx1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1_sce(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_brk_tim9(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_up_tim10(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_trg_com_tim11(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim1_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_alarm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_otg_fs_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_brk_tim12(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_up_tim13(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_trg_com_tim14(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim8_cc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_stream7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_fsmc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sdio(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim6_dac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eth(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_eth_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can2_tx(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can2_rx0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can2_rx1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can2_sce(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_otg_fs(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_stream7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c3_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c3_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_otg_hs_ep1_out(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_otg_hs_ep1_in(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_otg_hs_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_otg_hs(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dcmi(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_cryp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_hash_rng(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_fpu(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M4 handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg, /* Window WatchDog */
(void*) isr_pvd, /* PVD through EXTI Line detection */
(void*) isr_tamp_stamp, /* Tamper and TimeStamps through the EXTI line */
(void*) isr_rtc_wkup, /* RTC Wakeup through the EXTI line */
(void*) isr_flash, /* FLASH */
(void*) isr_rcc, /* RCC */
(void*) isr_exti, /* EXTI Line0 */
(void*) isr_exti, /* EXTI Line1 */
(void*) isr_exti, /* EXTI Line2 */
(void*) isr_exti, /* EXTI Line3 */
(void*) isr_exti, /* EXTI Line4 */
(void*) isr_dma1_stream0, /* DMA1 Stream 0 */
(void*) isr_dma1_stream1, /* DMA1 Stream 1 */
(void*) isr_dma1_stream2, /* DMA1 Stream 2 */
(void*) isr_dma1_stream3, /* DMA1 Stream 3 */
(void*) isr_dma1_stream4, /* DMA1 Stream 4 */
(void*) isr_dma1_stream5, /* DMA1 Stream 5 */
(void*) isr_dma1_stream6, /* DMA1 Stream 6 */
(void*) isr_adc, /* ADC1, ADC2 and ADC3s */
(void*) isr_can1_tx, /* CAN1 TX */
(void*) isr_can1_rx0, /* CAN1 RX0 */
(void*) isr_can1_rx1, /* CAN1 RX1 */
(void*) isr_can1_sce, /* CAN1 SCE */
(void*) isr_exti, /* External Line[9:5]s */
(void*) isr_tim1_brk_tim9, /* TIM1 Break and TIM9 */
(void*) isr_tim1_up_tim10, /* TIM1 Update and TIM10 */
(void*) isr_tim1_trg_com_tim11, /* TIM1 Trigger and Commutation and TIM11 */
(void*) isr_tim1_cc, /* TIM1 Capture Compare */
(void*) isr_tim2, /* TIM2 */
(void*) isr_tim3, /* TIM3 */
(void*) isr_tim4, /* TIM4 */
(void*) isr_i2c1_ev, /* I2C1 Event */
(void*) isr_i2c1_er, /* I2C1 Error */
(void*) isr_i2c2_ev, /* I2C2 Event */
(void*) isr_i2c2_er, /* I2C2 Error */
(void*) isr_spi1, /* SPI1 */
(void*) isr_spi2, /* SPI2 */
(void*) isr_usart1, /* USART1 */
(void*) isr_usart2, /* USART2 */
(void*) isr_usart3, /* USART3 */
(void*) isr_exti, /* External Line[15:10]s */
(void*) isr_rtc_alarm, /* RTC Alarm (A and B) through EXTI Line */
(void*) isr_otg_fs_wkup, /* USB OTG FS Wakeup through EXTI line */
(void*) isr_tim8_brk_tim12, /* TIM8 Break and TIM12 */
(void*) isr_tim8_up_tim13, /* TIM8 Update and TIM13 */
(void*) isr_tim8_trg_com_tim14, /* TIM8 Trigger and Commutation and TIM14 */
(void*) isr_tim8_cc, /* TIM8 Capture Compare */
(void*) isr_dma1_stream7, /* DMA1 Stream7 */
(void*) isr_fsmc, /* FSMC */
(void*) isr_sdio, /* SDIO */
(void*) isr_tim5, /* TIM5 */
(void*) isr_spi3, /* SPI3 */
(void*) isr_uart4, /* UART4 */
(void*) isr_uart5, /* UART5 */
(void*) isr_tim6_dac, /* TIM6 and DAC1&2 underrun errors */
(void*) isr_tim7, /* TIM7 */
(void*) isr_dma2_stream0, /* DMA2 Stream 0 */
(void*) isr_dma2_stream1, /* DMA2 Stream 1 */
(void*) isr_dma2_stream2, /* DMA2 Stream 2 */
(void*) isr_dma2_stream3, /* DMA2 Stream 3 */
(void*) isr_dma2_stream4, /* DMA2 Stream 4 */
(void*) isr_eth, /* Ethernet */
(void*) isr_eth_wkup, /* Ethernet Wakeup through EXTI line */
(void*) isr_can2_tx, /* CAN2 TX */
(void*) isr_can2_rx0, /* CAN2 RX0 */
(void*) isr_can2_rx1, /* CAN2 RX1 */
(void*) isr_can2_sce, /* CAN2 SCE */
(void*) isr_otg_fs, /* USB OTG FS */
(void*) isr_dma2_stream5, /* DMA2 Stream 5 */
(void*) isr_dma2_stream6, /* DMA2 Stream 6 */
(void*) isr_dma2_stream7, /* DMA2 Stream 7 */
(void*) isr_usart6, /* USART6 */
(void*) isr_i2c3_ev, /* I2C3 event */
(void*) isr_i2c3_er, /* I2C3 error */
(void*) isr_otg_hs_ep1_out, /* USB OTG HS End Point 1 Out */
(void*) isr_otg_hs_ep1_in, /* USB OTG HS End Point 1 In */
(void*) isr_otg_hs_wkup, /* USB OTG HS Wakeup through EXTI */
(void*) isr_otg_hs, /* USB OTG HS */
(void*) isr_dcmi, /* DCMI */
(void*) isr_cryp, /* CRYP crypto */
(void*) isr_hash_rng, /* Hash and Rng */
(void*) isr_fpu, /* FPU */
};

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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f4
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* STM32F4 specific interrupt vectors */
WEAK_DEFAULT void isr_wwdg(void);
WEAK_DEFAULT void isr_pvd(void);
WEAK_DEFAULT void isr_tamp_stamp(void);
WEAK_DEFAULT void isr_rtc_wkup(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_rcc(void);
WEAK_DEFAULT void isr_exti(void);
WEAK_DEFAULT void isr_dma1_stream0(void);
WEAK_DEFAULT void isr_dma1_stream1(void);
WEAK_DEFAULT void isr_dma1_stream2(void);
WEAK_DEFAULT void isr_dma1_stream3(void);
WEAK_DEFAULT void isr_dma1_stream4(void);
WEAK_DEFAULT void isr_dma1_stream5(void);
WEAK_DEFAULT void isr_dma1_stream6(void);
WEAK_DEFAULT void isr_adc(void);
WEAK_DEFAULT void isr_can1_tx(void);
WEAK_DEFAULT void isr_can1_rx0(void);
WEAK_DEFAULT void isr_can1_rx1(void);
WEAK_DEFAULT void isr_can1_sce(void);
WEAK_DEFAULT void isr_tim1_brk_tim9(void);
WEAK_DEFAULT void isr_tim1_up_tim10(void);
WEAK_DEFAULT void isr_tim1_trg_com_tim11(void);
WEAK_DEFAULT void isr_tim1_cc(void);
WEAK_DEFAULT void isr_tim2(void);
WEAK_DEFAULT void isr_tim3(void);
WEAK_DEFAULT void isr_tim4(void);
WEAK_DEFAULT void isr_i2c1_ev(void);
WEAK_DEFAULT void isr_i2c1_er(void);
WEAK_DEFAULT void isr_i2c2_ev(void);
WEAK_DEFAULT void isr_i2c2_er(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3(void);
WEAK_DEFAULT void isr_rtc_alarm(void);
WEAK_DEFAULT void isr_otg_fs_wkup(void);
WEAK_DEFAULT void isr_tim8_brk_tim12(void);
WEAK_DEFAULT void isr_tim8_up_tim13(void);
WEAK_DEFAULT void isr_tim8_trg_com_tim14(void);
WEAK_DEFAULT void isr_tim8_cc(void);
WEAK_DEFAULT void isr_dma1_stream7(void);
WEAK_DEFAULT void isr_fsmc(void);
WEAK_DEFAULT void isr_sdio(void);
WEAK_DEFAULT void isr_tim5(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_uart4(void);
WEAK_DEFAULT void isr_uart5(void);
WEAK_DEFAULT void isr_tim6_dac(void);
WEAK_DEFAULT void isr_tim7(void);
WEAK_DEFAULT void isr_dma2_stream0(void);
WEAK_DEFAULT void isr_dma2_stream1(void);
WEAK_DEFAULT void isr_dma2_stream2(void);
WEAK_DEFAULT void isr_dma2_stream3(void);
WEAK_DEFAULT void isr_dma2_stream4(void);
WEAK_DEFAULT void isr_eth(void);
WEAK_DEFAULT void isr_eth_wkup(void);
WEAK_DEFAULT void isr_can2_tx(void);
WEAK_DEFAULT void isr_can2_rx0(void);
WEAK_DEFAULT void isr_can2_rx1(void);
WEAK_DEFAULT void isr_can2_sce(void);
WEAK_DEFAULT void isr_otg_fs(void);
WEAK_DEFAULT void isr_dma2_stream5(void);
WEAK_DEFAULT void isr_dma2_stream6(void);
WEAK_DEFAULT void isr_dma2_stream7(void);
WEAK_DEFAULT void isr_usart6(void);
WEAK_DEFAULT void isr_i2c3_ev(void);
WEAK_DEFAULT void isr_i2c3_er(void);
WEAK_DEFAULT void isr_otg_hs_ep1_out(void);
WEAK_DEFAULT void isr_otg_hs_ep1_in(void);
WEAK_DEFAULT void isr_otg_hs_wkup(void);
WEAK_DEFAULT void isr_otg_hs(void);
WEAK_DEFAULT void isr_dcmi(void);
WEAK_DEFAULT void isr_cryp(void);
WEAK_DEFAULT void isr_hash_rng(void);
WEAK_DEFAULT void isr_fpu(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M4 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg, /* Window WatchDog */
(void*) isr_pvd, /* PVD through EXTI Line detection */
(void*) isr_tamp_stamp, /* Tamper and TimeStamps through the EXTI line */
(void*) isr_rtc_wkup, /* RTC Wakeup through the EXTI line */
(void*) isr_flash, /* FLASH */
(void*) isr_rcc, /* RCC */
(void*) isr_exti, /* EXTI Line0 */
(void*) isr_exti, /* EXTI Line1 */
(void*) isr_exti, /* EXTI Line2 */
(void*) isr_exti, /* EXTI Line3 */
(void*) isr_exti, /* EXTI Line4 */
(void*) isr_dma1_stream0, /* DMA1 Stream 0 */
(void*) isr_dma1_stream1, /* DMA1 Stream 1 */
(void*) isr_dma1_stream2, /* DMA1 Stream 2 */
(void*) isr_dma1_stream3, /* DMA1 Stream 3 */
(void*) isr_dma1_stream4, /* DMA1 Stream 4 */
(void*) isr_dma1_stream5, /* DMA1 Stream 5 */
(void*) isr_dma1_stream6, /* DMA1 Stream 6 */
(void*) isr_adc, /* ADC1, ADC2 and ADC3s */
(void*) isr_can1_tx, /* CAN1 TX */
(void*) isr_can1_rx0, /* CAN1 RX0 */
(void*) isr_can1_rx1, /* CAN1 RX1 */
(void*) isr_can1_sce, /* CAN1 SCE */
(void*) isr_exti, /* External Line[9:5]s */
(void*) isr_tim1_brk_tim9, /* TIM1 Break and TIM9 */
(void*) isr_tim1_up_tim10, /* TIM1 Update and TIM10 */
(void*) isr_tim1_trg_com_tim11, /* TIM1 Trigger and Commutation and TIM11 */
(void*) isr_tim1_cc, /* TIM1 Capture Compare */
(void*) isr_tim2, /* TIM2 */
(void*) isr_tim3, /* TIM3 */
(void*) isr_tim4, /* TIM4 */
(void*) isr_i2c1_ev, /* I2C1 Event */
(void*) isr_i2c1_er, /* I2C1 Error */
(void*) isr_i2c2_ev, /* I2C2 Event */
(void*) isr_i2c2_er, /* I2C2 Error */
(void*) isr_spi1, /* SPI1 */
(void*) isr_spi2, /* SPI2 */
(void*) isr_usart1, /* USART1 */
(void*) isr_usart2, /* USART2 */
(void*) isr_usart3, /* USART3 */
(void*) isr_exti, /* External Line[15:10]s */
(void*) isr_rtc_alarm, /* RTC Alarm (A and B) through EXTI Line */
(void*) isr_otg_fs_wkup, /* USB OTG FS Wakeup through EXTI line */
(void*) isr_tim8_brk_tim12, /* TIM8 Break and TIM12 */
(void*) isr_tim8_up_tim13, /* TIM8 Update and TIM13 */
(void*) isr_tim8_trg_com_tim14, /* TIM8 Trigger and Commutation and TIM14 */
(void*) isr_tim8_cc, /* TIM8 Capture Compare */
(void*) isr_dma1_stream7, /* DMA1 Stream7 */
(void*) isr_fsmc, /* FSMC */
(void*) isr_sdio, /* SDIO */
(void*) isr_tim5, /* TIM5 */
(void*) isr_spi3, /* SPI3 */
(void*) isr_uart4, /* UART4 */
(void*) isr_uart5, /* UART5 */
(void*) isr_tim6_dac, /* TIM6 and DAC1&2 underrun errors */
(void*) isr_tim7, /* TIM7 */
(void*) isr_dma2_stream0, /* DMA2 Stream 0 */
(void*) isr_dma2_stream1, /* DMA2 Stream 1 */
(void*) isr_dma2_stream2, /* DMA2 Stream 2 */
(void*) isr_dma2_stream3, /* DMA2 Stream 3 */
(void*) isr_dma2_stream4, /* DMA2 Stream 4 */
(void*) isr_eth, /* Ethernet */
(void*) isr_eth_wkup, /* Ethernet Wakeup through EXTI line */
(void*) isr_can2_tx, /* CAN2 TX */
(void*) isr_can2_rx0, /* CAN2 RX0 */
(void*) isr_can2_rx1, /* CAN2 RX1 */
(void*) isr_can2_sce, /* CAN2 SCE */
(void*) isr_otg_fs, /* USB OTG FS */
(void*) isr_dma2_stream5, /* DMA2 Stream 5 */
(void*) isr_dma2_stream6, /* DMA2 Stream 6 */
(void*) isr_dma2_stream7, /* DMA2 Stream 7 */
(void*) isr_usart6, /* USART6 */
(void*) isr_i2c3_ev, /* I2C3 event */
(void*) isr_i2c3_er, /* I2C3 error */
(void*) isr_otg_hs_ep1_out, /* USB OTG HS End Point 1 Out */
(void*) isr_otg_hs_ep1_in, /* USB OTG HS End Point 1 In */
(void*) isr_otg_hs_wkup, /* USB OTG HS Wakeup through EXTI */
(void*) isr_otg_hs, /* USB OTG HS */
(void*) isr_dcmi, /* DCMI */
(void*) isr_cryp, /* CRYP crypto */
(void*) isr_hash_rng, /* Hash and Rng */
(void*) isr_fpu, /* FPU */
};

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32l1
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
while (1) {asm ("nop");}
}
void isr_bus_fault(void)
{
core_panic(PANIC_BUS_FAULT, "BUS FAULT");
while (1) {asm ("nop");}
}
void isr_usage_fault(void)
{
core_panic(PANIC_USAGE_FAULT, "USAGE FAULT");
while (1) {asm ("nop");}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* stm32f1 specific interrupt vector */
void isr_wwdg(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pvd(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tamper_stamp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rcc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma1_ch7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_hp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_lp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_comp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti9_5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_lcd(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim9(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim10(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim11(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c1_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_ev(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_i2c2_er(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_exti15_10(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc_alarm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usb_fs_wkup(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_sdio(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tim5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dma2_ch5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_aes(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_comp_acq(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg,
(void*) isr_pvd,
(void*) isr_tamper_stamp,
(void*) isr_rtc_wkup,
(void*) isr_flash,
(void*) isr_rcc,
(void*) isr_exti0,
(void*) isr_exti1,
(void*) isr_exti2,
(void*) isr_exti3,
(void*) isr_exti4,
(void*) isr_dma1_ch1,
(void*) isr_dma1_ch2,
(void*) isr_dma1_ch3,
(void*) isr_dma1_ch4,
(void*) isr_dma1_ch5,
(void*) isr_dma1_ch6,
(void*) isr_dma1_ch7,
(void*) isr_adc1,
(void*) isr_usb_hp,
(void*) isr_usb_lp,
(void*) isr_dac,
(void*) isr_comp,
(void*) isr_exti9_5,
(void*) isr_lcd,
(void*) isr_tim9,
(void*) isr_tim10,
(void*) isr_tim11,
(void*) isr_tim2,
(void*) isr_tim3,
(void*) isr_tim4,
(void*) isr_i2c1_ev,
(void*) isr_i2c1_er,
(void*) isr_i2c2_ev,
(void*) isr_i2c2_er,
(void*) isr_spi1,
(void*) isr_spi2,
(void*) isr_usart1,
(void*) isr_usart2,
(void*) isr_usart3,
(void*) isr_exti15_10,
(void*) isr_rtc_alarm,
(void*) isr_usb_fs_wkup,
(void*) isr_tim6,
(void*) isr_tim7,
(void*) isr_sdio,
(void*) isr_tim5,
(void*) isr_spi3,
(void*) isr_uart4,
(void*) isr_uart5,
(void*) isr_dma2_ch1,
(void*) isr_dma2_ch2,
(void*) isr_dma2_ch3,
(void*) isr_dma2_ch4,
(void*) isr_dma2_ch5,
(void*) isr_aes,
(void*) isr_comp_acq,
};

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cpu/stm32l1/vectors.c Normal file
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/*
* Copyright (C) 2014-2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32l1
* @{
*
* @file
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
extern uint32_t _estack;
/* define a local dummy handler as it needs to be in the same compilation unit
* as the alias definition */
void dummy_handler(void) {
dummy_handler_default();
}
/* Cortex-M common interrupt vectors */
WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* STM32L1 specific interrupt vectors */
WEAK_DEFAULT void isr_wwdg(void);
WEAK_DEFAULT void isr_pvd(void);
WEAK_DEFAULT void isr_tamper_stamp(void);
WEAK_DEFAULT void isr_rtc_wkup(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_rcc(void);
WEAK_DEFAULT void isr_exti0(void);
WEAK_DEFAULT void isr_exti1(void);
WEAK_DEFAULT void isr_exti2(void);
WEAK_DEFAULT void isr_exti3(void);
WEAK_DEFAULT void isr_exti4(void);
WEAK_DEFAULT void isr_dma1_ch1(void);
WEAK_DEFAULT void isr_dma1_ch2(void);
WEAK_DEFAULT void isr_dma1_ch3(void);
WEAK_DEFAULT void isr_dma1_ch4(void);
WEAK_DEFAULT void isr_dma1_ch5(void);
WEAK_DEFAULT void isr_dma1_ch6(void);
WEAK_DEFAULT void isr_dma1_ch7(void);
WEAK_DEFAULT void isr_adc1(void);
WEAK_DEFAULT void isr_usb_hp(void);
WEAK_DEFAULT void isr_usb_lp(void);
WEAK_DEFAULT void isr_dac(void);
WEAK_DEFAULT void isr_comp(void);
WEAK_DEFAULT void isr_exti9_5(void);
WEAK_DEFAULT void isr_lcd(void);
WEAK_DEFAULT void isr_tim9(void);
WEAK_DEFAULT void isr_tim10(void);
WEAK_DEFAULT void isr_tim11(void);
WEAK_DEFAULT void isr_tim2(void);
WEAK_DEFAULT void isr_tim3(void);
WEAK_DEFAULT void isr_tim4(void);
WEAK_DEFAULT void isr_i2c1_ev(void);
WEAK_DEFAULT void isr_i2c1_er(void);
WEAK_DEFAULT void isr_i2c2_ev(void);
WEAK_DEFAULT void isr_i2c2_er(void);
WEAK_DEFAULT void isr_spi1(void);
WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3(void);
WEAK_DEFAULT void isr_exti15_10(void);
WEAK_DEFAULT void isr_rtc_alarm(void);
WEAK_DEFAULT void isr_usb_fs_wkup(void);
WEAK_DEFAULT void isr_tim6(void);
WEAK_DEFAULT void isr_tim7(void);
WEAK_DEFAULT void isr_sdio(void);
WEAK_DEFAULT void isr_tim5(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_uart4(void);
WEAK_DEFAULT void isr_uart5(void);
WEAK_DEFAULT void isr_dma2_ch1(void);
WEAK_DEFAULT void isr_dma2_ch2(void);
WEAK_DEFAULT void isr_dma2_ch3(void);
WEAK_DEFAULT void isr_dma2_ch4(void);
WEAK_DEFAULT void isr_dma2_ch5(void);
WEAK_DEFAULT void isr_aes(void);
WEAK_DEFAULT void isr_comp_acq(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M3 handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) mem_manage_default, /* memory manage exception */
(void*) bus_fault_default, /* bus fault exception */
(void*) usage_fault_default, /* usage fault exception */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) debug_mon_default, /* debug monitor exception */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* STM specific peripheral handlers */
(void*) isr_wwdg,
(void*) isr_pvd,
(void*) isr_tamper_stamp,
(void*) isr_rtc_wkup,
(void*) isr_flash,
(void*) isr_rcc,
(void*) isr_exti0,
(void*) isr_exti1,
(void*) isr_exti2,
(void*) isr_exti3,
(void*) isr_exti4,
(void*) isr_dma1_ch1,
(void*) isr_dma1_ch2,
(void*) isr_dma1_ch3,
(void*) isr_dma1_ch4,
(void*) isr_dma1_ch5,
(void*) isr_dma1_ch6,
(void*) isr_dma1_ch7,
(void*) isr_adc1,
(void*) isr_usb_hp,
(void*) isr_usb_lp,
(void*) isr_dac,
(void*) isr_comp,
(void*) isr_exti9_5,
(void*) isr_lcd,
(void*) isr_tim9,
(void*) isr_tim10,
(void*) isr_tim11,
(void*) isr_tim2,
(void*) isr_tim3,
(void*) isr_tim4,
(void*) isr_i2c1_ev,
(void*) isr_i2c1_er,
(void*) isr_i2c2_ev,
(void*) isr_i2c2_er,
(void*) isr_spi1,
(void*) isr_spi2,
(void*) isr_usart1,
(void*) isr_usart2,
(void*) isr_usart3,
(void*) isr_exti15_10,
(void*) isr_rtc_alarm,
(void*) isr_usb_fs_wkup,
(void*) isr_tim6,
(void*) isr_tim7,
(void*) isr_sdio,
(void*) isr_tim5,
(void*) isr_spi3,
(void*) isr_uart4,
(void*) isr_uart5,
(void*) isr_dma2_ch1,
(void*) isr_dma2_ch2,
(void*) isr_dma2_ch3,
(void*) isr_dma2_ch4,
(void*) isr_dma2_ch5,
(void*) isr_aes,
(void*) isr_comp_acq,
};