From ffd4d9280ec4150260d6af35f8f8e69fe29bfcc2 Mon Sep 17 00:00:00 2001 From: MichelRottleuthner Date: Wed, 26 Jul 2017 21:44:36 +0200 Subject: [PATCH 1/2] stm32_common/periph/rtc: add support for stm32l4 --- boards/nucleo-l476/Makefile.features | 3 +- boards/nucleo-l476/include/periph_conf.h | 7 +++++ cpu/stm32_common/periph/rtc.c | 38 ++++++++++++++++++++---- 3 files changed, 41 insertions(+), 7 deletions(-) diff --git a/boards/nucleo-l476/Makefile.features b/boards/nucleo-l476/Makefile.features index 5c3f64ba57..be20012b0c 100644 --- a/boards/nucleo-l476/Makefile.features +++ b/boards/nucleo-l476/Makefile.features @@ -3,9 +3,10 @@ FEATURES_PROVIDED += periph_cpuid FEATURES_PROVIDED += periph_gpio FEATURES_PROVIDED += periph_hwrng FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_rtc +FEATURES_PROVIDED += periph_rtt FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_timer -FEATURES_PROVIDED += periph_rtt FEATURES_PROVIDED += periph_uart # load the common Makefile.features for Nucleo boards diff --git a/boards/nucleo-l476/include/periph_conf.h b/boards/nucleo-l476/include/periph_conf.h index 0c7d1b77a5..a0de898a7f 100644 --- a/boards/nucleo-l476/include/periph_conf.h +++ b/boards/nucleo-l476/include/periph_conf.h @@ -238,6 +238,13 @@ static const spi_conf_t spi_config[] = { #define RTT_MAX_VALUE (0x0000ffff) /* 16-bit timer */ /** @} */ +/** + * @name RTC configuration + * @{ + */ +#define RTC_NUMOF (1) +/** @} */ + #ifdef __cplusplus } #endif diff --git a/cpu/stm32_common/periph/rtc.c b/cpu/stm32_common/periph/rtc.c index a5fcc0f540..3ad059d031 100644 --- a/cpu/stm32_common/periph/rtc.c +++ b/cpu/stm32_common/periph/rtc.c @@ -29,7 +29,7 @@ #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F2) || \ defined(CPU_FAM_STM32F3) || defined(CPU_FAM_STM32F4) || \ defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \ - defined(CPU_FAM_STM32L1) + defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32L4) /* guard file in case no RTC device was specified */ #if RTC_NUMOF @@ -60,8 +60,12 @@ static uint8_t byte2bcd(uint8_t value); void rtc_init(void) { /* Enable write access to RTC registers */ +#if defined(CPU_FAM_STM32L4) + periph_clk_en(APB1, RCC_APB1ENR1_PWREN); +#else periph_clk_en(APB1, RCC_APB1ENR_PWREN); -#if defined(CPU_FAM_STM32F7) +#endif +#if defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L4) PWR->CR1 |= PWR_CR1_DBP; #else PWR->CR |= PWR_CR_DBP; @@ -103,8 +107,13 @@ void rtc_init(void) int rtc_set_time(struct tm *time) { /* Enable write access to RTC registers */ +#if defined(CPU_FAM_STM32L4) + periph_clk_en(APB1, RCC_APB1ENR1_PWREN); +#else periph_clk_en(APB1, RCC_APB1ENR_PWREN); -#if defined(CPU_FAM_STM32F7) +#endif + +#if defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L4) PWR->CR1 |= PWR_CR1_DBP; #else PWR->CR |= PWR_CR_DBP; @@ -161,8 +170,13 @@ int rtc_get_time(struct tm *time) int rtc_set_alarm(struct tm *time, rtc_alarm_cb_t cb, void *arg) { /* Enable write access to RTC registers */ +#if defined(CPU_FAM_STM32L4) + periph_clk_en(APB1, RCC_APB1ENR1_PWREN); +#else periph_clk_en(APB1, RCC_APB1ENR_PWREN); -#if defined(CPU_FAM_STM32F7) +#endif + +#if defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L4) PWR->CR1 |= PWR_CR1_DBP; #else PWR->CR |= PWR_CR_DBP; @@ -196,11 +210,17 @@ int rtc_set_alarm(struct tm *time, rtc_alarm_cb_t cb, void *arg) #if defined(CPU_FAM_STM32L0) EXTI->IMR |= EXTI_IMR_IM17; +#elif defined (CPU_FAM_STM32L4) + EXTI->IMR |= EXTI_IMR1_IM18; #else EXTI->IMR |= EXTI_IMR_MR17; #endif - EXTI->RTSR |= EXTI_RTSR_TR17; +#if defined (CPU_FAM_STM32L4) + EXTI->RTSR |= EXTI_RTSR1_RT18; +#else + EXTI->RTSR |= EXTI_RTSR1_TR17; +#endif #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32L0) NVIC_SetPriority(RTC_IRQn, 10); @@ -313,7 +333,13 @@ void isr_rtc_alarm(void) } RTC->ISR &= ~RTC_ISR_ALRAF; } + +#if defined(CPU_FAM_STM32L4) + EXTI->PR |= EXTI_PR1_PIF18; +#else EXTI->PR |= EXTI_PR_PR17; +#endif + cortexm_isr_end(); } @@ -340,4 +366,4 @@ static uint8_t byte2bcd(uint8_t value) #endif /* defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F2) || \ defined(CPU_FAM_STM32F3) || defined(CPU_FAM_STM32F4) || \ defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \ - defined(CPU_FAM_STM32L1) */ + defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32L4)*/ From 87c1c96a13794c4481c7476241081ff3f88ece1e Mon Sep 17 00:00:00 2001 From: MichelRottleuthner Date: Mon, 31 Jul 2017 13:43:45 +0200 Subject: [PATCH 2/2] stm32_common/periph/rtc: fix RTSR_TR17 reg name --- cpu/stm32_common/periph/rtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/stm32_common/periph/rtc.c b/cpu/stm32_common/periph/rtc.c index 3ad059d031..d77feb6502 100644 --- a/cpu/stm32_common/periph/rtc.c +++ b/cpu/stm32_common/periph/rtc.c @@ -219,7 +219,7 @@ int rtc_set_alarm(struct tm *time, rtc_alarm_cb_t cb, void *arg) #if defined (CPU_FAM_STM32L4) EXTI->RTSR |= EXTI_RTSR1_RT18; #else - EXTI->RTSR |= EXTI_RTSR1_TR17; + EXTI->RTSR |= EXTI_RTSR_TR17; #endif #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32L0)