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boards/xg23-pk6068a: initial commit

This commit is contained in:
Jue 2022-10-17 23:09:31 +02:00 committed by Juergen Fitschen
parent ee2f5e981c
commit 77ee1c55bc
12 changed files with 564 additions and 0 deletions

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# Copyright (c) 2022 SSV Software Systems GmbH
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
config BOARD
default "xg23-pk6068a" if BOARD_XG23_PK6068A
config BOARD_XG23_PK6068A
bool
default y
select CPU_MODEL_EFR32ZG23A020F512GM48
# Put defined MCU peripherals here (in alphabetical order)
select HAS_PERIPH_I2C
select HAS_PERIPH_SPI
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
# Put other features for this board (in alphabetical order)
select HAVE_SAUL_GPIO

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MODULE = board
include $(RIOTBASE)/Makefile.base

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ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif

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CPU = efm32
CPU_FAM = efr32zg23
CPU_MODEL = efr32zg23a020f512gm48
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

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# use JLink for flashing
PROGRAMMER ?= jlink
JLINK_DEVICE = EFR32ZG23BXXXF512
JLINK_PRE_FLASH = r
FLASH_ADDR = 0x08000000
BAUD ?= 115200

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/*
* Copyright (C) 2022 SSV Software Systems GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_xg23-pk6068a
* @{
*
* @file
* @brief Board specific implementations for the xG23-PK6068A board
*
* @author Juergen Fitschen <me@jue.yt>
*
* @}
*/
#include "cpu.h"
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* Enable VCOM iface */
gpio_init(VCOM_EN_PIN, GPIO_OUT);
gpio_set(VCOM_EN_PIN);
#ifndef RIOTBOOT
#ifdef MODULE_SI7021
/* Enable Si7021 sensor */
gpio_init(SI7021_EN_PIN, GPIO_OUT);
gpio_set(SI7021_EN_PIN);
#endif
#endif
}

121
boards/xg23-pk6068a/doc.txt Normal file
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/**
* @defgroup boards_xg23-pk6068a Silicon Labs xG23-PK6068A starter kit
* @ingroup boards
* @brief Support for the xG23-PK6068A board.
## Overview
The EFR32xG23 (xG23) Pro Kit is designed to support the development of Wireless
IoT devices based on Sub-GHz wireless protocols. The Pro Kit includes a radio
board that provides a complete reference design for the EFR32xG23 Wireless SoC,
with the matching network for +20 dBm covering 868 to 915 MHz.
The main board contains an onboard J-Link debugger with a Packet Trace
Interface and a Virtual COM port, enabling application development and
debugging of the attached radio board as well as external hardware through an
expansion header.
## Hardware
### MCU
| MCU | EFR32ZG23 |
|-----------------|--------------------------------------------------------------------------------------------------|
| Family | ARM Cortex-M33 |
| Vendor | Silicon Labs |
| Vendor Family | EFM32 Wireless Gecko |
| RAM | 64.0 KiB |
| Flash | 512.0 KiB |
| EEPROM | no |
| Frequency | up to 78 MHz |
| FPU | yes |
| MPU | no |
| DMA | 8 channels |
| Timers | 4x 16-bits, 1x 32-bits |
| ADCs | 16-bit ADC |
| UARTs | 1x USART, 3x EUSART |
| SPIs | 1x USART |
| I2Cs | 2x |
| Vcc | 1.71 V - 3.8 V |
| Datasheet | [EFR32ZG23](https://www.silabs.com/documents/public/data-sheets/efr32zg23-datasheet.pdf) |
| Manual | [EFR32xG23](https://www.silabs.com/documents/public/reference-manuals/efr32xg23-rm.pdf) |
| Board Manual | [xG23](https://www.silabs.com/documents/public/user-guides/ug507-brd4210a-user-guide.pdf) |
| Board Schematic | [Main Board BRD4001A](https://www.silabs.com/documents/public/schematic-files/BRD4001A-A01-schematic.pdf), [EFR32ZG23 Module BRD4210A](https://www.silabs.com/documents/public/schematic-files/BRD4210A-A01-schematic.pdf) |
### Pinout
This is the pinout of the expansion header on the right side of the board.
PIN 1 is the bottom-left contact when the header faces you horizontally.
| | PIN | PIN | |
|------|-----|-----|------|
| 3V3 | 20 | 19 | RES |
| 5V | 18 | 17 | RES |
| PC7 | 16 | 15 | PC5 |
| PA9 | 14 | 13 | PA7 |
| PA8 | 12 | 11 | PA6 |
| PC0 | 10 | 9 | PD2 |
| PC3 | 8 | 7 | PA5 |
| PC2 | 6 | 5 | PA0 |
| PC1 | 4 | 3 | PA10 |
| VMCU | 2 | 1 | GND |
### Peripheral mapping
| Peripheral | Number | Hardware | Pins | Comments | Min. Power Mode |
|------------|---------|-----------------|--------------------------------|----------------------------------|-----------------|
| I2C | 0 | I2C0 | SDA: PC7, CLK: PC5 | | EM1 |
| SPI | 0 | USART0 | MOSI: PC1, MISO: PC2, CLK: PC3 | PC4 used as CS for Serial Flash | EM1 |
| Timer | 0 | TIMER0 | | Default ztimer backend | EM1 |
| | 1 | LETIMER0 | | | EM3 |
| UART | 0 | EUSART1 | RX: PA9, TX: PA8 | Default STDIO output | EM1 |
### User interface
| Peripheral | Mapped to | Pin | Comments |
|------------|-----------|------|------------|
| Button | PB0 | PB1 | |
| | PB1 | PB3 | |
| LED | LED0 | PB2 | Yellow LED |
| | LED1 | PD3 | Yellow LED |
## Implementation Status
| Device | ID | Supported | Comments |
|-------------------------------|-------------|-----------|----------------------------------------------------------------|
| MCU | EFR32ZG | yes | Power modes supported |
| Low-level driver | ADC | no | |
| | Flash | yes | |
| | GPIO | yes | Interrupts are shared across pins (see reference manual) |
| | HW Crypto | partially | Only hwrng |
| | I2C | yes | |
| | PWM | no | |
| | RTC | no | As RTT or RTC |
| | SPI | partially | Only master mode |
| | Timer | yes | |
| | UART | yes | |
| LCD driver | LS013B7DH03 | yes | Sharp Low Power Memory LCD via the U8g2 package |
| Temperature + humidity sensor | Si7021 | yes | Silicon Labs Temperature + Humidity sensor |
## Flashing the device
To flash, [SEGGER JLink](https://www.segger.com/jlink-software.html) is
required.
Flashing is supported by RIOT-OS using the command below:
```
make flash
```
To run the GDB debugger, use the command:
```
make debug
```
Or, to connect with your own debugger:
```
make debug-server
```
## License information
* Silicon Labs' EMLIB: zlib-style license (permits distribution of source).
*/

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/*
* Copyright (C) 2022 SSV Software Systems GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_xg23-pk6068a
* @{
*
* @file
* @brief Board specific definitions for the xG23-PK6068A
*
* @author Juergen Fitschen <me@jue.yt>
*/
#ifndef BOARD_H
#define BOARD_H
#include "cpu.h"
#include "periph_conf.h"
#include "periph_cpu.h"
#include "periph/gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize pm_layered with no pre-defined blockers
*
* All peripheral drivers keep track of required pm modes.
*/
#define PM_BLOCKER_INITIAL { 0, 0, 0 }
/**
* @brief Power mode required for GPIO IRQs
*
* If all GPIO IRQs are expected on port A or B, EM3 is the lowest allowed
* power mode. No power level has to be blocked in this case.
* If GPIO IRQs shall be fired on port C or D, we must stay in EM1.
* Uncomment the line down below in this case.
*/
/* #define GPIO_INT_PM_BLOCKER PM_MODE_EM2 */
/**
* @name Board VCOM interface
*
* Define the GPIO pin to enable the VCOM interface
*/
#define VCOM_UART UART_DEV(0)
#define VCOM_EN_PIN GPIO_PIN(PB, 0)
/**
* @name Push button pin definitions
* @{
*/
#define PB0_PIN GPIO_PIN(PB, 1)
#define PB1_PIN GPIO_PIN(PB, 3)
/** @} */
/**
* @name LED pin definitions
* @{
*/
#define LED0_PIN GPIO_PIN(PB, 2)
#define LED1_PIN GPIO_PIN(PD, 3)
/** @} */
/**
* @name Macros for controlling the on-board LEDs
* @{
*/
#define LED0_ON gpio_set(LED0_PIN)
#define LED0_OFF gpio_clear(LED0_PIN)
#define LED0_TOGGLE gpio_toggle(LED0_PIN)
#define LED1_ON gpio_set(LED1_PIN)
#define LED1_OFF gpio_clear(LED1_PIN)
#define LED1_TOGGLE gpio_toggle(LED1_PIN)
/** @} */
/**
* @name Display configuration
*
* Connection to the on-board Sharp Memory LCD (LS013B7DH03).
* @{
*/
#define DISP_SPI SPI_DEV(0)
#define DISP_SCS_PIN GPIO_PIN(PC, 8)
#define DISP_EXTCOMIN_PIN GPIO_PIN(PC, 6)
#define DISP_ENABLE_PIN GPIO_PIN(PC, 9)
/** @} */
/**
* @name Flash configuration
*
* Connection to the on-board MX25R8035F.
* @{
*/
#define FLASH_SPI SPI_DEV(0)
#define FLASH_CS_PIN GPIO_PIN(PC, 4)
/** @} */
/**
* @name Sensor configuration
*
* Connection to the on-board Si7021 temperature & humidity sensor.
* @{
*/
#define SI70XX_PARAM_I2C_DEV I2C_DEV(0)
#define SI7021_EN_PIN GPIO_PIN(PC, 9)
/** @} */
/**
* @brief Initialize board specific hardware
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H */
/** @} */

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/*
* Copyright (C) 2022 SSV Software Systems GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_xg23-pk6068a
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Juergen Fitschen <me@jue.yt>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED 0",
.pin = LED0_PIN,
.mode = GPIO_OUT
},
{
.name = "LED 1",
.pin = LED1_PIN,
.mode = GPIO_OUT
},
{
.name = "Button 1",
.pin = PB0_PIN,
.mode = GPIO_IN_PU,
.flags = SAUL_GPIO_INVERTED
},
{
.name = "Button 2",
.pin = PB1_PIN,
.mode = GPIO_IN_PU,
.flags = SAUL_GPIO_INVERTED
}
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

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/*
* Copyright (C) 2022 SSV Software Systems GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_xg23-pk6068a
* @{
*
* @file
* @brief Configuration of CPU peripherals for xG23-PK6068A board
*
* @author Juergen Fitschen <me@jue.yt>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock configuration
* @{
*/
#define HFXO_FREQ (39000000UL)
#define CMU_HFXOINIT CMU_HFXOINIT_DEFAULT
#define LFXO_FREQ (32768UL)
#define CMU_LFXOINIT CMU_LFXOINIT_DEFAULT
static const clk_mux_t clk_mux_config[] = {
{ .clk = cmuClock_SYSCLK, .src = cmuSelect_HFXO },
{ .clk = cmuClock_EM01GRPACLK, .src = cmuSelect_HFXO },
{ .clk = cmuClock_EM01GRPCCLK, .src = cmuSelect_HFXO },
{ .clk = cmuClock_EM23GRPACLK, .src = cmuSelect_LFXO },
{ .clk = cmuClock_EUSART0CLK, .src = cmuSelect_HFXO },
};
#define CLK_MUX_NUMOF ARRAY_SIZE(clk_mux_config)
static const clk_div_t clk_div_config[] = {
{ .clk = cmuClock_HCLK, .div = 1 },
{ .clk = cmuClock_PCLK, .div = 1 },
{ .clk = cmuClock_LSPCLK, .div = 2 },
};
#define CLK_DIV_NUMOF ARRAY_SIZE(clk_div_config)
/** @} */
/**
* @name I2C configuration
* @{
*/
static const i2c_conf_t i2c_config[] = {
{
.dev = I2C0,
.sda_pin = GPIO_PIN(PC, 7),
.scl_pin = GPIO_PIN(PC, 5),
.cmu = cmuClock_I2C0,
.irq = I2C0_IRQn,
.speed = I2C_SPEED_NORMAL
}
};
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
#define I2C_0_ISR isr_i2c0
/** @} */
/**
* @name SPI configuration
* @{
*/
static const spi_dev_t spi_config[] = {
{
.dev = USART0,
.mosi_pin = GPIO_PIN(PC, 1),
.miso_pin = GPIO_PIN(PC, 2),
.clk_pin = GPIO_PIN(PC, 3),
.cmu = cmuClock_USART0,
.irq = USART0_RX_IRQn
}
};
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/**
* @name Timer configuration
*
* The implementation can use one low-energy timer
* or two regular timers in cascade mode.
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIMER0,
.cmu = cmuClock_TIMER0,
.irq = TIMER0_IRQn
},
{
.dev = LETIMER0,
.cmu = cmuClock_LETIMER0,
.irq = LETIMER0_IRQn
}
};
#define TIMER_0_ISR isr_timer0
#define TIMER_1_ISR isr_letimer0
#define TIMER_0_MAX_VALUE TIMER_MAX_VALUE
#define TIMER_1_MAX_VALUE LETIMER_MAX_VALUE
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = EUSART1,
.rx_pin = GPIO_PIN(PA, 9),
.tx_pin = GPIO_PIN(PA, 8),
.cmu = cmuClock_EUSART1,
.irq = EUSART1_RX_IRQn
}
};
#define UART_0_ISR_RX isr_eusart1_rx
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */

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@ -13110,3 +13110,26 @@ boards/sltb009a/include/periph_conf\.h:[0-9]+: warning: Member TIMER_[A-Z0-9_]+
boards/sltb009a/include/periph_conf\.h:[0-9]+: warning: Member timer_config\[\] \(variable) of file periph_conf\.h is not documented.
boards/sltb009a/include/periph_conf\.h:[0-9]+: warning: Member UART_[A-Z0-9_]+ \(macro definition) of file periph_conf\.h is not documented.
boards/sltb009a/include/periph_conf\.h:[0-9]+: warning: Member uart_config\[\] \(variable) of file periph_conf\.h is not documented.
boards/xg23\-pk6068a/include/board\.h:[0-9]+: warning: Member CONFIG_ZTIMER_[A-Z_]+ \(macro definition\) of file board\.h is not documented\.
boards/xg23\-pk6068a/include/board\.h:[0-9]+: warning: Member VCOM_[A-Z_]+ \(macro definition\) of file board\.h is not documented\.
boards/xg23\-pk6068a/include/board\.h:[0-9]+: warning: Member PB[0-1]_PIN \(macro definition\) of file board\.h is not documented\.
boards/xg23\-pk6068a/include/board\.h:[0-9]+: warning: Member DISP_[A-Z_]+ \(macro definition\) of file board\.h is not documented\.
boards/xg23\-pk6068a/include/board\.h:[0-9]+: warning: Member FLASH_[A-Z_]+ \(macro definition\) of file board\.h is not documented\.
boards/xg23\-pk6068a/include/board\.h:[0-9]+: warning: Member SI70[A-Z0-9_]+ \(macro definition\) of file board\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member HFXO_FREQ \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member CMU_HFXOINIT \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member LFXO_FREQ \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member CMU_LFXOINIT \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member CLK_MUX_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member CLK_DIV_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member clk_mux_config\[\] \(variable\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member clk_div_config\[\] \(variable\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member I2C_[0-9A-Z_]+ \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member i2c_config\[\] \(variable\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member SPI_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member spi_config\[\] \(variable\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member TIMER_[0-9A-Z_]+ \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member timer_config\[\] \(variable\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member UART_0_ISR_RX \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member UART_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member uart_config\[\] \(variable\) of file periph_conf\.h is not documented\.

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@ -40,6 +40,9 @@ USEMODULE += event_timeout_ztimer
USEMODULE += event_periodic
USEMODULE += test_utils_result_output
# Collision between defines of Silabs SDK and mynewt-core
BOARD_BLACKLIST := xg23-pk6068a
# All uwb-core applications need to enable `-fms-extensions`
CFLAGS += -fms-extensions
ifneq (,$(filter llvm,$(TOOLCHAIN)))