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cpu: stm32_common: add CAN support for nucleo-l476rg

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STM32L4 CAN implementation:
 - STM32L47x/L48x has single CAN
 - STM32L49x/4Ax has dual CAN
This commit is contained in:
Giuseppe Tipaldi 2020-02-05 21:32:33 +01:00 committed by Giuseppe Tipaldi
parent 7479c9e00d
commit 7e6ce086b8
2 changed files with 14 additions and 5 deletions
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16
cpu/stm32_common/include/can_params.h
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@ -39,18 +39,26 @@ static const can_conf_t candev_conf[] = {
.irqn = CEC_CAN_IRQn,
#else
.can = CAN1,
#if defined(CPU_FAM_STM32L4)
.rcc_mask = RCC_APB1ENR1_CAN1EN,
#else
.rcc_mask = RCC_APB1ENR_CAN1EN,
.can_master = CAN1,
.master_rcc_mask = RCC_APB1ENR_CAN1EN,
.first_filter = 0,
.nb_filters = 14,
#ifndef CPU_FAM_STM32F1
#endif
#if defined(CPU_FAM_STM32F1)
.rx_pin = GPIO_PIN(PORT_A, 11),
.tx_pin = GPIO_PIN(PORT_A, 12),
#elif defined(CPU_FAM_STM32L4)
.rx_pin = GPIO_PIN(PORT_B, 8),
.tx_pin = GPIO_PIN(PORT_B, 9),
.af = GPIO_AF9,
#else
.rx_pin = GPIO_PIN(PORT_D, 0),
.tx_pin = GPIO_PIN(PORT_D, 1),
.af = GPIO_AF9,
#else
.rx_pin = GPIO_PIN(PORT_A, 11),
.tx_pin = GPIO_PIN(PORT_A, 12),
#endif
.tx_irqn = CAN1_TX_IRQn,
.rx0_irqn = CAN1_RX0_IRQn,

3
cpu/stm32_common/include/candev_stm32.h
View File

@ -41,7 +41,8 @@ extern "C" {
#define CANDEV_STM32_CHAN_NUMOF 3
#elif defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)
#define CANDEV_STM32_CHAN_NUMOF 2
#elif defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || DOXYGEN
#elif defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
defined(CPU_FAM_STM32L4) || DOXYGEN
/** Number of channels in the device (up to 3) */
#define CANDEV_STM32_CHAN_NUMOF 1
#else