From 7f675e9ca9d3a1018f95f041949fc3493f6affc0 Mon Sep 17 00:00:00 2001 From: francisco Date: Wed, 3 Jul 2019 09:35:53 +0200 Subject: [PATCH] stm32_common/flash_common: properly clear EOP bit - EOP bit is cleared by writing 1 to the register. - Guard EOP bit clear for STM32F2, STM32F4, STM32F7 and STM32L4 EOP bit is only set if EOPIE is enabled. Since this is not the case for any platform we exclude it when not needed. --- cpu/stm32_common/periph/flash_common.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/cpu/stm32_common/periph/flash_common.c b/cpu/stm32_common/periph/flash_common.c index 57b5c39efe..eeeb3b27fc 100644 --- a/cpu/stm32_common/periph/flash_common.c +++ b/cpu/stm32_common/periph/flash_common.c @@ -65,8 +65,11 @@ void _wait_for_pending_operations(void) while (FLASH->SR & FLASH_SR_BSY) {} } - /* Clear 'end of operation' bit in status register */ - if (FLASH->SR & FLASH_SR_EOP) { - FLASH->SR &= ~(FLASH_SR_EOP); - } + /* Clear 'end of operation' bit in status register, for other STM32 boards + this bit is set only if EOPIE is set, which is currently not done */ +#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \ + defined(CPU_FAM_STM32F3) || defined(CPU_FAM_STM32L0) || \ + defined(CPU_FAM_STM32L1) + FLASH->SR |= FLASH_SR_EOP; +#endif }