From f5eb7c1b1bf9d807b4a5258bdfab49f39b2d2787 Mon Sep 17 00:00:00 2001
From: Marian Buschsieweke <marian.buschsieweke@ml-pa.com>
Date: Tue, 11 Nov 2025 14:38:09 +0100
Subject: [PATCH 1/2] cpu/sam0_common: Provide SVD_VENDOR and SVD_MODEL

With this, running `make USE_PYCORTEXMDEBUG=1 debug` for any SAM0 based
board will directly load the correct SVD file.
---
 cpu/sam0_common/Makefile.include | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/cpu/sam0_common/Makefile.include b/cpu/sam0_common/Makefile.include
index 13a737a363..a156277207 100644
--- a/cpu/sam0_common/Makefile.include
+++ b/cpu/sam0_common/Makefile.include
@@ -1,8 +1,13 @@
 # Define the CPU family so we can differentiate between them in the code
 CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))
 
+CPU_MODEL_UPPERCASE := $(call uppercase_and_underscore,$(CPU_MODEL))
 # Generate ASF compatible model definition
-CFLAGS += -D__$(call uppercase_and_underscore,$(CPU_MODEL))__
+CFLAGS += -D__$(CPU_MODEL_UPPERCASE)__
+
+# Identify SVD file to load with `USE_PYCORTEXMDEBUG=1`:
+SVD_VENDOR := Atmel
+SVD_MODEL := AT$(CPU_MODEL_UPPERCASE)
 
 # Compute CPU_LINE
 LINE   := $(shell echo $(CPU_MODEL) | sed -E -e 's/^sam([a-z][0-9][0-9])(.)([0-9][0-9])(.)*/\1 \2 \3 \4/')

From 9a5a8e3d920c8a2fd3858e3cd2a796441c513132 Mon Sep 17 00:00:00 2001
From: Marian Buschsieweke <marian.buschsieweke@ml-pa.com>
Date: Tue, 11 Nov 2025 15:01:55 +0100
Subject: [PATCH 2/2] cpu/stm32: Provide SVD_VENDOR and SVD_MODEL

With this, running `make USE_PYCORTEXMDEBUG=1 debug` for almost any STM32
based board will directly load the correct SVD file.
---
 cpu/stm32/stm32_info.mk | 52 +++++++++++++++++++++++++++++++++++++----
 1 file changed, 47 insertions(+), 5 deletions(-)

diff --git a/cpu/stm32/stm32_info.mk b/cpu/stm32/stm32_info.mk
index d3bc5e0b57..a836e1a2da 100644
--- a/cpu/stm32/stm32_info.mk
+++ b/cpu/stm32/stm32_info.mk
@@ -33,19 +33,61 @@ SVD_VENDOR := STMicro
 
 ifeq (f0,$(CPU_FAM))
   CPU_CORE = cortex-m0
-else ifneq (,$(filter $(CPU_FAM),f1 f2 l1))
+  ifneq (,$(filter $(STM32_MODEL),031 042 072 091))
+    SVD_MODEL := STM32F$(STM32_MODEL)x
+  endif
+  ifeq (030,$(STM32_MODEL))
+    SVD_MODEL := STM32F$(STM32_MODEL)
+  endif
+else ifeq (f1,$(CPU_FAM))
   CPU_CORE = cortex-m3
-else ifneq (,$(filter $(CPU_FAM),f3 f4 l4 mp1))
+  SVD_MODEL := STM32F$(STM32_MODEL)xx
+else ifeq (f2,$(CPU_FAM))
+  CPU_CORE = cortex-m3
+  SVD_MODEL := STM32F2$(STM32_MODEL2)x
+else ifeq (l1,$(CPU_FAM))
+  CPU_CORE = cortex-m3
+  # TODO: Memory map description is split over multiple SVD files, but this
+  # is not yet supported by the build system. We load the common STM32L1xx
+  # SVD file only for now
+	SVD_MODEL := STM32L1xx
+else ifeq (f3,$(CPU_FAM))
   CPU_CORE = cortex-m4f
-else ifneq (,$(filter $(CPU_FAM),g4 wb wl))
+  ifneq (,$(filter $(STM32_MODEL3),4 8))
+    SVD_MODEL := STM32F3x$(STM32_MODEL3)
+  else
+    SVD_MODEL := STM32F$(STM32_MODEL)
+  endif
+else ifeq (f4,$(CPU_FAM))
+  CPU_CORE = cortex-m4f
+  SVD_MODEL := STM32F$(STM32_MODEL)
+else ifeq (l4,$(CPU_FAM))
+  CPU_CORE = cortex-m4f
+  SVD_MODEL := STM32L4x$(STM32_MODEL3)
+else ifeq (mp1,$(CPU_FAM))
+  CPU_CORE = cortex-m4f
+else ifeq (g4,$(CPU_FAM))
+  CPU_CORE = cortex-m4
+  SVD_MODEL := STM32G$(STM32_MODEL)xx
+else ifneq (,$(filter $(CPU_FAM),wb wl))
   CPU_CORE = cortex-m4
 else ifeq (f7,$(CPU_FAM))
   CPU_CORE = cortex-m7
 	SVD_MODEL := STM32F7x$(STM32_MODEL3)
-else ifneq (,$(filter $(CPU_FAM),g0 l0 c0))
+else ifeq (g0,$(CPU_FAM))
   CPU_CORE = cortex-m0plus
-else ifneq (,$(filter $(CPU_FAM),l5 u5))
+  SVD_MODEL := STM32G$(STM32_MODEL)
+else ifeq (l0,$(CPU_FAM))
+  CPU_CORE = cortex-m0plus
+  SVD_MODEL := STM32L0x$(STM32_MODEL3)
+else ifeq (c0,$(CPU_FAM))
+  CPU_CORE = cortex-m0plus
+else ifeq (l5,$(CPU_FAM))
   CPU_CORE = cortex-m33
+  SVD_MODEL := STM32L$(STM32_MODEL)
+else ifeq (u5,$(CPU_FAM))
+  CPU_CORE = cortex-m33
+  SVD_MODEL := STM32U$(STM32_MODEL)
 else
   $(error Not supported CPU family: '$(CPU_FAM)')
 endif