diff --git a/cpu/esp32/ld/esp32/memory.ld.in b/cpu/esp32/ld/esp32/memory.ld.in index 34f0aa7b5c..3bc5a602e3 100644 --- a/cpu/esp32/ld/esp32/memory.ld.in +++ b/cpu/esp32/ld/esp32/memory.ld.in @@ -84,9 +84,16 @@ MEMORY #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ +#ifdef MODULE_PERIPH_FLASHPAGE + drom0_0_seg (R) : org = 0x3F400020, + len = 0x400000 - 0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY + drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), + len = CONFIG_ESP_FLASHPAGE_CAPACITY +#else drom0_0_seg (R) : org = 0x3F400020, len = 0x400000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ +#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* RTC fast memory (executable). Persists over deep sleep. diff --git a/cpu/esp32/ld/esp32/sections.ld.in b/cpu/esp32/ld/esp32/sections.ld.in index 3fbf4bf75f..ea116c2fe0 100644 --- a/cpu/esp32/ld/esp32/sections.ld.in +++ b/cpu/esp32/ld/esp32/sections.ld.in @@ -466,7 +466,6 @@ SECTIONS . = ALIGN(ALIGNOF(.flash.rodata)); } >default_rodata_seg - _rodata_start = ABSOLUTE(.); .flash.rodata : ALIGN(0x10) { _flash_rodata_start = ABSOLUTE(.); @@ -617,6 +616,17 @@ SECTIONS _heap_start = ABSOLUTE(.); _sheap = ABSOLUTE(.); } > dram0_0_seg + +#ifdef MODULE_PERIPH_FLASHPAGE + .flash_writable (NOLOAD) : ALIGN(65536) + { + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + } > drom0_1_seg +#endif } ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), diff --git a/cpu/esp32/ld/esp32c3/memory.ld.in b/cpu/esp32/ld/esp32c3/memory.ld.in index d387915f93..f33d2339bf 100644 --- a/cpu/esp32/ld/esp32c3/memory.ld.in +++ b/cpu/esp32/ld/esp32c3/memory.ld.in @@ -72,9 +72,16 @@ MEMORY #if CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ +#ifdef MODULE_PERIPH_FLASHPAGE + drom0_0_seg (R) : org = 0x3C000020, + len = 0x800000 - 0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY + drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), + len = CONFIG_ESP_FLASHPAGE_CAPACITY +#else drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ +#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /** diff --git a/cpu/esp32/ld/esp32c3/sections.ld.in b/cpu/esp32/ld/esp32c3/sections.ld.in index 5c848e2b2d..359b724f8d 100644 --- a/cpu/esp32/ld/esp32c3/sections.ld.in +++ b/cpu/esp32/ld/esp32c3/sections.ld.in @@ -599,6 +599,16 @@ SECTIONS } > dram0_0_seg _eheap = phy_param_rom; +#ifdef MODULE_PERIPH_FLASHPAGE + .flash_writable (NOLOAD) : ALIGN(65536) + { + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + } > drom0_1_seg +#endif } ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), diff --git a/cpu/esp32/ld/esp32s2/memory.ld.in b/cpu/esp32/ld/esp32s2/memory.ld.in index f40fca87a4..8791d4c703 100644 --- a/cpu/esp32/ld/esp32s2/memory.ld.in +++ b/cpu/esp32/ld/esp32s2/memory.ld.in @@ -90,9 +90,16 @@ MEMORY #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ +#ifdef MODULE_PERIPH_FLASHPAGE + drom0_0_seg (R) : org = 0x3F000020, + len = 0x3f0000-0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY + drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), + len = CONFIG_ESP_FLASHPAGE_CAPACITY +#else drom0_0_seg (R) : org = 0x3F000020, len = 0x3f0000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ +#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* RTC fast memory (executable). Persists over deep sleep. diff --git a/cpu/esp32/ld/esp32s2/sections.ld.in b/cpu/esp32/ld/esp32s2/sections.ld.in index 483429033c..dac1f641ce 100644 --- a/cpu/esp32/ld/esp32s2/sections.ld.in +++ b/cpu/esp32/ld/esp32s2/sections.ld.in @@ -592,6 +592,17 @@ SECTIONS . = _heap_end; _eheap = ABSOLUTE(.); + +#ifdef MODULE_PERIPH_FLASHPAGE + .flash_writable (NOLOAD) : ALIGN(65536) + { + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + } > drom0_1_seg +#endif } ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), diff --git a/cpu/esp32/ld/esp32s3/memory.ld.in b/cpu/esp32/ld/esp32s3/memory.ld.in index 388f2fb65b..0847903076 100644 --- a/cpu/esp32/ld/esp32s3/memory.ld.in +++ b/cpu/esp32/ld/esp32s3/memory.ld.in @@ -90,9 +90,16 @@ MEMORY #if CONFIG_APP_BUILD_USE_FLASH_SECTIONS /* Flash mapped constant data */ +#ifdef MODULE_PERIPH_FLASHPAGE + drom0_0_seg (R) : org = 0x3C000020, + len = 0x800000-0x20 - CONFIG_ESP_FLASHPAGE_CAPACITY + drom0_1_seg (R) : org = ORIGIN(drom0_0_seg) + LENGTH(drom0_0_seg), + len = CONFIG_ESP_FLASHPAGE_CAPACITY +#else drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20 /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */ +#endif /* MODULE_PERIPH_FLASHPAGE */ #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS /** diff --git a/cpu/esp32/ld/esp32s3/sections.ld.in b/cpu/esp32/ld/esp32s3/sections.ld.in index d9cbb07cf6..036dbed742 100644 --- a/cpu/esp32/ld/esp32s3/sections.ld.in +++ b/cpu/esp32/ld/esp32s3/sections.ld.in @@ -619,6 +619,17 @@ SECTIONS . = _heap_end; _eheap = ABSOLUTE(.); + +#ifdef MODULE_PERIPH_FLASHPAGE + .flash_writable (NOLOAD) : ALIGN(65536) + { + _fp_mem_start = . ; + KEEP(*(SORT(.flash_writable.*))) + _fp_mem_end = . ; + . = ALIGN(4096); + _end_fw = . ; + } > drom0_1_seg +#endif } ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),