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https://github.com/RIOT-OS/RIOT.git
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corrected and translated comments
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7a2cc4ae09
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@ -9,7 +9,7 @@ static volatile uint32_t __msp430_cpu_speed = MSP430_INITIAL_CPU_SPEED;
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/*---------------------------------------------------------------------------*/
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static uint8_t calc_umctl(uint16_t br)
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{
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// from TI slaa049
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/* from TI slaa049 */
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register uint8_t CMOD = 256 * br - 256 * (br + 1) / 2;
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register uint8_t c = 0;
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register int i = 0;
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@ -17,12 +17,12 @@ static uint8_t calc_umctl(uint16_t br)
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a <<= 1;
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do {
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if (a & 0x80) { // Overflow to integer?
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a = a - 128 + CMOD; // Yes, subtract 1.000000
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if (a & 0x80) { /* Overflow to integer? */
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a = a - 128 + CMOD; /* Yes, subtract 1.000000 */
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c |= 0x80;
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}
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else {
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a += CMOD; // No, add fraction
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a += CMOD; /* No, add fraction */
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}
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if (i == 7) {
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@ -37,71 +37,71 @@ static uint8_t calc_umctl(uint16_t br)
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static void msb_ports_init(void)
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{
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// Port 1: Free port, for energy saving all outputs are set to zero.
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P1SEL = 0x00; // Port1 Zweitfunktion
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P1OUT = 0x00; // Port1 Ausgangsregister: 00000000 = 0x00
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P1DIR = 0xFF; // Port1 Direction: 11111111 = 0xFF
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/* Port 1: Free port, for energy saving all outputs are set to zero. */
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P1SEL = 0x00; /* Port1 I/O Function */
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P1OUT = 0x00; /* Port1 Ausgangsregister: 00000000 = 0x00 */
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P1DIR = 0xFF; /* Port1 Direction: 11111111 = 0xFF */
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P2SEL = 0x20; // Port2 Zweitfunktion
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P2OUT = 0x00; // Port2 Ausgangsregister: 00000000 = 0x00
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P2DIR = 0x1C; // Port2 Direction: 00011010 = 0x1C
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// 0 - P2.0 [IN ] -
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// 0 - P2.1 [OUT] -
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// 1 - P2.2 [IN ] -
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// 1 - P2.3 [OUT] -
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// 1 - P2.4 [OUT] -
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// 0 - P2.5 [IN ] -
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// 0 - P2.6 [IN ] - SD-KARTE Protect
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// 0 - P2.7 [IN ] - SD-KARTE Detect
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P2SEL = 0x20; /* Port2 I/O Function */
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P2OUT = 0x00; /* Port2 Output register: 00000000 = 0x00 */
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P2DIR = 0x1C; /* Port2 Direction: 00011010 = 0x1C */
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/* 0 - P2.0 [IN ] - */
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/* 0 - P2.1 [OUT] - */
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/* 1 - P2.2 [IN ] - */
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/* 1 - P2.3 [OUT] - */
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/* 1 - P2.4 [OUT] - */
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/* 0 - P2.5 [IN ] - */
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/* 0 - P2.6 [IN ] - SDC Protect */
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/* 0 - P2.7 [IN ] - SDC Detect */
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P3SEL = 0xC0; // Port3 Zweitfunktion
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P3OUT = 0x49; // Port3 Ausgangsregister: 00001001 = 0x09
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P3DIR = 0xAB; // Port3 Direction
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// 1 - P3.0
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// 1 - P3.1
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// 0 - P3.2
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// 1 - P3.3
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// 0 - P3.4 [IN ] - SHT 11 DATA (OUT/IN)
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// 1 - P3.5 [OUT] - SHT 11 CLK
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// 0 - P3.6 [2-Funktion] - RS232_RxD
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// 0 - P3.7 [2-Funktion] - RS232_TxD
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P3SEL = 0xC0; /* Port3 Pins 6 & 7 for USART */
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P3OUT = 0x49; /* Port3 Output register: 01001001: 0x49 */
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P3DIR = 0xAB; /* Port3 Direction: 10101011: 0xAB */
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/* 1 - P3.0 */
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/* 1 - P3.1 */
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/* 0 - P3.2 */
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/* 1 - P3.3 */
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/* 0 - P3.4 [IN ] - SHT 11 DATA (OUT/IN) */
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/* 1 - P3.5 [OUT] - SHT 11 CLK */
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/* 0 - P3.6 [2-Funktion] - RS232_RxD */
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/* 1 - P3.7 [2-Funktion] - RS232_TxD */
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// Port 4: Free port, for energy saving all outputs are set to zero.
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P4SEL = 0x00; // Port4 Zweitfunktion
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P4OUT = 0x00; // Port4 Ausgangsregister: 00000000 = 0x00
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P4DIR = 0xFF; // Port4 Direction: 11111111 = 0xFF
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// 1 - P4.0 [OUT] - unused
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// 1 - P4.1 [OUT] - unused
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// 1 - P4.2 [OUT] - unused
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// 1 - P4.3 [OUT] - unused
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// 1 - P4.4 [OUT] - unused
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// 1 - P4.5 [OUT] - unused
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// 1 - P4.6 [OUT] - unused
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// 1 - P4.7 [OUT] - unused
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/* Port 4: Free port, for energy saving all outputs are set to zero. */
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P4SEL = 0x00; /* Port4 I/O Function */
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P4OUT = 0x00; /* Port4 Output register: 00000000 = 0x00 */
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P4DIR = 0xFF; /* Port4 Direction: 11111111 = 0xFF */
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/* 1 - P4.0 [OUT] - unused */
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/* 1 - P4.1 [OUT] - unused */
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/* 1 - P4.2 [OUT] - unused */
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/* 1 - P4.3 [OUT] - unused */
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/* 1 - P4.4 [OUT] - unused */
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/* 1 - P4.5 [OUT] - unused */
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/* 1 - P4.6 [OUT] - unused */
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/* 1 - P4.7 [OUT] - unused */
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P5SEL = 0x00; // Port5 Zweitfunktion: 00000000 = 0x00
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P5OUT = 0x80; // Port5 Ausgangsregister: 00001001 = 0x09
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P5DIR = 0xFF; // Port5 Direction: 11111011 = 0xFB
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// 1 - P5.0 [OUT] - SD-KARTE /CS
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// 1 - P5.1 [OUT] - SD-KARTE DI
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// 0 - P5.2 [IN ] - SD-KARTE DO
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// 1 - P5.3 [OUT] - SD-KARTE DCLK
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// 1 - P5.4 [OUT] - MMA GS1
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// 1 - P5.5 [OUT] - MMA GS2
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// 1 - P5.6 [OUT] - MMA /SLEEP
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// 1 - P5.7 [OUT] - LED_ROT 0-an, 1-aus
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P5SEL = 0x00; /* Port5 I/O Function: 00000000 = 0x00 */
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P5OUT = 0x80; /* Port5 Output register: 00001001 = 0x09 */
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P5DIR = 0xFF; /* Port5 Direction: 11111011 = 0xFB */
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/* 1 - P5.0 [OUT] - SDC /CS */
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/* 1 - P5.1 [OUT] - SDC DI */
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/* 0 - P5.2 [IN ] - SDC DO */
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/* 1 - P5.3 [OUT] - SDC DCLK */
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/* 1 - P5.4 [OUT] - MMA GS1 */
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/* 1 - P5.5 [OUT] - MMA GS2 */
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/* 1 - P5.6 [OUT] - MMA /SLEEP */
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/* 1 - P5.7 [OUT] - LED_RED 0-on, 1-off */
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P6SEL = 0x00; // Port6 Zweitfunktion = 0x07
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P6OUT = 0x00; // Port6 Ausgangsregister: 00000000 = 0x00
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P6DIR = 0xFF; // Port6 Direction: 11111000 = 0xF8
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// 0 - P6.0 [AD-IN] - MMA X-Achse
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// 0 - P6.1 [AD-IN] - MMA Y-Achse
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// 0 - P6.2 [AD-IN] - MMA Z-Achse
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// 1 - P6.3 [OUT] - unused
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// 1 - P6.4 [OUT] - unused
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// 1 - P6.5 [OUT] - unused
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// 1 - P6.6 [OUT] - unused
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// 1 - P6.7 [OUT] - unused
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P6SEL = 0x00; /* Port6 I/O Function = 0x07 */
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P6OUT = 0x00; /* Port6 Output register: 00000000 = 0x00 */
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P6DIR = 0xFF; /* Port6 Direction: 11111000 = 0xF8 */
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/* 0 - P6.0 [AD-IN] - MMA X-Axis */
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/* 0 - P6.1 [AD-IN] - MMA Y-Axis */
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/* 0 - P6.2 [AD-IN] - MMA Z-Axis */
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/* 1 - P6.3 [OUT] - unused */
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/* 1 - P6.4 [OUT] - unused */
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/* 1 - P6.5 [OUT] - unused */
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/* 1 - P6.6 [OUT] - unused */
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/* 1 - P6.7 [OUT] - unused */
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}
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void msp430_set_cpu_speed(uint32_t speed)
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@ -110,14 +110,14 @@ void msp430_set_cpu_speed(uint32_t speed)
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__msp430_cpu_speed = speed;
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msp430_init_dco();
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uint16_t br;
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UCTL1 = SWRST | CHAR; // 8-bit character
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UTCTL1 |= SSEL1 | URXSE; // UCLK = MCLK
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// activate
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U1ME |= UTXE1 | URXE1; // Enable USART1 TXD/RXD
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UCTL1 = SWRST | CHAR; /* 8-bit character */
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UTCTL1 |= SSEL1 | URXSE; /* UCLK = MCLK */
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/* activate */
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U1ME |= UTXE1 | URXE1; /* Enable USART1 TXD/RXD */
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br = (uint16_t)(__msp430_cpu_speed / 115200uL);
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UBR01 = br; // set baudrate
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UBR01 = br; /* set baudrate */
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UBR11 = br >> 8;
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UMCTL1 = calc_umctl(br); // set modulation
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UMCTL1 = calc_umctl(br); /* set modulation */
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ME2 |= (UTXE1 | URXE1);
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UCTL1 &= ~SWRST;
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@ -135,22 +135,22 @@ msp430_init_dco()
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/*------------------ use external oszillator -----------------------*/
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uint16_t i;
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// Stop watchdog
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/* Stop watchdog */
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WDTCTL = WDTPW + WDTHOLD;
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//Init crystal for mclk
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//XT2 = HF XTAL
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BCSCTL1 = RSEL2;
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// Wait for xtal to stabilize
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/* Wait for xtal to stabilize */
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do {
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IFG1 &= ~OFIFG; // Clear oscillator fault flag
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IFG1 &= ~OFIFG; /* Clear oscillator fault flag */
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for (i = 0xFF; i > 0; i--); // Time for flag to set
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for (i = 0xFF; i > 0; i--); /* Time for flag to set */
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}
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while ((IFG1 & OFIFG) != 0); // Oscillator fault flag still set?
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while ((IFG1 & OFIFG) != 0); /* Oscillator fault flag still set? */
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BCSCTL2 = SELM_2 + SELS; // MCLK und SMCLK = XT2 (safe)
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BCSCTL2 = SELM_2 + SELS; /* MCLK und SMCLK = XT2 (safe) */
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#else
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/* Thdeltais code taken from the FU Berlin sources and reformatted. */
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int delta = __msp430_cpu_speed >> 12;
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@ -163,7 +163,7 @@ msp430_init_dco()
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BCSCTL1 = 0xa4; /* ACLK is devided by 4. RSEL=6 no division for MCLK
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and SSMCLK. XT2 is off. */
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// Init FLL to desired frequency using the 32762Hz crystal
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/* Init FLL to desired frequency using the 32762Hz crystal */
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#if MSP430_HAS_DCOR
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BCSCTL2 = 0x01;
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#else
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@ -175,8 +175,8 @@ msp430_init_dco()
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for (i = 0xffff; i > 0; i--); /* Delay for XTAL to settle */
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CCTL2 = CCIS0 + CM0 + CAP; // Define CCR2, CAP, ACLK
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TACTL = TASSEL1 + TACLR + MC1; // SMCLK, continous mode
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CCTL2 = CCIS0 + CM0 + CAP; /* Define CCR2, CAP, ACLK */
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TACTL = TASSEL1 + TACLR + MC1; /* SMCLK, continous mode */
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while (1) {
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