mirror of
https://github.com/RIOT-OS/RIOT.git
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Merge pull request #7882 from gebart/pr/kinetis-one-cpu-dir
kinetis: Support all models in one directory
This commit is contained in:
Sebastian Meiling
GitHub
commit
8f4b21bdaa
@ -19,12 +19,12 @@ ifeq (1,$(USE_OLD_OPENOCD))
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# wdog-disable.bin is a precompiled binary which will disable the watchdog and
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# return control to the debugger (OpenOCD)
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export OPENOCD_PRE_VERIFY_CMDS += \
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-c 'load_image $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'load_image $(RIOTCPU)/$(CPU)/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'resume 0x20000000'
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export OPENOCD_EXTRA_INIT
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.PHONY: flash
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flash: $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin
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flash: $(RIOTCPU)/$(CPU)/dist/wdog-disable.bin
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# Reset the default goal.
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.DEFAULT_GOAL :=
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@ -36,7 +36,7 @@ endif
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export OPENOCD_CONFIG ?= $(RIOTBOARD)/frdm-common/dist/openocd-$(FRDM_IFACE)-$(CPU_FAMILY).cfg
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# Check the flash configuration field before flashing
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/kinetis_common/dist/check-fcfield-elf.sh
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/$(CPU)/dist/check-fcfield-elf.sh
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# setup serial terminal
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include $(RIOTMAKE)/tools/serial.inc.mk
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@ -3,4 +3,4 @@ ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += saul_adc
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endif
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-include $(RIOTCPU)/k22f/Makefile.dep
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include $(RIOTCPU)/kinetis/Makefile.dep
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@ -1,6 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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@ -12,4 +11,4 @@ FEATURES_PROVIDED += periph_uart
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m4_1
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-include $(RIOTCPU)/k22f/Makefile.features
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include $(RIOTCPU)/kinetis/Makefile.features
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@ -1,5 +1,5 @@
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# define the cpu used by the board
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export CPU = k22f
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export CPU = kinetis
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export CPU_MODEL = mk22fn512vlh12
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# Include default FRDM board config
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@ -161,7 +161,7 @@ static const pwm_conf_t pwm_config[] = {
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* Clock configuration values based on the configured 48Mhz module clock.
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*
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* Auto-generated by:
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* cpu/kinetis_common/dist/calc_spi_scalers/calc_spi_scalers.c
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* cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
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*
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* @{
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*/
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@ -269,15 +269,6 @@ static const spi_conf_t spi_config[] = {
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#define RTT_MAX_VALUE (0xffffffff)
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/** @} */
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/**
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* @name Random Number Generator configuration
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* @{
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*/
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#define KINETIS_RNGA RNG
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#define HWRNG_CLKEN() (SIM->SCGC6 |= (1 << 9))
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#define HWRNG_CLKDIS() (SIM->SCGC6 &= ~(1 << 9))
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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@ -1 +1 @@
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-include $(RIOTCPU)/k64f/Makefile.dep
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include $(RIOTCPU)/kinetis/Makefile.dep
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@ -1,6 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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@ -12,4 +11,4 @@ FEATURES_PROVIDED += periph_uart
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m4_1
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-include $(RIOTCPU)/k64f/Makefile.features
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include $(RIOTCPU)/kinetis/Makefile.features
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@ -1,5 +1,5 @@
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# define the cpu used by the FRDM-K64F board
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export CPU = k64f
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export CPU = kinetis
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export CPU_MODEL = mk64fn1m0vll12
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# Include default FRDM board config
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@ -156,7 +156,7 @@ static const pwm_conf_t pwm_config[] = {
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* Clock configuration values based on the configured 30Mhz module clock.
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*
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* Auto-generated by:
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* cpu/kinetis_common/dist/calc_spi_scalers/calc_spi_scalers.c
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* cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
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*
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* @{
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*/
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@ -264,15 +264,6 @@ static const spi_conf_t spi_config[] = {
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#define RTT_MAX_VALUE (0xffffffff)
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/** @} */
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/**
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* @name Random Number Generator configuration
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* @{
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*/
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#define KINETIS_RNGA RNG
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#define HWRNG_CLKEN() (SIM->SCGC6 |= (1 << 9))
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#define HWRNG_CLKDIS() (SIM->SCGC6 &= ~(1 << 9))
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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@ -12,10 +12,12 @@ USEMODULE += nvram
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USEMODULE += devfs
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USEMODULE += mtd_spi_nor
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# mulle always uses it's rtt
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# mulle always uses the rtt for the oscillator
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USEMODULE += periph_rtt
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ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += saul_gpio
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USEMODULE += saul_adc
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endif
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include $(RIOTCPU)/kinetis/Makefile.dep
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@ -1,7 +1,6 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_dac
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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@ -13,4 +12,4 @@ FEATURES_PROVIDED += periph_uart
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m4_2
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-include $(RIOTCPU)/k60/Makefile.features
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include $(RIOTCPU)/kinetis/Makefile.features
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@ -1,5 +1,5 @@
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# define the cpu used by the Mulle board
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export CPU = k60
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export CPU = kinetis
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# Default GDB port
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export GDBPORT ?= 3333
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@ -84,13 +84,13 @@ endif
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# wdog-disable.bin is a precompiled binary which will disable the watchdog and
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# return control to the debugger (OpenOCD)
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export OPENOCD_PRE_VERIFY_CMDS += \
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-c 'load_image $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'load_image $(RIOTCPU)/$(CPU)/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'resume 0x20000000'
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export OPENOCD_EXTRA_INIT
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/kinetis_common/dist/check-fcfield-elf.sh
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/$(CPU)/dist/check-fcfield-elf.sh
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.PHONY: flash
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flash: $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin
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flash: $(RIOTCPU)/$(CPU)/dist/wdog-disable.bin
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# Reset the default goal.
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.DEFAULT_GOAL :=
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@ -238,7 +238,7 @@ static const pwm_conf_t pwm_config[] = {
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* Clock configuration values based on the configured 47988736Hz module clock.
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*
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* Auto-generated by:
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* cpu/kinetis_common/dist/calc_spi_scalers/calc_spi_scalers.c
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* cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
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*
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* @{
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*/
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@ -392,15 +392,6 @@ static const spi_conf_t spi_config[] = {
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/** @} */
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/**
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* @name Random Number Generator configuration
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* @{
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*/
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#define HWRNG_CLKEN() (BITBAND_REG32(SIM->SCGC3, SIM_SCGC3_RNGA_SHIFT) = 1)
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#define HWRNG_CLKDIS() (BITBAND_REG32(SIM->SCGC3, SIM_SCGC3_RNGA_SHIFT) = 0)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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@ -12,4 +12,4 @@ ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += tmp006
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endif
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-include $(RIOTCPU)/kw2xd/Makefile.dep
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include $(RIOTCPU)/kinetis/Makefile.dep
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@ -1,6 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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@ -12,4 +11,4 @@ FEATURES_PROVIDED += periph_uart
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m4_3
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-include $(RIOTCPU)/kw2xd/Makefile.features
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include $(RIOTCPU)/kinetis/Makefile.features
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@ -1,10 +1,10 @@
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# define the cpu used by the phyWAVE-KW22 board
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export CPU = kw2xd
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export CPU = kinetis
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# the pba-d-01-kw2x board can embed either a kw21d256, kw21d512 or kw22d512 cpu.
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# The default set up is kw21d256, the variable is overrideable to use the other
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# cpu if needed.
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export CPU_MODEL ?= kw21d256
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export CPU_MODEL ?= mkw21d256vha5
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export MCPU = cortex-m4
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@ -13,7 +13,7 @@ PORT_LINUX ?= /dev/ttyACM0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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.PHONY: flash
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flash: $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin
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flash: $(RIOTCPU)/$(CPU)/dist/wdog-disable.bin
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# Reset the default goal.
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.DEFAULT_GOAL :=
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@ -23,10 +23,10 @@ flash: $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin
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# wdog-disable.bin is a precompiled binary which will disable the watchdog and
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# return control to the debugger (OpenOCD)
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export OPENOCD_PRE_VERIFY_CMDS += \
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-c 'load_image $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'load_image $(RIOTCPU)/$(CPU)/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'resume 0x20000000'
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export OPENOCD_EXTRA_INIT
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/kinetis_common/dist/check-fcfield-elf.sh
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/$(CPU)/dist/check-fcfield-elf.sh
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# Add board selector (USB serial) to OpenOCD options if specified.
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# Use /dist/tools/usb-serial/list-ttys.sh to find out serial number.
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@ -171,7 +171,7 @@ static const pwm_conf_t pwm_config[] = {
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* Clock configuration values based on the configured 48Mhz module clock.
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*
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* Auto-generated by:
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* cpu/kinetis_common/dist/calc_spi_scalers/calc_spi_scalers.c
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* cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
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*
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* @{
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*/
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@ -295,16 +295,6 @@ static const spi_conf_t spi_config[] = {
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#define RTT_MAX_VALUE (0xffffffff)
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/** @} */
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/**
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* @name Random Number Generator configuration
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* @{
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*/
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#define KINETIS_RNGA RNG
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#define HWRNG_CLKEN() (SIM->SCGC6 |= (1 << 9))
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#define HWRNG_CLKDIS() (SIM->SCGC6 &= ~(1 << 9))
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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@ -1,7 +0,0 @@
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# define the module that is build
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MODULE = cpu
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# add a list of subdirectories that should also be built
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DIRS = periph $(RIOTCPU)/cortexm_common $(KINETIS_COMMON)
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include $(RIOTBASE)/Makefile.base
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@ -1 +0,0 @@
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-include $(RIOTCPU)/kinetis_common/Makefile.dep
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@ -1 +0,0 @@
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-include $(RIOTCPU)/kinetis_common/Makefile.features
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@ -1,22 +0,0 @@
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# define the CPU architecture for the k22f
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export CPU_ARCH = cortex-m4
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export CPU_FAMILY = kx
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# map CPU models to generic Kinetis linker script
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LD_MK22FN512VLH12 = kinetis_f512l64u64.ld
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LD_MK22FN512VLL12 = kinetis_f512l64u64.ld
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LD_MK22FN512VDC12 = kinetis_f512l64u64.ld
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LD_MK22FN512VMP12 = kinetis_f512l64u64.ld
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# tell the build system that the CPU depends on the Kinetis common files
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export USEMODULE += kinetis_common
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# define path to kinetis module, which is needed for this CPU
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export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
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# CPU depends on the kinetis module, so include it
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include $(KINETIS_COMMON)Makefile.include
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# this CPU implementation is using kinetis common startup
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export COMMON_STARTUP = $(KINETIS_COMMON)
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include $(RIOTMAKE)/arch/cortexm.inc.mk
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@ -1,7 +0,0 @@
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# define the module that is build
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MODULE = cpu
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# add a list of subdirectories, that should also be build
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DIRS = periph $(RIOTCPU)/cortexm_common $(KINETIS_COMMON)
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include $(RIOTBASE)/Makefile.base
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@ -1 +0,0 @@
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-include $(RIOTCPU)/kinetis_common/Makefile.features
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@ -1,19 +0,0 @@
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# define the CPU architecture for the k60
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export CPU_ARCH = cortex-m4
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# map CPU models to generic Kinetis linkerscript
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LD_MK60DN256VLL10 = kinetis_f256l16u16.ld
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LD_MK60DN512VLL10 = kinetis_f512l64u64.ld
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# tell the build system that the CPU depends on the Kinetis common files
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export USEMODULE += kinetis_common
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# define path to kinetis module, which is needed for this CPU
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export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
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# CPU depends on the kinetis module, so include it
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include $(KINETIS_COMMON)Makefile.include
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# this CPU implementation is using kinetis common startup
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export COMMON_STARTUP = $(KINETIS_COMMON)
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include $(RIOTMAKE)/arch/cortexm.inc.mk
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@ -1,51 +0,0 @@
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/*
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* Copyright (C) 2015 Eistec AB
|
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*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
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||||
*/
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/**
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* @defgroup cpu_k60 NXP Kinetis K60
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* @ingroup cpu
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* @brief CPU specific implementations for the NXP Kinetis K60
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* Cortex-M4 MCU
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* @{
|
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*
|
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* @file
|
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* @brief Implementation specific CPU configuration options
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*
|
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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*/
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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#if defined(CPU_MODEL_MK60DN512VLL10) || defined(CPU_MODEL_MK60DN256VLL10)
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#include "vendor/MK60D10.h"
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/* K60 rev 2.x replaced the RNG module in 1.x by the RNGA PRNG module */
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#define KINETIS_RNGA (RNG)
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#else
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#error Unknown CPU model. Update Makefile.include in the board directory.
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#endif
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#include "cpu_conf_kinetis.h"
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#ifdef __cplusplus
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extern "C"
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{
|
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#endif
|
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/**
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* @brief This CPU provides an additional ADC clock divider as CFG1[ADICLK]=1
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*/
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||||
#define KINETIS_HAVE_ADICLK_BUS_DIV_2 1
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#ifdef __cplusplus
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}
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#endif
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||||
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#endif /* CPU_CONF_H */
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||||
/** @} */
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@ -1 +0,0 @@
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include $(RIOTMAKE)/periph.mk
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@ -1,7 +0,0 @@
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# define the module that is build
|
||||
MODULE = cpu
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# add a list of subdirectories, that should also be build
|
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DIRS = periph $(RIOTCPU)/cortexm_common $(KINETIS_COMMON)
|
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|
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include $(RIOTBASE)/Makefile.base
|
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@ -1 +0,0 @@
|
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-include $(RIOTCPU)/kinetis_common/Makefile.dep
|
||||
@ -1 +0,0 @@
|
||||
-include $(RIOTCPU)/kinetis_common/Makefile.features
|
||||
@ -1,19 +0,0 @@
|
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# define the CPU architecture for the k64f
|
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export CPU_ARCH = cortex-m4
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export CPU_FAMILY = kx
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||||
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||||
# map CPU models to generic Kinetis linkerscript
|
||||
LD_MK64FN1M0VLL12 = kinetis_f1024l64u192.ld
|
||||
|
||||
# tell the build system that the CPU depends on the Kinetis common files
|
||||
export USEMODULE += kinetis_common
|
||||
|
||||
# define path to kinetis module, which is needed for this CPU
|
||||
export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
|
||||
# CPU depends on the kinetis module, so include it
|
||||
include $(KINETIS_COMMON)Makefile.include
|
||||
|
||||
# this CPU implementation is using kinetis common startup
|
||||
export COMMON_STARTUP = $(KINETIS_COMMON)
|
||||
|
||||
include $(RIOTMAKE)/arch/cortexm.inc.mk
|
||||
@ -1,45 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Freie Universität Berlin
|
||||
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_k64f NXP Kinetis K64F
|
||||
* @ingroup cpu
|
||||
* @brief CPU specific implementations for the NXP Kinetis K64F
|
||||
* Cortex-M4 MCU
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
* @author Johann Fischer <j.fischer@phytec.de>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_H
|
||||
#define CPU_CONF_H
|
||||
|
||||
#ifdef CPU_MODEL_MK64FN1M0VLL12
|
||||
#include "vendor/MK64F12.h"
|
||||
#else
|
||||
#error "undefined CPU_MODEL"
|
||||
#endif
|
||||
|
||||
#include "cpu_conf_kinetis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_H */
|
||||
/** @} */
|
||||
@ -1 +0,0 @@
|
||||
include $(RIOTMAKE)/periph.mk
|
||||
10
cpu/kinetis/Makefile
Normal file
10
cpu/kinetis/Makefile
Normal file
@ -0,0 +1,10 @@
|
||||
# define the module that is build
|
||||
MODULE = cpu
|
||||
|
||||
# add a list of subdirectories that should also be built
|
||||
DIRS = periph $(RIOTCPU)/cortexm_common
|
||||
|
||||
# (file triggers compiler bug. see https://github.com/RIOT-OS/RIOT/issues/5775)
|
||||
SRC_NOLTO += vectors.c
|
||||
|
||||
include $(RIOTBASE)/Makefile.base
|
||||
5
cpu/kinetis/Makefile.features
Normal file
5
cpu/kinetis/Makefile.features
Normal file
@ -0,0 +1,5 @@
|
||||
FEATURES_PROVIDED += periph_cpuid
|
||||
FEATURES_PROVIDED += periph_hwrng
|
||||
FEATURES_PROVIDED += periph_gpio
|
||||
|
||||
include $(RIOTCPU)/cortexm_common/Makefile.features
|
||||
50
cpu/kinetis/Makefile.include
Normal file
50
cpu/kinetis/Makefile.include
Normal file
@ -0,0 +1,50 @@
|
||||
ifeq (,$(KINETIS_SERIES))
|
||||
# Parse parameters from CPU_MODEL using the kinetis-info.mk script in the same
|
||||
# directory as this Makefile.
|
||||
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/kinetis-info.mk
|
||||
endif
|
||||
|
||||
# Add search path for linker scripts
|
||||
LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts
|
||||
|
||||
# Use generic linker script for all Kinetis based CPUs
|
||||
LINKER_SCRIPT = kinetis.ld
|
||||
|
||||
ROM_START_ADDR = 0x00000000
|
||||
RAM_BASE_ADDR = 0x20000000
|
||||
RAM_START_ADDR = $$(($(RAM_BASE_ADDR)-($(KINETIS_SRAM_L_SIZE) * 1024)))
|
||||
ROM_LEN = $$(($(KINETIS_ROMSIZE) * 1024))
|
||||
RAM_LEN = $$(($(KINETIS_RAMSIZE) * 1024))
|
||||
|
||||
CFLAGS += \
|
||||
-DKINETIS_CORE_$(KINETIS_CORE) \
|
||||
-DKINETIS_SERIES_$(KINETIS_SERIES) \
|
||||
-DKINETIS_FAMILY=$(KINETIS_FAMILY) \
|
||||
-DKINETIS_SUBFAMILY=$(KINETIS_SUBFAMILY) \
|
||||
-DKINETIS_ROMSIZE=$(KINETIS_ROMSIZE) \
|
||||
#
|
||||
|
||||
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_start_addr=$(ROM_START_ADDR)
|
||||
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_base_addr=$(RAM_BASE_ADDR)
|
||||
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR)
|
||||
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN)
|
||||
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN)
|
||||
|
||||
# add the CPU specific flash configuration field for the linker
|
||||
export UNDEF += $(BINDIR)/cpu/fcfield.o
|
||||
|
||||
# include common periph drivers
|
||||
USEMODULE += periph_common
|
||||
|
||||
# select kinetis periph drivers
|
||||
USEMODULE += periph_mcg
|
||||
USEMODULE += periph_wdog
|
||||
|
||||
# Define a recipe to build the watchdog disable binary, used when flashing
|
||||
$(RIOTCPU)/$(CPU)/dist/wdog-disable.bin: $(RIOTCPU)/$(CPU)/dist/wdog-disable.s
|
||||
$(Q)$(MAKE) -C $(RIOTCPU)/$(CPU)/dist/ $(notdir $@)
|
||||
|
||||
# Reset the default goal to not make wdog-disable.bin the default target.
|
||||
.DEFAULT_GOAL :=
|
||||
|
||||
include $(RIOTMAKE)/arch/cortexm.inc.mk
|
||||
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
22
cpu/kinetis/dist/generate-cpu-files/generate-header-includes.awk
vendored
Normal file
22
cpu/kinetis/dist/generate-cpu-files/generate-header-includes.awk
vendored
Normal file
@ -0,0 +1,22 @@
|
||||
# Usage: awk -f <this_script> vendor/MKxxxx.h vendor/MKxxyy.h vendor/MKzzz.h ...
|
||||
/Processor[s]?:/ {
|
||||
i=0;
|
||||
if (FNR == NR) {
|
||||
printf "#if";
|
||||
} else {
|
||||
printf "#elif";
|
||||
}
|
||||
while(match($0, /MK.*/)) {
|
||||
if (i>0) {
|
||||
printf " || \\\n ";
|
||||
}
|
||||
printf " defined(CPU_MODEL_%s)", substr($0, RSTART, RLENGTH);
|
||||
getline;
|
||||
i++;
|
||||
}
|
||||
printf("\n#include \"%s\"\n", FILENAME);
|
||||
nextfile;
|
||||
}
|
||||
END {
|
||||
print "#endif"
|
||||
}
|
||||
@ -1,13 +1,13 @@
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common NXP Kinetis MCU
|
||||
* @defgroup cpu_kinetis NXP Kinetis
|
||||
* @ingroup cpu
|
||||
* @brief NXP Kinetis CPU peripheral drivers
|
||||
* @brief NXP Kinetis Cortex-M MCU specific implementation
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_adc Kinetis ADC
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief ADC driver
|
||||
* @defgroup cpu_kinetis_adc Kinetis ADC
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis ADC driver
|
||||
*
|
||||
* ### ADC configuration example (for periph_conf.h) ###
|
||||
*
|
||||
@ -25,17 +25,17 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_cpuid Kinetis CPUID
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief CPUID driver
|
||||
* @defgroup cpu_kinetis_cpuid Kinetis CPUID
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis CPUID driver
|
||||
*
|
||||
* No configuration is necessary.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_gpio Kinetis GPIO
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief GPIO driver
|
||||
* @defgroup cpu_kinetis_gpio Kinetis GPIO
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis GPIO driver
|
||||
*
|
||||
* The GPIO driver uses the @ref GPIO_PIN(port, pin) macro to declare pins.
|
||||
*
|
||||
@ -43,9 +43,9 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_i2c Kinetis I2C
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief I2C driver
|
||||
* @defgroup cpu_kinetis_i2c Kinetis I2C
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis I2C driver
|
||||
*
|
||||
* ### I2C configuration example (for periph_conf.h) ###
|
||||
*
|
||||
@ -81,9 +81,9 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_pwm Kinetis PWM
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief PWM driver
|
||||
* @defgroup cpu_kinetis_pwm Kinetis PWM
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis PWM driver
|
||||
*
|
||||
* ### PWM configuration example (for periph_conf.h) ###
|
||||
*
|
||||
@ -112,9 +112,9 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_rnga Kinetis RNGA
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief Driver for Freescale's RNGA module. RNGA generates data that
|
||||
* @defgroup cpu_kinetis_rnga Kinetis RNGA
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Driver for NXP Kinetis RNGA module. RNGA generates data that
|
||||
* looks random. Reference Manual recommends to use the RNGA as entropy
|
||||
* source.
|
||||
*
|
||||
@ -127,10 +127,10 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_rngb Kinetis RNGB
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @defgroup cpu_kinetis_rngb Kinetis RNGB
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Low-level random number generator driver implementation.
|
||||
* Driver for Freescale's RNGB module. RNGB generates data that
|
||||
* Driver for NXP Kinetis RNGB module. RNGB generates data that
|
||||
* looks random. Reference Manual recommends to use the RNGB as entropy
|
||||
* source.
|
||||
*
|
||||
@ -143,9 +143,12 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_rtc Kinetis RTC
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief RTC is clocked by a 32.768 kHz clock.
|
||||
* @defgroup cpu_kinetis_rtc Kinetis RTC
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis RTC driver
|
||||
*
|
||||
* RTC is clocked by a 32.768 kHz clock.
|
||||
*
|
||||
* Please note the manual of your MCU or SiP for the
|
||||
* clock setting for the RTC module. After initialization
|
||||
* Time Seconds Register (TSR) increments once a second.
|
||||
@ -168,16 +171,16 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_spi Kinetis SPI
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief Kinetis SPI driver for MCUs with Cortex-M4 core.
|
||||
* @defgroup cpu_kinetis_spi Kinetis SPI
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis SPI driver
|
||||
*
|
||||
* The SPI baud rate and other timings are generated from the bus
|
||||
* clock via prescalers, the hardware module allows for very
|
||||
* detailed timing configuration, but a tool exists to generate a
|
||||
* standard timing configuration for any given module clock frequency.
|
||||
* The timing configuration tool is found in
|
||||
* cpu/kinetis_common/dist/calc_spi_scalers
|
||||
* cpu/kinetis/dist/calc_spi_scalers
|
||||
*
|
||||
* Finer tuning of timings than the RIOT SPI API is capable of is
|
||||
* supported by modifying the generated configuration. See the
|
||||
@ -203,7 +206,7 @@
|
||||
* ### SPI configuration example (for periph_conf.h): ###
|
||||
*
|
||||
* static const uint32_t spi_clk_config[] = {
|
||||
* // Use cpu/kinetis_common/dist/calc_spi_scalers to
|
||||
* // Use cpu/kinetis/dist/calc_spi_scalers to
|
||||
* // generate the timing configuration
|
||||
* };
|
||||
*
|
||||
@ -244,8 +247,8 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_timer Kinetis Timer
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @defgroup cpu_kinetis_timer Kinetis Timer
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Periodic Interrupt Timer (PIT) and Low-Power Timer (LPTMR) driver.
|
||||
*
|
||||
* The PIT is a count down timer, in order to use it with riot-os
|
||||
@ -289,9 +292,10 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_uart Kinetis UART
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @brief Kinetis UART driver.
|
||||
* @defgroup cpu_kinetis_uart Kinetis UART
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Kinetis UART driver
|
||||
*
|
||||
* There are different implementations of the UART interface.
|
||||
* The treatment of interrupts is also slightly different.
|
||||
* The register UARTx_BDH to UARTx_C4 look almost the same.
|
||||
@ -8,7 +8,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
50
cpu/kinetis/include/cpu_conf.h
Normal file
50
cpu/kinetis/include/cpu_conf.h
Normal file
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_H
|
||||
#define CPU_CONF_H
|
||||
|
||||
/* Dispatch to a separate file per family */
|
||||
#if defined(KINETIS_SERIES_K)
|
||||
#include "cpu_conf_kinetis_k.h"
|
||||
#elif defined(KINETIS_SERIES_L)
|
||||
#include "cpu_conf_kinetis_l.h"
|
||||
#elif defined(KINETIS_SERIES_M)
|
||||
#include "cpu_conf_kinetis_m.h"
|
||||
#elif defined(KINETIS_SERIES_V)
|
||||
#include "cpu_conf_kinetis_v.h"
|
||||
#elif defined(KINETIS_SERIES_W)
|
||||
#include "cpu_conf_kinetis_w.h"
|
||||
#endif /* defined(KINETIS_SERIES_x) */
|
||||
|
||||
#ifndef MCU_MEM_MAP_VERSION
|
||||
#error Missing vendor header for the chosen CPU_MODEL
|
||||
#endif
|
||||
#include "cpu_conf_kinetis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_H */
|
||||
/** @} */
|
||||
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
@ -112,6 +112,22 @@ extern "C"
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Hardware random number generator module configuration
|
||||
* @{
|
||||
*/
|
||||
#if !defined(HWRNG_CLKEN) && defined(RNG) && !defined(RNG_CMD_ST_MASK)
|
||||
#define KINETIS_RNGA RNG
|
||||
#if defined(SIM_SCGC3_RNGA_SHIFT)
|
||||
#define HWRNG_CLKEN() (bit_set32(&SIM->SCGC3, SIM_SCGC3_RNGA_SHIFT))
|
||||
#define HWRNG_CLKDIS() (bit_clear32(&SIM->SCGC3, SIM_SCGC3_RNGA_SHIFT))
|
||||
#elif defined(SIM_SCGC6_RNGA_SHIFT)
|
||||
#define HWRNG_CLKEN() (bit_set32(&SIM->SCGC6, SIM_SCGC6_RNGA_SHIFT))
|
||||
#define HWRNG_CLKDIS() (bit_clear32(&SIM->SCGC6, SIM_SCGC6_RNGA_SHIFT))
|
||||
#endif
|
||||
#endif /* KINETIS_RNGA */
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
120
cpu/kinetis/include/cpu_conf_kinetis_k.h
Normal file
120
cpu/kinetis/include/cpu_conf_kinetis_k.h
Normal file
@ -0,0 +1,120 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief CPU specific implementations for the NXP Kinetis K series of
|
||||
* Cortex-M MCUs
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_KINETIS_K_H
|
||||
#define CPU_CONF_KINETIS_K_H
|
||||
|
||||
#if (KINETIS_FAMILY == 2)
|
||||
#if (KINETIS_SUBFAMILY == 2)
|
||||
/* Kinetis K22 */
|
||||
#if defined(CPU_MODEL_MK22FX512VLH12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0VLH12) || \
|
||||
defined(CPU_MODEL_MK22FX512VLK12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0VLK12) || \
|
||||
defined(CPU_MODEL_MK22FX512VLL12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0VLL12) || \
|
||||
defined(CPU_MODEL_MK22FX512VLQ12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0VLQ12) || \
|
||||
defined(CPU_MODEL_MK22FX512VMC12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0VMC12) || \
|
||||
defined(CPU_MODEL_MK22FX512VMD12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0VMD12)
|
||||
#include "vendor/MK22F12.h"
|
||||
#elif defined(CPU_MODEL_MK22FN128VDC10) || \
|
||||
defined(CPU_MODEL_MK22FN128VLH10) || \
|
||||
defined(CPU_MODEL_MK22FN128VLL10) || \
|
||||
defined(CPU_MODEL_MK22FN128VMP10)
|
||||
#include "vendor/MK22F12810.h"
|
||||
#elif defined(CPU_MODEL_MK22FN128CAH12) || \
|
||||
defined(CPU_MODEL_MK22FN256CAH12) || \
|
||||
defined(CPU_MODEL_MK22FN256VDC12) || \
|
||||
defined(CPU_MODEL_MK22FN256VLH12) || \
|
||||
defined(CPU_MODEL_MK22FN256VLL12) || \
|
||||
defined(CPU_MODEL_MK22FN256VMP12)
|
||||
#include "vendor/MK22F25612.h"
|
||||
#elif defined(CPU_MODEL_MK22FN512CAP12) || \
|
||||
defined(CPU_MODEL_MK22FN512VDC12) || \
|
||||
defined(CPU_MODEL_MK22FN512VFX12) || \
|
||||
defined(CPU_MODEL_MK22FN512VLH12) || \
|
||||
defined(CPU_MODEL_MK22FN512VLL12) || \
|
||||
defined(CPU_MODEL_MK22FN512VMP12)
|
||||
#include "vendor/MK22F51212.h"
|
||||
#elif defined(CPU_MODEL_MK22FN1M0AVLH12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0AVLK12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0AVLL12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0AVLQ12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0AVMC12) || \
|
||||
defined(CPU_MODEL_MK22FN1M0AVMD12) || \
|
||||
defined(CPU_MODEL_MK22FX512AVLH12) || \
|
||||
defined(CPU_MODEL_MK22FX512AVLK12) || \
|
||||
defined(CPU_MODEL_MK22FX512AVLL12) || \
|
||||
defined(CPU_MODEL_MK22FX512AVLQ12) || \
|
||||
defined(CPU_MODEL_MK22FX512AVMC12) || \
|
||||
defined(CPU_MODEL_MK22FX512AVMD12)
|
||||
#include "vendor/MK22FA12.h"
|
||||
#endif
|
||||
#endif /* (KINETIS_SUBFAMILY == y) */
|
||||
#elif (KINETIS_FAMILY == 6)
|
||||
#if (KINETIS_SUBFAMILY == 0)
|
||||
#if defined(CPU_MODEL_MK60DN256VLL10) || \
|
||||
defined(CPU_MODEL_MK60DN256VLQ10) || \
|
||||
defined(CPU_MODEL_MK60DN256VMC10) || \
|
||||
defined(CPU_MODEL_MK60DN256VMD10) || \
|
||||
defined(CPU_MODEL_MK60DN512VLL10) || \
|
||||
defined(CPU_MODEL_MK60DN512VLQ10) || \
|
||||
defined(CPU_MODEL_MK60DN512VMC10) || \
|
||||
defined(CPU_MODEL_MK60DN512VMD10) || \
|
||||
defined(CPU_MODEL_MK60DX256VLL10) || \
|
||||
defined(CPU_MODEL_MK60DX256VLQ10) || \
|
||||
defined(CPU_MODEL_MK60DX256VMC10) || \
|
||||
defined(CPU_MODEL_MK60DX256VMD10)
|
||||
#include "vendor/MK60D10.h"
|
||||
#endif
|
||||
/**
|
||||
* @brief This CPU provides an additional ADC clock divider as CFG1[ADICLK]=1
|
||||
*/
|
||||
#define KINETIS_HAVE_ADICLK_BUS_DIV_2 1
|
||||
|
||||
#elif (KINETIS_SUBFAMILY == 4)
|
||||
#if defined(CPU_MODEL_MK64FN1M0CAJ12) || \
|
||||
defined(CPU_MODEL_MK64FN1M0VDC12) || \
|
||||
defined(CPU_MODEL_MK64FN1M0VLL12) || \
|
||||
defined(CPU_MODEL_MK64FN1M0VLQ12) || \
|
||||
defined(CPU_MODEL_MK64FN1M0VMD12) || \
|
||||
defined(CPU_MODEL_MK64FX512VDC12) || \
|
||||
defined(CPU_MODEL_MK64FX512VLL12) || \
|
||||
defined(CPU_MODEL_MK64FX512VLQ12) || \
|
||||
defined(CPU_MODEL_MK64FX512VMD12)
|
||||
#include "vendor/MK64F12.h"
|
||||
#endif
|
||||
#endif /* (KINETIS_SUBFAMILY == y) */
|
||||
#endif /* (KINETIS_FAMILY == x) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_KINETIS_K_H */
|
||||
/** @} */
|
||||
@ -7,10 +7,9 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_k22f NXP Kinetis K22F
|
||||
* @ingroup cpu
|
||||
* @brief CPU specific implementations for the NXP Kinetis K22F
|
||||
* Cortex-M4 MCU
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief CPU specific implementations for the NXP Kinetis L series of
|
||||
* Cortex-M MCUs
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
@ -19,16 +18,14 @@
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_H
|
||||
#define CPU_CONF_H
|
||||
#ifndef CPU_CONF_KINETIS_L_H
|
||||
#define CPU_CONF_KINETIS_L_H
|
||||
|
||||
#ifdef CPU_MODEL_MK22FN512VLH12
|
||||
#include "vendor/MK22F51212.h"
|
||||
#else
|
||||
#error "undefined CPU_MODEL"
|
||||
#endif
|
||||
|
||||
#include "cpu_conf_kinetis.h"
|
||||
#if (KINETIS_FAMILY == 2)
|
||||
#if (KINETIS_SUBFAMILY == 2)
|
||||
/* Put your vendor includes here */
|
||||
#endif /* (KINETIS_SUBFAMILY == y) */
|
||||
#endif /* (KINETIS_FAMILY == x) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
@ -39,5 +36,5 @@ extern "C"
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_H */
|
||||
#endif /* CPU_CONF_KINETIS_L_H */
|
||||
/** @} */
|
||||
40
cpu/kinetis/include/cpu_conf_kinetis_m.h
Normal file
40
cpu/kinetis/include/cpu_conf_kinetis_m.h
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief CPU specific implementations for the NXP Kinetis M series of
|
||||
* Cortex-M MCUs
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_KINETIS_M_H
|
||||
#define CPU_CONF_KINETIS_M_H
|
||||
|
||||
#if (KINETIS_FAMILY == 2)
|
||||
#if (KINETIS_SUBFAMILY == 2)
|
||||
/* Put your vendor includes here */
|
||||
#endif /* (KINETIS_SUBFAMILY == y) */
|
||||
#endif /* (KINETIS_FAMILY == x) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_KINETIS_M_H */
|
||||
/** @} */
|
||||
40
cpu/kinetis/include/cpu_conf_kinetis_v.h
Normal file
40
cpu/kinetis/include/cpu_conf_kinetis_v.h
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief CPU specific implementations for the NXP Kinetis V series of
|
||||
* Cortex-M MCUs
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_KINETIS_V_H
|
||||
#define CPU_CONF_KINETIS_V_H
|
||||
|
||||
#if (KINETIS_FAMILY == 2)
|
||||
#if (KINETIS_SUBFAMILY == 2)
|
||||
/* Put your vendor includes here */
|
||||
#endif /* (KINETIS_SUBFAMILY == y) */
|
||||
#endif /* (KINETIS_FAMILY == x) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_KINETIS_V_H */
|
||||
/** @} */
|
||||
79
cpu/kinetis/include/cpu_conf_kinetis_w.h
Normal file
79
cpu/kinetis/include/cpu_conf_kinetis_w.h
Normal file
@ -0,0 +1,79 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief CPU specific implementations for the NXP Kinetis K series of
|
||||
* Cortex-M MCUs
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_KINETIS_W_H
|
||||
#define CPU_CONF_KINETIS_W_H
|
||||
|
||||
#if defined(KINETIS_CORE_D)
|
||||
/* Kinetis KW2xD */
|
||||
#if defined(CPU_MODEL_MKW21D256VHA5) || \
|
||||
defined(CPU_MODEL_MKW21D512VHA5)
|
||||
#include "vendor/MKW21D5.h"
|
||||
#elif defined(CPU_MODEL_MKW22D512VHA5)
|
||||
#include "vendor/MKW22D5.h"
|
||||
#elif defined(CPU_MODEL_MKW24D512VHA5)
|
||||
#include "vendor/MKW24D5.h"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief This CPU provides an additional ADC clock divider as CFG1[ADICLK]=1
|
||||
*/
|
||||
#define KINETIS_HAVE_ADICLK_BUS_DIV_2 1
|
||||
/**
|
||||
* @name KW2XD SiP internal interconnects between MCU and radio
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define KW2XDRF_PORT_DEV PORTB /**< MCU Port connected to radio*/
|
||||
#define KW2XDRF_PORT PORT_B /**< MCU Port connected to radio*/
|
||||
#define KW2XDRF_GPIO GPIOB /**< GPIO Device connected to radio */
|
||||
#define KW2XDRF_PORT_IRQn PORTB_IRQn
|
||||
/** Clock Enable for PORTB */
|
||||
#define KW2XDRF_PORT_CLKEN() (BITBAND_REG32(SIM->SCGC5, SIM_SCGC5_PORTB_SHIFT) = 1)
|
||||
#define KW2XDRF_PIN_AF 2 /**< Pin Muxing Parameter for GPIO Device*/
|
||||
#define KW2XDRF_PCS0_PIN 10 /**< Radio SPI chip select pin */
|
||||
#define KW2XDRF_SCK_PIN 11 /**< Radio SPI clock pin */
|
||||
#define KW2XDRF_SOUT_PIN 16 /**< Radio SPI MOSI pin */
|
||||
#define KW2XDRF_SIN_PIN 17 /**< Radio SPI MISO pin */
|
||||
#define KW2XDRF_RST_PIN 19 /**< Radio reset pin */
|
||||
#define KW2XDRF_IRQ_PIN 3 /**< radio IRQ pin (active low) */
|
||||
#define KW2XDRF_CLK_CTRL_PORT PORT_C /**< CLK_OUT control pin port */
|
||||
#define KW2XDRF_CLK_CTRL_PORT_DEV PORTC /**< CLK_OUT control pin PORT device */
|
||||
#define KW2XDRF_CLK_CTRL_GPIO GPIOC /**< CLK_OUT control pin GPIO device */
|
||||
#define KW2XDRF_CLK_CTRL_CLKEN() (BITBAND_REG32(SIM->SCGC5, SIM_SCGC5_PORTC_SHIFT) = 1)
|
||||
#define KW2XDRF_CLK_CTRL_PIN 0 /**< CLK_OUT control pin */
|
||||
/** @} */
|
||||
|
||||
#elif defined(KINETIS_CORE_Z)
|
||||
/* Kinetis KWxxZ */
|
||||
/* TODO */
|
||||
#endif /* KINETIS_CORE_x */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_KINETIS_W_H */
|
||||
/** @} */
|
||||
@ -8,8 +8,8 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_mcg Kinetis MCG
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @defgroup cpu_kinetis_mcg Kinetis MCG
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Implementation of the Kinetis Multipurpose Clock Generator
|
||||
* (MCG) driver
|
||||
*
|
||||
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
@ -8,8 +8,8 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_kinetis_common_wdog Kinetis WDOG
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @defgroup cpu_kinetis_wdog Kinetis WDOG
|
||||
* @ingroup cpu_kinetis
|
||||
* @brief Driver for Freescale WDOG device.
|
||||
* There are different implementations of the Watchdog devices.
|
||||
* Currently, it is only possible to turn the Watchdog off.
|
||||
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
146
cpu/kinetis/kinetis-info.mk
Normal file
146
cpu/kinetis/kinetis-info.mk
Normal file
@ -0,0 +1,146 @@
|
||||
# Split the part number into qualification, family, subfamily, core, memory, temperature, package, speed
|
||||
KINETIS_INFO := $(shell printf '%s' '$(CPU_MODEL)' | tr 'a-z' 'A-Z' | sed -E -e 's/^(M|K|S9)K([ELMSVW]?|EA)([0-9]?)([0-9]?)([A-Z])([NX]?)([0-9][0-9M]?[0-9]?)([ABZ]?)(.*)$$/\1 \2 \3 \4 \5 \6 \7 \8:\9/' -e 's/^([^ ]*) /\1 K /' -e 's/^([^:]*):([CMV])(..)([0-9]*).*$$/\1 \2 \3 \4/' -e 's/ / _ /g' -e 's/ / _ /g')
|
||||
|
||||
|
||||
export KINETIS_QUALIFICATION := $(word 1, $(KINETIS_INFO))
|
||||
export KINETIS_SERIES := $(word 2, $(KINETIS_INFO))
|
||||
export KINETIS_FAMILY := $(word 3, $(KINETIS_INFO))
|
||||
export KINETIS_SUBFAMILY := $(word 4, $(KINETIS_INFO))
|
||||
# Core type, D = Cortex-M4, F = Cortex-M4/M7 w/ FPU, Z = Cortex-M0
|
||||
export KINETIS_CORE := $(word 5, $(KINETIS_INFO))
|
||||
# FlexRAM (X) or not (N), does not apply to all families
|
||||
export KINETIS_FLEXMEM := $(word 6, $(KINETIS_INFO))
|
||||
# ROM size, KiB
|
||||
export KINETIS_ROMSIZE := $(word 7, $(KINETIS_INFO))
|
||||
# some special cases for ROM size, refactor when there are too many special cases
|
||||
ifeq ($(KINETIS_ROMSIZE), 1M0)
|
||||
export KINETIS_ROMSIZE = 1024
|
||||
else ifeq ($(KINETIS_ROMSIZE), 1M2)
|
||||
export KINETIS_ROMSIZE = 1280
|
||||
else ifeq ($(KINETIS_ROMSIZE), 2M0)
|
||||
export KINETIS_ROMSIZE = 2048
|
||||
endif
|
||||
# Mask set revision, only some parts, see data sheet for details
|
||||
export KINETIS_MASKREV := $(word 8, $(KINETIS_INFO))
|
||||
# Temperature range, C = -40--+85, V = -40--+105, M = -40--+125
|
||||
export KINETIS_TEMPRANGE := $(word 9, $(KINETIS_INFO))
|
||||
# Chip package code
|
||||
export KINETIS_PACKAGE := $(word 10, $(KINETIS_INFO))
|
||||
# Maximum speed, MHz/10, max speed is usually 48 MHz if this number is missing
|
||||
export KINETIS_SPEED := $(word 11, $(KINETIS_INFO))
|
||||
|
||||
ifeq ($(KINETIS_CORE), Z)
|
||||
# Cortex-M0+
|
||||
export CPU_ARCH = cortex-m0plus
|
||||
export CPU_FAMILY = klx
|
||||
else ifeq ($(KINETIS_CORE), D)
|
||||
# Cortex-M4
|
||||
export CPU_ARCH = cortex-m4
|
||||
export CPU_FAMILY = kx
|
||||
else ifeq ($(KINETIS_CORE), F)
|
||||
# Cortex-M4F or Cortex-M7
|
||||
# TODO: Add floating point support
|
||||
export CPU_ARCH = cortex-m4
|
||||
export CPU_FAMILY = kx
|
||||
endif
|
||||
|
||||
# RAM sizes are a bit arbitrary, but are usually dependent on ROM size and core speed.
|
||||
# KINETIS_RAMSIZE is used inside a $(( )) shell arithmetic block, so it is OK to
|
||||
# use mathematical expressions here.
|
||||
# This block is not complete, but it does cover all the CPUs supported by RIOT, and then some.
|
||||
ifeq ($(KINETIS_SERIES),K)
|
||||
# A majority of the models have this ratio of SRAM_L vs total SRAM size
|
||||
KINETIS_SRAM_L_SIZE = $(KINETIS_RAMSIZE)/2
|
||||
ifeq ($(KINETIS_ROMSIZE),2048)
|
||||
ifeq ($(firstword $(sort $(KINETIS_SUBFAMILY) 7)),7)
|
||||
# subfamily >= 7
|
||||
# OCRAM in K27, K28 is not mapped here.
|
||||
KINETIS_RAMSIZE = 512
|
||||
else
|
||||
KINETIS_RAMSIZE = 256
|
||||
endif
|
||||
else ifeq ($(KINETIS_ROMSIZE),1024)
|
||||
ifeq ($(firstword $(sort $(KINETIS_SUBFAMILY) 3)),3)
|
||||
# subfamily >= 3
|
||||
KINETIS_RAMSIZE = 256
|
||||
else
|
||||
KINETIS_RAMSIZE = 128
|
||||
endif
|
||||
else ifeq ($(KINETIS_ROMSIZE),512)
|
||||
ifeq ($(KINETIS_SPEED),5)
|
||||
KINETIS_RAMSIZE = 64
|
||||
else ifeq ($(KINETIS_SUBFAMILY),4)
|
||||
KINETIS_RAMSIZE = 192
|
||||
else
|
||||
KINETIS_RAMSIZE = 128
|
||||
endif
|
||||
else ifeq ($(KINETIS_ROMSIZE),256)
|
||||
ifeq ($(KINETIS_SPEED),5)
|
||||
KINETIS_RAMSIZE = 32
|
||||
else ifeq ($(KINETIS_SPEED),15)
|
||||
KINETIS_RAMSIZE = 256
|
||||
else ifeq ($(KINETIS_FAMILY)$(KINETIS_SUBFAMILY),22)
|
||||
KINETIS_RAMSIZE = 48
|
||||
else ifeq ($(KINETIS_FAMILY)$(KINETIS_SUBFAMILY),24)
|
||||
KINETIS_RAMSIZE = 256
|
||||
endif
|
||||
else ifeq ($(KINETIS_ROMSIZE),128)
|
||||
ifeq ($(KINETIS_FAMILY),0)
|
||||
KINETIS_RAMSIZE = 16
|
||||
else ifeq ($(KINETIS_SUBFAMILY)$(KINETIS_SPEED),05)
|
||||
KINETIS_RAMSIZE = 16
|
||||
else ifeq ($(KINETIS_CORE),F)
|
||||
KINETIS_RAMSIZE = 24
|
||||
KINETIS_SRAM_L_SIZE = 8
|
||||
else
|
||||
KINETIS_RAMSIZE = 32
|
||||
endif
|
||||
else ifeq ($(KINETIS_ROMSIZE),64)
|
||||
KINETIS_RAMSIZE = 16
|
||||
endif
|
||||
ifneq (,$(filter $(KINETIS_RAMSIZE),192 256))
|
||||
# There seems to be a cap on SRAM_L at 64 kB across the whole K series
|
||||
KINETIS_SRAM_L_SIZE = 64
|
||||
endif
|
||||
else ifeq ($(KINETIS_SERIES),W)
|
||||
KINETIS_RAMSIZE = $(KINETIS_ROMSIZE)/8
|
||||
ifeq ($(KINETIS_CORE),D)
|
||||
KINETIS_SRAM_L_SIZE = $(KINETIS_RAMSIZE)/2
|
||||
else ifeq ($(KINETIS_FAMILY),0)
|
||||
# 01Z
|
||||
KINETIS_SRAM_L_SIZE = 4
|
||||
else ifeq ($(KINETIS_SUBFAMILY),0)
|
||||
# 20Z, 30Z, 40Z
|
||||
KINETIS_SRAM_L_SIZE = 4
|
||||
else ifeq ($(KINETIS_SUBFAMILY),1)
|
||||
# 21Z, 31Z, 41Z
|
||||
KINETIS_RAMSIZE = $(KINETIS_ROMSIZE)/4
|
||||
KINETIS_SRAM_L_SIZE = $(KINETIS_RAMSIZE)/4
|
||||
else
|
||||
# TODO: KW35/36
|
||||
$(error Unknown Kinetis W)
|
||||
endif
|
||||
endif
|
||||
export KINETIS_RAMSIZE
|
||||
export KINETIS_SRAM_L_SIZE
|
||||
|
||||
# Some debug output to use in case things are not being correctly detected
|
||||
ifeq ($(KINETIS_INFO_DEBUG),1)
|
||||
$(info Kinetis CPU info: $(KINETIS_INFO))
|
||||
$(info Qualification: $(KINETIS_QUALIFICATION))
|
||||
$(info Core: $(KINETIS_CORE))
|
||||
$(info Series: $(KINETIS_SERIES))
|
||||
$(info Family: $(KINETIS_FAMILY))
|
||||
$(info Subfamily: $(KINETIS_SUBFAMILY))
|
||||
$(info ROM size: $(KINETIS_ROMSIZE))
|
||||
$(info RAM size: $(shell printf '%-4s (%s)' $$(($(KINETIS_RAMSIZE))) '$(KINETIS_RAMSIZE)'))
|
||||
$(info SRAM_L: $(shell printf '%-4s (%s)' $$(($(KINETIS_SRAM_L_SIZE))) '$(KINETIS_SRAM_L_SIZE)'))
|
||||
$(info Max speed: $(KINETIS_SPEED))
|
||||
$(info Temperature range: $(KINETIS_TEMPRANGE))
|
||||
$(info Revision: $(KINETIS_MASKREV))
|
||||
$(info Package code: $(KINETIS_PACKAGE))
|
||||
endif
|
||||
|
||||
ifeq (,$(KINETIS_RAMSIZE))
|
||||
$(error Unknown Kinetis RAM size, update kinetis-info.mk with your CPU)
|
||||
endif
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
|
||||
* Copyright (C) 2015 Eistec AB
|
||||
* Copyright (C) 2015-2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
@ -19,6 +19,19 @@
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
_vectors_length = 0x400;
|
||||
_flashsec_length = 0x10;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
vectors (rx) : ORIGIN = _rom_start_addr, LENGTH = _vectors_length
|
||||
flashsec (rx) : ORIGIN = _rom_start_addr + _vectors_length, LENGTH = _flashsec_length
|
||||
rom (rx) : ORIGIN = _rom_start_addr + _vectors_length + _flashsec_length, LENGTH = _rom_length - (_vectors_length + _flashsec_length)
|
||||
ram (rwx) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
@ -9,7 +9,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_adc
|
||||
* @{
|
||||
*
|
||||
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_dac
|
||||
*
|
||||
* @{
|
||||
@ -31,9 +31,6 @@
|
||||
#include "periph/dac.h"
|
||||
#include "periph_conf.h"
|
||||
|
||||
/* only compile this file if there are DAC lines defined */
|
||||
#ifdef DAC_NUMOF
|
||||
|
||||
static inline DAC_Type *dev(dac_t line)
|
||||
{
|
||||
return dac_config[line].dev;
|
||||
@ -84,5 +81,3 @@ void dac_poweroff(dac_t line)
|
||||
|
||||
bit_clear8(&dac_config[line].dev->C0, DAC_C0_DACEN_SHIFT);
|
||||
}
|
||||
|
||||
#endif /* DAC_NUMOF */
|
||||
@ -9,7 +9,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_gpio
|
||||
*
|
||||
* @{
|
||||
@ -8,7 +8,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_hwng
|
||||
*
|
||||
* @{
|
||||
@ -25,6 +25,7 @@
|
||||
#include "cpu.h"
|
||||
#include "periph/hwrng.h"
|
||||
#include "periph_conf.h"
|
||||
#include "bit.h"
|
||||
|
||||
#ifdef KINETIS_RNGA
|
||||
|
||||
@ -60,7 +61,7 @@ void hwrng_read(void *buf, unsigned int num)
|
||||
}
|
||||
}
|
||||
|
||||
/* power of the device */
|
||||
/* power off the device */
|
||||
KINETIS_RNGA->CR = 0;
|
||||
HWRNG_CLKDIS();
|
||||
}
|
||||
@ -43,8 +43,6 @@
|
||||
#else
|
||||
#define TRACE(...)
|
||||
#endif
|
||||
/* guard file in case no I2C device is defined */
|
||||
#if I2C_NUMOF
|
||||
|
||||
/**
|
||||
* @brief Array holding one pre-initialized mutex for each I2C device
|
||||
@ -518,5 +516,3 @@ void i2c_poweroff(i2c_t dev)
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* I2C_NUMOF */
|
||||
@ -8,7 +8,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_mcg
|
||||
* @{
|
||||
*
|
||||
@ -9,7 +9,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_pm
|
||||
* @{
|
||||
*
|
||||
@ -9,7 +9,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_pwm
|
||||
*
|
||||
* @{
|
||||
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_rtc
|
||||
*
|
||||
* @{
|
||||
@ -30,9 +30,6 @@
|
||||
#define ENABLE_DEBUG (0)
|
||||
#include "debug.h"
|
||||
|
||||
#if RTC_NUMOF
|
||||
|
||||
|
||||
typedef struct {
|
||||
rtc_alarm_cb_t cb; /**< callback called from RTC interrupt */
|
||||
} rtc_state_t;
|
||||
@ -111,5 +108,3 @@ static void rtc_cb(void* arg)
|
||||
rtc_callback.cb(arg);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* RTC_NUMOF */
|
||||
@ -8,7 +8,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_rtt
|
||||
*
|
||||
* @{
|
||||
@ -35,9 +35,6 @@
|
||||
#define ENABLE_DEBUG (0)
|
||||
#include "debug.h"
|
||||
|
||||
#if RTT_NUMOF
|
||||
|
||||
|
||||
#ifndef RTC_LOAD_CAP_BITS
|
||||
#define RTC_LOAD_CAP_BITS 0
|
||||
#endif
|
||||
@ -200,5 +197,3 @@ void RTT_ISR(void)
|
||||
|
||||
cortexm_isr_end();
|
||||
}
|
||||
|
||||
#endif /* RTC_NUMOF */
|
||||
@ -10,7 +10,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_spi
|
||||
*
|
||||
* @{
|
||||
@ -9,7 +9,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_timer
|
||||
*
|
||||
* @{
|
||||
@ -9,7 +9,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_uart
|
||||
*
|
||||
* @{
|
||||
@ -8,7 +8,7 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup cpu_kinetis
|
||||
* @ingroup drivers_periph_watchdog
|
||||
*
|
||||
* @{
|
||||
@ -1,9 +0,0 @@
|
||||
# define the module that is build
|
||||
MODULE = kinetis_common
|
||||
|
||||
DIRS += periph
|
||||
|
||||
# (file triggers compiler bug. see #5775)
|
||||
SRC_NOLTO += vectors.c
|
||||
|
||||
include $(RIOTBASE)/Makefile.base
|
||||
@ -1,4 +0,0 @@
|
||||
FEATURES_PROVIDED += periph_cpuid
|
||||
FEATURES_PROVIDED += periph_hwrng
|
||||
|
||||
-include $(RIOTCPU)/cortexm_common/Makefile.features
|
||||
@ -1,29 +0,0 @@
|
||||
# include module specific includes
|
||||
export INCLUDES += -I$(RIOTCPU)/kinetis_common/include
|
||||
|
||||
# Add search path for linker scripts
|
||||
export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
|
||||
|
||||
# Use generic linkerscripts for all Kinetis based CPUs
|
||||
export LINKER_SCRIPT ?= $(LD_$(shell echo $(CPU_MODEL) | tr a-z A-Z))
|
||||
|
||||
# add the CPU specific code for the linker
|
||||
export UNDEF += $(BINDIR)/kinetis_common/fcfield.o
|
||||
|
||||
# add the CPU specific interrupt vector table definition for the linker
|
||||
export UNDEF += $(BINDIR)/kinetis_common/vectors.o
|
||||
|
||||
# include kinetis common periph drivers
|
||||
USEMODULE += kinetis_common_periph
|
||||
USEMODULE += periph_common
|
||||
|
||||
# select kinetis periph drivers
|
||||
USEMODULE += periph_mcg
|
||||
USEMODULE += periph_wdog
|
||||
|
||||
# Define a recipe to build the watchdog disable binary, used when flashing
|
||||
$(RIOTCPU)/kinetis_common/dist/wdog-disable.bin: $(RIOTCPU)/kinetis_common/dist/wdog-disable.s
|
||||
$(Q)$(MAKE) -C $(RIOTCPU)/kinetis_common/dist/ $(notdir $@)
|
||||
|
||||
# Reset the default goal to not make wdog-disable.bin the default target.
|
||||
.DEFAULT_GOAL :=
|
||||
@ -1,18 +0,0 @@
|
||||
/*
|
||||
* NXP Kinetis CPU with the following memory layout:
|
||||
* 1024 kB flash @ 0x00000000
|
||||
* 256 kB RAM, split into two banks: 64 kB SRAM_L, 192 kB SRAM_U.
|
||||
* SRAM_L ends at 0x1fffffff, SRAM_U begins at 0x20000000
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
||||
rom (rx) : ORIGIN = 0x00000410, LENGTH = 1024K - 0x410
|
||||
ram (rwx) : ORIGIN = 0x20000000 - 64K, LENGTH = 256K
|
||||
}
|
||||
|
||||
INCLUDE kinetis.ld
|
||||
@ -1,18 +0,0 @@
|
||||
/*
|
||||
* NXP Kinetis CPU with the following memory layout:
|
||||
* 256 kB flash @ 0x00000000
|
||||
* 32 kB RAM, split into two banks: 16 kB SRAM_L, 16 kB SRAM_U.
|
||||
* SRAM_L ends at 0x1fffffff, SRAM_U begins at 0x20000000
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
||||
rom (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
|
||||
ram (rwx) : ORIGIN = 0x20000000 - 16K, LENGTH = 32K
|
||||
}
|
||||
|
||||
INCLUDE kinetis.ld
|
||||
@ -1,18 +0,0 @@
|
||||
/*
|
||||
* NXP Kinetis CPU with the following memory layout:
|
||||
* 256 kB flash @ 0x00000000
|
||||
* 64 kB RAM, split into two banks: 32 kB SRAM_L, 32 kB SRAM_U.
|
||||
* SRAM_L ends at 0x1fffffff, SRAM_U begins at 0x20000000
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
||||
rom (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
|
||||
ram (rwx) : ORIGIN = 0x20000000 - 32K, LENGTH = 64K
|
||||
}
|
||||
|
||||
INCLUDE kinetis.ld
|
||||
@ -1,18 +0,0 @@
|
||||
/*
|
||||
* NXP Kinetis CPU with the following memory layout:
|
||||
* 512 kB flash @ 0x00000000
|
||||
* 64 kB RAM, split into two banks: 32 kB SRAM_L, 32 kB SRAM_U.
|
||||
* SRAM_L ends at 0x1fffffff, SRAM_U begins at 0x20000000
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
||||
rom (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
|
||||
ram (rwx) : ORIGIN = 0x20000000 - 32K, LENGTH = 64K
|
||||
}
|
||||
|
||||
INCLUDE kinetis.ld
|
||||
@ -1,18 +0,0 @@
|
||||
/*
|
||||
* NXP Kinetis CPU with the following memory layout:
|
||||
* 512 kB flash @ 0x00000000
|
||||
* 128 kB RAM, split into two banks: 64 kB SRAM_L, 64 kB SRAM_U.
|
||||
* SRAM_L ends at 0x1fffffff, SRAM_U begins at 0x20000000
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
||||
rom (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
|
||||
ram (rwx) : ORIGIN = 0x20000000 - 64K, LENGTH = 128K
|
||||
}
|
||||
|
||||
INCLUDE kinetis.ld
|
||||
@ -1,3 +0,0 @@
|
||||
MODULE = kinetis_common_periph
|
||||
|
||||
include $(RIOTMAKE)/periph.mk
|
||||
@ -1,73 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2016 Freie Universität Berlin
|
||||
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
|
||||
* Copyright (C) 2015 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_kinetis_common
|
||||
* @ingroup drivers_periph_hwng
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief HWRNG interface implementation
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se> (adaption for Freescale's RNGB)
|
||||
* @author Johann Fischer <j.fischer@phytec.de> (adaption for Freescale's RNGA)
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include "cpu.h"
|
||||
#include "periph/hwrng.h"
|
||||
#include "periph_conf.h"
|
||||
|
||||
#ifdef KINETIS_RNGB
|
||||
|
||||
void hwrng_init(void)
|
||||
{
|
||||
/* nothing to be done here */
|
||||
}
|
||||
|
||||
void hwrng_read(void *buf, unsigned int num)
|
||||
{
|
||||
unsigned int count = 0;
|
||||
uint8_t *b = (uint8_t *)buf;
|
||||
|
||||
HWRNG_CLKEN();
|
||||
|
||||
if ((KINETIS_RNGB->VER & RNG_VER_TYPE_MASK) != 0b0001) {
|
||||
/* Wrong type of RNG */
|
||||
/* TODO: Handle */
|
||||
}
|
||||
|
||||
/* Software reset, bit is self-clearing */
|
||||
BITBAND_REG32(KINETIS_RNGB->CMD, RNG_CMD_SR_SHIFT) = 1;
|
||||
/* Set up automatic reseed */
|
||||
KINETIS_RNGB->CR = RNG_CR_AR_MASK | RNG_CR_MASKERR_MASK | RNG_CR_MASKDONE_MASK;
|
||||
|
||||
while (count < num) {
|
||||
uint32_t tmp;
|
||||
|
||||
/* wait for random data to be ready to read */
|
||||
while (!(KINETIS_RNGB->SR & RNG_SR_FIFO_LVL_MASK));
|
||||
|
||||
tmp = KINETIS_RNGB->OUT;
|
||||
|
||||
/* copy data into result vector */
|
||||
for (int i = 0; i < 4 && count < num; i++) {
|
||||
b[count++] = (uint8_t)tmp;
|
||||
tmp = tmp >> 8;
|
||||
}
|
||||
}
|
||||
|
||||
KINETIS_RNGB->CR = 0;
|
||||
HWRNG_CLKDIS();
|
||||
}
|
||||
|
||||
#endif /* KINETIS_RNGB */
|
||||
@ -1,7 +0,0 @@
|
||||
# define the module that is build
|
||||
MODULE = cpu
|
||||
|
||||
# add a list of subdirectories, that should also be build
|
||||
DIRS = periph $(RIOTCPU)/cortexm_common $(KINETIS_COMMON)
|
||||
|
||||
include $(RIOTBASE)/Makefile.base
|
||||
@ -1 +0,0 @@
|
||||
-include $(RIOTCPU)/kinetis_common/Makefile.dep
|
||||
@ -1 +0,0 @@
|
||||
-include $(RIOTCPU)/kinetis_common/Makefile.features
|
||||
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Reference in New Issue
Block a user