mirror of
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cpu/msp430_common: bump msp430-gcc-support-files to 1.210
This commit is contained in:
parent
ef099f9d46
commit
909d740d37
@ -1,3 +1,43 @@
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Build 1.210 (GCC)
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=================
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05/14/2020
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New device support:
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------------------
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- None
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New features / changes:
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-----------------------
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- Adjusted high-memory boundaries in default linker command files to fix CPU47
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- Changed lower (<0x10000) memory name from 'ROM' to 'FRAM' in applicable linker
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command files
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- Removed redundant TLV #defines from header files
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Bug fixes:
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----------
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- Removed invalid IO ports from several MSP430FRxx devices
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- Added missing HSPLL #defines for MSP430FR6043 family
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- Fixed FR2XX/4XX family include guard in legacy.h
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Build 1.209 (GCC)
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=================
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02/03/2020
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New device support:
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------------------
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- MSP430FR2673, MSP430FR2672
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- MSP430FR6005, MSP430FR6007
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New features / changes:
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-----------------------
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- None
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Bug fixes:
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----------
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- None
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Build 1.208 (GCC)
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=================
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08/29/2019
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File diff suppressed because it is too large
Load Diff
@ -1,404 +0,0 @@
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/* ============================================================================ */
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/* Copyright (c) 2019, Texas Instruments Incorporated */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following conditions */
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/* are met: */
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/* */
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/* * Redistributions of source code must retain the above copyright */
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/* notice, this list of conditions and the following disclaimer. */
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/* */
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/* * Redistributions in binary form must reproduce the above copyright */
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/* notice, this list of conditions and the following disclaimer in the */
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/* documentation and/or other materials provided with the distribution. */
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/* */
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/* * Neither the name of Texas Instruments Incorporated nor the names of */
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/* its contributors may be used to endorse or promote products derived */
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/* from this software without specific prior written permission. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
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/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
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/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
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/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
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/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
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/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
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/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
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/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
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/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
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/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ============================================================================ */
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/* This file supports CC430F6137 devices. */
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/* Version: 1.208 */
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/* Default linker script, for normal executables */
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OUTPUT_ARCH(msp430)
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ENTRY(_start)
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MEMORY {
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SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
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BSL : ORIGIN = 0x1000, LENGTH = 0x0800
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RAM : ORIGIN = 0x1C00, LENGTH = 0x0FFE /* END=0x2BFD, size 4094 */
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INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
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INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
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INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
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INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
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INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
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ROM (rx) : ORIGIN = 0x8000, LENGTH = 0x7F80 /* END=0xFF7F, size 32640 */
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VECT1 : ORIGIN = 0xFF80, LENGTH = 0x0002
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VECT2 : ORIGIN = 0xFF82, LENGTH = 0x0002
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VECT3 : ORIGIN = 0xFF84, LENGTH = 0x0002
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VECT4 : ORIGIN = 0xFF86, LENGTH = 0x0002
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VECT5 : ORIGIN = 0xFF88, LENGTH = 0x0002
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VECT6 : ORIGIN = 0xFF8A, LENGTH = 0x0002
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VECT7 : ORIGIN = 0xFF8C, LENGTH = 0x0002
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VECT8 : ORIGIN = 0xFF8E, LENGTH = 0x0002
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VECT9 : ORIGIN = 0xFF90, LENGTH = 0x0002
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VECT10 : ORIGIN = 0xFF92, LENGTH = 0x0002
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VECT11 : ORIGIN = 0xFF94, LENGTH = 0x0002
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VECT12 : ORIGIN = 0xFF96, LENGTH = 0x0002
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VECT13 : ORIGIN = 0xFF98, LENGTH = 0x0002
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VECT14 : ORIGIN = 0xFF9A, LENGTH = 0x0002
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VECT15 : ORIGIN = 0xFF9C, LENGTH = 0x0002
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VECT16 : ORIGIN = 0xFF9E, LENGTH = 0x0002
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VECT17 : ORIGIN = 0xFFA0, LENGTH = 0x0002
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VECT18 : ORIGIN = 0xFFA2, LENGTH = 0x0002
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VECT19 : ORIGIN = 0xFFA4, LENGTH = 0x0002
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VECT20 : ORIGIN = 0xFFA6, LENGTH = 0x0002
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VECT21 : ORIGIN = 0xFFA8, LENGTH = 0x0002
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VECT22 : ORIGIN = 0xFFAA, LENGTH = 0x0002
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VECT23 : ORIGIN = 0xFFAC, LENGTH = 0x0002
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VECT24 : ORIGIN = 0xFFAE, LENGTH = 0x0002
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VECT25 : ORIGIN = 0xFFB0, LENGTH = 0x0002
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VECT26 : ORIGIN = 0xFFB2, LENGTH = 0x0002
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VECT27 : ORIGIN = 0xFFB4, LENGTH = 0x0002
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VECT28 : ORIGIN = 0xFFB6, LENGTH = 0x0002
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VECT29 : ORIGIN = 0xFFB8, LENGTH = 0x0002
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VECT30 : ORIGIN = 0xFFBA, LENGTH = 0x0002
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VECT31 : ORIGIN = 0xFFBC, LENGTH = 0x0002
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VECT32 : ORIGIN = 0xFFBE, LENGTH = 0x0002
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VECT33 : ORIGIN = 0xFFC0, LENGTH = 0x0002
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VECT34 : ORIGIN = 0xFFC2, LENGTH = 0x0002
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VECT35 : ORIGIN = 0xFFC4, LENGTH = 0x0002
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VECT36 : ORIGIN = 0xFFC6, LENGTH = 0x0002
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VECT37 : ORIGIN = 0xFFC8, LENGTH = 0x0002
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VECT38 : ORIGIN = 0xFFCA, LENGTH = 0x0002
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VECT39 : ORIGIN = 0xFFCC, LENGTH = 0x0002
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VECT40 : ORIGIN = 0xFFCE, LENGTH = 0x0002
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VECT41 : ORIGIN = 0xFFD0, LENGTH = 0x0002
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VECT42 : ORIGIN = 0xFFD2, LENGTH = 0x0002
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VECT43 : ORIGIN = 0xFFD4, LENGTH = 0x0002
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VECT44 : ORIGIN = 0xFFD6, LENGTH = 0x0002
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VECT45 : ORIGIN = 0xFFD8, LENGTH = 0x0002
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VECT46 : ORIGIN = 0xFFDA, LENGTH = 0x0002
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VECT47 : ORIGIN = 0xFFDC, LENGTH = 0x0002
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VECT48 : ORIGIN = 0xFFDE, LENGTH = 0x0002
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VECT49 : ORIGIN = 0xFFE0, LENGTH = 0x0002
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VECT50 : ORIGIN = 0xFFE2, LENGTH = 0x0002
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VECT51 : ORIGIN = 0xFFE4, LENGTH = 0x0002
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VECT52 : ORIGIN = 0xFFE6, LENGTH = 0x0002
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VECT53 : ORIGIN = 0xFFE8, LENGTH = 0x0002
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VECT54 : ORIGIN = 0xFFEA, LENGTH = 0x0002
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VECT55 : ORIGIN = 0xFFEC, LENGTH = 0x0002
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VECT56 : ORIGIN = 0xFFEE, LENGTH = 0x0002
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VECT57 : ORIGIN = 0xFFF0, LENGTH = 0x0002
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VECT58 : ORIGIN = 0xFFF2, LENGTH = 0x0002
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VECT59 : ORIGIN = 0xFFF4, LENGTH = 0x0002
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VECT60 : ORIGIN = 0xFFF6, LENGTH = 0x0002
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VECT61 : ORIGIN = 0xFFF8, LENGTH = 0x0002
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VECT62 : ORIGIN = 0xFFFA, LENGTH = 0x0002
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VECT63 : ORIGIN = 0xFFFC, LENGTH = 0x0002
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RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
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}
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SECTIONS
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{
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__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
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__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
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__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
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__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
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__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
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__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
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__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
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__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
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__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
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__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10
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__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11
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__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
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__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
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__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
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__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15
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__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16
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__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17
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__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18
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__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19
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__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20
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__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21
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__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22
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__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23
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__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24
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__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25
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__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26
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__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27
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__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) } > VECT28
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__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) } > VECT29
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__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) } > VECT30
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__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) } > VECT31
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__interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) } > VECT32
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__interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) } > VECT33
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__interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) } > VECT34
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__interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) } > VECT35
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__interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) } > VECT36
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__interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) } > VECT37
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__interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) } > VECT38
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__interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) } > VECT39
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__interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) } > VECT40
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__interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) } > VECT41
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__interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) } > VECT42
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__interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) } > VECT43
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__interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) } > VECT44
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__interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) } > VECT45
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__interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_aes)) } > VECT46
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__interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_rtc)) } > VECT47
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__interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_lcd_b)) } > VECT48
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__interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_port2)) } > VECT49
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__interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_port1)) } > VECT50
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__interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT51
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__interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT52
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__interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_dma)) } > VECT53
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__interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_cc1101)) } > VECT54
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__interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT55
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__interrupt_vector_56 : { KEEP (*(__interrupt_vector_56)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT56
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__interrupt_vector_57 : { KEEP (*(__interrupt_vector_57)) KEEP (*(__interrupt_vector_adc12)) } > VECT57
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__interrupt_vector_58 : { KEEP (*(__interrupt_vector_58)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT58
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__interrupt_vector_59 : { KEEP (*(__interrupt_vector_59)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT59
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__interrupt_vector_60 : { KEEP (*(__interrupt_vector_60)) KEEP (*(__interrupt_vector_wdt)) } > VECT60
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__interrupt_vector_61 : { KEEP (*(__interrupt_vector_61)) KEEP (*(__interrupt_vector_comp_b)) } > VECT61
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__interrupt_vector_62 : { KEEP (*(__interrupt_vector_62)) KEEP (*(__interrupt_vector_unmi)) } > VECT62
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__interrupt_vector_63 : { KEEP (*(__interrupt_vector_63)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT63
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__reset_vector :
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{
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KEEP (*(__interrupt_vector_64))
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KEEP (*(__interrupt_vector_reset))
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KEEP (*(.resetvec))
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} > RESETVEC
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.rodata :
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{
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. = ALIGN(2);
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*(.plt)
|
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*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
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*(.rodata1)
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KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
|
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} > ROM
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/* Note: This is a separate .rodata section for sections which are
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read only but which older linkers treat as read-write.
|
||||
This prevents older linkers from marking the entire .rodata
|
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section as read-write. */
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.rodata2 :
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{
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. = ALIGN(2);
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PROVIDE (__preinit_array_start = .);
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||||
KEEP (*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(2);
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PROVIDE (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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||||
KEEP (*(.init_array))
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||||
PROVIDE (__init_array_end = .);
|
||||
. = ALIGN(2);
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||||
PROVIDE (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
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||||
KEEP (*(SORT(.fini_array.*)))
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PROVIDE (__fini_array_end = .);
|
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. = ALIGN(2);
|
||||
*(.eh_frame_hdr)
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KEEP (*(.eh_frame))
|
||||
|
||||
/* gcc uses crtbegin.o to find the start of the constructors, so
|
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we make sure it is first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not actually link against
|
||||
crtbegin.o; the linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it doesn't matter which
|
||||
directory crtbegin.o is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
|
||||
/* We don't want to include the .ctor section from from the
|
||||
crtend.o file until after the sorted ctors. The .ctor section
|
||||
from the crtend file contains the end of ctors marker and it
|
||||
must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} > ROM
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (_start = .);
|
||||
KEEP (*(SORT(.crt_*)))
|
||||
*(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
|
||||
KEEP (*(.text.*personality*))
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
*(.gnu.warning)
|
||||
*(.interp .hash .dynsym .dynstr .gnu.version*)
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
. = ALIGN(2);
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
KEEP (*(.tm_clone_table))
|
||||
} > ROM
|
||||
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datastart = .);
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||||
|
||||
KEEP (*(.jcr))
|
||||
*(.data.rel.ro.local) *(.data.rel.ro*)
|
||||
*(.dynamic)
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||||
|
||||
*(.data .data.* .gnu.linkonce.d.*)
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||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
SORT(CONSTRUCTORS)
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||||
*(.data1)
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||||
*(.got.plt) *(.got)
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||||
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||||
/* We want the small data sections together, so single-instruction offsets
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||||
can access them all, and initialized data all before uninitialized, so
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we can shorten the on-disk segment size. */
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. = ALIGN(2);
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||||
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
|
||||
|
||||
. = ALIGN(2);
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
PROVIDE (__dataend = .);
|
||||
} > RAM AT>ROM
|
||||
|
||||
/* Note that crt0 assumes this is a multiple of two; all the
|
||||
start/stop symbols are also assumed word-aligned. */
|
||||
PROVIDE(__romdatastart = LOADADDR(.data));
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||||
PROVIDE (__romdatacopysize = SIZEOF(.data));
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||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__bssstart = .);
|
||||
*(.dynbss)
|
||||
*(.sbss .sbss.*)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
. = ALIGN(2);
|
||||
*(COMMON)
|
||||
PROVIDE (__bssend = .);
|
||||
} > RAM
|
||||
PROVIDE (__bsssize = SIZEOF(.bss));
|
||||
|
||||
/* This section contains data that is not initialised during load
|
||||
or application reset. */
|
||||
.noinit (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__noinit_start = .);
|
||||
*(.noinit)
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__noinit_end = .);
|
||||
end = .;
|
||||
} > RAM
|
||||
|
||||
/* We create this section so that "end" will always be in the
|
||||
RAM region (matching .stack below), even if the .bss
|
||||
section is empty. */
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
__heap_start__ = .;
|
||||
_end = __heap_start__;
|
||||
PROVIDE (end = .);
|
||||
KEEP (*(.heap))
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
/* This word is here so that the section is not empty, and thus
|
||||
not discarded by the linker. The actual value does not matter
|
||||
and is ignored. */
|
||||
LONG(0);
|
||||
__heap_end__ = .;
|
||||
__HeapLimit = __heap_end__;
|
||||
} > RAM
|
||||
/* WARNING: Do not place anything in RAM here.
|
||||
The heap section must be the last section in RAM and the stack
|
||||
section must be placed at the very end of the RAM region. */
|
||||
|
||||
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
|
||||
{
|
||||
PROVIDE (__stack = .);
|
||||
*(.stack)
|
||||
}
|
||||
|
||||
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
|
||||
.infoB : {} > INFOB
|
||||
.infoC : {} > INFOC
|
||||
.infoD : {} > INFOD
|
||||
|
||||
.MSP430.attributes 0 :
|
||||
{
|
||||
KEEP (*(.MSP430.attributes))
|
||||
KEEP (*(.gnu.attributes))
|
||||
KEEP (*(__TI_build_attributes))
|
||||
}
|
||||
|
||||
/* The rest are all not normally part of the runtime image. */
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/* Include peripherals memory map */
|
||||
/****************************************************************************/
|
||||
|
||||
INCLUDE cc430f6137_symbols.ld
|
||||
|
||||
@ -1,825 +0,0 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
/* modification, are permitted provided that the following conditions */
|
||||
/* are met: */
|
||||
/* */
|
||||
/* * Redistributions of source code must retain the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer. */
|
||||
/* */
|
||||
/* * Redistributions in binary form must reproduce the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer in the */
|
||||
/* documentation and/or other materials provided with the distribution. */
|
||||
/* */
|
||||
/* * Neither the name of Texas Instruments Incorporated nor the names of */
|
||||
/* its contributors may be used to endorse or promote products derived */
|
||||
/* from this software without specific prior written permission. */
|
||||
/* */
|
||||
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
|
||||
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
|
||||
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
|
||||
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
|
||||
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
|
||||
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
|
||||
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
|
||||
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
|
||||
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports CC430F6137 devices. */
|
||||
/* Version: 1.208 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* STATUS REGISTER BITS
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* PERIPHERAL FILE MAP
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* ADC12 PLUS
|
||||
************************************************************/
|
||||
PROVIDE(ADC12CTL0 = 0x0700);
|
||||
PROVIDE(ADC12CTL0_L = 0x0700);
|
||||
PROVIDE(ADC12CTL0_H = 0x0701);
|
||||
PROVIDE(ADC12CTL1 = 0x0702);
|
||||
PROVIDE(ADC12CTL1_L = 0x0702);
|
||||
PROVIDE(ADC12CTL1_H = 0x0703);
|
||||
PROVIDE(ADC12CTL2 = 0x0704);
|
||||
PROVIDE(ADC12CTL2_L = 0x0704);
|
||||
PROVIDE(ADC12CTL2_H = 0x0705);
|
||||
PROVIDE(ADC12IFG = 0x070A);
|
||||
PROVIDE(ADC12IFG_L = 0x070A);
|
||||
PROVIDE(ADC12IFG_H = 0x070B);
|
||||
PROVIDE(ADC12IE = 0x070C);
|
||||
PROVIDE(ADC12IE_L = 0x070C);
|
||||
PROVIDE(ADC12IE_H = 0x070D);
|
||||
PROVIDE(ADC12IV = 0x070E);
|
||||
PROVIDE(ADC12IV_L = 0x070E);
|
||||
PROVIDE(ADC12IV_H = 0x070F);
|
||||
PROVIDE(ADC12MEM0 = 0x0720);
|
||||
PROVIDE(ADC12MEM0_L = 0x0720);
|
||||
PROVIDE(ADC12MEM0_H = 0x0721);
|
||||
PROVIDE(ADC12MEM1 = 0x0722);
|
||||
PROVIDE(ADC12MEM1_L = 0x0722);
|
||||
PROVIDE(ADC12MEM1_H = 0x0723);
|
||||
PROVIDE(ADC12MEM2 = 0x0724);
|
||||
PROVIDE(ADC12MEM2_L = 0x0724);
|
||||
PROVIDE(ADC12MEM2_H = 0x0725);
|
||||
PROVIDE(ADC12MEM3 = 0x0726);
|
||||
PROVIDE(ADC12MEM3_L = 0x0726);
|
||||
PROVIDE(ADC12MEM3_H = 0x0727);
|
||||
PROVIDE(ADC12MEM4 = 0x0728);
|
||||
PROVIDE(ADC12MEM4_L = 0x0728);
|
||||
PROVIDE(ADC12MEM4_H = 0x0729);
|
||||
PROVIDE(ADC12MEM5 = 0x072A);
|
||||
PROVIDE(ADC12MEM5_L = 0x072A);
|
||||
PROVIDE(ADC12MEM5_H = 0x072B);
|
||||
PROVIDE(ADC12MEM6 = 0x072C);
|
||||
PROVIDE(ADC12MEM6_L = 0x072C);
|
||||
PROVIDE(ADC12MEM6_H = 0x072D);
|
||||
PROVIDE(ADC12MEM7 = 0x072E);
|
||||
PROVIDE(ADC12MEM7_L = 0x072E);
|
||||
PROVIDE(ADC12MEM7_H = 0x072F);
|
||||
PROVIDE(ADC12MEM8 = 0x0730);
|
||||
PROVIDE(ADC12MEM8_L = 0x0730);
|
||||
PROVIDE(ADC12MEM8_H = 0x0731);
|
||||
PROVIDE(ADC12MEM9 = 0x0732);
|
||||
PROVIDE(ADC12MEM9_L = 0x0732);
|
||||
PROVIDE(ADC12MEM9_H = 0x0733);
|
||||
PROVIDE(ADC12MEM10 = 0x0734);
|
||||
PROVIDE(ADC12MEM10_L = 0x0734);
|
||||
PROVIDE(ADC12MEM10_H = 0x0735);
|
||||
PROVIDE(ADC12MEM11 = 0x0736);
|
||||
PROVIDE(ADC12MEM11_L = 0x0736);
|
||||
PROVIDE(ADC12MEM11_H = 0x0737);
|
||||
PROVIDE(ADC12MEM12 = 0x0738);
|
||||
PROVIDE(ADC12MEM12_L = 0x0738);
|
||||
PROVIDE(ADC12MEM12_H = 0x0739);
|
||||
PROVIDE(ADC12MEM13 = 0x073A);
|
||||
PROVIDE(ADC12MEM13_L = 0x073A);
|
||||
PROVIDE(ADC12MEM13_H = 0x073B);
|
||||
PROVIDE(ADC12MEM14 = 0x073C);
|
||||
PROVIDE(ADC12MEM14_L = 0x073C);
|
||||
PROVIDE(ADC12MEM14_H = 0x073D);
|
||||
PROVIDE(ADC12MEM15 = 0x073E);
|
||||
PROVIDE(ADC12MEM15_L = 0x073E);
|
||||
PROVIDE(ADC12MEM15_H = 0x073F);
|
||||
PROVIDE(ADC12MCTL0 = 0x0710);
|
||||
PROVIDE(ADC12MCTL1 = 0x0711);
|
||||
PROVIDE(ADC12MCTL2 = 0x0712);
|
||||
PROVIDE(ADC12MCTL3 = 0x0713);
|
||||
PROVIDE(ADC12MCTL4 = 0x0714);
|
||||
PROVIDE(ADC12MCTL5 = 0x0715);
|
||||
PROVIDE(ADC12MCTL6 = 0x0716);
|
||||
PROVIDE(ADC12MCTL7 = 0x0717);
|
||||
PROVIDE(ADC12MCTL8 = 0x0718);
|
||||
PROVIDE(ADC12MCTL9 = 0x0719);
|
||||
PROVIDE(ADC12MCTL10 = 0x071A);
|
||||
PROVIDE(ADC12MCTL11 = 0x071B);
|
||||
PROVIDE(ADC12MCTL12 = 0x071C);
|
||||
PROVIDE(ADC12MCTL13 = 0x071D);
|
||||
PROVIDE(ADC12MCTL14 = 0x071E);
|
||||
PROVIDE(ADC12MCTL15 = 0x071F);
|
||||
/************************************************************
|
||||
* AES Accelerator
|
||||
************************************************************/
|
||||
PROVIDE(AESACTL0 = 0x09C0);
|
||||
PROVIDE(AESACTL0_L = 0x09C0);
|
||||
PROVIDE(AESACTL0_H = 0x09C1);
|
||||
PROVIDE(AESASTAT = 0x09C4);
|
||||
PROVIDE(AESASTAT_L = 0x09C4);
|
||||
PROVIDE(AESASTAT_H = 0x09C5);
|
||||
PROVIDE(AESAKEY = 0x09C6);
|
||||
PROVIDE(AESAKEY_L = 0x09C6);
|
||||
PROVIDE(AESAKEY_H = 0x09C7);
|
||||
PROVIDE(AESADIN = 0x09C8);
|
||||
PROVIDE(AESADIN_L = 0x09C8);
|
||||
PROVIDE(AESADIN_H = 0x09C9);
|
||||
PROVIDE(AESADOUT = 0x09CA);
|
||||
PROVIDE(AESADOUT_L = 0x09CA);
|
||||
PROVIDE(AESADOUT_H = 0x09CB);
|
||||
/************************************************************
|
||||
* Comparator B
|
||||
************************************************************/
|
||||
PROVIDE(CBCTL0 = 0x08C0);
|
||||
PROVIDE(CBCTL0_L = 0x08C0);
|
||||
PROVIDE(CBCTL0_H = 0x08C1);
|
||||
PROVIDE(CBCTL1 = 0x08C2);
|
||||
PROVIDE(CBCTL1_L = 0x08C2);
|
||||
PROVIDE(CBCTL1_H = 0x08C3);
|
||||
PROVIDE(CBCTL2 = 0x08C4);
|
||||
PROVIDE(CBCTL2_L = 0x08C4);
|
||||
PROVIDE(CBCTL2_H = 0x08C5);
|
||||
PROVIDE(CBCTL3 = 0x08C6);
|
||||
PROVIDE(CBCTL3_L = 0x08C6);
|
||||
PROVIDE(CBCTL3_H = 0x08C7);
|
||||
PROVIDE(CBINT = 0x08CC);
|
||||
PROVIDE(CBINT_L = 0x08CC);
|
||||
PROVIDE(CBINT_H = 0x08CD);
|
||||
PROVIDE(CBIV = 0x08CE);
|
||||
/************************************************************
|
||||
* CC1101 Radio Interface
|
||||
************************************************************/
|
||||
PROVIDE(RF1AIFCTL0 = 0x0F00);
|
||||
PROVIDE(RF1AIFCTL0_L = 0x0F00);
|
||||
PROVIDE(RF1AIFCTL0_H = 0x0F01);
|
||||
PROVIDE(RF1AIFCTL1 = 0x0F02);
|
||||
PROVIDE(RF1AIFCTL1_L = 0x0F02);
|
||||
PROVIDE(RF1AIFCTL1_H = 0x0F03);
|
||||
PROVIDE(RF1AIFCTL2 = 0x0F04);
|
||||
PROVIDE(RF1AIFCTL2_L = 0x0F04);
|
||||
PROVIDE(RF1AIFCTL2_H = 0x0F05);
|
||||
PROVIDE(RF1AIFERR = 0x0F06);
|
||||
PROVIDE(RF1AIFERR_L = 0x0F06);
|
||||
PROVIDE(RF1AIFERR_H = 0x0F07);
|
||||
PROVIDE(RF1AIFERRV = 0x0F0C);
|
||||
PROVIDE(RF1AIFERRV_L = 0x0F0C);
|
||||
PROVIDE(RF1AIFERRV_H = 0x0F0D);
|
||||
PROVIDE(RF1AIFIV = 0x0F0E);
|
||||
PROVIDE(RF1AIFIV_L = 0x0F0E);
|
||||
PROVIDE(RF1AIFIV_H = 0x0F0F);
|
||||
PROVIDE(RF1AINSTRW = 0x0F10);
|
||||
PROVIDE(RF1AINSTRW_L = 0x0F10);
|
||||
PROVIDE(RF1AINSTRW_H = 0x0F11);
|
||||
PROVIDE(RF1AINSTR1W = 0x0F12);
|
||||
PROVIDE(RF1AINSTR1W_L = 0x0F12);
|
||||
PROVIDE(RF1AINSTR1W_H = 0x0F13);
|
||||
PROVIDE(RF1AINSTR2W = 0x0F14);
|
||||
PROVIDE(RF1AINSTR2W_L = 0x0F14);
|
||||
PROVIDE(RF1AINSTR2W_H = 0x0F15);
|
||||
PROVIDE(RF1ADINW = 0x0F16);
|
||||
PROVIDE(RF1ADINW_L = 0x0F16);
|
||||
PROVIDE(RF1ADINW_H = 0x0F17);
|
||||
PROVIDE(RF1ASTAT0W = 0x0F20);
|
||||
PROVIDE(RF1ASTAT0W_L = 0x0F20);
|
||||
PROVIDE(RF1ASTAT0W_H = 0x0F21);
|
||||
PROVIDE(RF1ASTAT1W = 0x0F22);
|
||||
PROVIDE(RF1ASTAT1W_L = 0x0F22);
|
||||
PROVIDE(RF1ASTAT1W_H = 0x0F23);
|
||||
PROVIDE(RF1ASTAT2W = 0x0F24);
|
||||
PROVIDE(RF1ASTAT2W_L = 0x0F24);
|
||||
PROVIDE(RF1ASTAT2W_H = 0x0F25);
|
||||
PROVIDE(RF1ADOUT0W = 0x0F28);
|
||||
PROVIDE(RF1ADOUT0W_L = 0x0F28);
|
||||
PROVIDE(RF1ADOUT0W_H = 0x0F29);
|
||||
PROVIDE(RF1ADOUT1W = 0x0F2A);
|
||||
PROVIDE(RF1ADOUT1W_L = 0x0F2A);
|
||||
PROVIDE(RF1ADOUT1W_H = 0x0F2B);
|
||||
PROVIDE(RF1ADOUT2W = 0x0F2C);
|
||||
PROVIDE(RF1ADOUT2W_L = 0x0F2C);
|
||||
PROVIDE(RF1ADOUT2W_H = 0x0F2D);
|
||||
PROVIDE(RF1AIN = 0x0F30);
|
||||
PROVIDE(RF1AIN_L = 0x0F30);
|
||||
PROVIDE(RF1AIN_H = 0x0F31);
|
||||
PROVIDE(RF1AIFG = 0x0F32);
|
||||
PROVIDE(RF1AIFG_L = 0x0F32);
|
||||
PROVIDE(RF1AIFG_H = 0x0F33);
|
||||
PROVIDE(RF1AIES = 0x0F34);
|
||||
PROVIDE(RF1AIES_L = 0x0F34);
|
||||
PROVIDE(RF1AIES_H = 0x0F35);
|
||||
PROVIDE(RF1AIE = 0x0F36);
|
||||
PROVIDE(RF1AIE_L = 0x0F36);
|
||||
PROVIDE(RF1AIE_H = 0x0F37);
|
||||
PROVIDE(RF1AIV = 0x0F38);
|
||||
PROVIDE(RF1AIV_L = 0x0F38);
|
||||
PROVIDE(RF1AIV_H = 0x0F39);
|
||||
PROVIDE(RF1ARXFIFO = 0x0F3C);
|
||||
PROVIDE(RF1ARXFIFO_L = 0x0F3C);
|
||||
PROVIDE(RF1ARXFIFO_H = 0x0F3D);
|
||||
PROVIDE(RF1ATXFIFO = 0x0F3E);
|
||||
PROVIDE(RF1ATXFIFO_L = 0x0F3E);
|
||||
PROVIDE(RF1ATXFIFO_H = 0x0F3F);
|
||||
/*************************************************************
|
||||
* CRC Module
|
||||
*************************************************************/
|
||||
PROVIDE(CRCDI = 0x0150);
|
||||
PROVIDE(CRCDI_L = 0x0150);
|
||||
PROVIDE(CRCDI_H = 0x0151);
|
||||
PROVIDE(CRCINIRES = 0x0154);
|
||||
PROVIDE(CRCINIRES_L = 0x0154);
|
||||
PROVIDE(CRCINIRES_H = 0x0155);
|
||||
/************************************************************
|
||||
* DMA_X
|
||||
************************************************************/
|
||||
PROVIDE(DMACTL0 = 0x0500);
|
||||
PROVIDE(DMACTL1 = 0x0502);
|
||||
PROVIDE(DMACTL2 = 0x0504);
|
||||
PROVIDE(DMACTL3 = 0x0506);
|
||||
PROVIDE(DMACTL4 = 0x0508);
|
||||
PROVIDE(DMAIV = 0x050E);
|
||||
PROVIDE(DMA0CTL = 0x0510);
|
||||
PROVIDE(DMA0SA = 0x0512);
|
||||
PROVIDE(DMA0SAL = 0x0512);
|
||||
PROVIDE(DMA0DA = 0x0516);
|
||||
PROVIDE(DMA0DAL = 0x0516);
|
||||
PROVIDE(DMA0SZ = 0x051A);
|
||||
PROVIDE(DMA1CTL = 0x0520);
|
||||
PROVIDE(DMA1SA = 0x0522);
|
||||
PROVIDE(DMA1SAL = 0x0522);
|
||||
PROVIDE(DMA1DA = 0x0526);
|
||||
PROVIDE(DMA1DAL = 0x0526);
|
||||
PROVIDE(DMA1SZ = 0x052A);
|
||||
PROVIDE(DMA2CTL = 0x0530);
|
||||
PROVIDE(DMA2SA = 0x0532);
|
||||
PROVIDE(DMA2SAL = 0x0532);
|
||||
PROVIDE(DMA2DA = 0x0536);
|
||||
PROVIDE(DMA2DAL = 0x0536);
|
||||
PROVIDE(DMA2SZ = 0x053A);
|
||||
/*************************************************************
|
||||
* Flash Memory
|
||||
*************************************************************/
|
||||
PROVIDE(FCTL1 = 0x0140);
|
||||
PROVIDE(FCTL1_L = 0x0140);
|
||||
PROVIDE(FCTL1_H = 0x0141);
|
||||
PROVIDE(FCTL3 = 0x0144);
|
||||
PROVIDE(FCTL3_L = 0x0144);
|
||||
PROVIDE(FCTL3_H = 0x0145);
|
||||
PROVIDE(FCTL4 = 0x0146);
|
||||
PROVIDE(FCTL4_L = 0x0146);
|
||||
PROVIDE(FCTL4_H = 0x0147);
|
||||
/************************************************************
|
||||
* LCD_B
|
||||
************************************************************/
|
||||
PROVIDE(LCDBCTL0 = 0x0A00);
|
||||
PROVIDE(LCDBCTL0_L = 0x0A00);
|
||||
PROVIDE(LCDBCTL0_H = 0x0A01);
|
||||
PROVIDE(LCDBCTL1 = 0x0A02);
|
||||
PROVIDE(LCDBCTL1_L = 0x0A02);
|
||||
PROVIDE(LCDBCTL1_H = 0x0A03);
|
||||
PROVIDE(LCDBBLKCTL = 0x0A04);
|
||||
PROVIDE(LCDBBLKCTL_L = 0x0A04);
|
||||
PROVIDE(LCDBBLKCTL_H = 0x0A05);
|
||||
PROVIDE(LCDBMEMCTL = 0x0A06);
|
||||
PROVIDE(LCDBMEMCTL_L = 0x0A06);
|
||||
PROVIDE(LCDBMEMCTL_H = 0x0A07);
|
||||
PROVIDE(LCDBVCTL = 0x0A08);
|
||||
PROVIDE(LCDBVCTL_L = 0x0A08);
|
||||
PROVIDE(LCDBVCTL_H = 0x0A09);
|
||||
PROVIDE(LCDBPCTL0 = 0x0A0A);
|
||||
PROVIDE(LCDBPCTL0_L = 0x0A0A);
|
||||
PROVIDE(LCDBPCTL0_H = 0x0A0B);
|
||||
PROVIDE(LCDBPCTL1 = 0x0A0C);
|
||||
PROVIDE(LCDBPCTL1_L = 0x0A0C);
|
||||
PROVIDE(LCDBPCTL1_H = 0x0A0D);
|
||||
PROVIDE(LCDBPCTL2 = 0x0A0E);
|
||||
PROVIDE(LCDBPCTL2_L = 0x0A0E);
|
||||
PROVIDE(LCDBPCTL2_H = 0x0A0F);
|
||||
PROVIDE(LCDBPCTL3 = 0x0A10);
|
||||
PROVIDE(LCDBPCTL3_L = 0x0A10);
|
||||
PROVIDE(LCDBPCTL3_H = 0x0A11);
|
||||
PROVIDE(LCDBCPCTL = 0x0A12);
|
||||
PROVIDE(LCDBCPCTL_L = 0x0A12);
|
||||
PROVIDE(LCDBCPCTL_H = 0x0A13);
|
||||
PROVIDE(LCDBIV = 0x0A1E);
|
||||
PROVIDE(LCDM1 = 0x0A20);
|
||||
PROVIDE(LCDM2 = 0x0A21);
|
||||
PROVIDE(LCDM3 = 0x0A22);
|
||||
PROVIDE(LCDM4 = 0x0A23);
|
||||
PROVIDE(LCDM5 = 0x0A24);
|
||||
PROVIDE(LCDM6 = 0x0A25);
|
||||
PROVIDE(LCDM7 = 0x0A26);
|
||||
PROVIDE(LCDM8 = 0x0A27);
|
||||
PROVIDE(LCDM9 = 0x0A28);
|
||||
PROVIDE(LCDM10 = 0x0A29);
|
||||
PROVIDE(LCDM11 = 0x0A2A);
|
||||
PROVIDE(LCDM12 = 0x0A2B);
|
||||
PROVIDE(LCDM13 = 0x0A2C);
|
||||
PROVIDE(LCDM14 = 0x0A2D);
|
||||
PROVIDE(LCDM15 = 0x0A2E);
|
||||
PROVIDE(LCDM16 = 0x0A2F);
|
||||
PROVIDE(LCDM17 = 0x0A30);
|
||||
PROVIDE(LCDM18 = 0x0A31);
|
||||
PROVIDE(LCDM19 = 0x0A32);
|
||||
PROVIDE(LCDM20 = 0x0A33);
|
||||
PROVIDE(LCDM21 = 0x0A34);
|
||||
PROVIDE(LCDM22 = 0x0A35);
|
||||
PROVIDE(LCDM23 = 0x0A36);
|
||||
PROVIDE(LCDM24 = 0x0A37);
|
||||
PROVIDE(LCDBM1 = 0x0A40);
|
||||
PROVIDE(LCDBM2 = 0x0A41);
|
||||
PROVIDE(LCDBM3 = 0x0A42);
|
||||
PROVIDE(LCDBM4 = 0x0A43);
|
||||
PROVIDE(LCDBM5 = 0x0A44);
|
||||
PROVIDE(LCDBM6 = 0x0A45);
|
||||
PROVIDE(LCDBM7 = 0x0A46);
|
||||
PROVIDE(LCDBM8 = 0x0A47);
|
||||
PROVIDE(LCDBM9 = 0x0A48);
|
||||
PROVIDE(LCDBM10 = 0x0A49);
|
||||
PROVIDE(LCDBM11 = 0x0A4A);
|
||||
PROVIDE(LCDBM12 = 0x0A4B);
|
||||
PROVIDE(LCDBM13 = 0x0A4C);
|
||||
PROVIDE(LCDBM14 = 0x0A4D);
|
||||
PROVIDE(LCDBM15 = 0x0A4E);
|
||||
PROVIDE(LCDBM16 = 0x0A4F);
|
||||
PROVIDE(LCDBM17 = 0x0A50);
|
||||
PROVIDE(LCDBM18 = 0x0A51);
|
||||
PROVIDE(LCDBM19 = 0x0A52);
|
||||
PROVIDE(LCDBM20 = 0x0A53);
|
||||
PROVIDE(LCDBM21 = 0x0A54);
|
||||
PROVIDE(LCDBM22 = 0x0A55);
|
||||
PROVIDE(LCDBM23 = 0x0A56);
|
||||
PROVIDE(LCDBM24 = 0x0A57);
|
||||
/************************************************************
|
||||
* HARDWARE MULTIPLIER 32Bit
|
||||
************************************************************/
|
||||
PROVIDE(MPY = 0x04C0);
|
||||
PROVIDE(MPY_L = 0x04C0);
|
||||
PROVIDE(MPY_H = 0x04C1);
|
||||
PROVIDE(MPYS = 0x04C2);
|
||||
PROVIDE(MPYS_L = 0x04C2);
|
||||
PROVIDE(MPYS_H = 0x04C3);
|
||||
PROVIDE(MAC = 0x04C4);
|
||||
PROVIDE(MAC_L = 0x04C4);
|
||||
PROVIDE(MAC_H = 0x04C5);
|
||||
PROVIDE(MACS = 0x04C6);
|
||||
PROVIDE(MACS_L = 0x04C6);
|
||||
PROVIDE(MACS_H = 0x04C7);
|
||||
PROVIDE(OP2 = 0x04C8);
|
||||
PROVIDE(OP2_L = 0x04C8);
|
||||
PROVIDE(OP2_H = 0x04C9);
|
||||
PROVIDE(RESLO = 0x04CA);
|
||||
PROVIDE(RESLO_L = 0x04CA);
|
||||
PROVIDE(RESLO_H = 0x04CB);
|
||||
PROVIDE(RESHI = 0x04CC);
|
||||
PROVIDE(RESHI_L = 0x04CC);
|
||||
PROVIDE(RESHI_H = 0x04CD);
|
||||
PROVIDE(SUMEXT = 0x04CE);
|
||||
PROVIDE(SUMEXT_L = 0x04CE);
|
||||
PROVIDE(SUMEXT_H = 0x04CF);
|
||||
PROVIDE(MPY32L = 0x04D0);
|
||||
PROVIDE(MPY32L_L = 0x04D0);
|
||||
PROVIDE(MPY32L_H = 0x04D1);
|
||||
PROVIDE(MPY32H = 0x04D2);
|
||||
PROVIDE(MPY32H_L = 0x04D2);
|
||||
PROVIDE(MPY32H_H = 0x04D3);
|
||||
PROVIDE(MPYS32L = 0x04D4);
|
||||
PROVIDE(MPYS32L_L = 0x04D4);
|
||||
PROVIDE(MPYS32L_H = 0x04D5);
|
||||
PROVIDE(MPYS32H = 0x04D6);
|
||||
PROVIDE(MPYS32H_L = 0x04D6);
|
||||
PROVIDE(MPYS32H_H = 0x04D7);
|
||||
PROVIDE(MAC32L = 0x04D8);
|
||||
PROVIDE(MAC32L_L = 0x04D8);
|
||||
PROVIDE(MAC32L_H = 0x04D9);
|
||||
PROVIDE(MAC32H = 0x04DA);
|
||||
PROVIDE(MAC32H_L = 0x04DA);
|
||||
PROVIDE(MAC32H_H = 0x04DB);
|
||||
PROVIDE(MACS32L = 0x04DC);
|
||||
PROVIDE(MACS32L_L = 0x04DC);
|
||||
PROVIDE(MACS32L_H = 0x04DD);
|
||||
PROVIDE(MACS32H = 0x04DE);
|
||||
PROVIDE(MACS32H_L = 0x04DE);
|
||||
PROVIDE(MACS32H_H = 0x04DF);
|
||||
PROVIDE(OP2L = 0x04E0);
|
||||
PROVIDE(OP2L_L = 0x04E0);
|
||||
PROVIDE(OP2L_H = 0x04E1);
|
||||
PROVIDE(OP2H = 0x04E2);
|
||||
PROVIDE(OP2H_L = 0x04E2);
|
||||
PROVIDE(OP2H_H = 0x04E3);
|
||||
PROVIDE(RES0 = 0x04E4);
|
||||
PROVIDE(RES0_L = 0x04E4);
|
||||
PROVIDE(RES0_H = 0x04E5);
|
||||
PROVIDE(RES1 = 0x04E6);
|
||||
PROVIDE(RES1_L = 0x04E6);
|
||||
PROVIDE(RES1_H = 0x04E7);
|
||||
PROVIDE(RES2 = 0x04E8);
|
||||
PROVIDE(RES2_L = 0x04E8);
|
||||
PROVIDE(RES2_H = 0x04E9);
|
||||
PROVIDE(RES3 = 0x04EA);
|
||||
PROVIDE(RES3_L = 0x04EA);
|
||||
PROVIDE(RES3_H = 0x04EB);
|
||||
PROVIDE(MPY32CTL0 = 0x04EC);
|
||||
PROVIDE(MPY32CTL0_L = 0x04EC);
|
||||
PROVIDE(MPY32CTL0_H = 0x04ED);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(PAIN = 0x0200);
|
||||
PROVIDE(PAIN_L = 0x0200);
|
||||
PROVIDE(PAIN_H = 0x0201);
|
||||
PROVIDE(PAOUT = 0x0202);
|
||||
PROVIDE(PAOUT_L = 0x0202);
|
||||
PROVIDE(PAOUT_H = 0x0203);
|
||||
PROVIDE(PADIR = 0x0204);
|
||||
PROVIDE(PADIR_L = 0x0204);
|
||||
PROVIDE(PADIR_H = 0x0205);
|
||||
PROVIDE(PAREN = 0x0206);
|
||||
PROVIDE(PAREN_L = 0x0206);
|
||||
PROVIDE(PAREN_H = 0x0207);
|
||||
PROVIDE(PADS = 0x0208);
|
||||
PROVIDE(PADS_L = 0x0208);
|
||||
PROVIDE(PADS_H = 0x0209);
|
||||
PROVIDE(PASEL = 0x020A);
|
||||
PROVIDE(PASEL_L = 0x020A);
|
||||
PROVIDE(PASEL_H = 0x020B);
|
||||
PROVIDE(PAIES = 0x0218);
|
||||
PROVIDE(PAIES_L = 0x0218);
|
||||
PROVIDE(PAIES_H = 0x0219);
|
||||
PROVIDE(PAIE = 0x021A);
|
||||
PROVIDE(PAIE_L = 0x021A);
|
||||
PROVIDE(PAIE_H = 0x021B);
|
||||
PROVIDE(PAIFG = 0x021C);
|
||||
PROVIDE(PAIFG_L = 0x021C);
|
||||
PROVIDE(PAIFG_H = 0x021D);
|
||||
PROVIDE(P1IV = 0x020E);
|
||||
PROVIDE(P2IV = 0x021E);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(PBIN = 0x0220);
|
||||
PROVIDE(PBIN_L = 0x0220);
|
||||
PROVIDE(PBIN_H = 0x0221);
|
||||
PROVIDE(PBOUT = 0x0222);
|
||||
PROVIDE(PBOUT_L = 0x0222);
|
||||
PROVIDE(PBOUT_H = 0x0223);
|
||||
PROVIDE(PBDIR = 0x0224);
|
||||
PROVIDE(PBDIR_L = 0x0224);
|
||||
PROVIDE(PBDIR_H = 0x0225);
|
||||
PROVIDE(PBREN = 0x0226);
|
||||
PROVIDE(PBREN_L = 0x0226);
|
||||
PROVIDE(PBREN_H = 0x0227);
|
||||
PROVIDE(PBDS = 0x0228);
|
||||
PROVIDE(PBDS_L = 0x0228);
|
||||
PROVIDE(PBDS_H = 0x0229);
|
||||
PROVIDE(PBSEL = 0x022A);
|
||||
PROVIDE(PBSEL_L = 0x022A);
|
||||
PROVIDE(PBSEL_H = 0x022B);
|
||||
/************************************************************
|
||||
* DIGITAL I/O Port5 Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(PCIN = 0x0240);
|
||||
PROVIDE(PCIN_L = 0x0240);
|
||||
PROVIDE(PCIN_H = 0x0241);
|
||||
PROVIDE(PCOUT = 0x0242);
|
||||
PROVIDE(PCOUT_L = 0x0242);
|
||||
PROVIDE(PCOUT_H = 0x0243);
|
||||
PROVIDE(PCDIR = 0x0244);
|
||||
PROVIDE(PCDIR_L = 0x0244);
|
||||
PROVIDE(PCDIR_H = 0x0245);
|
||||
PROVIDE(PCREN = 0x0246);
|
||||
PROVIDE(PCREN_L = 0x0246);
|
||||
PROVIDE(PCREN_H = 0x0247);
|
||||
PROVIDE(PCDS = 0x0248);
|
||||
PROVIDE(PCDS_L = 0x0248);
|
||||
PROVIDE(PCDS_H = 0x0249);
|
||||
PROVIDE(PCSEL = 0x024A);
|
||||
PROVIDE(PCSEL_L = 0x024A);
|
||||
PROVIDE(PCSEL_H = 0x024B);
|
||||
/************************************************************
|
||||
* DIGITAL I/O PortJ Pull up / Pull down Resistors
|
||||
************************************************************/
|
||||
PROVIDE(PJIN = 0x0320);
|
||||
PROVIDE(PJIN_L = 0x0320);
|
||||
PROVIDE(PJIN_H = 0x0321);
|
||||
PROVIDE(PJOUT = 0x0322);
|
||||
PROVIDE(PJOUT_L = 0x0322);
|
||||
PROVIDE(PJOUT_H = 0x0323);
|
||||
PROVIDE(PJDIR = 0x0324);
|
||||
PROVIDE(PJDIR_L = 0x0324);
|
||||
PROVIDE(PJDIR_H = 0x0325);
|
||||
PROVIDE(PJREN = 0x0326);
|
||||
PROVIDE(PJREN_L = 0x0326);
|
||||
PROVIDE(PJREN_H = 0x0327);
|
||||
PROVIDE(PJDS = 0x0328);
|
||||
PROVIDE(PJDS_L = 0x0328);
|
||||
PROVIDE(PJDS_H = 0x0329);
|
||||
/************************************************************
|
||||
* PORT MAPPING CONTROLLER
|
||||
************************************************************/
|
||||
PROVIDE(PMAPKEYID = 0x01C0);
|
||||
PROVIDE(PMAPKEYID_L = 0x01C0);
|
||||
PROVIDE(PMAPKEYID_H = 0x01C1);
|
||||
PROVIDE(PMAPCTL = 0x01C2);
|
||||
PROVIDE(PMAPCTL_L = 0x01C2);
|
||||
PROVIDE(PMAPCTL_H = 0x01C3);
|
||||
/************************************************************
|
||||
* PORT 1 MAPPING CONTROLLER
|
||||
************************************************************/
|
||||
PROVIDE(P1MAP01 = 0x01C8);
|
||||
PROVIDE(P1MAP01_L = 0x01C8);
|
||||
PROVIDE(P1MAP01_H = 0x01C9);
|
||||
PROVIDE(P1MAP23 = 0x01CA);
|
||||
PROVIDE(P1MAP23_L = 0x01CA);
|
||||
PROVIDE(P1MAP23_H = 0x01CB);
|
||||
PROVIDE(P1MAP45 = 0x01CC);
|
||||
PROVIDE(P1MAP45_L = 0x01CC);
|
||||
PROVIDE(P1MAP45_H = 0x01CD);
|
||||
PROVIDE(P1MAP67 = 0x01CE);
|
||||
PROVIDE(P1MAP67_L = 0x01CE);
|
||||
PROVIDE(P1MAP67_H = 0x01CF);
|
||||
/************************************************************
|
||||
* PORT 2 MAPPING CONTROLLER
|
||||
************************************************************/
|
||||
PROVIDE(P2MAP01 = 0x01D0);
|
||||
PROVIDE(P2MAP01_L = 0x01D0);
|
||||
PROVIDE(P2MAP01_H = 0x01D1);
|
||||
PROVIDE(P2MAP23 = 0x01D2);
|
||||
PROVIDE(P2MAP23_L = 0x01D2);
|
||||
PROVIDE(P2MAP23_H = 0x01D3);
|
||||
PROVIDE(P2MAP45 = 0x01D4);
|
||||
PROVIDE(P2MAP45_L = 0x01D4);
|
||||
PROVIDE(P2MAP45_H = 0x01D5);
|
||||
PROVIDE(P2MAP67 = 0x01D6);
|
||||
PROVIDE(P2MAP67_L = 0x01D6);
|
||||
PROVIDE(P2MAP67_H = 0x01D7);
|
||||
/************************************************************
|
||||
* PORT 3 MAPPING CONTROLLER
|
||||
************************************************************/
|
||||
PROVIDE(P3MAP01 = 0x01D8);
|
||||
PROVIDE(P3MAP01_L = 0x01D8);
|
||||
PROVIDE(P3MAP01_H = 0x01D9);
|
||||
PROVIDE(P3MAP23 = 0x01DA);
|
||||
PROVIDE(P3MAP23_L = 0x01DA);
|
||||
PROVIDE(P3MAP23_H = 0x01DB);
|
||||
PROVIDE(P3MAP45 = 0x01DC);
|
||||
PROVIDE(P3MAP45_L = 0x01DC);
|
||||
PROVIDE(P3MAP45_H = 0x01DD);
|
||||
PROVIDE(P3MAP67 = 0x01DE);
|
||||
PROVIDE(P3MAP67_L = 0x01DE);
|
||||
PROVIDE(P3MAP67_H = 0x01DF);
|
||||
/************************************************************
|
||||
* PMM - Power Management System
|
||||
************************************************************/
|
||||
PROVIDE(PMMCTL0 = 0x0120);
|
||||
PROVIDE(PMMCTL0_L = 0x0120);
|
||||
PROVIDE(PMMCTL0_H = 0x0121);
|
||||
PROVIDE(PMMCTL1 = 0x0122);
|
||||
PROVIDE(PMMCTL1_L = 0x0122);
|
||||
PROVIDE(PMMCTL1_H = 0x0123);
|
||||
PROVIDE(SVSMHCTL = 0x0124);
|
||||
PROVIDE(SVSMHCTL_L = 0x0124);
|
||||
PROVIDE(SVSMHCTL_H = 0x0125);
|
||||
PROVIDE(SVSMLCTL = 0x0126);
|
||||
PROVIDE(SVSMLCTL_L = 0x0126);
|
||||
PROVIDE(SVSMLCTL_H = 0x0127);
|
||||
PROVIDE(SVSMIO = 0x0128);
|
||||
PROVIDE(SVSMIO_L = 0x0128);
|
||||
PROVIDE(SVSMIO_H = 0x0129);
|
||||
PROVIDE(PMMIFG = 0x012C);
|
||||
PROVIDE(PMMIFG_L = 0x012C);
|
||||
PROVIDE(PMMIFG_H = 0x012D);
|
||||
PROVIDE(PMMRIE = 0x012E);
|
||||
PROVIDE(PMMRIE_L = 0x012E);
|
||||
PROVIDE(PMMRIE_H = 0x012F);
|
||||
/*************************************************************
|
||||
* RAM Control Module
|
||||
*************************************************************/
|
||||
PROVIDE(RCCTL0 = 0x0158);
|
||||
PROVIDE(RCCTL0_L = 0x0158);
|
||||
PROVIDE(RCCTL0_H = 0x0159);
|
||||
/************************************************************
|
||||
* Shared Reference
|
||||
************************************************************/
|
||||
PROVIDE(REFCTL0 = 0x01B0);
|
||||
PROVIDE(REFCTL0_L = 0x01B0);
|
||||
PROVIDE(REFCTL0_H = 0x01B1);
|
||||
/************************************************************
|
||||
* Real Time Clock
|
||||
************************************************************/
|
||||
PROVIDE(RTCCTL01 = 0x04A0);
|
||||
PROVIDE(RTCCTL01_L = 0x04A0);
|
||||
PROVIDE(RTCCTL01_H = 0x04A1);
|
||||
PROVIDE(RTCCTL23 = 0x04A2);
|
||||
PROVIDE(RTCCTL23_L = 0x04A2);
|
||||
PROVIDE(RTCCTL23_H = 0x04A3);
|
||||
PROVIDE(RTCPS0CTL = 0x04A8);
|
||||
PROVIDE(RTCPS0CTL_L = 0x04A8);
|
||||
PROVIDE(RTCPS0CTL_H = 0x04A9);
|
||||
PROVIDE(RTCPS1CTL = 0x04AA);
|
||||
PROVIDE(RTCPS1CTL_L = 0x04AA);
|
||||
PROVIDE(RTCPS1CTL_H = 0x04AB);
|
||||
PROVIDE(RTCPS = 0x04AC);
|
||||
PROVIDE(RTCPS_L = 0x04AC);
|
||||
PROVIDE(RTCPS_H = 0x04AD);
|
||||
PROVIDE(RTCIV = 0x04AE);
|
||||
PROVIDE(RTCTIM0 = 0x04B0);
|
||||
PROVIDE(RTCTIM0_L = 0x04B0);
|
||||
PROVIDE(RTCTIM0_H = 0x04B1);
|
||||
PROVIDE(RTCTIM1 = 0x04B2);
|
||||
PROVIDE(RTCTIM1_L = 0x04B2);
|
||||
PROVIDE(RTCTIM1_H = 0x04B3);
|
||||
PROVIDE(RTCDATE = 0x04B4);
|
||||
PROVIDE(RTCDATE_L = 0x04B4);
|
||||
PROVIDE(RTCDATE_H = 0x04B5);
|
||||
PROVIDE(RTCYEAR = 0x04B6);
|
||||
PROVIDE(RTCYEAR_L = 0x04B6);
|
||||
PROVIDE(RTCYEAR_H = 0x04B7);
|
||||
PROVIDE(RTCAMINHR = 0x04B8);
|
||||
PROVIDE(RTCAMINHR_L = 0x04B8);
|
||||
PROVIDE(RTCAMINHR_H = 0x04B9);
|
||||
PROVIDE(RTCADOWDAY = 0x04BA);
|
||||
PROVIDE(RTCADOWDAY_L = 0x04BA);
|
||||
PROVIDE(RTCADOWDAY_H = 0x04BB);
|
||||
/************************************************************
|
||||
* SFR - Special Function Register Module
|
||||
************************************************************/
|
||||
PROVIDE(SFRIE1 = 0x0100);
|
||||
PROVIDE(SFRIE1_L = 0x0100);
|
||||
PROVIDE(SFRIE1_H = 0x0101);
|
||||
PROVIDE(SFRIFG1 = 0x0102);
|
||||
PROVIDE(SFRIFG1_L = 0x0102);
|
||||
PROVIDE(SFRIFG1_H = 0x0103);
|
||||
PROVIDE(SFRRPCR = 0x0104);
|
||||
PROVIDE(SFRRPCR_L = 0x0104);
|
||||
PROVIDE(SFRRPCR_H = 0x0105);
|
||||
/************************************************************
|
||||
* SYS - System Module
|
||||
************************************************************/
|
||||
PROVIDE(SYSCTL = 0x0180);
|
||||
PROVIDE(SYSCTL_L = 0x0180);
|
||||
PROVIDE(SYSCTL_H = 0x0181);
|
||||
PROVIDE(SYSBSLC = 0x0182);
|
||||
PROVIDE(SYSBSLC_L = 0x0182);
|
||||
PROVIDE(SYSBSLC_H = 0x0183);
|
||||
PROVIDE(SYSJMBC = 0x0186);
|
||||
PROVIDE(SYSJMBC_L = 0x0186);
|
||||
PROVIDE(SYSJMBC_H = 0x0187);
|
||||
PROVIDE(SYSJMBI0 = 0x0188);
|
||||
PROVIDE(SYSJMBI0_L = 0x0188);
|
||||
PROVIDE(SYSJMBI0_H = 0x0189);
|
||||
PROVIDE(SYSJMBI1 = 0x018A);
|
||||
PROVIDE(SYSJMBI1_L = 0x018A);
|
||||
PROVIDE(SYSJMBI1_H = 0x018B);
|
||||
PROVIDE(SYSJMBO0 = 0x018C);
|
||||
PROVIDE(SYSJMBO0_L = 0x018C);
|
||||
PROVIDE(SYSJMBO0_H = 0x018D);
|
||||
PROVIDE(SYSJMBO1 = 0x018E);
|
||||
PROVIDE(SYSJMBO1_L = 0x018E);
|
||||
PROVIDE(SYSJMBO1_H = 0x018F);
|
||||
PROVIDE(SYSBERRIV = 0x0198);
|
||||
PROVIDE(SYSBERRIV_L = 0x0198);
|
||||
PROVIDE(SYSBERRIV_H = 0x0199);
|
||||
PROVIDE(SYSUNIV = 0x019A);
|
||||
PROVIDE(SYSUNIV_L = 0x019A);
|
||||
PROVIDE(SYSUNIV_H = 0x019B);
|
||||
PROVIDE(SYSSNIV = 0x019C);
|
||||
PROVIDE(SYSSNIV_L = 0x019C);
|
||||
PROVIDE(SYSSNIV_H = 0x019D);
|
||||
PROVIDE(SYSRSTIV = 0x019E);
|
||||
PROVIDE(SYSRSTIV_L = 0x019E);
|
||||
PROVIDE(SYSRSTIV_H = 0x019F);
|
||||
/************************************************************
|
||||
* Timer0_A5
|
||||
************************************************************/
|
||||
PROVIDE(TA0CTL = 0x0340);
|
||||
PROVIDE(TA0CCTL0 = 0x0342);
|
||||
PROVIDE(TA0CCTL1 = 0x0344);
|
||||
PROVIDE(TA0CCTL2 = 0x0346);
|
||||
PROVIDE(TA0CCTL3 = 0x0348);
|
||||
PROVIDE(TA0CCTL4 = 0x034A);
|
||||
PROVIDE(TA0R = 0x0350);
|
||||
PROVIDE(TA0CCR0 = 0x0352);
|
||||
PROVIDE(TA0CCR1 = 0x0354);
|
||||
PROVIDE(TA0CCR2 = 0x0356);
|
||||
PROVIDE(TA0CCR3 = 0x0358);
|
||||
PROVIDE(TA0CCR4 = 0x035A);
|
||||
PROVIDE(TA0IV = 0x036E);
|
||||
PROVIDE(TA0EX0 = 0x0360);
|
||||
/************************************************************
|
||||
* Timer1_A3
|
||||
************************************************************/
|
||||
PROVIDE(TA1CTL = 0x0380);
|
||||
PROVIDE(TA1CCTL0 = 0x0382);
|
||||
PROVIDE(TA1CCTL1 = 0x0384);
|
||||
PROVIDE(TA1CCTL2 = 0x0386);
|
||||
PROVIDE(TA1R = 0x0390);
|
||||
PROVIDE(TA1CCR0 = 0x0392);
|
||||
PROVIDE(TA1CCR1 = 0x0394);
|
||||
PROVIDE(TA1CCR2 = 0x0396);
|
||||
PROVIDE(TA1IV = 0x03AE);
|
||||
PROVIDE(TA1EX0 = 0x03A0);
|
||||
/************************************************************
|
||||
* UNIFIED CLOCK SYSTEM FOR Radio Devices
|
||||
************************************************************/
|
||||
PROVIDE(UCSCTL0 = 0x0160);
|
||||
PROVIDE(UCSCTL0_L = 0x0160);
|
||||
PROVIDE(UCSCTL0_H = 0x0161);
|
||||
PROVIDE(UCSCTL1 = 0x0162);
|
||||
PROVIDE(UCSCTL1_L = 0x0162);
|
||||
PROVIDE(UCSCTL1_H = 0x0163);
|
||||
PROVIDE(UCSCTL2 = 0x0164);
|
||||
PROVIDE(UCSCTL2_L = 0x0164);
|
||||
PROVIDE(UCSCTL2_H = 0x0165);
|
||||
PROVIDE(UCSCTL3 = 0x0166);
|
||||
PROVIDE(UCSCTL3_L = 0x0166);
|
||||
PROVIDE(UCSCTL3_H = 0x0167);
|
||||
PROVIDE(UCSCTL4 = 0x0168);
|
||||
PROVIDE(UCSCTL4_L = 0x0168);
|
||||
PROVIDE(UCSCTL4_H = 0x0169);
|
||||
PROVIDE(UCSCTL5 = 0x016A);
|
||||
PROVIDE(UCSCTL5_L = 0x016A);
|
||||
PROVIDE(UCSCTL5_H = 0x016B);
|
||||
PROVIDE(UCSCTL6 = 0x016C);
|
||||
PROVIDE(UCSCTL6_L = 0x016C);
|
||||
PROVIDE(UCSCTL6_H = 0x016D);
|
||||
PROVIDE(UCSCTL7 = 0x016E);
|
||||
PROVIDE(UCSCTL7_L = 0x016E);
|
||||
PROVIDE(UCSCTL7_H = 0x016F);
|
||||
PROVIDE(UCSCTL8 = 0x0170);
|
||||
PROVIDE(UCSCTL8_L = 0x0170);
|
||||
PROVIDE(UCSCTL8_H = 0x0171);
|
||||
/************************************************************
|
||||
* USCI A0
|
||||
************************************************************/
|
||||
PROVIDE(UCA0CTLW0 = 0x05C0);
|
||||
PROVIDE(UCA0CTLW0_L = 0x05C0);
|
||||
PROVIDE(UCA0CTLW0_H = 0x05C1);
|
||||
PROVIDE(UCA0BRW = 0x05C6);
|
||||
PROVIDE(UCA0BRW_L = 0x05C6);
|
||||
PROVIDE(UCA0BRW_H = 0x05C7);
|
||||
PROVIDE(UCA0MCTL = 0x05C8);
|
||||
PROVIDE(UCA0STAT = 0x05CA);
|
||||
PROVIDE(UCA0RXBUF = 0x05CC);
|
||||
PROVIDE(UCA0TXBUF = 0x05CE);
|
||||
PROVIDE(UCA0ABCTL = 0x05D0);
|
||||
PROVIDE(UCA0IRCTL = 0x05D2);
|
||||
PROVIDE(UCA0IRCTL_L = 0x05D2);
|
||||
PROVIDE(UCA0IRCTL_H = 0x05D3);
|
||||
PROVIDE(UCA0ICTL = 0x05DC);
|
||||
PROVIDE(UCA0ICTL_L = 0x05DC);
|
||||
PROVIDE(UCA0ICTL_H = 0x05DD);
|
||||
PROVIDE(UCA0IV = 0x05DE);
|
||||
/************************************************************
|
||||
* USCI B0
|
||||
************************************************************/
|
||||
PROVIDE(UCB0CTLW0 = 0x05E0);
|
||||
PROVIDE(UCB0CTLW0_L = 0x05E0);
|
||||
PROVIDE(UCB0CTLW0_H = 0x05E1);
|
||||
PROVIDE(UCB0BRW = 0x05E6);
|
||||
PROVIDE(UCB0BRW_L = 0x05E6);
|
||||
PROVIDE(UCB0BRW_H = 0x05E7);
|
||||
PROVIDE(UCB0STAT = 0x05EA);
|
||||
PROVIDE(UCB0RXBUF = 0x05EC);
|
||||
PROVIDE(UCB0TXBUF = 0x05EE);
|
||||
PROVIDE(UCB0I2COA = 0x05F0);
|
||||
PROVIDE(UCB0I2COA_L = 0x05F0);
|
||||
PROVIDE(UCB0I2COA_H = 0x05F1);
|
||||
PROVIDE(UCB0I2CSA = 0x05F2);
|
||||
PROVIDE(UCB0I2CSA_L = 0x05F2);
|
||||
PROVIDE(UCB0I2CSA_H = 0x05F3);
|
||||
PROVIDE(UCB0ICTL = 0x05FC);
|
||||
PROVIDE(UCB0ICTL_L = 0x05FC);
|
||||
PROVIDE(UCB0ICTL_H = 0x05FD);
|
||||
PROVIDE(UCB0IV = 0x05FE);
|
||||
/************************************************************
|
||||
* WATCHDOG TIMER A
|
||||
************************************************************/
|
||||
PROVIDE(WDTCTL = 0x015C);
|
||||
PROVIDE(WDTCTL_L = 0x015C);
|
||||
PROVIDE(WDTCTL_H = 0x015D);
|
||||
/************************************************************
|
||||
* TLV Descriptors
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* Interrupt Vectors (offset from 0xFF80)
|
||||
************************************************************/
|
||||
/************************************************************
|
||||
* End of Modules
|
||||
************************************************************/
|
||||
@ -30,29 +30,29 @@
|
||||
# /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
Version:,1.208,,,,Date:,08/21/19,15:53:27,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
Version:,1.21,,,,Date:,5/14/2020,14:14:02,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 0 STD MSP430 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 1 MSP430X CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 2 MSP430XV2 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 0 STD MSP430 CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 1 MSP430X CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 2 MSP430XV2 CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# HWMPY,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 0 No Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 1 16 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 0 No Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 1 16 Bit Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices)",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 4 32 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 8 32 Bit Hardware Multiplier (5xx),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 4 32 Bit Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 8 32 Bit Hardware Multiplier (5xx)",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# SPI2Wire,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 0 JTAG only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 1 SBW (default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 2 JTAG (Default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# 3 SBW only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 0 JTAG only - no scan",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 1 SBW (default) - scan allowed",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 2 JTAG (Default) - scan allowed",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
"# 3 SBW only - no scan",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
|
||||
@ -74,10 +74,10 @@ msp430c336,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
msp430c337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c412,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c413,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430cg4616,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF
|
||||
msp430cg4617,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF
|
||||
msp430cg4618,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430cg4619,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430cg4616,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF
|
||||
msp430cg4617,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF
|
||||
msp430cg4618,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430cg4619,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF
|
||||
msp430e112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430e313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430e315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
@ -133,26 +133,26 @@ msp430f2272,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,
|
||||
msp430f2234,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2254,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2274,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2330,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2350,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2370,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f233,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f235,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2330,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2350,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f2370,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f233,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f235,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430f247,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f248,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f249,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2410,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2471,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2481,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2491,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2416,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2417,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2418,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2419,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2616,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2617,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2618,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2619,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2471,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2481,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2491,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
|
||||
msp430f2416,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2417,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2418,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2419,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2616,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2617,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2618,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f2619,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f412,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFBD,0,0,,,FFE0,FFFF
|
||||
msp430f413,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f415,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
@ -186,24 +186,24 @@ msp430fe4232,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
msp430fe4242,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,D000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430fe4252,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430fe4272,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4783,0,0,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4793,0,0,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4783,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4793,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4784,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4794,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f47126,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
|
||||
msp430f47126,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
|
||||
msp430f47127,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
|
||||
msp430f47163,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47173,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47183,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47193,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47166,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47176,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47186,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47196,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47167,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47177,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47187,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47197,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47163,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47173,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47183,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47193,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47166,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47176,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47186,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47196,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47167,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47177,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47187,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f47197,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4250,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4260,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430f4270,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
|
||||
@ -230,14 +230,14 @@ msp430f46161,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,20
|
||||
msp430f46171,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f46181,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f46191,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4616,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4617,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4618,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f4619,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4616,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4617,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4618,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430fg4619,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
|
||||
msp430f5418,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF
|
||||
msp430f5419,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF
|
||||
msp430f5435,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF
|
||||
@ -270,10 +270,10 @@ msp430f5242,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,
|
||||
msp430f5244,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430f5247,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
|
||||
msp430f5249,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430f5304,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5308,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5309,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5310,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5304,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5308,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5309,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5310,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5340,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
|
||||
msp430f5341,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
|
||||
msp430f5342,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
@ -367,14 +367,14 @@ msp430fg6425,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF
|
||||
msp430fg6426,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430fg6625,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
|
||||
msp430fg6626,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
|
||||
msp430l092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F
|
||||
msp430c091,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430xgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430f5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr2xx_4xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr57xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430l092,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F
|
||||
msp430c091,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430c092,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430xgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430f5xx_6xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr5xx_6xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr2xx_4xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430fr57xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
|
||||
msp430i2xxgeneric,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FF80,FFFF
|
||||
msp430f5131,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
|
||||
msp430f5151,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
@ -550,7 +550,7 @@ msp430g2855,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,
|
||||
msp430g2955,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFDD,0,0,FFDE,2,FFE0,FFFF
|
||||
msp430g2230,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430g2210,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
|
||||
msp430bt5190,2,CPU21; CPU22; CPU23; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430bt5190,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430fr5857,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr5858,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr5859,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
@ -579,12 +579,12 @@ msp430i2030,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
msp430i2031,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
|
||||
msp430i2040,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF
|
||||
msp430i2041,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
|
||||
rf430frl152h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl152h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl152h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl152h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl153h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430frl154h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
|
||||
rf430f5175,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
|
||||
rf430f5155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
rf430f5144,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
|
||||
@ -634,16 +634,16 @@ msp430fr68221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23F
|
||||
msp430fr69221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
msp430fr68721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
msp430fr69721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
|
||||
msp430sl5438a,2,CPU21; CPU22; CPU23; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430sl5438a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
|
||||
msp430fr4131,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,F000,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr4132,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr4133,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2032,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2033,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2110,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2111,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2310,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2311,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2110,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2111,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2310,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2311,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2433,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2532,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2533,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
@ -657,33 +657,37 @@ msp430f5256,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,
|
||||
msp430f5257,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
|
||||
msp430f5258,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
|
||||
msp430f5259,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
|
||||
msp430fr5962,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5964,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5992,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5994,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr59941,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr2000,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FE00,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2100,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FC00,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2353,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2355,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2153,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2155,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2422,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2522,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2512,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2676,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF
|
||||
msp430fr2675,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,37FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2476,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF
|
||||
msp430fr2475,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr50431,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6041,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr6043,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5041,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr5043,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr60431,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6037,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6035,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr60471,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr60371,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6045,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6047,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5962,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5964,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5992,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5994,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr59941,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr2100,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FC00,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2000,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FE00,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2355,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2353,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2153,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2522,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2512,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2422,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
|
||||
msp430fr2676,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF
|
||||
msp430fr2476,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF
|
||||
msp430fr2675,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,37FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2673,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2475,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr2672,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,E000,FF7F,0,0,FF80,22,FFA2,FFFF
|
||||
msp430fr6043,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5043,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6041,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr60431,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr5041,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF
|
||||
msp430fr50431,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6005,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6047,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6037,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6045,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr60471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6035,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
|
||||
msp430fr6007,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
msp430fr60371,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
/*******************************************************************************
|
||||
* in430.h -
|
||||
*
|
||||
* Copyright (C) 2003-2019 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Copyright (C) 2003-2020 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@ -33,7 +33,7 @@
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* 1.208 */
|
||||
/* 1.210 */
|
||||
|
||||
#ifndef __IN430_H__
|
||||
#define __IN430_H__
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*******************************************************************************
|
||||
* iomacros.h -
|
||||
*
|
||||
* Copyright (C) 2003-2019 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Copyright (C) 2003-2020 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@ -33,7 +33,7 @@
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* 1.208 */
|
||||
/* 1.210 */
|
||||
|
||||
#if !defined(_IOMACROS_H_)
|
||||
#define _IOMACROS_H_
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -57,7 +57,7 @@
|
||||
#ifndef __msp430x16x
|
||||
#define __msp430x16x
|
||||
|
||||
#define __MSP430_HEADER_VERSION__ 1208
|
||||
#define __MSP430_HEADER_VERSION__ 1210
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1611 devices. */
|
||||
/* Version: 1.208 */
|
||||
/* Version: 1.210 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
@ -87,7 +87,7 @@ SECTIONS
|
||||
KEEP (*(.resetvec))
|
||||
} > RESETVEC
|
||||
|
||||
.rodata :
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.plt)
|
||||
@ -100,7 +100,7 @@ SECTIONS
|
||||
read only but which older linkers treat as read-write.
|
||||
This prevents older linkers from marking the entire .rodata
|
||||
section as read-write. */
|
||||
.rodata2 :
|
||||
.rodata2 :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__preinit_array_start = .);
|
||||
@ -161,7 +161,7 @@ SECTIONS
|
||||
KEEP (*(.tm_clone_table))
|
||||
} > ROM
|
||||
|
||||
.data :
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datastart = .);
|
||||
@ -193,7 +193,7 @@ SECTIONS
|
||||
PROVIDE(__romdatastart = LOADADDR(.data));
|
||||
PROVIDE (__romdatacopysize = SIZEOF(.data));
|
||||
|
||||
.bss :
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__bssstart = .);
|
||||
@ -208,7 +208,7 @@ SECTIONS
|
||||
|
||||
/* This section contains data that is not initialised during load
|
||||
or application reset. */
|
||||
.noinit (NOLOAD) :
|
||||
.noinit (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__noinit_start = .);
|
||||
@ -226,7 +226,7 @@ SECTIONS
|
||||
. = ALIGN(2);
|
||||
__heap_start__ = .;
|
||||
_end = __heap_start__;
|
||||
PROVIDE (end = .);
|
||||
PROVIDE (end = .);
|
||||
KEEP (*(.heap))
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1611 devices. */
|
||||
/* Version: 1.208 */
|
||||
/* Version: 1.210 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -57,7 +57,7 @@
|
||||
#ifndef __msp430x16x
|
||||
#define __msp430x16x
|
||||
|
||||
#define __MSP430_HEADER_VERSION__ 1208
|
||||
#define __MSP430_HEADER_VERSION__ 1210
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1612 devices. */
|
||||
/* Version: 1.208 */
|
||||
/* Version: 1.210 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
@ -87,7 +87,7 @@ SECTIONS
|
||||
KEEP (*(.resetvec))
|
||||
} > RESETVEC
|
||||
|
||||
.rodata :
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.plt)
|
||||
@ -100,12 +100,13 @@ SECTIONS
|
||||
read only but which older linkers treat as read-write.
|
||||
This prevents older linkers from marking the entire .rodata
|
||||
section as read-write. */
|
||||
.rodata2 :
|
||||
.rodata2 :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE (__preinit_array_end = .);
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
@ -160,7 +161,7 @@ SECTIONS
|
||||
KEEP (*(.tm_clone_table))
|
||||
} > ROM
|
||||
|
||||
.data :
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datastart = .);
|
||||
@ -192,7 +193,7 @@ SECTIONS
|
||||
PROVIDE(__romdatastart = LOADADDR(.data));
|
||||
PROVIDE (__romdatacopysize = SIZEOF(.data));
|
||||
|
||||
.bss :
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__bssstart = .);
|
||||
@ -207,7 +208,7 @@ SECTIONS
|
||||
|
||||
/* This section contains data that is not initialised during load
|
||||
or application reset. */
|
||||
.noinit (NOLOAD) :
|
||||
.noinit (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__noinit_start = .);
|
||||
@ -225,7 +226,7 @@ SECTIONS
|
||||
. = ALIGN(2);
|
||||
__heap_start__ = .;
|
||||
_end = __heap_start__;
|
||||
PROVIDE (end = .);
|
||||
PROVIDE (end = .);
|
||||
KEEP (*(.heap))
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F1612 devices. */
|
||||
/* Version: 1.208 */
|
||||
/* Version: 1.210 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -54,7 +54,7 @@
|
||||
|
||||
#define __MSP430_HAS_MSP430X_CPU__ /* Definition to show that it has MSP430X CPU */
|
||||
|
||||
#define __MSP430_HEADER_VERSION__ 1208
|
||||
#define __MSP430_HEADER_VERSION__ 1210
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F2617 devices. */
|
||||
/* Version: 1.208 */
|
||||
/* Version: 1.210 */
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_ARCH(msp430)
|
||||
@ -144,7 +144,7 @@ SECTIONS
|
||||
read only but which older linkers treat as read-write.
|
||||
This prevents older linkers from marking the entire .rodata
|
||||
section as read-write. */
|
||||
.rodata2 :
|
||||
.rodata2 :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__preinit_array_start = .);
|
||||
@ -264,7 +264,7 @@ SECTIONS
|
||||
. = ALIGN(2);
|
||||
__heap_start__ = .;
|
||||
_end = __heap_start__;
|
||||
PROVIDE (end = .);
|
||||
PROVIDE (end = .);
|
||||
KEEP (*(.heap))
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2019, Texas Instruments Incorporated */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
@ -31,7 +31,7 @@
|
||||
/* ============================================================================ */
|
||||
|
||||
/* This file supports MSP430F2617 devices. */
|
||||
/* Version: 1.208 */
|
||||
/* Version: 1.210 */
|
||||
|
||||
/************************************************************
|
||||
* STANDARD BITS
|
||||
|
||||
2
cpu/msp430_common/vendor/update.sh
vendored
2
cpu/msp430_common/vendor/update.sh
vendored
@ -5,7 +5,7 @@
|
||||
|
||||
set -e
|
||||
|
||||
URL="https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/latest/exports/msp430-gcc-support-files-1.208.zip"
|
||||
URL="https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-support-files-1.210.zip"
|
||||
rm -Rf msp430-gcc-support-files
|
||||
|
||||
_CPUS="$(git -C ../../.. grep -o '^CPU_MODEL.=.*430.*$' | cut -d' ' -f 3 | sort -u)"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user