mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2025-12-26 06:53:52 +01:00
fixed encoding and coding conventions
This commit is contained in:
Zakaria Kasmi
Oleg Hahm
parent
9f96225400
commit
93c153a37f
@ -10,7 +10,7 @@ INCLUDES += -I$(RIOTBASE)/cpu/arm_common/include/
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INCLUDES += -I$(RIOTBASE)/cpu/lpc2387/include/
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INCLUDES += -I$(RIOTBASE)/drivers/cc110x
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all: $(BINDIR)$(ARCH)
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all: $(BINDIR)$(ARCH)
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"$(MAKE)" -C ../msba2-common
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"$(MAKE)" -C drivers
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@ -34,7 +34,5 @@ clean:
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rm -f $(BINDIR)$(ARCH) $(OBJ) $(DEP)
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@if [ -d $(BINDIR) ] ; \
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then rmdir $(BINDIR) ; \
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fi
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fi
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@ -8,16 +8,11 @@
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*/
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/**
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* @ingroup avsextrem
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* @{
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*/
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/**
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* @file
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* @brief avsextrem board initialization
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*
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* @author Freie Universität Berlin, Computer Systems & Telematics
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* @author Freie Universität Berlin, Computer Systems & Telematics
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* @author Heiko Will
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* @author Kaspar Schleise
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* @author Michael Baar
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@ -25,7 +20,7 @@
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* @author Marco Ziegert
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* @author Stefan Pfeiffer
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*
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* @note $Id: board_init.c 1071 2013-08-14 10:15:56Z hwill $
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* @note $Id: board_init.c 1071 2013-09-19 16:50:56 kasmi $
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*/
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#include "lpc23xx.h"
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#include "VIC.h"
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@ -51,24 +46,25 @@ void init_clks1(void)
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PLLCON &= ~0x0002;
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pllfeed();
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while (PLLSTAT & BIT25); // wait until PLL is disconnected before disabling - deadlock otherwise
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while (PLLSTAT & BIT25); /* wait until PLL is disconnected before
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* disabling - deadlock otherwise */
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// Disable PLL
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PLLCON &= ~0x0001;
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pllfeed();
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while (PLLSTAT & BIT24); // wait until PLL is disabled
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while (PLLSTAT & BIT24); // wait until PLL is disabled
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SCS |= 0x10; // main OSC between 15MHz and 24MHz (more stable in tests)
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SCS |= 0x20; // Enable main OSC
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SCS |= 0x10; // main OSC between 15MHz and 24MHz (more stable in tests)
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SCS |= 0x20; // Enable main OSC
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while (!(SCS & 0x40)); // Wait until main OSC is usable
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while (!(SCS & 0x40)); // Wait until main OSC is usable
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/* select main OSC, 16MHz, as the PLL clock source */
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CLKSRCSEL = 0x0001;
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// Setting Multiplier and Divider values
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PLLCFG = 0x0008; // M=9 N=1 Fcco = 288 MHz
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PLLCFG = 0x0008; // M=9 N=1 Fcco = 288 MHz
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pllfeed();
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// Enabling the PLL */
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@ -76,20 +72,20 @@ void init_clks1(void)
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pllfeed();
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/* Set clock divider to 4 (value+1) */
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CCLKCFG = CL_CPU_DIV - 1; // Fcpu = 72 MHz
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CCLKCFG = CL_CPU_DIV - 1; // Fcpu = 72 MHz
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#if USE_USB
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USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
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USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
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#endif
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}
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/*---------------------------------------------------------------------------*/
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void bl_init_ports(void)
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{
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SCS |= BIT0; // Set IO Ports to fast switching mode
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SCS |= BIT0; // Set IO Ports to fast switching mode
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/* UART0 */
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PINSEL0 |= BIT4 + BIT6; // RxD0 and TxD0
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PINSEL0 |= BIT4 + BIT6; // RxD0 and TxD0
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PINSEL0 &= ~(BIT5 + BIT7);
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//PTTU:
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@ -114,29 +110,30 @@ void bl_init_ports(void)
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//
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/* Disable Resistors on LED - and Ports to output*/
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PINMODE7 |= BIT19 + BIT21; //3.25 + 3.26
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PINMODE2 |= BIT1; //1.0
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PINMODE7 |= BIT19 + BIT21; //3.25 + 3.26
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PINMODE2 |= BIT1; //1.0
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FIO1DIR |= BIT0;
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FIO3DIR |= BIT25 + BIT26;
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FIO1SET = BIT0; //all off
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FIO1SET = BIT0; //all off
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FIO3SET = BIT25 + BIT26;
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// Config and Disable PA
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// FIO1DIR |= BIT25 + BIT26 + BIT22;
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// FIO1SET = BIT26;
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// FIO1CLR = BIT25;
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// FIO1CLR = BIT22; // PA /Shutdown
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// FIO0DIR |= BIT26; // ** // Important: First put this Port as DA 2.0V and then turn on PA!!
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// FIO0SET = BIT26; // **
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// FIO1CLR = BIT22; // PA /Shutdown
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// Important: First put this Port as DA 2.0V and then turn on PA!!
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// FIO0DIR |= BIT26;
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// FIO0SET = BIT26;
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// 1.22 + 1.25 + 1.26
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// Configure GPS
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PINMODE3 |= BIT3 + BIT7; // No Pullup on 1.17 & 1.19
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PINMODE3 |= BIT3 + BIT7; // No Pullup on 1.17 & 1.19
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PINMODE9 |= BIT27 + BIT25; // No Pullup for Uart
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FIO1DIR |= BIT17;
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FIO1CLR = BIT17; // Turn off GPS
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FIO1CLR = BIT17; // Turn off GPS
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FIO1DIR |= BIT19;
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FIO1CLR = BIT19; // Hold in Reset
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FIO1CLR = BIT19; // Hold in Reset
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PINSEL9 |= BIT24 + BIT25 + BIT26 + BIT27; //4.28 & 4.29 as Uart3
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// Nanotron
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@ -148,7 +145,7 @@ void bl_init_ports(void)
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FIO1DIR &= ~BIT4; // nanotron Rx/Tx as input
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FIO1CLR = BIT15;
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FIO1CLR = BIT9; // Enable power
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FIO1CLR = BIT9; // Enable power
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PINMODE1 |= BIT1; // No Pullup for CS
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FIO0DIR |= BIT16; // CS as output
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@ -157,7 +154,7 @@ void bl_init_ports(void)
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// RFID
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// FIO1DIR |= BIT1; // RFID Power
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// FIO1CLR = BIT1; //
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// FIO1CLR = BIT1;
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//
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// FIO0DIR |= BIT1; // RFID Reset
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// FIO0SET = BIT1; // Hold in Reset
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@ -177,7 +174,7 @@ void bl_init_ports(void)
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// 0.23 + 0.24
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// Battery Voltage (AD)
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PINMODE1 |= BIT19; //0.25
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PINMODE1 |= BIT19; //0.25
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PINSEL1 &= ~BIT19;
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PINSEL1 |= BIT18;
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@ -187,36 +184,19 @@ void bl_init_ports(void)
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FIO0SET = BIT7 + BIT9;
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//SMB380
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FIO1DIR |= BIT20 + BIT21 + BIT24; //SCK + CSB + SDI
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FIO1DIR |= BIT20 + BIT21 + BIT24; //SCK + CSB + SDI
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FIO1SET = BIT21;
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FIO1SET = BIT20 + 24;
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//SHT11
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FIO1DIR |= BIT25; //1.25
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FIO1DIR |= BIT25; //1.25
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PINSEL3 &= ~(BIT12 | BIT13 | BIT18 | BIT19);
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//SD
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FIO0DIR &= ~(BIT19 | BIT20 | BIT21 | BIT22) ; //0.19 0.20 0.21 0.22 as input
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PINMODE1 |= (BIT7) | (BIT9) | (BIT11) | (BIT13); // no resistors
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FIO2DIR &= ~(BIT11 + BIT12 + BIT13); //2.11 2.12 2.13 as input
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PINMODE4 |= (BIT23) | (BIT25) | (BIT27); // no resistors
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FIO0DIR &= ~(BIT19 | BIT20 | BIT21 | BIT22) ; //0.19 0.20 0.21 0.22 as input
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PINMODE1 |= (BIT7) | (BIT9) | (BIT11) | (BIT13); // no resistors
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FIO2DIR &= ~(BIT11 + BIT12 + BIT13); //2.11 2.12 2.13 as input
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PINMODE4 |= (BIT23) | (BIT25) | (BIT27); // no resistors
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//Tetra
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// FIO2DIR |= BIT0 + BIT7;
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// 2.0 bis 2.7
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// No Pullups on any port
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// Does not work, needs more current than pull-ups
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// int nopullup = BIT1 + BIT3 + BIT5 + BIT7 + BIT9 + BIT11 + BIT13 + BIT15 + BIT17 + BIT19 + BIT21 + BIT23 + BIT25 + BIT27 + BIT29 + BIT31;
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// PINMODE0 = nopullup - BIT13 - BIT15 - BIT17 - BIT19;
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// PINMODE1 = BIT1 + BIT3 + BIT5 + BIT7 + BIT9 + BIT11 + BIT13 + BIT15 + BIT17 + BIT19 + BIT21;
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// PINMODE2 = nopullup;
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// PINMODE3 = nopullup;
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// PINMODE4 = nopullup;
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// PINMODE5 = nopullup;
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// PINMODE6 = nopullup;
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// PINMODE7 = nopullup;
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// PINMODE8 = nopullup;
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// PINMODE9 = nopullup;
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}
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@ -13,7 +13,7 @@
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* @ingroup LPC2387
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* @brief CC1100 LPC2387 dependend functions
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*
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* @author Freie Universität Berlin, Computer Systems & Telematics
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* @author Freie Universität Berlin, Computer Systems & Telematics
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* @author Heiko Will <hwill@inf.fu-berlin.de>
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* @author Thomas Hillebrandt <hillebra@inf.fu-berlin.de>
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* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
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@ -33,16 +33,16 @@
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#include "cc1100_spi.h"
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#include "gpioint.h"
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#define CC1100_GDO0 (FIO2PIN & BIT6) // read serial I/O (GDO0)
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#define CC1100_GDO1 (FIO0PIN & BIT8) // read serial I/O (GDO1)
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#define CC1100_GDO2 (FIO0PIN & BIT28) // read serial I/O (GDO2)
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#define CC1100_GDO0 (FIO2PIN & BIT6) // read serial I/O (GDO0)
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#define CC1100_GDO1 (FIO0PIN & BIT8) // read serial I/O (GDO1)
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#define CC1100_GDO2 (FIO0PIN & BIT28) // read serial I/O (GDO2)
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#define SPI_TX_EMPTY (SSP1SR & SSPSR_TFE)
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#define SPI_BUSY (SSP1SR & SSPSR_BSY)
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#define SPI_RX_AVAIL (SSP1SR & SSPSR_RNE)
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#define SPI_TX_EMPTY (SSP1SR & SSPSR_TFE)
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#define SPI_BUSY (SSP1SR & SSPSR_BSY)
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#define SPI_RX_AVAIL (SSP1SR & SSPSR_RNE)
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#define CC1100_GDO1_LOW_RETRY (100) // max. retries for GDO1 to go low
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#define CC1100_GDO1_LOW_COUNT (2700) // loop count (timeout ~ 500 us) to wait
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#define CC1100_GDO1_LOW_RETRY (100) // max. retries for GDO1 to go low
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#define CC1100_GDO1_LOW_COUNT (2700) // loop count (timeout ~ 500 us) to wait
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// for GDO1 to go low when CS low
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//#define DEBUG
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@ -73,17 +73,17 @@ static int test_time(int code)
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int cc1100_get_gdo0(void)
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{
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return CC1100_GDO0;
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return CC1100_GDO0;
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}
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int cc1100_get_gdo1(void)
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{
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return CC1100_GDO1;
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return CC1100_GDO1;
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}
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int cc1100_get_gdo2(void)
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{
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return CC1100_GDO2;
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return CC1100_GDO2;
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}
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void cc1100_spi_init(void)
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@ -93,14 +93,14 @@ void cc1100_spi_init(void)
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FIO0SET = BIT6;
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// Power
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PCONP |= PCSSP1; // Enable power for SSP1 (default is on)
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PCONP |= PCSSP1; // Enable power for SSP1 (default is on)
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// PIN Setup
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PINSEL0 |= BIT15; // Set CLK function to SSP1
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PINSEL0 |= BIT15; // Set CLK function to SSP1
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PINSEL0 &= ~BIT14;
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PINSEL0 |= BIT17 ; // Set MISO function to SSP1
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PINSEL0 |= BIT17 ; // Set MISO function to SSP1
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PINSEL0 &= ~BIT16;
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PINSEL0 |= BIT19; // Set MOSI function to SSP1
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PINSEL0 |= BIT19; // Set MOSI function to SSP1
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PINSEL0 &= ~BIT18;
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// Interface Setup
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SSP1CR0 = 7;
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@ -109,17 +109,17 @@ void cc1100_spi_init(void)
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uint32_t pclksel;
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uint32_t cpsr;
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lpc2387_pclk_scale(F_CPU / 1000, 6000, &pclksel, &cpsr);
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PCLKSEL0 &= ~(BIT21 | BIT20); // CCLK to PCLK divider
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PCLKSEL0 &= ~(BIT21 | BIT20); // CCLK to PCLK divider
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PCLKSEL0 |= pclksel << 20;
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SSP1CPSR = cpsr;
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// Enable
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SSP1CR1 |= BIT1; // SSP-Enable
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SSP1CR1 |= BIT1; // SSP-Enable
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int dummy;
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// Clear RxFIFO:
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while (SPI_RX_AVAIL) { // while RNE (Receive FIFO Not Empty)...
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dummy = SSP1DR; // read data
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while (SPI_RX_AVAIL) { // while RNE (Receive FIFO Not Empty)...
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dummy = SSP1DR; // read data
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}
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}
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@ -173,7 +173,7 @@ cc1100_spi_select(void)
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volatile int retry_count = 0;
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volatile int abort_count;
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// Switch to GDO mode input
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PINSEL0 &= ~(BIT17 + BIT16);// Set MISO function to GPIO
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PINSEL0 &= ~(BIT17 + BIT16); // Set MISO function to GPIO
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FIO0DIR &= ~BIT8;
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cs_low:
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// CS to low
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@ -195,8 +195,8 @@ loop:
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goto final;
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}
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FIO0SET = BIT6; // CS to high
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goto cs_low; // try again
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FIO0SET = BIT6; // CS to high
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goto cs_low; // try again
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}
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goto loop;
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@ -204,7 +204,7 @@ loop:
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final:
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// Switch to SPI mode
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PINSEL0 |= BIT17; // Set MISO function to SSP1
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PINSEL0 |= BIT17; // Set MISO function to SSP1
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PINSEL0 &= ~BIT16;
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}
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@ -246,9 +246,6 @@ void cc1100_gdo0_disable(void)
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gpioint_set(2, BIT6, GPIOINT_DISABLE, NULL);
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}
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void cc1100_init_interrupts(void)
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{
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// Enable external interrupt on low edge (for GDO2)
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@ -1,7 +1,7 @@
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/*
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* msba2acc-smb380.c - implementation of the Driver for the SMB380 acceleration
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* sensor on the AVSEXTREM board.
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* Copyright (C) 2013 Freie Universität Berlin
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* Copyright (C) 2013 Freie Universität Berlin
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*
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* This source code is licensed under the LGPLv2 license,
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* See the file LICENSE for more details.
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@ -11,10 +11,10 @@
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/**
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* @file
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* @internal
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* @brief SMB380 acceleration sensor driver for the LPC2387 on the
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* @brief SMB380 acceleration sensor driver for the LPC2387 on the
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* AVSEXTREM board.
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*
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* @author Freie Universität Berlin, Computer Systems & Telematics
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* @author Freie Universität Berlin, Computer Systems & Telematics
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* @author Marco Ziegert <ziegert@inf.fu-berlin.de>
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* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
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* @version $Revision: 3854 $
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@ -23,7 +23,7 @@
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*/
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#include "lpc23xx.h" /* LPC23XX/24xx Peripheral Registers */
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#include "lpc23xx.h" /* LPC23XX/24xx Peripheral Registers */
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#include "cpu.h"
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#include "lpm.h"
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//#include "PatrecInit.h"
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@ -45,22 +45,6 @@
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#include "math.h"
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#include "lpc2387.h"
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/* program example
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*
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*
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*
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*
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SMB380_init(); //Initializes SPI and the SMB380 accelerator sensor
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SMB380_setRange(SMB380_RANGE_8G);
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//SMB380_setBandWidth(SMB380_BAND_WIDTH_100HZ);
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SMB380_enableNewDataInt();
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while ( readRingBuff(accInt) ) {
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printf("[%4i|%4i|%4i|%4i]\r\n", accInt[0], accInt[1], accInt[2], accInt[3]);
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ktimer_wait(KTIMER_TICKS(1000000));
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//actualizeRingReadPointer(); //update read-pointer position to a current measurement (drop unread ones)
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}
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*/
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uint8_t simple_pid;
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int16_t simple_buffer[4];
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@ -73,24 +57,30 @@ uint16_t readPointerPos[SMB380_RING_BUFF_MAX_THREADS];
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u_char PointerList[SMB380_RING_BUFF_MAX_THREADS];
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static msg_t wakeupmessage;
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uint8_t (*smb380function)(int16_t *); //pointer to a user-defined function which is called during a writepointer action
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uint16_t sampleRateSMB380;
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bool dynRange = false; //condition if range-check should be done
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/*
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* pointer to a user-defined function which is called during a writepointer
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* action
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*/
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uint8_t (*smb380function)(int16_t *);
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uint16_t sampleRateSMB380; // condition if range-check should be done
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bool dynRange = false;
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uint8_t counter_Decreasing = 0;
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volatile uint16_t interruptTicksSMB380;
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typedef struct {
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u_int writePointerPos; //Writepointer position
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uint8_t countRange; //check value for updated range settings (only needed for multiplication in Float-mode
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uint8_t range; //current range
|
||||
u_int writePointerPos; //Writepointer position
|
||||
/*
|
||||
* check value for updated range settings (only needed for multiplication
|
||||
* in Float-mode
|
||||
*/
|
||||
uint8_t countRange;
|
||||
uint8_t range; //current range
|
||||
} settingsSMB380;
|
||||
|
||||
settingsSMB380 settings;
|
||||
|
||||
/* measuring temperature dependent internal sample rate of SMB380 */
|
||||
// measuring temperature dependent internal sample rate of SMB380
|
||||
static volatile uint32_t tickStart = 0;
|
||||
static volatile uint32_t tickLastSample = 0;
|
||||
static volatile uint32_t tickCurrentSamples = 0;
|
||||
@ -105,7 +95,8 @@ extern unsigned long ktimer_now(void);
|
||||
|
||||
float SMB380_getSampleRatio(void)
|
||||
{
|
||||
return ((1.0 / ((float)(tickLastSample - tickStart) / tickCurrentSamples)) * 100000) /*/ (float)(SMB380_SAMPLE_RATE_MAX / sampleRateSMB380)*/;
|
||||
return ((1.0 / ((float)(tickLastSample - tickStart) / tickCurrentSamples)) *
|
||||
100000);
|
||||
}
|
||||
|
||||
uint8_t smb380emptyfunction(int16_t *value)
|
||||
@ -119,7 +110,7 @@ uint8_t SMB380_HystereseFunctionSample(int16_t *value)
|
||||
static uint8_t counter = 0;
|
||||
int16_t delta = abs(value[0] - x) + abs(value[1] - y) + abs(value[2] - z);
|
||||
|
||||
if (delta < 40) { //TODO: delta and counter are constant values, change it!
|
||||
if (delta < 40) { //TODO: delta and counter are constant values, change it!
|
||||
counter++;
|
||||
}
|
||||
else {
|
||||
@ -142,14 +133,14 @@ uint8_t SMB380_HystereseFunctionSample(int16_t *value)
|
||||
//SMB380_setAnyMotionLimit(100,0);
|
||||
SMB380_enableAnyMotionLimit();
|
||||
smb380_mode = SMB380_THRESHOLD;
|
||||
counter = 0; //n�tig?
|
||||
counter = 0;
|
||||
}
|
||||
else if (counter == 100) {
|
||||
SMB380_disableNewDataInt();
|
||||
//SMB380_setAnyMotionLimit(100,0);
|
||||
SMB380_enableAnyMotionLimit();
|
||||
smb380_mode = SMB380_FALSEALERT;
|
||||
counter = 0; //n�tig?
|
||||
counter = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -179,7 +170,8 @@ static void SMB380_simple_interrupthandler(void)
|
||||
}
|
||||
|
||||
// enables simple Interrupt driven Mode
|
||||
uint8_t SMB380_init_simple(uint16_t samplerate, uint8_t bandwidth, uint8_t range)
|
||||
uint8_t SMB380_init_simple(uint16_t samplerate, uint8_t bandwidth, uint8_t
|
||||
range)
|
||||
{
|
||||
SSP0Init();
|
||||
interruptTicksSMB380 = 0;
|
||||
@ -215,7 +207,7 @@ uint8_t SMB380_init(uint8_t (*func)(int16_t *))
|
||||
smb380function = smb380emptyfunction;
|
||||
}
|
||||
|
||||
//smb380function = SMB380_HystereseFunctionSample; //Platzhalter
|
||||
//smb380function = SMB380_HystereseFunctionSample; //placeholder
|
||||
|
||||
SMB380_softReset();
|
||||
hwtimer_wait(HWTIMER_TICKS(100000));
|
||||
@ -223,7 +215,7 @@ uint8_t SMB380_init(uint8_t (*func)(int16_t *))
|
||||
SMB380_disableLowerLimit();
|
||||
|
||||
smb380_mode = SMB380_POLL;
|
||||
SMB380_setSampleRate(SMB380_SAMPLE_RATE_MAX); //set output to 3000 Hz
|
||||
SMB380_setSampleRate(SMB380_SAMPLE_RATE_MAX); //set output to 3000 Hz
|
||||
|
||||
settings.writePointerPos = 0;
|
||||
settings.range = 0;
|
||||
@ -239,7 +231,8 @@ uint8_t SMB380_init(uint8_t (*func)(int16_t *))
|
||||
ringBuff_Z = (int16_t *)malloc(SMB380_RING_BUFF_SIZE * sizeof(int16_t));
|
||||
ringBuff_T = (int16_t *)malloc(SMB380_RING_BUFF_SIZE * sizeof(int16_t));
|
||||
|
||||
if ((ringBuff_X == NULL) | (ringBuff_Y == NULL) | (ringBuff_Z == NULL) | (ringBuff_T == NULL)) {
|
||||
if ((ringBuff_X == NULL) | (ringBuff_Y == NULL) | (ringBuff_Z == NULL) |
|
||||
(ringBuff_T == NULL)) {
|
||||
if (ringBuff_X != NULL) {
|
||||
free((int16_t *)ringBuff_X);
|
||||
}
|
||||
@ -276,8 +269,10 @@ static void SMB380_extIntHandler(void)
|
||||
|
||||
writeRingBuff(accInt);
|
||||
|
||||
// printf("SMB380 acc x,y,z: [%i|%i|%i|%2.3f]\r\n", accInt[0], accInt[1], accInt[2], acc[3]);
|
||||
// printf("SMB380 acc x,y,z: [%2.3f|%2.3f|%2.3f|%2.3f]\r\n\n\n", acc[0], acc[1], acc[2], acc[3]);
|
||||
// printf("SMB380 acc x,y,z: [%i|%i|%i|%2.3f]\r\n", accInt[0], accInt[1],
|
||||
// accInt[2], acc[3]);
|
||||
// printf("SMB380 acc x,y,z: [%2.3f|%2.3f|%2.3f|%2.3f]\r\n\n\n", acc[0],
|
||||
// acc[1], acc[2], acc[3]);
|
||||
// printf("Nach Interrupt Reset:\n");
|
||||
// SMB380_ShowMemory();
|
||||
}
|
||||
@ -307,12 +302,13 @@ uint8_t SMB380_Unprepare(void)
|
||||
return SSP0Unprepare(SMB380_ACC);
|
||||
}
|
||||
|
||||
/* return the pointerNo related with the current thread */
|
||||
// return the pointerNo related with the current thread
|
||||
uint8_t getRingReadPointerforCurrentThread(void)
|
||||
{
|
||||
uint8_t pointerNo = 0;
|
||||
|
||||
while ((PointerList[pointerNo] != active_thread->pid) && (pointerNo < SMB380_RING_BUFF_MAX_THREADS)) {
|
||||
while ((PointerList[pointerNo] != active_thread->pid) &&
|
||||
(pointerNo < SMB380_RING_BUFF_MAX_THREADS)) {
|
||||
pointerNo++;
|
||||
}
|
||||
|
||||
@ -321,10 +317,11 @@ uint8_t getRingReadPointerforCurrentThread(void)
|
||||
|
||||
uint8_t initRingReadPointerforCurrentThread(void)
|
||||
{
|
||||
//TODO make it Threadsafe
|
||||
//TODO: make it Threadsafe
|
||||
uint8_t pointerNo = 0;
|
||||
|
||||
while ((PointerList[pointerNo] > 0) && (pointerNo < SMB380_RING_BUFF_MAX_THREADS)) {
|
||||
while ((PointerList[pointerNo] > 0) &&
|
||||
(pointerNo < SMB380_RING_BUFF_MAX_THREADS)) {
|
||||
pointerNo++;
|
||||
}
|
||||
|
||||
@ -357,36 +354,21 @@ void actualizeRingReadPointer(void)
|
||||
}
|
||||
}
|
||||
|
||||
//TODO more read-pointer
|
||||
//TODO: more read-pointer
|
||||
uint8_t readRingBuff(int16_t *value)
|
||||
{
|
||||
|
||||
// if ( inISR() ) {
|
||||
// if ( readPointerPos[pointerNo] == settings.writePointerPos )
|
||||
// return 0;
|
||||
// } else {
|
||||
// while ( readPointerPos[pointerNo] != settings.writePointerPos ) {
|
||||
// uint8_t x = 254;
|
||||
//// while ( x )
|
||||
//// x--;
|
||||
// }
|
||||
// }
|
||||
|
||||
// zugriff auf pid
|
||||
// if (getRead fk_thread->pid kenn ich schon)
|
||||
// {
|
||||
// pointerno[pid];
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// initRingReadPointerforCurrentThread();
|
||||
// }
|
||||
uint8_t pointerNo = getRingReadPointerforCurrentThread();
|
||||
|
||||
// If thread is not known to read on the ringbuffer, try adding him to the list of known threads, otherwise exit with error
|
||||
/*
|
||||
* If thread is not known to read on the ringbuffer, try adding him to the
|
||||
* list of known threads, otherwise exit with error
|
||||
*/
|
||||
|
||||
if (pointerNo == SMB380_RING_BUFF_MAX_THREADS) {
|
||||
if (!initRingReadPointerforCurrentThread()) {
|
||||
//printf("%sNo Readpointer left, maximum of %u is reached!\n\r", SMB380_DEBUG_MESSAGE, SMB380_RING_BUFF_MAX_THREADS);
|
||||
//printf("%sNo Readpointer left, maximum of %u is reached!\n\r",
|
||||
// SMB380_DEBUG_MESSAGE, SMB380_RING_BUFF_MAX_THREADS);
|
||||
return 0;
|
||||
}
|
||||
else {
|
||||
@ -415,7 +397,7 @@ uint8_t readRingBuff(int16_t *value)
|
||||
return 1;
|
||||
}
|
||||
|
||||
//TODO more read-pointer
|
||||
//TODO: more read-pointer
|
||||
uint8_t writeRingBuff(int16_t *value)
|
||||
{
|
||||
if (smb380_mode == SMB380_FALSEALERT) {
|
||||
@ -423,7 +405,8 @@ uint8_t writeRingBuff(int16_t *value)
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((interruptTicksSMB380 >= sampleRateSMB380 - 1) || (smb380_mode == SMB380_THRESHOLD)) {
|
||||
if ((interruptTicksSMB380 >= sampleRateSMB380 - 1) ||
|
||||
(smb380_mode == SMB380_THRESHOLD)) {
|
||||
interruptTicksSMB380 = 0;
|
||||
|
||||
/* measuring temperature dependent internal sample rate of SMB380 */
|
||||
@ -583,7 +566,8 @@ void wakeUpRegisteredProcesses(void)
|
||||
//wake up waiting processes
|
||||
wakeupmessage.type = MSG_TYPE_SMB380_WAKEUP;
|
||||
|
||||
while ((PointerList[pointerNo] > 0) && (pointerNo < SMB380_RING_BUFF_MAX_THREADS)) {
|
||||
while ((PointerList[pointerNo] > 0) &&
|
||||
(pointerNo < SMB380_RING_BUFF_MAX_THREADS)) {
|
||||
msg_send(&wakeupmessage, PointerList[pointerNo], false);
|
||||
pointerNo++;
|
||||
}
|
||||
@ -819,7 +803,8 @@ void SMB380_softReset(void)
|
||||
unsigned char ur;
|
||||
unsigned long cpsr = disableIRQ();
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, SMB380_CONTROL1_SOFT_RESET_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL1, SMB380_CONTROL1_SOFT_RESET_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
ur = ((unsigned char)SMB380_ssp_read()) & SMB380_CONTROL1_SOFT_RESET_MASK;
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -848,9 +833,7 @@ unsigned char SMB380_getCustomerReg(void)
|
||||
return uReg;
|
||||
}
|
||||
|
||||
/* Selftest
|
||||
*
|
||||
* */
|
||||
// Selftest
|
||||
void SMB380_Selftest_1(void)
|
||||
{
|
||||
unsigned char uReg = 0;
|
||||
@ -912,7 +895,7 @@ void SMB380_setUpperLimit(void)
|
||||
{
|
||||
unsigned long cpsr = disableIRQ();
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_HG_THRES, 128, SMB380_WRITE_REGISTER); //1g
|
||||
SMB380_ssp_write(SMB380_HG_THRES, 128, SMB380_WRITE_REGISTER); //1g
|
||||
SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_HG_DUR, 0, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
@ -927,7 +910,8 @@ void SMB380_enableUpperLimit(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg | SMB380_CONTROL2_ENABLE_HG_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg | SMB380_CONTROL2_ENABLE_HG_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -940,7 +924,8 @@ void SMB380_disableUpperLimit(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg & ~SMB380_CONTROL2_ENABLE_HG_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg & ~SMB380_CONTROL2_ENABLE_HG_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -953,7 +938,8 @@ void SMB380_enableLowerLimit(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg | SMB380_CONTROL2_ENABLE_LG_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg | SMB380_CONTROL2_ENABLE_LG_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -966,7 +952,8 @@ void SMB380_disableLowerLimit(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg & ~SMB380_CONTROL2_ENABLE_LG_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg & ~SMB380_CONTROL2_ENABLE_LG_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -985,7 +972,8 @@ uint8_t SMB380_setAnyMotionLimit(uint16_t mg, uint16_t gvalueint)
|
||||
threshold = mg / (15.6 * (SMB380_getRange() / 2));
|
||||
}
|
||||
else if (gvalueint != 0) {
|
||||
threshold = ceil(((gvalueint * 2000) / 512.0) / 15.6); //Scaling for different gRanges is not needed
|
||||
/* Scaling for different gRanges is not needed */
|
||||
threshold = ceil(((gvalueint * 2000) / 512.0) / 15.6);
|
||||
}
|
||||
else {
|
||||
return 0;
|
||||
@ -994,13 +982,12 @@ uint8_t SMB380_setAnyMotionLimit(uint16_t mg, uint16_t gvalueint)
|
||||
unsigned short uReg;
|
||||
unsigned long cpsr = disableIRQ();
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_ANY_MOTION_THRES, threshold, SMB380_WRITE_REGISTER); //0,3g = 300 / 15,6mg = 19
|
||||
/* 0,3g = 300 / 15,6mg = 19 */
|
||||
SMB380_ssp_write(SMB380_ANY_MOTION_THRES, threshold, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
//Set duration at this point
|
||||
SMB380_ssp_write(SMB380_ANY_MOTION_DUR_HYST, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
// SMB380_ssp_write(SMB380_ANY_MOTION_DUR_HYST, (uReg & ~SMB380_ANY_MOTION_DUR_MASK) | 0x40, SMB380_WRITE_REGISTER);
|
||||
// SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
return 1;
|
||||
@ -1013,11 +1000,13 @@ void SMB380_enableAnyMotionLimit(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg | SMB380_CONTROL4_ENABLE_ADV_INT_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg | SMB380_CONTROL4_ENABLE_ADV_INT_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg | SMB380_CONTROL2_ANY_MOTION_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg | SMB380_CONTROL2_ANY_MOTION_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -1030,11 +1019,15 @@ void SMB380_disableAnyMotionLimit(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL2, uReg & ~SMB380_CONTROL2_ANY_MOTION_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL2,
|
||||
uReg & ~SMB380_CONTROL2_ANY_MOTION_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg & ~SMB380_CONTROL4_ENABLE_ADV_INT_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL4,
|
||||
uReg & ~SMB380_CONTROL4_ENABLE_ADV_INT_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -1044,15 +1037,19 @@ void SMB380_enableNewDataInt(void)
|
||||
{
|
||||
unsigned short uReg;
|
||||
unsigned long cpsr = disableIRQ();
|
||||
//prevent deep sleep, reason: 400�s wake-up time is to long for 3kHz interrupts
|
||||
/*
|
||||
* prevent deep sleep, reason: 400 µs wake-up time is to long for 3kHz
|
||||
* interrupts
|
||||
*/
|
||||
SETBIT(lpm_prevent_sleep, LPM_PREVENT_SLEEP_ACCSENSOR);
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg | SMB380_CONTROL4_NEW_DATA_INT_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg | SMB380_CONTROL4_NEW_DATA_INT_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
/* measuring temperature dependent internal sample rate of SMB380 */
|
||||
// measuring temperature dependent internal sample rate of SMB380
|
||||
tickStart = ktimer_now();
|
||||
tickCurrentSamples = 0;
|
||||
restoreIRQ(cpsr);
|
||||
@ -1065,10 +1062,14 @@ void SMB380_disableNewDataInt(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg & ~SMB380_CONTROL4_NEW_DATA_INT_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL4, uReg & ~SMB380_CONTROL4_NEW_DATA_INT_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
//enable deep sleep, reason: 400�s wake-up time was to long for 3kHz interrupts
|
||||
/*
|
||||
* enable deep sleep, reason: 400 µs wake-up time was to long for 3kHz
|
||||
* interrupts
|
||||
*/
|
||||
CLRBIT(lpm_prevent_sleep, LPM_PREVENT_SLEEP_ACCSENSOR);
|
||||
restoreIRQ(cpsr);
|
||||
}
|
||||
@ -1080,7 +1081,8 @@ void SMB380_resetInterruptFlags(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, uReg | SMB380_CONTROL1_RESET_INT_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL1, uReg | SMB380_CONTROL1_RESET_INT_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -1093,7 +1095,8 @@ void SMB380_enableEEPROM(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, uReg | SMB380_CONTROL1_EE_W_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL1, uReg | SMB380_CONTROL1_EE_W_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
@ -1106,38 +1109,13 @@ void SMB380_disableEEPROM(void)
|
||||
SMB380_Prepare();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, 0, SMB380_READ_REGISTER);
|
||||
uReg = SMB380_ssp_read();
|
||||
SMB380_ssp_write(SMB380_CONTROL1, uReg & ~SMB380_CONTROL1_EE_W_MASK, SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_write(SMB380_CONTROL1, uReg & ~SMB380_CONTROL1_EE_W_MASK,
|
||||
SMB380_WRITE_REGISTER);
|
||||
SMB380_ssp_read();
|
||||
SMB380_Unprepare();
|
||||
restoreIRQ(cpsr);
|
||||
}
|
||||
|
||||
//void SMB380_calibrate(void){
|
||||
// unsigned short uMSB, uLSB;
|
||||
// //TODO 25Hz, 2G
|
||||
//
|
||||
// SMB380_ssp_write(SMB380_ACC_X_MSB, 0, SMB380_READ_REGISTER);
|
||||
// SMB380_ssp_write(SMB380_ACC_X_LSB_NEWDATA, 0, SMB380_READ_REGISTER);
|
||||
// uMSB = (SMB380_ssp_read() & SMB380_ACC_MSB_MASK) << 2;
|
||||
// uLSB = (SMB380_ssp_read() & SMB380_ACC_LSB_MASK) >> 6;
|
||||
//
|
||||
// SMB380_ssp_write(SMB380_ACC_X_MSB + SMB380_EEPROM_OFFSET, uMSB, SMB380_WRITE_REGISTER);
|
||||
// SMB380_ssp_write(SMB380_ACC_X_LSB_NEWDATA + SMB380_EEPROM_OFFSET, uLSB, SMB380_WRITE_REGISTER);
|
||||
//
|
||||
//
|
||||
// SMB380_ssp_write(SMB380_ACC_Y_MSB, 0, SMB380_READ_REGISTER);
|
||||
// SMB380_ssp_write(SMB380_ACC_Y_LSB_NEWDATA, 0, SMB380_READ_REGISTER);
|
||||
// uMSB = (SMB380_ssp_read() & SMB380_ACC_MSB_MASK) << 2;
|
||||
// uLSB |= (SMB380_ssp_read() & SMB380_ACC_LSB_MASK) >> 6;
|
||||
//
|
||||
// SMB380_ssp_write(SMB380_ACC_Z_MSB, 0, SMB380_READ_REGISTER);
|
||||
// SMB380_ssp_write(SMB380_ACC_Z_LSB_NEWDATA, 0, SMB380_READ_REGISTER);
|
||||
// uMSB = (SMB380_ssp_read() & SMB380_ACC_MSB_MASK) << 2;
|
||||
// uLSB |= (SMB380_ssp_read() & SMB380_ACC_LSB_MASK) >> 6;
|
||||
//
|
||||
//
|
||||
//}
|
||||
|
||||
/*
|
||||
* Return offsets from offset registers,
|
||||
* remove xyz afterwards because it is useless
|
||||
@ -1204,8 +1182,8 @@ unsigned char SMB380_readOffsetTemp(uint16_t *offset)
|
||||
return true;
|
||||
}
|
||||
|
||||
/* EEPROM = 1 if data has to be written in EEPROM and not only in image
|
||||
*
|
||||
/*
|
||||
* EEPROM = 1 if data has to be written in EEPROM and not only in image
|
||||
*/
|
||||
void SMB380_writeOffset(uint16_t *offset, uint8_t EEPROM)
|
||||
{
|
||||
@ -1215,7 +1193,8 @@ void SMB380_writeOffset(uint16_t *offset, uint8_t EEPROM)
|
||||
uint16_t eeoffset = 0;
|
||||
|
||||
if (EEPROM) {
|
||||
eeoffset = SMB380_EEPROM_OFFSET; //create offset if saving to EEPROM is needed
|
||||
//create offset if saving to EEPROM is needed
|
||||
eeoffset = SMB380_EEPROM_OFFSET;
|
||||
}
|
||||
|
||||
unsigned short uReg;
|
||||
@ -1224,40 +1203,48 @@ void SMB380_writeOffset(uint16_t *offset, uint8_t EEPROM)
|
||||
|
||||
//x-Axis
|
||||
uReg = (offset[0] & 0x03) << 6; //get both LSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_X, 0, SMB380_READ_REGISTER); //write them to image or eeprom
|
||||
//write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_X, 0, SMB380_READ_REGISTER);
|
||||
uReg |= (SMB380_ssp_read() & 0x3F); //saves gain from same register
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_X + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_X + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
uReg = (offset[0] & 0x3FC) >> 2; //get MSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_X + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_X + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
//y-Axis
|
||||
uReg = (offset[1] & 0x03) << 6; //get both LSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Y, 0, SMB380_READ_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Y, 0, SMB380_READ_REGISTER);
|
||||
uReg |= (SMB380_ssp_read() & 0x3F); //saves gain from same register
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Y + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Y + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
uReg = (offset[1] & 0x3FC) >> 2; //get MSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_Y + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_Y + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
//z-Axis
|
||||
uReg = (offset[2] & 0x03) << 6; //get both LSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Z, 0, SMB380_READ_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Z, 0,
|
||||
SMB380_READ_REGISTER); //write them to image or eeprom
|
||||
uReg |= (SMB380_ssp_read() & 0x3F); //saves gain from same register
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Z + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_Z + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
uReg = (offset[2] & 0x3FC) >> 2; //get MSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_Z + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_Z + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
@ -1275,7 +1262,8 @@ void SMB380_writeOffsetTemp(uint16_t *offset, uint8_t EEPROM)
|
||||
uint16_t eeoffset = 0;
|
||||
|
||||
if (EEPROM) {
|
||||
eeoffset = SMB380_EEPROM_OFFSET; //create offset if saving to EEPROM is needed
|
||||
//create offset if saving to EEPROM is needed
|
||||
eeoffset = SMB380_EEPROM_OFFSET;
|
||||
}
|
||||
|
||||
unsigned short uReg;
|
||||
@ -1284,14 +1272,17 @@ void SMB380_writeOffsetTemp(uint16_t *offset, uint8_t EEPROM)
|
||||
|
||||
//T-Axis
|
||||
uReg = (offset[0] & 0x03) << 6; //get both LSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_T, 0, SMB380_READ_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_T, 0,
|
||||
SMB380_READ_REGISTER); //write them to image or eeprom
|
||||
uReg |= (SMB380_ssp_read() & 0x3F); //saves gain from same register
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_T + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_LSB_GAIN_T + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
uReg = (offset[0] & 0x3FC) >> 2; //get MSB Bits
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_T + eeoffset, (uint8_t)uReg, SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_write(SMB380_OFFSET_MSB_T + eeoffset, (uint8_t)uReg,
|
||||
SMB380_WRITE_REGISTER); //write them to image or eeprom
|
||||
SMB380_ssp_read();
|
||||
hwtimer_wait(HWTIMER_TICKS(50000));
|
||||
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
/*
|
||||
* avsextrem-ssp0.c - implementation of the SPI0 interface for the LPC2387,
|
||||
* avsextrem-ssp0.c - implementation of the SPI0 interface for the LPC2387,
|
||||
* and the AVSESTREM board.
|
||||
* Copyright (C) 2013 Freie Universität Berlin
|
||||
* Copyright (C) 2013 Freie Universität Berlin
|
||||
*
|
||||
* This source code is licensed under the LGPLv2 license,
|
||||
* This source code is licensed under the LGPLv2 license,
|
||||
* See the file LICENSE for more details.
|
||||
*/
|
||||
|
||||
@ -12,7 +12,7 @@
|
||||
* @internal
|
||||
* @brief Implements the SPI0 interface for the LPC2387
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Marco Ziegert <ziegert@inf.fu-berlin.de>
|
||||
* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
* @version $Revision: 3854 $
|
||||
@ -20,7 +20,7 @@
|
||||
* @note $Id: avsextrem-ssp0.c 3854 2013-08-14 15:27:01Z zkasmi $
|
||||
*/
|
||||
|
||||
#include "lpc23xx.h" /* LPC23XX/24xx Peripheral Registers */
|
||||
#include "lpc23xx.h" /* LPC23XX/24xx Peripheral Registers */
|
||||
#include "cpu.h"
|
||||
#include "VIC.h"
|
||||
#include "ssp0-board.h"
|
||||
@ -36,27 +36,21 @@
|
||||
//
|
||||
//static void MMA7455L_extIntHandler(void);
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: SSP0Init
|
||||
**
|
||||
** Descriptions: SSP0 port initialization routine
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: true or false, if the interrupt handler
|
||||
** can't be installed correctly, return false.
|
||||
**
|
||||
*****************************************************************************/
|
||||
uint32_t SSP0Init(void)
|
||||
{
|
||||
|
||||
/* enable clock to SSP0 for security reason. By default, it's enabled already */
|
||||
/*
|
||||
* enable clock to SSP0 for security reason.
|
||||
* By default, it's enabled already
|
||||
*/
|
||||
PCONP |= PCSSP0;
|
||||
//TODO CLK, MISO, MOSI standardm��ig als GPIOs konfigurieren
|
||||
//TODO: configure CLK, MISO, MOSI by default as GPIOs.
|
||||
#if USE_CS
|
||||
// PINSEL3 |= BIT8 | BIT9 | BIT10 | BIT11 | BIT14 | BIT15 | BIT16 | BIT17; //P1.20 1.21 1.23 1.24
|
||||
// P1.20 1.21 1.23 1.24
|
||||
// PINSEL3 |= BIT8 | BIT9 | BIT10 | BIT11 | BIT14 | BIT15 | BIT16 | BIT17;
|
||||
#else
|
||||
// PINSEL3 |= BIT8 | BIT9 | BIT14 | BIT15 | BIT16 | BIT17; //1.20 1.23 1.24 SSEL0 nicht
|
||||
|
||||
// No SSEL0
|
||||
// PINSEL3 |= BIT8 | BIT9 | BIT14 | BIT15 | BIT16 | BIT17; //1.20 1.23 1.24
|
||||
#endif
|
||||
|
||||
#if SSP1_INTERRUPT_MODE
|
||||
@ -65,27 +59,33 @@ uint32_t SSP0Init(void)
|
||||
return (FALSE);
|
||||
}
|
||||
|
||||
/* Set SSPINMS registers to enable interrupts */
|
||||
/* enable all error related interrupts */
|
||||
/*
|
||||
* Set SSPINMS registers to enable interrupts,
|
||||
* enable all error related interrupts
|
||||
*/
|
||||
|
||||
SSP1IMSC = SSPIMSC_RORIM | SSPIMSC_RTIM;
|
||||
#endif
|
||||
|
||||
return (1);
|
||||
}
|
||||
|
||||
/* datasize (wordsize) in decimal (4-16), cpol&cpha =(0/1) and frequency divided by 1000 (e.g. 8 MHz = 8000)
|
||||
*
|
||||
/*
|
||||
* datasize (wordsize) in decimal (4-16), cpol&cpha =(0/1) and frequency divided
|
||||
* by 1000 (e.g. 8 MHz = 8000)
|
||||
*/
|
||||
uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha, uint16_t freq)
|
||||
uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha,
|
||||
uint16_t freq)
|
||||
{
|
||||
switch (chip) {
|
||||
case BMA180_INTERN:
|
||||
case SMB380_ACC: {
|
||||
#if USE_CS
|
||||
PINSEL3 |= BIT8 | BIT9 | BIT10 | BIT11 | BIT14 | BIT15 | BIT16 | BIT17; //P1.20 1.21 1.23 1.24
|
||||
PINSEL3 |= BIT8 | BIT9 | BIT10 | BIT11 | BIT14 | BIT15 | BIT16 |
|
||||
BIT17; //P1.20 1.21 1.23 1.24
|
||||
#else
|
||||
|
||||
PINSEL3 |= BIT8 | BIT9 | BIT14 | BIT15 | BIT16 | BIT17; //1.20 1.23 1.24 SSEL0 nicht
|
||||
// 1.20 1.23 1.24 are not configured as SSEL0
|
||||
PINSEL3 |= BIT8 | BIT9 | BIT14 | BIT15 | BIT16 | BIT17;
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
@ -96,18 +96,19 @@ uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha,
|
||||
case ACAMDMS: {
|
||||
#if USE_CS
|
||||
PINSEL0 |= BIT31;
|
||||
PINSEL1 |= BIT1 | BIT3 | BIT5; //P0.15 0.16 0.17 0.18
|
||||
PINSEL1 |= BIT1 | BIT3 | BIT5; // P0.15 0.16 0.17 0.18
|
||||
#else
|
||||
//Turn on NanoPAN
|
||||
// Turn on NanoPAN
|
||||
PINSEL0 |= BIT31;
|
||||
PINSEL1 |= BIT3 | BIT5; //0.15 0.17 0.18 SSEL0 nicht
|
||||
// 0.15 0.17 0.18 are not configured as SSEL0
|
||||
PINSEL1 |= BIT3 | BIT5;
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
case NORDIC: {
|
||||
PINSEL0 |= BIT31;
|
||||
PINSEL1 |= BIT3 | BIT5; //0.15 0.17 0.18 SSEL0 nicht
|
||||
PINSEL1 |= BIT3 | BIT5; // 0.15 0.17 0.18 SSEL0 (No)
|
||||
break;
|
||||
}
|
||||
|
||||
@ -184,9 +185,9 @@ uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha,
|
||||
SSP0CR0tmp |= BIT7;
|
||||
}
|
||||
|
||||
SSP0CR1 = 0x00; //SSP0 disabled
|
||||
SSP0CR1 = 0x00; // SSP0 disabled
|
||||
|
||||
/* Setting xx-Bit Datasize, CPOL and CPHA*/
|
||||
// Setting xx-Bit Datasize, CPOL and CPHA
|
||||
SSP0CR0 = SSP0CR0tmp;
|
||||
|
||||
// Clock Setup
|
||||
@ -198,7 +199,7 @@ uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha,
|
||||
SSP0CPSR = cpsr;
|
||||
|
||||
// Enable
|
||||
SSP0CR1 |= BIT1; //SSP0 enabled
|
||||
SSP0CR1 |= BIT1; // SSP0 enabled
|
||||
|
||||
uint32_t Dummy;
|
||||
|
||||
@ -214,11 +215,15 @@ uint8_t SSP0Unprepare(uint8_t chip)
|
||||
switch (chip) {
|
||||
case BMA180_INTERN:
|
||||
case SMB380_ACC: {
|
||||
//Turn off Acceleration Sensor
|
||||
PINSEL3 &= ~(BIT8 | BIT9 | BIT10 | BIT11 | BIT14 | BIT15 | BIT16 | BIT17);
|
||||
// Turn off Acceleration Sensor
|
||||
PINSEL3 &= ~(BIT8 | BIT9 | BIT10 | BIT11 | BIT14 | BIT15 | BIT16 |
|
||||
BIT17);
|
||||
FIO1DIR |= BIT20 | BIT21 | BIT24;
|
||||
FIO1DIR &= ~BIT23; //MISO as Input
|
||||
FIO1SET = BIT20 | BIT24; //CLK + SSEL + MOSI GPIO as Output //TODO depends on CPOL+CPHA Settings
|
||||
FIO1DIR &= ~BIT23; // MISO as Input
|
||||
FIO1SET = BIT20 | BIT24; /*
|
||||
* CLK + SSEL + MOSI GPIO as Output
|
||||
* TODO: depends on CPOL+CPHA Settings
|
||||
*/
|
||||
FIO1CLR = BIT21;
|
||||
break;
|
||||
}
|
||||
@ -228,12 +233,15 @@ uint8_t SSP0Unprepare(uint8_t chip)
|
||||
case NORDIC:
|
||||
case NANOPAN:
|
||||
case ACAMDMS: {
|
||||
//Turn off Nanopan (Pins to GPIO)
|
||||
// Turn off Nanopan (Pins to GPIO)
|
||||
PINSEL0 &= ~(BIT30 | BIT31); //CLK to GPIO
|
||||
PINSEL1 &= ~(BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5);
|
||||
FIO0DIR |= BIT15 | BIT16 | BIT18; //CLK + SSEL + MOSI GPIO as Output
|
||||
FIO0DIR &= ~BIT17; //MISO as Input
|
||||
FIO0SET = BIT15 | BIT16; //CLK + SSEL + MOSI GPIO as Output //TODO depends on CPOL+CPHA Settings
|
||||
FIO0DIR &= ~BIT17; // MISO as Input
|
||||
FIO0SET = BIT15 | BIT16; /*
|
||||
* CLK + SSEL + MOSI GPIO as Output
|
||||
* TODO: depends on CPOL+CPHA Settings
|
||||
*/
|
||||
FIO0CLR = BIT18;
|
||||
break;
|
||||
}
|
||||
@ -247,7 +255,8 @@ uint8_t SSP0Unprepare(uint8_t chip)
|
||||
return 1;
|
||||
}
|
||||
|
||||
unsigned char SMB380_ssp_write(const unsigned char regAddr, const unsigned char data, unsigned char flag)
|
||||
unsigned char SMB380_ssp_write(const unsigned char regAddr,
|
||||
const unsigned char data, unsigned char flag)
|
||||
{
|
||||
|
||||
uint16_t temp = 0;
|
||||
@ -288,7 +297,7 @@ unsigned char SSP0_write(const uint16_t data, uint8_t device)
|
||||
|
||||
case ACAMDMS:
|
||||
case NORDIC:
|
||||
//Chip Select is done in Nordic driver
|
||||
// Chip Select is done in Nordic driver
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -319,7 +328,7 @@ unsigned char SSP0_write(const uint16_t data, uint8_t device)
|
||||
|
||||
case ACAMDMS:
|
||||
case NORDIC:
|
||||
//Chip Select is done in Nordic driver
|
||||
// Chip Select is done in Nordic driver
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -356,7 +365,7 @@ unsigned short SSP0_read(uint8_t device)
|
||||
|
||||
case NORDIC:
|
||||
case ACAMDMS:
|
||||
//Chip Select is done in Nordic driver
|
||||
// Chip Select is done in Nordic driver
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -384,7 +393,7 @@ unsigned short SSP0_read(uint8_t device)
|
||||
|
||||
case ACAMDMS:
|
||||
case NORDIC:
|
||||
//Chip Select is done in Nordic driver
|
||||
// Chip Select is done in Nordic driver
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* board.h - Definitions for the AVSEXTREM board configuration.
|
||||
* Copyright (C) 2013 Heiko Will <hwill@inf.fu-berlin.de>
|
||||
* Copyright (C) 2013 Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
*
|
||||
* This source code is licensed under the LGPLv2 license,
|
||||
* See the file LICENSE for more details.
|
||||
@ -12,12 +12,12 @@
|
||||
* @file
|
||||
* @brief avsextrem board configuration
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author baar
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Heiko Will
|
||||
* @author Zakaria Kasmi
|
||||
* @version $Revision: 1127 $
|
||||
*
|
||||
* @note $Id: board-conf.h 1127 2013-06-13 08:48:29Z baar $
|
||||
* @note $Id: board-conf.h 1127 2013-06-13 08:48:29Z kasmi$
|
||||
*/
|
||||
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
#include <bitarithm.h>
|
||||
|
||||
|
||||
#define FEUERWARE_CONF_BOARD_NAME "FU Berlin AVSEXTREM BOARD"
|
||||
#define FEUERWARE_CONF_BOARD_NAME "FU Berlin AVSEXTREM BOARD"
|
||||
|
||||
#define LED_RED_PIN (BIT25)
|
||||
#define LED_GREEN_PIN (BIT26)
|
||||
@ -42,19 +42,19 @@
|
||||
|
||||
|
||||
#ifdef MODULE_CC110X
|
||||
#define FEUERWARE_CONF_NUM_RADIOS 1
|
||||
#define FEUERWARE_CONF_NUM_RADIOS 1
|
||||
#else
|
||||
#define FEUERWARE_CONF_NUM_RADIOS 0
|
||||
#define FEUERWARE_CONF_NUM_RADIOS 0
|
||||
#endif
|
||||
|
||||
// if FAT is enabled this board supports files
|
||||
#define FEUERWARE_CONF_CORE_SUPPORTS_FILES defined(MODULE_FAT)
|
||||
#define FEUERWARE_CONF_CORE_SUPPORTS_FILES defined(MODULE_FAT)
|
||||
|
||||
#ifdef MODULE_FAT
|
||||
#define CFG_CONF_MEM_SIZE 0x7FFFFFFF
|
||||
#define SYSLOG_CONF_NUM_INTERFACES 2
|
||||
#define CFG_CONF_MEM_SIZE 0x7FFFFFFF
|
||||
#define SYSLOG_CONF_NUM_INTERFACES 2
|
||||
#else
|
||||
#define SYSLOG_CONF_NUM_INTERFACES 1
|
||||
#define SYSLOG_CONF_NUM_INTERFACES 1
|
||||
#endif
|
||||
|
||||
void init_clks1(void);
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* avsextrem-cc1100.c - CC100 Transceiver Driver for the AVSEXTREM-BOARD.
|
||||
* Copyright (C) 2013 Heiko Will <hwill@inf.fu-berlin.de>
|
||||
* configure.h - Configuration file for the avsextrem board.
|
||||
* Copyright (C) 2013 Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
*
|
||||
* This source code is licensed under the LGPLv2 license,
|
||||
* See the file LICENSE for more details.
|
||||
@ -11,20 +11,18 @@
|
||||
* @file
|
||||
* @brief definitions for the avsextrem board configuration
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author baar
|
||||
* @author Zakaria Kasmi
|
||||
* @version $Revision: 1127 $
|
||||
*
|
||||
* @note $Id: board-conf.h 1127 2013-06-13 08:48:29Z baar $
|
||||
* @note $Id: board-conf.h 1127 2013-08-20 17:15:29 kasmi $
|
||||
*/
|
||||
|
||||
#ifndef CONFIGURE_H_
|
||||
#define CONFIGURE_H_
|
||||
|
||||
/**
|
||||
* @defgroup conf Offline Configuration
|
||||
* @ingroup feuerware
|
||||
*
|
||||
* The offline configuration file "configure.h" is automatically
|
||||
* included in every file by the build system and allows to configure
|
||||
@ -39,17 +37,6 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Central offline configuration
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics, FeuerWhere project
|
||||
* @author baar
|
||||
* @version $Revision: 3854 $
|
||||
*
|
||||
* @note $Id: configure.h 3854 2011-12-06 15:27:01Z hwill $
|
||||
*/
|
||||
|
||||
//#include "project-conf.h"
|
||||
//#include "board-conf.h"
|
||||
#include "cpu-conf.h"
|
||||
|
||||
@ -1,23 +1,23 @@
|
||||
/*
|
||||
* smb380-board.h - definitions of the Driver for the SMB380 acceleration sensor.
|
||||
* Copyright (C) 2013 Freie Universität Berlin
|
||||
* msba2acc-smb380.h - Definitions of the Driver for the SMB380 acceleration
|
||||
* sensor.
|
||||
* Copyright (C) 2013 Freie Universität Berlin
|
||||
*
|
||||
* This source code is licensed under the LGPLv2 license,
|
||||
* See the file LICENSE for more details.
|
||||
*
|
||||
*/
|
||||
**/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @internal
|
||||
* @brief SMB380 acceleration sensor definitions for the LPC2387
|
||||
* @brief SMB380 acceleration sensor definitions for the LPC2387
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Marco Ziegert <ziegert@inf.fu-berlin.de>
|
||||
* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
* @version $Revision: 3854 $
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Marco Ziegert <ziegert@inf.fu-berlin.de>
|
||||
* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
* @version $Revision: 3854 $
|
||||
*
|
||||
* @note $Id: msba2acc-smb380.h 3854 2013-06-19 17:33:01Z zkasmi $
|
||||
* @note $Id: msba2acc-smb380.h 3854 2010-01-18 15:27:01 kasmi $
|
||||
*
|
||||
*/
|
||||
|
||||
@ -30,9 +30,9 @@
|
||||
|
||||
#define MSG_TYPE_SMB380_WAKEUP 814
|
||||
|
||||
#define SMB380_X_AXIS 0 //X Axis-Name
|
||||
#define SMB380_Y_AXIS 1 //Y Axis-Name
|
||||
#define SMB380_Z_AXIS 2 //Z Axis-Name
|
||||
#define SMB380_X_AXIS 0 //X Axis-Name
|
||||
#define SMB380_Y_AXIS 1 //Y Axis-Name
|
||||
#define SMB380_Z_AXIS 2 //Z Axis-Name
|
||||
|
||||
#define LPM_PREVENT_SLEEP_ACCSENSOR BIT2
|
||||
|
||||
@ -54,35 +54,41 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
|
||||
*/
|
||||
|
||||
#define SMB380_EEPROM_OFFSET 0x20
|
||||
|
||||
#define SMB380_CHIP_ID 0x00 //Chip-ID Bit0-2, default: 010b
|
||||
#define SMB380_CHIP_ID_MASK 0x07 //Chip-ID mask
|
||||
|
||||
#define SMB380_AL_ML_VERSION 0x01 //ml_version Bit0-3 ; al_version Bit4-7
|
||||
#define SMB380_AL_MASK 0xF0 //al_mask
|
||||
#define SMB380_ML_MASK 0x0F //ml_mask
|
||||
|
||||
#define SMB380_ACC_X_LSB_NEWDATA 0x02 //LSB_acc_x Bit6-7 ; new_data_x Bit0
|
||||
#define SMB380_ACC_X_MSB 0x03 //MSB_acc_x Bit0-7
|
||||
#define SMB380_ACC_Y_LSB_NEWDATA 0x04 //LSB_acc_y Bit6-7 ; new_data_y Bit0
|
||||
#define SMB380_ACC_Y_MSB 0x05 //MSB_acc_y Bit0-7
|
||||
#define SMB380_ACC_Z_LSB_NEWDATA 0x06 //LSB_acc_z Bit6-7 ; new_data_z Bit0
|
||||
#define SMB380_ACC_Z_MSB 0x07 //MSB_acc_z Bit0-7
|
||||
//Chip-ID Bit0-2, default: 010b
|
||||
#define SMB380_CHIP_ID 0x00
|
||||
//Chip-ID mask
|
||||
#define SMB380_CHIP_ID_MASK 0x07
|
||||
//ml_version Bit0-3 ; al_version Bit4-7
|
||||
#define SMB380_AL_ML_VERSION 0x01
|
||||
#define SMB380_AL_MASK 0xF0
|
||||
#define SMB380_ML_MASK 0x0F
|
||||
//LSB_acc_x Bit6-7; new_data_x Bit0
|
||||
#define SMB380_ACC_X_LSB_NEWDATA 0x02
|
||||
//MSB_acc_x Bit0-7
|
||||
#define SMB380_ACC_X_MSB 0x03
|
||||
//LSB_acc_y Bit6-7; new_data_y Bit0
|
||||
#define SMB380_ACC_Y_LSB_NEWDATA 0x04
|
||||
//MSB_acc_y Bit0-7
|
||||
#define SMB380_ACC_Y_MSB 0x05
|
||||
//LSB_acc_z Bit6-7; new_data_z Bit0
|
||||
#define SMB380_ACC_Z_LSB_NEWDATA 0x06
|
||||
//MSB_acc_z Bit0-7
|
||||
#define SMB380_ACC_Z_MSB 0x07
|
||||
#define SMB380_ACC_LSB_MASK 0xC0
|
||||
#define SMB380_ACC_MSB_MASK 0xFF
|
||||
#define SMB380_ACC_NEWDATA_MASK 0x01
|
||||
|
||||
#define SMB380_TEMP 0x08 //Temperature Bit0-7
|
||||
|
||||
#define SMB380_STATUS 0x09 //Status register, contains six flags
|
||||
//Temperature Bit0-7
|
||||
#define SMB380_TEMP 0x08
|
||||
//Status register, contains six flags
|
||||
#define SMB380_STATUS 0x09
|
||||
#define SMB380_STATUS_ST_RESULT_MASK 0x80
|
||||
#define SMB380_STATUS_ALERT_PHASE_MASK 0x10
|
||||
#define SMB380_STATUS_LG_LATCHED_MASK 0x08
|
||||
#define SMB380_STATUS_HG_LATCHED_MASK 0x04
|
||||
#define SMB380_STATUS_STATUS_LG_MASK 0x02
|
||||
#define SMB380_STATUS_STATUS_HG_MASK 0x01
|
||||
|
||||
#define SMB380_CONTROL1 0x0A //Control register - contains seven values, default: x000 0000b
|
||||
//Control register - contains seven values, default: x000 0000b
|
||||
#define SMB380_CONTROL1 0x0A
|
||||
#define SMB380_CONTROL1_RESET_INT_MASK 0x40
|
||||
#define SMB380_CONTROL1_UPDATE_MASK 0x20
|
||||
#define SMB380_CONTROL1_EE_W_MASK 0x10
|
||||
@ -90,33 +96,39 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
|
||||
#define SMB380_CONTROL1_SELF_TEST_0_MASK 0x04
|
||||
#define SMB380_CONTROL1_SOFT_RESET_MASK 0x02
|
||||
#define SMB380_CONTROL1_SLEEP_MASK 0x01
|
||||
|
||||
#define SMB380_CONTROL2 0x0B //Control register - contains six values, default: x000 0011b
|
||||
//Control register - contains six values, default: x000 0011b
|
||||
#define SMB380_CONTROL2 0x0B
|
||||
#define SMB380_CONTROL2_ALERT_MASK 0x80
|
||||
#define SMB380_CONTROL2_ANY_MOTION_MASK 0x40
|
||||
#define SMB380_CONTROL2_COUNTER_HG_MASK 0x30
|
||||
#define SMB380_CONTROL2_COUNTER_LG_MASK 0x0C
|
||||
#define SMB380_CONTROL2_ENABLE_HG_MASK 0x02
|
||||
#define SMB380_CONTROL2_ENABLE_LG_MASK 0x01
|
||||
|
||||
#define SMB380_LG_THRES 0x0C // , default: 20
|
||||
#define SMB380_LG_DUR 0x0D // , default: 150
|
||||
#define SMB380_HG_THRES 0x0E // , default: 160
|
||||
#define SMB380_HG_DUR 0x0F // , default: 150
|
||||
#define SMB380_ANY_MOTION_THRES 0x10 // , default: 0
|
||||
#define SMB380_ANY_MOTION_DUR_HYST 0x1 // , default: 0000 0000b
|
||||
//default: 20
|
||||
#define SMB380_LG_THRES 0x0C
|
||||
//default: 150
|
||||
#define SMB380_LG_DUR 0x0D
|
||||
//default: 160
|
||||
#define SMB380_HG_THRES 0x0E
|
||||
//default: 150
|
||||
#define SMB380_HG_DUR 0x0F
|
||||
//default: 0
|
||||
#define SMB380_ANY_MOTION_THRES 0x10
|
||||
//default: 0000 0000b
|
||||
#define SMB380_ANY_MOTION_DUR_HYST 0x1
|
||||
#define SMB380_ANY_MOTION_DUR_MASK 0xC0
|
||||
#define SMB380_ANY_MOTION_DUR_HG_HYST_MASK 0x38
|
||||
#define SMB380_ANY_MOTION_DUR_LG_HYST_MASK 0x07
|
||||
|
||||
#define SMB380_CUST1 0x12 // , default: 162
|
||||
#define SMB380_CUST2 0x13 // , default: 13
|
||||
|
||||
#define SMB380_CONTROL3 0x14 // , default: xxx0 1110b
|
||||
//default: 162
|
||||
#define SMB380_CUST1 0x12
|
||||
//default: 13
|
||||
#define SMB380_CUST2 0x13
|
||||
//default: xxx0 1110b
|
||||
#define SMB380_CONTROL3 0x14
|
||||
#define SMB380_CONTROL3_RANGE_MASK 0x18
|
||||
#define SMB380_CONTROL3_BANDWITH_MASK 0x07
|
||||
|
||||
#define SMB380_CONTROL4 0x15 // , default: 1000 0000b
|
||||
//default: 1000 0000b
|
||||
#define SMB380_CONTROL4 0x15
|
||||
#define SMB380_CONTROL4_SPI4_MASK 0x80
|
||||
#define SMB380_CONTROL4_ENABLE_ADV_INT_MASK 0x40
|
||||
#define SMB380_CONTROL4_NEW_DATA_INT_MASK 0x20
|
||||
@ -155,30 +167,37 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
|
||||
#define SMB380_BAND_WIDTH_375HZ 0x04
|
||||
#define SMB380_BAND_WIDTH_750HZ 0x05
|
||||
#define SMB380_BAND_WIDTH_1500HZ 0x06
|
||||
#define SMB380_RING_BUFF_SIZE 256 //SMB380_RING_BUFF_SIZE * int16_t (2Byte) * 4 (x,y,z,Temp) = 512 Byte (for 64)
|
||||
//SMB380_RING_BUFF_SIZE * int16_t (2Byte) * 4 (x,y,z,Temp) = 512 Byte (for 64)
|
||||
#define SMB380_RING_BUFF_SIZE 256
|
||||
//TODO chsnge size to 2048
|
||||
#define SMB380_RING_BUFF_MAX_THREADS 10
|
||||
#define SMB380_SAMPLE_RATE_MAX 3000
|
||||
|
||||
/* change from Header (public) to internal use (private) (use it after every write to EEPROM)
|
||||
/*
|
||||
* change from Header (public) to internal use (private)
|
||||
* (use it after every write to EEPROM).
|
||||
* set update_image Bit in control1 to
|
||||
* copie content from EEPROM (0x2B to 0x3D) to Image (0x0B to 0x1D) */
|
||||
* copie content from EEPROM (0x2B to 0x3D) to Image (0x0B to 0x1D)
|
||||
**/
|
||||
void SMB380_update_image(void);
|
||||
|
||||
/* change from Header (public) to internal use (private)
|
||||
/*
|
||||
* change from Header (public) to internal use (private)
|
||||
* set ee_w Bit in control1 to
|
||||
* enable read to 0x16 to 0x22 and
|
||||
* enable write to 0x16 to 0x3D */
|
||||
* enable write to 0x16 to 0x3D
|
||||
**/
|
||||
void SMB380_enable_eeprom_default(void);
|
||||
//Example Hysterese function
|
||||
uint8_t SMB380_HystereseFunctionSample(int16_t *value);
|
||||
|
||||
uint8_t SMB380_HystereseFunctionSample(int16_t *value); //Example Hysterese functon
|
||||
|
||||
// simple api for single-sample, single thread interrupt mode
|
||||
uint8_t SMB380_init_simple(uint16_t samplerate, uint8_t bandwidth, uint8_t range);
|
||||
//Simple api for single-sample, single thread interrupt mode
|
||||
uint8_t SMB380_init_simple(uint16_t samplerate, uint8_t bandwidth,
|
||||
uint8_t range);
|
||||
|
||||
|
||||
|
||||
uint8_t SMB380_init(uint8_t (*func)(int16_t *)); // enables Interrupts (normally only once called)
|
||||
//Enables Interrupts (normally only once called)
|
||||
uint8_t SMB380_init(uint8_t (*func)(int16_t *));
|
||||
void SMB380_setSampleRate(uint16_t rate);
|
||||
uint16_t SMB380_getSampleRate(void);
|
||||
void freeRingReadPointer(void);
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* ssp0-borad.h - header file of the SPI interface for the LPC2387.
|
||||
* Copyright (C) 2013 Freie Universität Berlin
|
||||
* Copyright (C) 2013 Freie Universität Berlin
|
||||
*
|
||||
* This source code is licensed under the LGPLv2 license,
|
||||
* See the file LICENSE for more details.
|
||||
@ -12,7 +12,7 @@
|
||||
* @internal
|
||||
* @brief SPI interface definitions for the LPC2387
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics
|
||||
* @author Marco Ziegert <ziegert@inf.fu-berlin.de>
|
||||
* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
* @version $Revision: 3854 $
|
||||
@ -26,10 +26,16 @@
|
||||
|
||||
#define DMA_ENABLED 0
|
||||
|
||||
/* if USE_CS is zero, set SSEL as GPIO that you have total control of the sequence */
|
||||
/*
|
||||
* if USE_CS is zero, set SSEL as GPIO that you have total control of the
|
||||
* sequence
|
||||
**/
|
||||
#define USE_CS 0
|
||||
|
||||
/* if 1, use driver for onboard BMA180, otherwise for external BMA180 utilizing Nanopan Connector */
|
||||
/*
|
||||
* if 1, use driver for onboard BMA180, otherwise for external BMA180 utilizing
|
||||
* Nanopan Connector
|
||||
**/
|
||||
#define BMA180_ONBOARD 1
|
||||
|
||||
#define SMB380_ACC 0
|
||||
@ -96,18 +102,17 @@
|
||||
#define BMA180_EXTINT_MODE 1
|
||||
|
||||
uint32_t SSP0Init(void);
|
||||
uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha, uint16_t freq);
|
||||
uint8_t SSP0Prepare(uint8_t chip, uint8_t datasize, uint8_t cpol, uint8_t cpha,
|
||||
uint16_t freq);
|
||||
uint8_t SSP0Unprepare(uint8_t chip);
|
||||
unsigned char SSP0_write(const uint16_t data, uint8_t device);
|
||||
unsigned short SSP0_read(uint8_t device);
|
||||
unsigned char SMB380_ssp_write(const unsigned char regAddr, const unsigned char data, unsigned char flag);
|
||||
unsigned char SMB380_ssp_write(const unsigned char regAddr,
|
||||
const unsigned char data, unsigned char flag);
|
||||
unsigned short SMB380_ssp_read(void);
|
||||
unsigned short nrf24l01_ssp_read_write(const uint8_t data);
|
||||
unsigned short acam_trx(const uint8_t data);
|
||||
void SSP0Handler(void);
|
||||
|
||||
#endif /* __SSP_H__ */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
SRC = $(wildcard *.c)
|
||||
SRC = $(wildcard *.c)
|
||||
BINDIR = $(RIOTBOARD)/$(BOARD)/bin/
|
||||
OBJ = $(SRC:%.c=$(BINDIR)%.o)## defines
|
||||
DEP = $(SRC:%.c=$(BINDIR)%.d)
|
||||
|
||||
@ -72,9 +72,10 @@ pllfeed(void)
|
||||
}
|
||||
|
||||
|
||||
void init_clks2(void){
|
||||
void init_clks2(void)
|
||||
{
|
||||
// Wait for the PLL to lock to set frequency
|
||||
while(!(PLLSTAT & BIT26));
|
||||
while (!(PLLSTAT & BIT26));
|
||||
|
||||
// Connect the PLL as the clock source
|
||||
PLLCON = 0x0003;
|
||||
|
||||
@ -3,12 +3,10 @@
|
||||
#include <config.h>
|
||||
#include <flashrom.h>
|
||||
|
||||
void config_load(void)
|
||||
{
|
||||
void config_load(void) {
|
||||
extern char configmem[];
|
||||
/* cast it here for strict-aliasing */
|
||||
uint16_t *tmp = (uint16_t *) configmem;
|
||||
|
||||
uint16_t* tmp = (uint16_t*) configmem;
|
||||
if (*tmp == CONFIG_KEY) {
|
||||
memcpy(&sysconfig, (configmem + sizeof(CONFIG_KEY)), sizeof(sysconfig));
|
||||
}
|
||||
@ -17,8 +15,7 @@ void config_load(void)
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t config_save(void)
|
||||
{
|
||||
uint8_t config_save(void) {
|
||||
configmem_t mem = { CONFIG_KEY, sysconfig };
|
||||
return (flashrom_erase((uint8_t *) &configmem) && flashrom_write((uint8_t *) &configmem, (char *) &mem, sizeof(mem)));
|
||||
return (flashrom_erase((uint8_t*) &configmem) && flashrom_write((uint8_t*) &configmem, (char*) &mem, sizeof(mem)));
|
||||
}
|
||||
|
||||
@ -11,26 +11,26 @@
|
||||
|
||||
void benchmark_init(void)
|
||||
{
|
||||
PCLKSEL1 = (PCLKSEL1 & ~(BIT14 | BIT15)) | (1 << 14); // CCLK to PCLK divider
|
||||
PCONP |= PCTIM3;
|
||||
T3TCR = 0; // disable timer
|
||||
T3MCR = 0; // disable interrupt
|
||||
T3CCR = 0; // capture is disabled.
|
||||
T3EMR = 0; // no external match output.
|
||||
T3PR = 0; // set prescaler
|
||||
T3TC = 0; // reset counter
|
||||
PCLKSEL1 = (PCLKSEL1 & ~(BIT14|BIT15)) | (1 << 14); // CCLK to PCLK divider
|
||||
PCONP |= PCTIM3;
|
||||
T3TCR = 0; // disable timer
|
||||
T3MCR = 0; // disable interrupt
|
||||
T3CCR = 0; // capture is disabled.
|
||||
T3EMR = 0; // no external match output.
|
||||
T3PR = 0; // set prescaler
|
||||
T3TC = 0; // reset counter
|
||||
}
|
||||
|
||||
void benchmark_reset_start(void)
|
||||
{
|
||||
T3TCR = 0; // disable timer
|
||||
T3TC = 0; // reset counter
|
||||
T3TCR = BIT0;
|
||||
T3TCR = 0; // disable timer
|
||||
T3TC = 0; // reset counter
|
||||
T3TCR = BIT0;
|
||||
}
|
||||
|
||||
unsigned int benchmark_read_stop(void)
|
||||
{
|
||||
T3TCR = 0; // disable timer
|
||||
return T3TC;
|
||||
T3TCR = 0; // disable timer
|
||||
return T3TC;
|
||||
}
|
||||
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
* main.c - Main function of the SRF02 ultrasonic sensor project.
|
||||
* Copyright (C) 2013 Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
|
||||
*
|
||||
* The source code is licensed under the LGPLv2 license,
|
||||
* The source code is licensed under the LGPLv2 license,
|
||||
* See the file LICENSE for more details.
|
||||
*/
|
||||
|
||||
@ -15,7 +15,7 @@
|
||||
* @file
|
||||
* @brief MSB-A2 board initialization
|
||||
*
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics, FeuerWhere project
|
||||
* @author Freie Universität Berlin, Computer Systems & Telematics, FeuerWhere project
|
||||
* @author Heiko Will
|
||||
* @author Kaspar Schleiser
|
||||
* @author Michael Baar <baar@inf.fu-berlin.de>
|
||||
@ -86,7 +86,8 @@ void init_clks1(void)
|
||||
pllfeed();
|
||||
|
||||
SCS |= 0x20; // Enable main OSC
|
||||
while( !(SCS & 0x40) ); // Wait until main OSC is usable
|
||||
|
||||
while (!(SCS & 0x40)); // Wait until main OSC is usable
|
||||
|
||||
/* select main OSC, 16MHz, as the PLL clock source */
|
||||
CLKSRCSEL = 0x0001;
|
||||
@ -105,4 +106,4 @@ void init_clks1(void)
|
||||
#if USE_USB
|
||||
USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user