diff --git a/cpu/riscv_common/ldscripts/riscv_base.ld b/cpu/riscv_common/ldscripts/riscv_base.ld
index 71fc0a6586..719567b59b 100644
--- a/cpu/riscv_common/ldscripts/riscv_base.ld
+++ b/cpu/riscv_common/ldscripts/riscv_base.ld
@@ -205,6 +205,7 @@ SECTIONS
     *(COMMON)
     . = ALIGN(4);
   } >ram AT>ram :ram
+  PROVIDE( __bss_end = . );
 
   .noinit (NOLOAD) :
   {
diff --git a/cpu/riscv_common/start.S b/cpu/riscv_common/start.S
index 334782bbef..bd39ead6ba 100644
--- a/cpu/riscv_common/start.S
+++ b/cpu/riscv_common/start.S
@@ -41,9 +41,10 @@ _start_real:
     bltu a1, a2, 1b
 2:
 
+
     /* Clear bss section */
     la a0, __bss_start
-    la a1, _end
+    la a1, __bss_end
     bgeu a0, a1, 2f
 1:
     sw zero, (a0)