From d7c1510b0f58d5004ce29ad6108008800b8f3035 Mon Sep 17 00:00:00 2001 From: Koen Zandberg Date: Tue, 23 Jun 2020 11:53:53 +0200 Subject: [PATCH] cortexm_common: Remove read in ICSR register operations All bits in the ICSR register in the cortexm system control block are either read-only or don't have an effect when writing a zero. A read-modify-write cycle is thus not required when writing bit flags in the register. This commit removes the reads in the read-modify-store patterns for this register. --- cpu/cortexm_common/thread_arch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/cortexm_common/thread_arch.c b/cpu/cortexm_common/thread_arch.c index 8f5c9e1abd..914fd15280 100644 --- a/cpu/cortexm_common/thread_arch.c +++ b/cpu/cortexm_common/thread_arch.c @@ -280,7 +280,7 @@ void thread_yield_higher(void) { /* trigger the PENDSV interrupt to run scheduler and schedule new thread if * applicable */ - SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; } void __attribute__((naked)) __attribute__((used)) isr_pendsv(void) { @@ -432,7 +432,7 @@ static void __attribute__((used)) _svc_dispatch(unsigned int *svc_args) switch (svc_number) { case 1: /* SVC number used by cpu_switch_context_exit */ - SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; break; default: DEBUG("svc: unhandled SVC #%u\n", svc_number); @@ -443,6 +443,6 @@ static void __attribute__((used)) _svc_dispatch(unsigned int *svc_args) #else /* MODULE_CORTEXM_SVC */ void __attribute__((used)) isr_svc(void) { - SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; } #endif /* MODULE_CORTEXM_SVC */