kaspar/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-12-31 09:21:19 +01:00
Code Releases Activity

Merge pull request #8724 from gebart/pr/kinetis-lpuart-clocking

Browse Source 
kinetis: Set LPUART clock source during uart_lpuart_init
This commit is contained in:
Joakim Nohlgård 2018-03-02 15:38:01 +01:00 committed by GitHub
commit a7f06f8c42
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 39 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
cpu/kinetis/include/cpu_conf_kinetis.h
View File

@ -30,9 +30,9 @@ extern "C"
* @name ARM Cortex-M specific CPU configuration
* @{
*/
#define CPU_DEFAULT_IRQ_PRIO (1U)
#define CPU_IRQ_NUMOF (NUMBER_OF_INT_VECTORS)
#define CPU_FLASH_BASE (0x00000000)
#define CPU_DEFAULT_IRQ_PRIO (1U)
#define CPU_IRQ_NUMOF (NUMBER_OF_INT_VECTORS)
#define CPU_FLASH_BASE (0x00000000)
/** @} */
/**
@ -40,16 +40,16 @@ extern "C"
* @{
*/
#define PIN_MUX_FUNCTION_ANALOG 0
#define PIN_MUX_FUNCTION_GPIO 1
#define PIN_MUX_FUNCTION_GPIO 1
/** @} */
/**
* @name GPIO interrupt flank settings
* @{
*/
#define PIN_INTERRUPT_RISING 0b1001
#define PIN_INTERRUPT_FALLING 0b1010
#define PIN_INTERRUPT_EDGE 0b1011
#define PIN_INTERRUPT_RISING 0b1001
#define PIN_INTERRUPT_FALLING 0b1010
#define PIN_INTERRUPT_EDGE 0b1011
/** @} */
/**
@ -61,22 +61,27 @@ extern "C"
* matters for the RIOT driver implementations.
*/
#if !defined(MCG_C2_RANGE0) && defined(MCG_C2_RANGE)
#define MCG_C2_RANGE0(x) MCG_C2_RANGE(x)
#define MCG_C2_RANGE0(x) MCG_C2_RANGE(x)
#endif
#if !defined(MCG_C2_RANGE0_MASK) && defined(MCG_C2_RANGE_MASK)
#define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
#define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
#endif
#if !defined(MCG_C7_OSCSEL) && defined(MCG_C7_OSCSEL_SHIFT)
#define MCG_C7_OSCSEL(x) (((uint32_t)(x) << MCG_C7_OSCSEL_SHIFT) & MCG_C7_OSCSEL_MASK)
#define MCG_C7_OSCSEL(x) (((uint32_t)(x) << MCG_C7_OSCSEL_SHIFT) & MCG_C7_OSCSEL_MASK)
#endif
#if !defined(OSC0) && defined(OSC)
#define OSC0 OSC
#endif
#if !defined(SIM_SOPT2_LPUART0SRC_MASK) && defined(SIM_SOPT2_LPUARTSRC_MASK)
#define SIM_SOPT2_LPUART0SRC_MASK SIM_SOPT2_LPUARTSRC_MASK
#define SIM_SOPT2_LPUART0SRC_SHIFT SIM_SOPT2_LPUARTSRC_SHIFT
#define SIM_SOPT2_LPUART0SRC SIM_SOPT2_LPUARTSRC
#endif
#if !defined(SIM_SCGC5_LPTMR_SHIFT) && defined(SIM_SCGC5_LPTIMER_SHIFT)
#define SIM_SCGC5_LPTMR_SHIFT SIM_SCGC5_LPTIMER_SHIFT
#define SIM_SCGC5_LPTMR_SHIFT SIM_SCGC5_LPTIMER_SHIFT
#endif
#if !defined(SIM_SCGC5_LPTMR_MASK) && defined(SIM_SCGC5_LPTIMER_MASK)
#define SIM_SCGC5_LPTMR_MASK SIM_SCGC5_LPTIMER_MASK
#define SIM_SCGC5_LPTMR_MASK SIM_SCGC5_LPTIMER_MASK
#endif
#if !defined(GPIOA_BASE) && defined(PTA_BASE)
#define GPIOA_BASE PTA_BASE

23
cpu/kinetis/periph/uart.c
View File

@ -63,6 +63,15 @@
#define LPUART_OVERSAMPLING_RATE (16)
#endif
/* Default LPUART clock setting to avoid compilation failures, define this in
* periph_conf.h to set board specific configuration if using the LPUART. */
#ifndef LPUART_0_SRC
#define LPUART_0_SRC 0
#endif
#ifndef LPUART_1_SRC
#define LPUART_1_SRC 0
#endif
/**
* @brief Runtime configuration space, holds pointers to callback functions for RX
*/
@ -296,7 +305,19 @@ static inline void uart_init_lpuart(uart_t uart, uint32_t baudrate)
LPUART_Type *dev = uart_config[uart].dev;
uint32_t clk = uart_config[uart].freq;
/* Remember to select a module clock in board_init! (SIM->SOPT2[LPUART0SRC]) */
/* Set LPUART clock source */
#ifdef SIM_SOPT2_LPUART0SRC
if (dev == LPUART0) {
SIM->SOPT2 = (SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) |
SIM_SOPT2_LPUART0SRC(LPUART_0_SRC);
}
#endif
#ifdef SIM_SOPT2_LPUART1SRC
if (dev == LPUART1) {
SIM->SOPT2 = (SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) |
SIM_SOPT2_LPUART1SRC(LPUART_1_SRC);
}
#endif
/* Select mode */
/* transmitter and receiver disabled */