From b36b2ee74842e643bcd2657641258dfbe8b1b126 Mon Sep 17 00:00:00 2001
From: Alexandre Abadie <alexandre.abadie@inria.fr>
Date: Tue, 23 Jun 2020 21:39:14 +0200
Subject: [PATCH] cpu/fe310: add Kconfig configuration

---
 cpu/fe310/Kconfig | 63 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)
 create mode 100644 cpu/fe310/Kconfig

diff --git a/cpu/fe310/Kconfig b/cpu/fe310/Kconfig
new file mode 100644
index 0000000000..f3be4af51f
--- /dev/null
+++ b/cpu/fe310/Kconfig
@@ -0,0 +1,63 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_ARCH_RISCV
+    bool
+    select HAS_ARCH_RISCV
+
+config CPU_CORE_RV32M
+    bool
+    select CPU_ARCH_RISCV
+    select HAS_ARCH_32BIT
+
+config CPU_FAM_FE310
+    bool
+    select CPU_CORE_RV32M
+    select HAS_CPU_FE310
+    select HAS_PERIPH_CPUID
+    select HAS_PERIPH_GPIO
+    select HAS_PERIPH_GPIO_IRQ
+    select HAS_PERIPH_PM
+    select HAS_PERIPH_WDT
+    select HAS_CPP
+    select HAS_SSP
+
+config CPU_MODEL_FE310_G000
+    bool
+    select CPU_FAM_FE310
+
+config CPU_MODEL_FE310_G002
+    bool
+    select CPU_FAM_FE310
+
+## Definition of specific features
+config HAS_ARCH_RISCV
+    bool
+    help
+        Indicates that the current CPU has a RISC-V.
+
+## Definition of specific features
+config HAS_CPU_FE310
+    bool
+    help
+        Indicates that a 'fe310' cpu is being used.
+
+config CPU_ARCH
+    default "risc-v" if CPU_ARCH_RISCV
+
+config CPU_CORE
+    default "rv32m" if CPU_CORE_RV32M
+
+config CPU_FAM
+    default "fe310" if CPU_FAM_FE310
+
+config CPU_MODEL
+    default "fe310_g000"  if CPU_MODEL_FE310_G000
+    default "fe310_g002"  if CPU_MODEL_FE310_G002
+
+config CPU
+    default "fe310" if CPU_FAM_FE310