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Merge pull request #7781 from kaspar030/remove_coreif_ng

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remove COREIF_NG
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Kaspar Schleiser 2017-11-16 15:11:44 +01:00 committed by GitHub
commit b74475118f
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26 changed files with 91 additions and 295 deletions
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81
core/include/arch/irq_arch.h
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@ -1,81 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup core_arch
* @{
*
* @file
* @brief Interrupt handling interface for globally en- and disabling interrupts
*
* This file acts as a wrapper between the kernels interrupt interface and the architecture
* dependent implementation of the interfaces.
*
* @note All functions in this module have to be implemented in a way that it
* is safe to call them from within the context of an ISR.
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef ARCH_IRQ_ARCH_H
#define ARCH_IRQ_ARCH_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Define mapping between kernel internal and arch interfaces
*
* This mapping is done for compatibility of existing platforms,
* new platforms should always use the *_arch_* interfaces.
* @{
*/
#ifdef COREIF_NG
#define irq_enable irq_arch_enable
#define irq_disable irq_arch_disable
#define irq_restore irq_arch_restore
#define irq_is_in irq_arch_in
#endif
/** @} */
/**
* @brief Globally enable maskable interrupt sources
*
* @return the IRQ state after enabling interrupts
*/
unsigned int irq_arch_enable(void);
/**
* @brief Globally disable all maskable interrupt sources
*
* @return the IRQ state before disabling interrupts
*/
unsigned int irq_arch_disable(void);
/**
* @brief Restore a previously recorded IRQ state
*
* @param[in] state the state to set the IRQ flags to
*/
void irq_arch_restore(unsigned int state);
/**
* @brief See if the current context is inside an ISR
*
* @return 1 if currently in interrupt context, 0 otherwise
*/
int irq_arch_in(void);
#ifdef __cplusplus
}
#endif
#endif /* ARCH_IRQ_ARCH_H */
/** @} */

39
core/include/arch/panic_arch.h
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@ -1,39 +0,0 @@
/*
* Copyright (C) 2015 INRIA
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup core_arch
* @{
*
* @file
* @brief Architecture dependent panic function
*
* @author Oliver Hahm <oliver.hahm@inria.fr>
*/
#ifndef ARCH_PANIC_ARCH_H
#define ARCH_PANIC_ARCH_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief architecture dependent handling of an panic case
*
* This function gives the CPU the possibility to execute architecture
* dependent code in case of an severe error.
*/
void panic_arch(void);
#ifdef __cplusplus
}
#endif
#endif /* ARCH_PANIC_ARCH_H */
/** @} */

96
core/include/arch/thread_arch.h
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@ -1,96 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup core_arch
* @{
*
* @file
* @brief Architecture dependent kernel interface for handling and managing threads
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef ARCH_THREAD_ARCH_H
#define ARCH_THREAD_ARCH_H
#include "kernel_defines.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Define the mapping between the architecture independent interfaces
* and the kernel internal interfaces
*
* This mapping is done for compatibility of existing platforms,
* new platforms should always use the *_arch_* interfaces.
* @{
*/
#ifdef COREIF_NG
#define thread_stack_init thread_arch_stack_init
#define thread_print_stack thread_arch_stack_print
#define cpu_switch_context_exit thread_arch_start_threading
#define thread_yield_higher thread_arch_yield
#endif
/** @} */
/**
* @brief Prototype for a thread entry function
*/
typedef void *(*thread_task_func_t)(void *arg);
/**
* @brief Initialize a thread's stack
*
* @param[in] task_func pointer to the thread's code
* @param[in] arg argument to task_func
* @param[in] stack_start pointer to the start address of the thread
* @param[in] stack_size the maximum size of the stack
*
* @return pointer to the new top of the stack
*/
char *thread_arch_stack_init(thread_task_func_t task_func, void *arg, void *stack_start, int stack_size);
/**
* @brief Get the number of bytes used on the ISR stack
*/
int thread_arch_isr_stack_usage(void);
/**
* @brief Get the current ISR stack pointer
*/
void *thread_arch_isr_stack_pointer(void);
/**
* @brief Get the start of the ISR stack
*/
void *thread_arch_isr_stack_start(void);
/**
* @brief Print the current stack to stdout
*/
void thread_arch_stack_print(void);
/**
* @brief Start threading by loading a threads initial information from the stack
*/
void thread_arch_start_threading(void) NORETURN;
/**
* @brief Pause the current thread and schedule the next pending, if available
*/
void thread_arch_yield(void);
#ifdef __cplusplus
}
#endif
#endif /* ARCH_THREAD_ARCH_H */
/** @} */

1
core/include/irq.h
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@ -22,7 +22,6 @@
#define IRQ_H
#include <stdbool.h>
#include "arch/irq_arch.h"
#ifdef __cplusplus
extern "C" {

8
core/include/panic.h
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@ -74,6 +74,14 @@ typedef enum {
* */
NORETURN void core_panic(core_panic_t crash_code, const char *message);
/**
* @brief architecture dependent handling of a panic case
*
* This function gives the CPU the possibility to execute architecture
* dependent code in case of a severe error.
*/
void panic_arch(void);
#ifdef __cplusplus
}
#endif

26
core/include/thread.h
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@ -122,7 +122,6 @@
#include "clist.h"
#include "cib.h"
#include "msg.h"
#include "arch/thread_arch.h"
#include "cpu_conf.h"
#include "sched.h"
@ -167,6 +166,11 @@
#define STATUS_PENDING 10 /**< waiting to be scheduled to run */
/** @} */
/**
* @brief Prototype for a thread entry function
*/
typedef void *(*thread_task_func_t)(void *arg);
/**
* @brief @c thread_t holds thread's context data.
*/
@ -462,6 +466,26 @@ const char *thread_getname(kernel_pid_t pid);
uintptr_t thread_measure_stack_free(char *stack);
#endif /* DEVELHELP */
/**
* @brief Get the number of bytes used on the ISR stack
*/
int thread_isr_stack_usage(void);
/**
* @brief Get the current ISR stack pointer
*/
void *thread_isr_stack_pointer(void);
/**
* @brief Get the start of the ISR stack
*/
void *thread_isr_stack_start(void);
/**
* @brief Print the current stack to stdout
*/
void thread_stack_print(void);
/**
* @brief Prints human readable, ps-like thread information for debugging purposes
*/

1
core/panic.c
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@ -29,7 +29,6 @@
#include "cpu.h"
#include "irq.h"
#include "panic.h"
#include "arch/panic_arch.h"
#include "periph/pm.h"
#include "log.h"

3
cpu/atmega1281/Makefile.include
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@ -1,6 +1,3 @@
# this CPU implementation is using the new core/CPU interface
export CFLAGS += -DCOREIF_NG=1
# tell the build system that the CPU depends on the atmega common files
USEMODULE += atmega_common

3
cpu/atmega2560/Makefile.include
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@ -1,6 +1,3 @@
# this CPU implementation is using the new core/CPU interface
export CFLAGS += -DCOREIF_NG=1
# tell the build system that the CPU depends on the atmega common files
USEMODULE += atmega_common

3
cpu/atmega328p/Makefile.include
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@ -1,6 +1,3 @@
# this CPU implementation is using the new core/CPU interface
export CFLAGS += -DCOREIF_NG=1
# tell the build system that the CPU depends on the atmega common files
USEMODULE += atmega_common

10
cpu/atmega_common/irq_arch.c
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@ -21,7 +21,7 @@
#include <stdint.h>
#include <stdio.h>
#include "arch/irq_arch.h"
#include "irq.h"
#include "cpu.h"
/**
@ -58,7 +58,7 @@ __attribute__((always_inline)) inline void __set_interrupt_state(uint8_t state)
/**
* @brief Disable all maskable interrupts
*/
unsigned int irq_arch_disable(void)
unsigned int irq_disable(void)
{
uint8_t mask = __get_interrupt_state();
cli();
@ -68,7 +68,7 @@ unsigned int irq_arch_disable(void)
/**
* @brief Enable all maskable interrupts
*/
unsigned int irq_arch_enable(void)
unsigned int irq_enable(void)
{
sei();
return __get_interrupt_state();
@ -77,7 +77,7 @@ unsigned int irq_arch_enable(void)
/**
* @brief Restore the state of the IRQ flags
*/
void irq_arch_restore(unsigned int state)
void irq_restore(unsigned int state)
{
__set_interrupt_state(state);
}
@ -85,7 +85,7 @@ void irq_arch_restore(unsigned int state)
/**
* @brief See if the current context is inside an ISR
*/
int irq_arch_in(void)
int irq_is_in(void)
{
return __in_isr;
}

15
cpu/atmega_common/thread_arch.c
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@ -20,7 +20,6 @@
#include <stdio.h>
#include "arch/thread_arch.h"
#include "thread.h"
#include "sched.h"
#include "irq.h"
@ -64,7 +63,7 @@ static void __enter_thread_mode(void);
* @brief Since AVR doesn't support direct manipulation of the program counter we
* model a stack like it would be left by __context_save().
* The resulting layout in memory is the following:
* ---------------thread_t (not created by thread_arch_stack_init) ----------
* ---------------thread_t (not created by thread_stack_init) ----------
* local variables (a temporary value and the stackpointer)
* -----------------------------------------------------------------------
* a marker (AFFE) - for debugging purposes (helps finding the stack
@ -92,7 +91,7 @@ static void __enter_thread_mode(void);
* it inside of the programm counter of the MCU.
* if task_func returns sched_task_exit gets popped into the PC
*/
char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
char *thread_stack_init(thread_task_func_t task_func, void *arg,
void *stack_start, int stack_size)
{
uint16_t tmp_adress;
@ -193,14 +192,14 @@ char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
}
/**
* @brief thread_arch_stack_print prints the stack to stdout.
* @brief thread_stack_print prints the stack to stdout.
* It depends on getting the correct values for stack_start, stack_size and sp
* from sched_active_thread.
* Maybe it would be good to change that to way that is less dependant on
* getting correct values elsewhere (since it is a debugging tool and in the
* presence of bugs the data may be corrupted).
*/
void thread_arch_stack_print(void)
void thread_stack_print(void)
{
uint8_t found_marker = 1;
uint8_t *sp = (uint8_t *)sched_active_thread->sp;
@ -223,8 +222,8 @@ void thread_arch_stack_print(void)
printf("stack size: %u bytes\n", size);
}
void thread_arch_start_threading(void) __attribute__((naked));
void thread_arch_start_threading(void)
void cpu_switch_context_exit(void) __attribute__((naked));
void cpu_switch_context_exit(void)
{
sched_run();
AVR_CONTEXT_SWAP_INIT;
@ -245,7 +244,7 @@ void NORETURN __enter_thread_mode(void)
UNREACHABLE();
}
void thread_arch_yield(void) {
void thread_yield_higher(void) {
AVR_CONTEXT_SWAP_TRIGGER;
}

10
cpu/cortexm_common/irq_arch.c
View File

@ -19,13 +19,13 @@
*/
#include <stdint.h>
#include "arch/irq_arch.h"
#include "irq.h"
#include "cpu.h"
/**
* @brief Disable all maskable interrupts
*/
unsigned int irq_arch_disable(void)
unsigned int irq_disable(void)
{
uint32_t mask = __get_PRIMASK();
__disable_irq();
@ -35,7 +35,7 @@ unsigned int irq_arch_disable(void)
/**
* @brief Enable all maskable interrupts
*/
__attribute__((used)) unsigned int irq_arch_enable(void)
__attribute__((used)) unsigned int irq_enable(void)
{
__enable_irq();
return __get_PRIMASK();
@ -44,7 +44,7 @@ __attribute__((used)) unsigned int irq_arch_enable(void)
/**
* @brief Restore the state of the IRQ flags
*/
void irq_arch_restore(unsigned int state)
void irq_restore(unsigned int state)
{
__set_PRIMASK(state);
}
@ -52,7 +52,7 @@ void irq_arch_restore(unsigned int state)
/**
* @brief See if the current context is inside an ISR
*/
int irq_arch_in(void)
int irq_is_in(void)
{
return (__get_IPSR() & 0xFF);
}

19
cpu/cortexm_common/thread_arch.c
View File

@ -94,7 +94,6 @@
#include <stdio.h>
#include "arch/thread_arch.h"
#include "sched.h"
#include "thread.h"
#include "irq.h"
@ -106,7 +105,7 @@ extern uint32_t _sstack;
/**
* @brief Noticeable marker marking the beginning of a stack segment
*
* This marker is used e.g. by *thread_arch_start_threading* to identify the
* This marker is used e.g. by *cpu_switch_context_exit* to identify the
* stacks beginning.
*/
#define STACK_MARKER (0x77777777)
@ -124,7 +123,7 @@ extern uint32_t _sstack;
*/
#define EXCEPT_RET_TASK_MODE (0xfffffffd)
char *thread_arch_stack_init(thread_task_func_t task_func,
char *thread_stack_init(thread_task_func_t task_func,
void *arg,
void *stack_start,
int stack_size)
@ -236,7 +235,7 @@ char *thread_arch_stack_init(thread_task_func_t task_func,
return (char*) stk;
}
void thread_arch_stack_print(void)
void thread_stack_print(void)
{
int count = 0;
uint32_t *sp = (uint32_t *)sched_active_thread->sp;
@ -255,7 +254,7 @@ void thread_arch_stack_print(void)
}
/* This function returns the number of bytes used on the ISR stack */
int thread_arch_isr_stack_usage(void)
int thread_isr_stack_usage(void)
{
uint32_t *ptr = &_sstack;
@ -267,21 +266,21 @@ int thread_arch_isr_stack_usage(void)
return num_used_words * sizeof(*ptr);
}
void *thread_arch_isr_stack_pointer(void)
void *thread_isr_stack_pointer(void)
{
void *msp = (void *)__get_MSP();
return msp;
}
void *thread_arch_isr_stack_start(void)
void *thread_isr_stack_start(void)
{
return (void *)&_sstack;
}
__attribute__((naked)) void NORETURN thread_arch_start_threading(void)
__attribute__((naked)) void NORETURN cpu_switch_context_exit(void)
{
__asm__ volatile (
"bl irq_arch_enable \n" /* enable IRQs to make the SVC
"bl irq_enable \n" /* enable IRQs to make the SVC
* interrupt is reachable */
"svc #1 \n" /* trigger the SVC interrupt */
"unreachable%=: \n" /* this loop is unreachable */
@ -289,7 +288,7 @@ __attribute__((naked)) void NORETURN thread_arch_start_threading(void)
:::);
}
void thread_arch_yield(void)
void thread_yield_higher(void)
{
/* trigger the PENDSV interrupt to run scheduler and schedule new thread if
* applicable */

3
cpu/lm4f120/cpu.c
View File

@ -21,8 +21,7 @@
#include "irq.h"
#include "sched.h"
#include "thread.h"
#include "arch/thread_arch.h"
#include "arch/irq_arch.h"
#include "irq.h"
#include "periph/init.h"
#include "periph_conf.h"

2
cpu/mips32r2_common/cpu.c
View File

@ -15,7 +15,7 @@
#include "periph/uart.h"
#include "periph/timer.h"
#include "arch/panic_arch.h"
#include "panic.h"
#include "kernel_init.h"
#include "cpu.h"
#include "board.h"

10
cpu/mips32r2_common/irq_arch.c
View File

@ -7,10 +7,10 @@
*/
#include <mips/m32c0.h>
#include "arch/irq_arch.h"
#include "irq.h"
unsigned int irq_arch_enable(void)
unsigned int irq_enable(void)
{
unsigned int status;
@ -18,7 +18,7 @@ unsigned int irq_arch_enable(void)
return status;
}
unsigned int irq_arch_disable(void)
unsigned int irq_disable(void)
{
unsigned int status;
@ -26,7 +26,7 @@ unsigned int irq_arch_disable(void)
return status;
}
void irq_arch_restore(unsigned int state)
void irq_restore(unsigned int state)
{
if (state & SR_IE) {
mips32_bs_c0(C0_STATUS, SR_IE);
@ -36,7 +36,7 @@ void irq_arch_restore(unsigned int state)
}
}
int irq_arch_in(void)
int irq_is_in(void)
{
return (mips32_get_c0(C0_STATUS) & SR_EXL) != 0;
}

16
cpu/mips32r2_common/periph/timer.c
View File

@ -126,9 +126,9 @@ int timer_set(tim_t dev, int channel, unsigned int timeout)
timeout >>= TIMER_ACCURACY_SHIFT;
timeout <<= TIMER_ACCURACY_SHIFT;
uint32_t status = irq_arch_disable();
uint32_t status = irq_disable();
compares[channel] = counter + timeout;
irq_arch_restore(status);
irq_restore(status);
return channel;
}
@ -141,9 +141,9 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
value >>= TIMER_ACCURACY_SHIFT;
value <<= TIMER_ACCURACY_SHIFT;
uint32_t status = irq_arch_disable();
uint32_t status = irq_disable();
compares[channel] = value;
irq_arch_restore(status);
irq_restore(status);
return channel;
}
@ -153,9 +153,9 @@ int timer_clear(tim_t dev, int channel)
assert(dev == 0);
assert(channel < CHANNELS);
uint32_t status = irq_arch_disable();
uint32_t status = irq_disable();
compares[channel] = 0;
irq_arch_restore(status);
irq_restore(status);
return channel;
}
@ -225,9 +225,9 @@ void __attribute__ ((interrupt("vector=hw5"))) _mips_isr_hw5(void)
#ifdef EIC_IRQ
eic_irq_ack(EIC_IRQ_TIMER);
#endif
uint32_t status = irq_arch_disable();
uint32_t status = irq_disable();
counter += TIMER_ACCURACY;
irq_arch_restore(status);
irq_restore(status);
if (counter == compares[0]) {
/*

12
cpu/mips32r2_common/thread_arch.c
View File

@ -60,7 +60,7 @@ static struct fp64ctx *oldfpctx; /* fpu context of last task that executed
* --------------- <--- sched_active_thread->sp
*/
char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
char *thread_stack_init(thread_task_func_t task_func, void *arg,
void *stack_start, int stack_size)
{
/* make sure it is aligned to 8 bytes this is a requirement of the O32 ABI */
@ -106,7 +106,7 @@ char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
return (void *)p;
}
void thread_arch_stack_print(void)
void thread_stack_print(void)
{
uintptr_t *sp = (void *)sched_active_thread->sp;
@ -118,7 +118,7 @@ void thread_arch_stack_print(void)
}
extern void __exception_restore(void);
void thread_arch_start_threading(void)
void cpu_switch_context_exit(void)
{
unsigned int status = mips32_get_c0(C0_STATUS);
@ -140,7 +140,7 @@ void thread_arch_start_threading(void)
UNREACHABLE();
}
void thread_arch_yield(void)
void thread_yield_higher(void)
{
/*
* throw a syscall exception to get into exception level
@ -217,11 +217,11 @@ _mips_handle_exception(struct gpctx *ctx, int exception)
if (syscall_num == __MIPS_UHI_SYSCALL_NUM) {
if (ctx->t2[1] == __MIPS_UHI_WRITE &&
(ctx->a[0] == STDOUT_FILENO || ctx->a[0] == STDERR_FILENO)) {
uint32_t status = irq_arch_disable();
uint32_t status = irq_disable();
uart_write(DEBUG_VIA_UART, (uint8_t *)ctx->a[1], ctx->a[2]);
ctx->v[0] = ctx->a[2];
ctx->epc += 4; /* move PC past the syscall */
irq_arch_restore(status);
irq_restore(status);
return;
}
else if (ctx->t2[1] == __MIPS_UHI_FSTAT &&

6
cpu/msp430_common/cpu.c
View File

@ -34,19 +34,19 @@ __attribute__((naked)) void thread_yield_higher(void)
}
/* This function calculates the ISR_usage */
int thread_arch_isr_stack_usage(void)
int thread_isr_stack_usage(void)
{
/* TODO */
return -1;
}
void *thread_arch_isr_stack_pointer(void)
void *thread_isr_stack_pointer(void)
{
/* TODO */
return (void *)-1;
}
void *thread_arch_isr_stack_start(void)
void *thread_isr_stack_start(void)
{
/* TODO */
return (void *)-1;

4
cpu/native/irq_cpu.c
View File

@ -61,12 +61,12 @@ int _sig_pipefd[2];
static _native_callback_t native_irq_handlers[255];
char sigalt_stk[SIGSTKSZ];
void *thread_arch_isr_stack_pointer(void)
void *thread_isr_stack_pointer(void)
{
return native_isr_context.uc_stack.ss_sp;
}
void *thread_arch_isr_stack_start(void)
void *thread_isr_stack_start(void)
{
return __isr_stack;
}

2
cpu/native/native_cpu.c
View File

@ -97,7 +97,7 @@ void thread_print_stack(void)
}
/* This function calculates the ISR_usage */
int thread_arch_isr_stack_usage(void)
int thread_isr_stack_usage(void)
{
/* TODO */
return -1;

4
cpu/nrf52/vectors.c
View File

@ -59,10 +59,10 @@ WEAK_DEFAULT void isr_swi0(void);
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_arch_yield(void);
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_arch_yield();
thread_yield_higher();
}
#endif

3
makefiles/arch/cortexm.inc.mk
View File

@ -22,9 +22,6 @@ export LINKFLAGS += -T$(LINKER_SCRIPT) -Wl,--fatal-warnings
export LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT) -static -lgcc -nostartfiles
export LINKFLAGS += -Wl,--gc-sections
# This CPU implementation is using the new core/CPU interface:
export CFLAGS += -DCOREIF_NG=1
# Tell the build system that the CPU depends on the Cortex-M common files:
export USEMODULE += cortexm_common
# Export the peripheral drivers to be linked into the final binary:

3
makefiles/arch/mips.inc.mk
View File

@ -64,6 +64,3 @@ export LINKFLAGS += $(MIPS_HAL_LDFLAGS)
export LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts
export LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT)
export LINKFLAGS += -Wl,--gc-sections
# This CPU implementation is using the new core/CPU interface:
export CFLAGS += -DCOREIF_NG=1

6
sys/ps/ps.c
View File

@ -73,9 +73,9 @@ void ps(void)
"state");
#if defined(DEVELHELP) && defined(ISR_STACKSIZE)
int isr_usage = thread_arch_isr_stack_usage();
void *isr_start = thread_arch_isr_stack_start();
void *isr_sp = thread_arch_isr_stack_pointer();
int isr_usage = thread_isr_stack_usage();
void *isr_start = thread_isr_stack_start();
void *isr_sp = thread_isr_stack_pointer();
printf("\t - | isr_stack | - - |"
" - | %6i (%5i) | %10p | %10p\n", ISR_STACKSIZE, isr_usage, isr_start, isr_sp);
overall_stacksz += ISR_STACKSIZE;