From bb51fbb7ecbd63e9407b920a36a36683e1b2e78e Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Fri, 17 Apr 2020 18:35:09 +0200 Subject: [PATCH] cpu/esp32: fix GPIO32 and GPIO 33 as I2C pins GPIO32 and GPIO33 are used during boot to start an 32.768 kHz XTAL if it is connected to these GPIOs. If the 32.768 kHz XTAL is not connected, these pins can be used digital IO. However, the 32.678 kHz XTAL has to be disabled explicitly in this case. Furthermore, the handling of GPIOs greater than GPIO31 had to be fixed in I2C software implementation. --- cpu/esp32/startup.c | 1 + cpu/esp_common/periph/i2c_sw.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/cpu/esp32/startup.c b/cpu/esp32/startup.c index 3f08a1d659..2f5bb48fe1 100644 --- a/cpu/esp32/startup.c +++ b/cpu/esp32/startup.c @@ -228,6 +228,7 @@ static void IRAM system_clk_init (void) rtc_select_slow_clk(RTC_SLOW_FREQ_32K_XTAL); #else /* set SLOW_CLK to internal low power clock of 150 kHz */ + rtc_clk_32k_enable(false); rtc_select_slow_clk(RTC_SLOW_FREQ_RTC); #endif diff --git a/cpu/esp_common/periph/i2c_sw.c b/cpu/esp_common/periph/i2c_sw.c index 1ced515f05..0c96435a60 100644 --- a/cpu/esp_common/periph/i2c_sw.c +++ b/cpu/esp_common/periph/i2c_sw.c @@ -54,8 +54,8 @@ #define I2C_CLOCK_STRETCH 200 /* gpio access macros */ -#define GPIO_SET(l,h,b) if (b < 32) GPIO.l = BIT(b); else GPIO.h.val = BIT(32-b) -#define GPIO_GET(l,h,b) ((b < 32) ? GPIO.l & BIT(b) : GPIO.h.val & BIT(32-b)) +#define GPIO_SET(l,h,b) if (b < 32) GPIO.l = BIT(b); else GPIO.h.val = BIT(b-32) +#define GPIO_GET(l,h,b) ((b < 32) ? GPIO.l & BIT(b) : GPIO.h.val & BIT(b-32)) #else /* MCU_ESP32 */